r200: Remove support for software-only NV_vertex_program.
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.c
1 /**************************************************************************
2
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5
6 All Rights Reserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file radeon_screen.c
32 * Screen initialization functions for the Radeon driver.
33 *
34 * \author Kevin E. Martin <martin@valinux.com>
35 * \author Gareth Hughes <gareth@valinux.com>
36 */
37
38 #include <errno.h>
39 #include "main/glheader.h"
40 #include "main/imports.h"
41 #include "main/mtypes.h"
42 #include "main/framebuffer.h"
43 #include "main/renderbuffer.h"
44 #include "main/fbobject.h"
45 #include "swrast/s_renderbuffer.h"
46
47 #define STANDALONE_MMIO
48 #include "radeon_chipset.h"
49 #include "radeon_macros.h"
50 #include "radeon_screen.h"
51 #include "radeon_common.h"
52 #include "radeon_common_context.h"
53 #if defined(RADEON_R100)
54 #include "radeon_context.h"
55 #include "radeon_tex.h"
56 #elif defined(RADEON_R200)
57 #include "r200_context.h"
58 #include "r200_tex.h"
59 #endif
60
61 #include "utils.h"
62
63 #include "GL/internal/dri_interface.h"
64
65 /* Radeon configuration
66 */
67 #include "xmlpool.h"
68
69 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
70 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
71 DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
72 DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
73 DRI_CONF_OPT_END
74
75 #if defined(RADEON_R100) /* R100 */
76 PUBLIC const char __driConfigOptions[] =
77 DRI_CONF_BEGIN
78 DRI_CONF_SECTION_PERFORMANCE
79 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
80 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
81 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
82 DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
83 DRI_CONF_HYPERZ(false)
84 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
85 DRI_CONF_SECTION_END
86 DRI_CONF_SECTION_QUALITY
87 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
88 DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
89 DRI_CONF_NO_NEG_LOD_BIAS(false)
90 DRI_CONF_FORCE_S3TC_ENABLE(false)
91 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
92 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
93 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
94 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
95 DRI_CONF_SECTION_END
96 DRI_CONF_SECTION_DEBUG
97 DRI_CONF_NO_RAST(false)
98 DRI_CONF_SECTION_END
99 DRI_CONF_END;
100 static const GLuint __driNConfigOptions = 15;
101
102 #elif defined(RADEON_R200)
103
104 PUBLIC const char __driConfigOptions[] =
105 DRI_CONF_BEGIN
106 DRI_CONF_SECTION_PERFORMANCE
107 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
108 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
109 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
110 DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
111 DRI_CONF_HYPERZ(false)
112 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
113 DRI_CONF_SECTION_END
114 DRI_CONF_SECTION_QUALITY
115 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
116 DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
117 DRI_CONF_NO_NEG_LOD_BIAS(false)
118 DRI_CONF_FORCE_S3TC_ENABLE(false)
119 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
120 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
121 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
122 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
123 DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
124 DRI_CONF_SECTION_END
125 DRI_CONF_SECTION_DEBUG
126 DRI_CONF_NO_RAST(false)
127 DRI_CONF_SECTION_END
128 DRI_CONF_END;
129 static const GLuint __driNConfigOptions = 16;
130
131 #endif
132
133 #ifndef RADEON_INFO_TILE_CONFIG
134 #define RADEON_INFO_TILE_CONFIG 0x6
135 #endif
136
137 static int
138 radeonGetParam(__DRIscreen *sPriv, int param, void *value)
139 {
140 int ret;
141 drm_radeon_getparam_t gp = { 0 };
142 struct drm_radeon_info info = { 0 };
143
144 if (sPriv->drm_version.major >= 2) {
145 info.value = (uint64_t)(uintptr_t)value;
146 switch (param) {
147 case RADEON_PARAM_DEVICE_ID:
148 info.request = RADEON_INFO_DEVICE_ID;
149 break;
150 case RADEON_PARAM_NUM_GB_PIPES:
151 info.request = RADEON_INFO_NUM_GB_PIPES;
152 break;
153 case RADEON_PARAM_NUM_Z_PIPES:
154 info.request = RADEON_INFO_NUM_Z_PIPES;
155 break;
156 case RADEON_INFO_TILE_CONFIG:
157 info.request = RADEON_INFO_TILE_CONFIG;
158 break;
159 default:
160 return -EINVAL;
161 }
162 ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info));
163 } else {
164 gp.param = param;
165 gp.value = value;
166
167 ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
168 }
169 return ret;
170 }
171
172 #if defined(RADEON_R100)
173 static const __DRItexBufferExtension radeonTexBufferExtension = {
174 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
175 radeonSetTexBuffer,
176 radeonSetTexBuffer2,
177 };
178 #elif defined(RADEON_R200)
179 static const __DRItexBufferExtension r200TexBufferExtension = {
180 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
181 r200SetTexBuffer,
182 r200SetTexBuffer2,
183 };
184 #endif
185
186 static void
187 radeonDRI2Flush(__DRIdrawable *drawable)
188 {
189 radeonContextPtr rmesa;
190
191 rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
192 radeonFlush(&rmesa->glCtx);
193 }
194
195 static const struct __DRI2flushExtensionRec radeonFlushExtension = {
196 { __DRI2_FLUSH, __DRI2_FLUSH_VERSION },
197 radeonDRI2Flush,
198 dri2InvalidateDrawable,
199 };
200
201 static __DRIimage *
202 radeon_create_image_from_name(__DRIscreen *screen,
203 int width, int height, int format,
204 int name, int pitch, void *loaderPrivate)
205 {
206 __DRIimage *image;
207 radeonScreenPtr radeonScreen = screen->driverPrivate;
208
209 if (name == 0)
210 return NULL;
211
212 image = calloc(1, sizeof *image);
213 if (image == NULL)
214 return NULL;
215
216 switch (format) {
217 case __DRI_IMAGE_FORMAT_RGB565:
218 image->format = MESA_FORMAT_RGB565;
219 image->internal_format = GL_RGB;
220 image->data_type = GL_UNSIGNED_BYTE;
221 break;
222 case __DRI_IMAGE_FORMAT_XRGB8888:
223 image->format = MESA_FORMAT_XRGB8888;
224 image->internal_format = GL_RGB;
225 image->data_type = GL_UNSIGNED_BYTE;
226 break;
227 case __DRI_IMAGE_FORMAT_ARGB8888:
228 image->format = MESA_FORMAT_ARGB8888;
229 image->internal_format = GL_RGBA;
230 image->data_type = GL_UNSIGNED_BYTE;
231 break;
232 default:
233 free(image);
234 return NULL;
235 }
236
237 image->data = loaderPrivate;
238 image->cpp = _mesa_get_format_bytes(image->format);
239 image->width = width;
240 image->pitch = pitch;
241 image->height = height;
242
243 image->bo = radeon_bo_open(radeonScreen->bom,
244 (uint32_t)name,
245 image->pitch * image->height * image->cpp,
246 0,
247 RADEON_GEM_DOMAIN_VRAM,
248 0);
249
250 if (image->bo == NULL) {
251 free(image);
252 return NULL;
253 }
254
255 return image;
256 }
257
258 static __DRIimage *
259 radeon_create_image_from_renderbuffer(__DRIcontext *context,
260 int renderbuffer, void *loaderPrivate)
261 {
262 __DRIimage *image;
263 radeonContextPtr radeon = context->driverPrivate;
264 struct gl_renderbuffer *rb;
265 struct radeon_renderbuffer *rrb;
266
267 rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer);
268 if (!rb) {
269 _mesa_error(&radeon->glCtx,
270 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
271 return NULL;
272 }
273
274 rrb = radeon_renderbuffer(rb);
275 image = calloc(1, sizeof *image);
276 if (image == NULL)
277 return NULL;
278
279 image->internal_format = rb->InternalFormat;
280 image->format = rb->Format;
281 image->cpp = rrb->cpp;
282 image->data_type = GL_UNSIGNED_BYTE;
283 image->data = loaderPrivate;
284 radeon_bo_ref(rrb->bo);
285 image->bo = rrb->bo;
286
287 image->width = rb->Width;
288 image->height = rb->Height;
289 image->pitch = rrb->pitch / image->cpp;
290
291 return image;
292 }
293
294 static void
295 radeon_destroy_image(__DRIimage *image)
296 {
297 radeon_bo_unref(image->bo);
298 free(image);
299 }
300
301 static __DRIimage *
302 radeon_create_image(__DRIscreen *screen,
303 int width, int height, int format,
304 unsigned int use,
305 void *loaderPrivate)
306 {
307 __DRIimage *image;
308 radeonScreenPtr radeonScreen = screen->driverPrivate;
309
310 image = calloc(1, sizeof *image);
311 if (image == NULL)
312 return NULL;
313
314 image->dri_format = format;
315
316 switch (format) {
317 case __DRI_IMAGE_FORMAT_RGB565:
318 image->format = MESA_FORMAT_RGB565;
319 image->internal_format = GL_RGB;
320 image->data_type = GL_UNSIGNED_BYTE;
321 break;
322 case __DRI_IMAGE_FORMAT_XRGB8888:
323 image->format = MESA_FORMAT_XRGB8888;
324 image->internal_format = GL_RGB;
325 image->data_type = GL_UNSIGNED_BYTE;
326 break;
327 case __DRI_IMAGE_FORMAT_ARGB8888:
328 image->format = MESA_FORMAT_ARGB8888;
329 image->internal_format = GL_RGBA;
330 image->data_type = GL_UNSIGNED_BYTE;
331 break;
332 default:
333 free(image);
334 return NULL;
335 }
336
337 image->data = loaderPrivate;
338 image->cpp = _mesa_get_format_bytes(image->format);
339 image->width = width;
340 image->height = height;
341 image->pitch = ((image->cpp * image->width + 255) & ~255) / image->cpp;
342
343 image->bo = radeon_bo_open(radeonScreen->bom,
344 0,
345 image->pitch * image->height * image->cpp,
346 0,
347 RADEON_GEM_DOMAIN_VRAM,
348 0);
349
350 if (image->bo == NULL) {
351 free(image);
352 return NULL;
353 }
354
355 return image;
356 }
357
358 static GLboolean
359 radeon_query_image(__DRIimage *image, int attrib, int *value)
360 {
361 switch (attrib) {
362 case __DRI_IMAGE_ATTRIB_STRIDE:
363 *value = image->pitch * image->cpp;
364 return GL_TRUE;
365 case __DRI_IMAGE_ATTRIB_HANDLE:
366 *value = image->bo->handle;
367 return GL_TRUE;
368 case __DRI_IMAGE_ATTRIB_NAME:
369 radeon_gem_get_kernel_name(image->bo, (uint32_t *) value);
370 return GL_TRUE;
371 default:
372 return GL_FALSE;
373 }
374 }
375
376 static struct __DRIimageExtensionRec radeonImageExtension = {
377 { __DRI_IMAGE, 1 },
378 radeon_create_image_from_name,
379 radeon_create_image_from_renderbuffer,
380 radeon_destroy_image,
381 radeon_create_image,
382 radeon_query_image
383 };
384
385 static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
386 {
387 screen->device_id = device_id;
388 screen->chip_flags = 0;
389 switch ( device_id ) {
390 #if defined(RADEON_R100)
391 case PCI_CHIP_RN50_515E:
392 case PCI_CHIP_RN50_5969:
393 return -1;
394
395 case PCI_CHIP_RADEON_LY:
396 case PCI_CHIP_RADEON_LZ:
397 case PCI_CHIP_RADEON_QY:
398 case PCI_CHIP_RADEON_QZ:
399 screen->chip_family = CHIP_FAMILY_RV100;
400 break;
401
402 case PCI_CHIP_RS100_4136:
403 case PCI_CHIP_RS100_4336:
404 screen->chip_family = CHIP_FAMILY_RS100;
405 break;
406
407 case PCI_CHIP_RS200_4137:
408 case PCI_CHIP_RS200_4337:
409 case PCI_CHIP_RS250_4237:
410 case PCI_CHIP_RS250_4437:
411 screen->chip_family = CHIP_FAMILY_RS200;
412 break;
413
414 case PCI_CHIP_RADEON_QD:
415 case PCI_CHIP_RADEON_QE:
416 case PCI_CHIP_RADEON_QF:
417 case PCI_CHIP_RADEON_QG:
418 /* all original radeons (7200) presumably have a stencil op bug */
419 screen->chip_family = CHIP_FAMILY_R100;
420 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
421 break;
422
423 case PCI_CHIP_RV200_QW:
424 case PCI_CHIP_RV200_QX:
425 case PCI_CHIP_RADEON_LW:
426 case PCI_CHIP_RADEON_LX:
427 screen->chip_family = CHIP_FAMILY_RV200;
428 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
429 break;
430
431 #elif defined(RADEON_R200)
432 case PCI_CHIP_R200_BB:
433 case PCI_CHIP_R200_QH:
434 case PCI_CHIP_R200_QL:
435 case PCI_CHIP_R200_QM:
436 screen->chip_family = CHIP_FAMILY_R200;
437 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
438 break;
439
440 case PCI_CHIP_RV250_If:
441 case PCI_CHIP_RV250_Ig:
442 case PCI_CHIP_RV250_Ld:
443 case PCI_CHIP_RV250_Lf:
444 case PCI_CHIP_RV250_Lg:
445 screen->chip_family = CHIP_FAMILY_RV250;
446 screen->chip_flags = R200_CHIPSET_YCBCR_BROKEN | RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
447 break;
448
449 case PCI_CHIP_RV280_4C6E:
450 case PCI_CHIP_RV280_5960:
451 case PCI_CHIP_RV280_5961:
452 case PCI_CHIP_RV280_5962:
453 case PCI_CHIP_RV280_5964:
454 case PCI_CHIP_RV280_5965:
455 case PCI_CHIP_RV280_5C61:
456 case PCI_CHIP_RV280_5C63:
457 screen->chip_family = CHIP_FAMILY_RV280;
458 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
459 break;
460
461 case PCI_CHIP_RS300_5834:
462 case PCI_CHIP_RS300_5835:
463 case PCI_CHIP_RS350_7834:
464 case PCI_CHIP_RS350_7835:
465 screen->chip_family = CHIP_FAMILY_RS300;
466 screen->chip_flags = RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
467 break;
468 #endif
469
470 default:
471 fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
472 device_id);
473 return -1;
474 }
475
476 return 0;
477 }
478
479 static radeonScreenPtr
480 radeonCreateScreen2(__DRIscreen *sPriv)
481 {
482 radeonScreenPtr screen;
483 int i;
484 int ret;
485 uint32_t device_id = 0;
486
487 /* Allocate the private area */
488 screen = calloc(1, sizeof(*screen));
489 if ( !screen ) {
490 fprintf(stderr, "%s: Could not allocate memory for screen structure", __FUNCTION__);
491 fprintf(stderr, "leaving here\n");
492 return NULL;
493 }
494
495 radeon_init_debug();
496
497 /* parse information in __driConfigOptions */
498 driParseOptionInfo (&screen->optionCache,
499 __driConfigOptions, __driNConfigOptions);
500
501 screen->chip_flags = 0;
502
503 screen->irq = 1;
504
505 ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
506 if (ret) {
507 free( screen );
508 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
509 return NULL;
510 }
511
512 ret = radeon_set_screen_flags(screen, device_id);
513 if (ret == -1)
514 return NULL;
515
516 if (getenv("RADEON_NO_TCL"))
517 screen->chip_flags &= ~RADEON_CHIPSET_TCL;
518
519 i = 0;
520 screen->extensions[i++] = &dri2ConfigQueryExtension.base;
521
522 #if defined(RADEON_R100)
523 screen->extensions[i++] = &radeonTexBufferExtension.base;
524 #elif defined(RADEON_R200)
525 screen->extensions[i++] = &r200TexBufferExtension.base;
526 #endif
527
528 screen->extensions[i++] = &radeonFlushExtension.base;
529 screen->extensions[i++] = &radeonImageExtension.base;
530
531 screen->extensions[i++] = NULL;
532 sPriv->extensions = screen->extensions;
533
534 screen->driScreen = sPriv;
535 screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
536 if (screen->bom == NULL) {
537 free(screen);
538 return NULL;
539 }
540 return screen;
541 }
542
543 /* Destroy the device specific screen private data struct.
544 */
545 static void
546 radeonDestroyScreen( __DRIscreen *sPriv )
547 {
548 radeonScreenPtr screen = (radeonScreenPtr)sPriv->driverPrivate;
549
550 if (!screen)
551 return;
552
553 #ifdef RADEON_BO_TRACK
554 radeon_tracker_print(&screen->bom->tracker, stderr);
555 #endif
556 radeon_bo_manager_gem_dtor(screen->bom);
557
558 /* free all option information */
559 driDestroyOptionInfo (&screen->optionCache);
560
561 free( screen );
562 sPriv->driverPrivate = NULL;
563 }
564
565
566 /* Initialize the driver specific screen private data.
567 */
568 static GLboolean
569 radeonInitDriver( __DRIscreen *sPriv )
570 {
571 sPriv->driverPrivate = (void *) radeonCreateScreen2( sPriv );
572 if ( !sPriv->driverPrivate ) {
573 radeonDestroyScreen( sPriv );
574 return GL_FALSE;
575 }
576
577 return GL_TRUE;
578 }
579
580
581
582 /**
583 * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
584 *
585 * \todo This function (and its interface) will need to be updated to support
586 * pbuffers.
587 */
588 static GLboolean
589 radeonCreateBuffer( __DRIscreen *driScrnPriv,
590 __DRIdrawable *driDrawPriv,
591 const struct gl_config *mesaVis,
592 GLboolean isPixmap )
593 {
594 radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->driverPrivate;
595
596 const GLboolean swDepth = GL_FALSE;
597 const GLboolean swAlpha = GL_FALSE;
598 const GLboolean swAccum = mesaVis->accumRedBits > 0;
599 const GLboolean swStencil = mesaVis->stencilBits > 0 &&
600 mesaVis->depthBits != 24;
601 gl_format rgbFormat;
602 struct radeon_framebuffer *rfb;
603
604 if (isPixmap)
605 return GL_FALSE; /* not implemented */
606
607 rfb = CALLOC_STRUCT(radeon_framebuffer);
608 if (!rfb)
609 return GL_FALSE;
610
611 _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
612
613 if (mesaVis->redBits == 5)
614 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_RGB565 : MESA_FORMAT_RGB565_REV;
615 else if (mesaVis->alphaBits == 0)
616 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_XRGB8888 : MESA_FORMAT_XRGB8888_REV;
617 else
618 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB8888_REV;
619
620 /* front color renderbuffer */
621 rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
622 _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
623 rfb->color_rb[0]->has_surface = 1;
624
625 /* back color renderbuffer */
626 if (mesaVis->doubleBufferMode) {
627 rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
628 _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
629 rfb->color_rb[1]->has_surface = 1;
630 }
631
632 if (mesaVis->depthBits == 24) {
633 if (mesaVis->stencilBits == 8) {
634 struct radeon_renderbuffer *depthStencilRb =
635 radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
636 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
637 _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
638 depthStencilRb->has_surface = screen->depthHasSurface;
639 } else {
640 /* depth renderbuffer */
641 struct radeon_renderbuffer *depth =
642 radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
643 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
644 depth->has_surface = screen->depthHasSurface;
645 }
646 } else if (mesaVis->depthBits == 16) {
647 /* just 16-bit depth buffer, no hw stencil */
648 struct radeon_renderbuffer *depth =
649 radeon_create_renderbuffer(MESA_FORMAT_Z16, driDrawPriv);
650 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
651 depth->has_surface = screen->depthHasSurface;
652 }
653
654 _swrast_add_soft_renderbuffers(&rfb->base,
655 GL_FALSE, /* color */
656 swDepth,
657 swStencil,
658 swAccum,
659 swAlpha,
660 GL_FALSE /* aux */);
661 driDrawPriv->driverPrivate = (void *) rfb;
662
663 return (driDrawPriv->driverPrivate != NULL);
664 }
665
666
667 static void radeon_cleanup_renderbuffers(struct radeon_framebuffer *rfb)
668 {
669 struct radeon_renderbuffer *rb;
670
671 rb = rfb->color_rb[0];
672 if (rb && rb->bo) {
673 radeon_bo_unref(rb->bo);
674 rb->bo = NULL;
675 }
676 rb = rfb->color_rb[1];
677 if (rb && rb->bo) {
678 radeon_bo_unref(rb->bo);
679 rb->bo = NULL;
680 }
681 rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH);
682 if (rb && rb->bo) {
683 radeon_bo_unref(rb->bo);
684 rb->bo = NULL;
685 }
686 }
687
688 void
689 radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
690 {
691 struct radeon_framebuffer *rfb;
692 if (!driDrawPriv)
693 return;
694
695 rfb = (void*)driDrawPriv->driverPrivate;
696 if (!rfb)
697 return;
698 radeon_cleanup_renderbuffers(rfb);
699 _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
700 }
701
702 #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
703
704 /**
705 * This is the driver specific part of the createNewScreen entry point.
706 * Called when using DRI2.
707 *
708 * \return the struct gl_config supported by this driver
709 */
710 static const
711 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
712 {
713 GLenum fb_format[3];
714 GLenum fb_type[3];
715 /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
716 * support pageflipping at all.
717 */
718 static const GLenum back_buffer_modes[] = {
719 GLX_NONE, GLX_SWAP_UNDEFINED_OML, /*, GLX_SWAP_COPY_OML*/
720 };
721 uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
722 int color;
723 __DRIconfig **configs = NULL;
724
725 if (!radeonInitDriver(psp)) {
726 return NULL;
727 }
728 depth_bits[0] = 0;
729 stencil_bits[0] = 0;
730 depth_bits[1] = 16;
731 stencil_bits[1] = 0;
732 depth_bits[2] = 24;
733 stencil_bits[2] = 0;
734 depth_bits[3] = 24;
735 stencil_bits[3] = 8;
736
737 msaa_samples_array[0] = 0;
738
739 fb_format[0] = GL_RGB;
740 fb_type[0] = GL_UNSIGNED_SHORT_5_6_5;
741
742 fb_format[1] = GL_BGR;
743 fb_type[1] = GL_UNSIGNED_INT_8_8_8_8_REV;
744
745 fb_format[2] = GL_BGRA;
746 fb_type[2] = GL_UNSIGNED_INT_8_8_8_8_REV;
747
748 for (color = 0; color < ARRAY_SIZE(fb_format); color++) {
749 __DRIconfig **new_configs;
750
751 new_configs = driCreateConfigs(fb_format[color], fb_type[color],
752 depth_bits,
753 stencil_bits,
754 ARRAY_SIZE(depth_bits),
755 back_buffer_modes,
756 ARRAY_SIZE(back_buffer_modes),
757 msaa_samples_array,
758 ARRAY_SIZE(msaa_samples_array),
759 GL_TRUE);
760 configs = driConcatConfigs(configs, new_configs);
761 }
762
763 if (configs == NULL) {
764 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
765 __LINE__);
766 return NULL;
767 }
768
769 return (const __DRIconfig **)configs;
770 }
771
772 const struct __DriverAPIRec driDriverAPI = {
773 .InitScreen = radeonInitScreen2,
774 .DestroyScreen = radeonDestroyScreen,
775 #if defined(RADEON_R200)
776 .CreateContext = r200CreateContext,
777 .DestroyContext = r200DestroyContext,
778 #else
779 .CreateContext = r100CreateContext,
780 .DestroyContext = radeonDestroyContext,
781 #endif
782 .CreateBuffer = radeonCreateBuffer,
783 .DestroyBuffer = radeonDestroyBuffer,
784 .MakeCurrent = radeonMakeCurrent,
785 .UnbindContext = radeonUnbindContext,
786 };
787
788 /* This is the table of extensions that the loader will dlsym() for. */
789 PUBLIC const __DRIextension *__driDriverExtensions[] = {
790 &driCoreExtension.base,
791 &driDRI2Extension.base,
792 NULL
793 };