1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c,v 1.7 2003/03/26 20:43:51 tsi Exp $ */
2 /**************************************************************************
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29 **************************************************************************/
32 * \file radeon_screen.c
33 * Screen initialization functions for the Radeon driver.
35 * \author Kevin E. Martin <martin@valinux.com>
36 * \author Gareth Hughes <gareth@valinux.com>
42 #define STANDALONE_MMIO
43 #include "radeon_context.h"
44 #include "radeon_screen.h"
45 #include "radeon_macros.h"
51 #include "GL/internal/dri_interface.h"
53 /* Radeon configuration
57 const char __driConfigOptions
[] =
59 DRI_CONF_SECTION_PERFORMANCE
60 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN
)
61 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS
)
62 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0
)
63 DRI_CONF_HYPERZ(false)
65 DRI_CONF_SECTION_QUALITY
66 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB
)
67 DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
68 DRI_CONF_NO_NEG_LOD_BIAS(false)
69 DRI_CONF_FORCE_S3TC_ENABLE(false)
70 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER
)
71 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC
)
72 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF
)
74 DRI_CONF_SECTION_DEBUG
75 DRI_CONF_NO_RAST(false)
78 static const GLuint __driNConfigOptions
= 12;
81 /* Including xf86PciInfo.h introduces a bunch of errors...
83 #define PCI_CHIP_RADEON_QD 0x5144
84 #define PCI_CHIP_RADEON_QE 0x5145
85 #define PCI_CHIP_RADEON_QF 0x5146
86 #define PCI_CHIP_RADEON_QG 0x5147
88 #define PCI_CHIP_RADEON_QY 0x5159
89 #define PCI_CHIP_RADEON_QZ 0x515A
91 #define PCI_CHIP_RADEON_LW 0x4C57 /* mobility 7 - has tcl */
92 #define PCI_CHIP_RADEON_LX 0x4C58 /* mobility FireGL 7800 m7 */
94 #define PCI_CHIP_RADEON_LY 0x4C59
95 #define PCI_CHIP_RADEON_LZ 0x4C5A
97 #define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */
98 #define PCI_CHIP_RV200_QX 0x5158
101 #define PCI_CHIP_RS100_4136 0x4136
102 #define PCI_CHIP_RS200_4137 0x4137
103 #define PCI_CHIP_RS250_4237 0x4237
104 #define PCI_CHIP_RS100_4336 0x4336
105 #define PCI_CHIP_RS200_4337 0x4337
106 #define PCI_CHIP_RS250_4437 0x4437
109 #ifdef USE_NEW_INTERFACE
110 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
111 #endif /* USE_NEW_INTERFACE */
113 static int getSwapInfo( __DRIdrawablePrivate
*dPriv
, __DRIswapInfo
* sInfo
);
115 #ifdef USE_NEW_INTERFACE
116 static __GLcontextModes
*
117 radeonFillInModes( unsigned pixel_bits
, unsigned depth_bits
,
118 unsigned stencil_bits
, GLboolean have_back_buffer
)
120 __GLcontextModes
* modes
;
121 __GLcontextModes
* m
;
123 unsigned depth_buffer_factor
;
124 unsigned back_buffer_factor
;
128 /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
129 * enough to add support. Basically, if a context is created with an
130 * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
131 * will never be used.
133 static const GLenum back_buffer_modes
[] = {
134 GLX_NONE
, GLX_SWAP_UNDEFINED_OML
/*, GLX_SWAP_COPY_OML */
137 uint8_t depth_bits_array
[2];
138 uint8_t stencil_bits_array
[2];
141 depth_bits_array
[0] = depth_bits
;
142 depth_bits_array
[1] = depth_bits
;
144 /* Just like with the accumulation buffer, always provide some modes
145 * with a stencil buffer. It will be a sw fallback, but some apps won't
148 stencil_bits_array
[0] = 0;
149 stencil_bits_array
[1] = (stencil_bits
== 0) ? 8 : stencil_bits
;
151 depth_buffer_factor
= ((depth_bits
!= 0) || (stencil_bits
!= 0)) ? 2 : 1;
152 back_buffer_factor
= (have_back_buffer
) ? 2 : 1;
154 num_modes
= depth_buffer_factor
* back_buffer_factor
* 4;
156 if ( pixel_bits
== 16 ) {
158 fb_type
= GL_UNSIGNED_SHORT_5_6_5
;
162 fb_type
= GL_UNSIGNED_INT_8_8_8_8_REV
;
165 modes
= (*create_context_modes
)( num_modes
, sizeof( __GLcontextModes
) );
167 if ( ! driFillInModes( & m
, fb_format
, fb_type
,
168 depth_bits_array
, stencil_bits_array
, depth_buffer_factor
,
169 back_buffer_modes
, back_buffer_factor
,
171 fprintf( stderr
, "[%s:%u] Error creating FBConfig!\n",
172 __func__
, __LINE__
);
176 if ( ! driFillInModes( & m
, fb_format
, fb_type
,
177 depth_bits_array
, stencil_bits_array
, depth_buffer_factor
,
178 back_buffer_modes
, back_buffer_factor
,
179 GLX_DIRECT_COLOR
) ) {
180 fprintf( stderr
, "[%s:%u] Error creating FBConfig!\n",
181 __func__
, __LINE__
);
185 /* Mark the visual as slow if there are "fake" stencil bits.
187 for ( m
= modes
; m
!= NULL
; m
= m
->next
) {
188 if ( (m
->stencilBits
!= 0) && (m
->stencilBits
!= stencil_bits
) ) {
189 m
->visualRating
= GLX_SLOW_CONFIG
;
195 #endif /* USE_NEW_INTERFACE */
197 /* Create the device specific screen private data struct.
199 radeonScreenPtr
radeonCreateScreen( __DRIscreenPrivate
*sPriv
)
201 radeonScreenPtr screen
;
202 RADEONDRIPtr dri_priv
= (RADEONDRIPtr
)sPriv
->pDevPriv
;
203 unsigned char *RADEONMMIO
;
206 /* Allocate the private area */
207 screen
= (radeonScreenPtr
) CALLOC( sizeof(*screen
) );
209 __driUtilMessage("%s: Could not allocate memory for screen structure",
214 /* parse information in __driConfigOptions */
215 driParseOptionInfo (&screen
->optionCache
,
216 __driConfigOptions
, __driNConfigOptions
);
218 /* This is first since which regions we map depends on whether or
219 * not we are using a PCI card.
221 screen
->IsPCI
= dri_priv
->IsPCI
;
225 drm_radeon_getparam_t gp
;
227 gp
.param
= RADEON_PARAM_GART_BUFFER_OFFSET
;
228 gp
.value
= &screen
->gart_buffer_offset
;
230 ret
= drmCommandWriteRead( sPriv
->fd
, DRM_RADEON_GETPARAM
,
234 fprintf(stderr
, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret
);
238 if (sPriv
->drmMinor
>= 6) {
239 gp
.param
= RADEON_PARAM_IRQ_NR
;
240 gp
.value
= &screen
->irq
;
242 ret
= drmCommandWriteRead( sPriv
->fd
, DRM_RADEON_GETPARAM
,
246 fprintf(stderr
, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret
);
252 screen
->mmio
.handle
= dri_priv
->registerHandle
;
253 screen
->mmio
.size
= dri_priv
->registerSize
;
254 if ( drmMap( sPriv
->fd
,
257 &screen
->mmio
.map
) ) {
259 __driUtilMessage("%s: drmMap failed\n", __FUNCTION__
);
263 RADEONMMIO
= screen
->mmio
.map
;
265 screen
->status
.handle
= dri_priv
->statusHandle
;
266 screen
->status
.size
= dri_priv
->statusSize
;
267 if ( drmMap( sPriv
->fd
,
268 screen
->status
.handle
,
270 &screen
->status
.map
) ) {
271 drmUnmap( screen
->mmio
.map
, screen
->mmio
.size
);
273 __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__
);
276 screen
->scratch
= (__volatile__
uint32_t *)
277 ((GLubyte
*)screen
->status
.map
+ RADEON_SCRATCH_REG_OFFSET
);
279 screen
->buffers
= drmMapBufs( sPriv
->fd
);
280 if ( !screen
->buffers
) {
281 drmUnmap( screen
->status
.map
, screen
->status
.size
);
282 drmUnmap( screen
->mmio
.map
, screen
->mmio
.size
);
284 __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__
);
288 if ( dri_priv
->gartTexHandle
&& dri_priv
->gartTexMapSize
) {
289 screen
->gartTextures
.handle
= dri_priv
->gartTexHandle
;
290 screen
->gartTextures
.size
= dri_priv
->gartTexMapSize
;
291 if ( drmMap( sPriv
->fd
,
292 screen
->gartTextures
.handle
,
293 screen
->gartTextures
.size
,
294 (drmAddressPtr
)&screen
->gartTextures
.map
) ) {
295 drmUnmapBufs( screen
->buffers
);
296 drmUnmap( screen
->status
.map
, screen
->status
.size
);
297 drmUnmap( screen
->mmio
.map
, screen
->mmio
.size
);
299 __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__
);
303 screen
->gart_texture_offset
= dri_priv
->gartTexOffset
+ ( screen
->IsPCI
304 ? INREG( RADEON_AIC_LO_ADDR
)
305 : ( ( INREG( RADEON_MC_AGP_LOCATION
) & 0x0ffffU
) << 16 ) );
309 switch ( dri_priv
->deviceID
) {
311 fprintf(stderr
, "unknown chip id, assuming full radeon support\n");
312 case PCI_CHIP_RADEON_QD
:
313 case PCI_CHIP_RADEON_QE
:
314 case PCI_CHIP_RADEON_QF
:
315 case PCI_CHIP_RADEON_QG
:
316 /* all original radeons (7200) presumably have a stencil op bug */
317 screen
->chipset
|= RADEON_CHIPSET_BROKEN_STENCIL
;
318 case PCI_CHIP_RV200_QW
:
319 case PCI_CHIP_RV200_QX
:
320 case PCI_CHIP_RADEON_LW
:
321 case PCI_CHIP_RADEON_LX
:
322 screen
->chipset
|= RADEON_CHIPSET_TCL
;
323 case PCI_CHIP_RADEON_QY
:
324 case PCI_CHIP_RADEON_QZ
:
325 case PCI_CHIP_RADEON_LY
:
326 case PCI_CHIP_RADEON_LZ
:
327 case PCI_CHIP_RS100_4136
: /* IGPs don't have TCL */
328 case PCI_CHIP_RS200_4137
:
329 case PCI_CHIP_RS250_4237
:
330 case PCI_CHIP_RS100_4336
:
331 case PCI_CHIP_RS200_4337
:
332 case PCI_CHIP_RS250_4437
:
336 screen
->cpp
= dri_priv
->bpp
/ 8;
337 screen
->AGPMode
= dri_priv
->AGPMode
;
339 screen
->fbLocation
= ( INREG( RADEON_MC_FB_LOCATION
) & 0xffff ) << 16;
341 if ( sPriv
->drmMinor
>= 10 ) {
342 drm_radeon_setparam_t sp
;
344 sp
.param
= RADEON_SETPARAM_FB_LOCATION
;
345 sp
.value
= screen
->fbLocation
;
347 drmCommandWrite( sPriv
->fd
, DRM_RADEON_SETPARAM
,
351 screen
->frontOffset
= dri_priv
->frontOffset
;
352 screen
->frontPitch
= dri_priv
->frontPitch
;
353 screen
->backOffset
= dri_priv
->backOffset
;
354 screen
->backPitch
= dri_priv
->backPitch
;
355 screen
->depthOffset
= dri_priv
->depthOffset
;
356 screen
->depthPitch
= dri_priv
->depthPitch
;
358 screen
->texOffset
[RADEON_LOCAL_TEX_HEAP
] = dri_priv
->textureOffset
359 + screen
->fbLocation
;
360 screen
->texSize
[RADEON_LOCAL_TEX_HEAP
] = dri_priv
->textureSize
;
361 screen
->logTexGranularity
[RADEON_LOCAL_TEX_HEAP
] =
362 dri_priv
->log2TexGran
;
364 if ( !screen
->gartTextures
.map
365 || getenv( "RADEON_GARTTEXTURING_FORCE_DISABLE" ) ) {
366 screen
->numTexHeaps
= RADEON_NR_TEX_HEAPS
- 1;
367 screen
->texOffset
[RADEON_GART_TEX_HEAP
] = 0;
368 screen
->texSize
[RADEON_GART_TEX_HEAP
] = 0;
369 screen
->logTexGranularity
[RADEON_GART_TEX_HEAP
] = 0;
371 screen
->numTexHeaps
= RADEON_NR_TEX_HEAPS
;
372 screen
->texOffset
[RADEON_GART_TEX_HEAP
] = screen
->gart_texture_offset
;
373 screen
->texSize
[RADEON_GART_TEX_HEAP
] = dri_priv
->gartTexMapSize
;
374 screen
->logTexGranularity
[RADEON_GART_TEX_HEAP
] =
375 dri_priv
->log2GARTTexGran
;
378 if ( driCompareGLXAPIVersion( 20030813 ) >= 0 ) {
379 PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension
=
380 (PFNGLXSCRENABLEEXTENSIONPROC
) glXGetProcAddress( (const GLubyte
*) "__glXScrEnableExtension" );
381 void * const psc
= sPriv
->psc
->screenConfigs
;
383 if ( glx_enable_extension
!= NULL
) {
384 if ( screen
->irq
!= 0 ) {
385 (*glx_enable_extension
)( psc
, "GLX_SGI_swap_control" );
386 (*glx_enable_extension
)( psc
, "GLX_SGI_video_sync" );
387 (*glx_enable_extension
)( psc
, "GLX_MESA_swap_control" );
390 (*glx_enable_extension
)( psc
, "GLX_MESA_swap_frame_usage" );
392 if ( driCompareGLXAPIVersion( 20030915 ) >= 0 ) {
393 (*glx_enable_extension
)( psc
, "GLX_SGIX_fbconfig" );
394 (*glx_enable_extension
)( psc
, "GLX_OML_swap_method" );
400 screen
->driScreen
= sPriv
;
401 screen
->sarea_priv_offset
= dri_priv
->sarea_priv_offset
;
405 /* Destroy the device specific screen private data struct.
407 void radeonDestroyScreen( __DRIscreenPrivate
*sPriv
)
409 radeonScreenPtr screen
= (radeonScreenPtr
)sPriv
->private;
414 if ( screen
->gartTextures
.map
) {
415 drmUnmap( screen
->gartTextures
.map
, screen
->gartTextures
.size
);
417 drmUnmapBufs( screen
->buffers
);
418 drmUnmap( screen
->status
.map
, screen
->status
.size
);
419 drmUnmap( screen
->mmio
.map
, screen
->mmio
.size
);
421 /* free all option information */
422 driDestroyOptionInfo (&screen
->optionCache
);
425 sPriv
->private = NULL
;
429 /* Initialize the driver specific screen private data.
432 radeonInitDriver( __DRIscreenPrivate
*sPriv
)
434 sPriv
->private = (void *) radeonCreateScreen( sPriv
);
435 if ( !sPriv
->private ) {
436 radeonDestroyScreen( sPriv
);
446 * Create and initialize the Mesa and driver specific pixmap buffer
449 * \todo This function (and its interface) will need to be updated to support
453 radeonCreateBuffer( __DRIscreenPrivate
*driScrnPriv
,
454 __DRIdrawablePrivate
*driDrawPriv
,
455 const __GLcontextModes
*mesaVis
,
459 return GL_FALSE
; /* not implemented */
462 const GLboolean swDepth
= GL_FALSE
;
463 const GLboolean swAlpha
= GL_FALSE
;
464 const GLboolean swAccum
= mesaVis
->accumRedBits
> 0;
465 const GLboolean swStencil
= mesaVis
->stencilBits
> 0 &&
466 mesaVis
->depthBits
!= 24;
467 driDrawPriv
->driverPrivate
= (void *)
468 _mesa_create_framebuffer( mesaVis
,
473 return (driDrawPriv
->driverPrivate
!= NULL
);
479 radeonDestroyBuffer(__DRIdrawablePrivate
*driDrawPriv
)
481 _mesa_destroy_framebuffer((GLframebuffer
*) (driDrawPriv
->driverPrivate
));
484 static struct __DriverAPIRec radeonAPI
= {
485 .InitDriver
= radeonInitDriver
,
486 .DestroyScreen
= radeonDestroyScreen
,
487 .CreateContext
= radeonCreateContext
,
488 .DestroyContext
= radeonDestroyContext
,
489 .CreateBuffer
= radeonCreateBuffer
,
490 .DestroyBuffer
= radeonDestroyBuffer
,
491 .SwapBuffers
= radeonSwapBuffers
,
492 .MakeCurrent
= radeonMakeCurrent
,
493 .UnbindContext
= radeonUnbindContext
,
494 .GetSwapInfo
= getSwapInfo
,
495 .GetMSC
= driGetMSC32
,
496 .WaitForMSC
= driWaitForMSC32
,
498 .SwapBuffersMSC
= NULL
503 * This is the bootstrap function for the driver.
504 * The __driCreateScreen name is the symbol that libGL.so fetches.
505 * Return: pointer to a __DRIscreenPrivate.
507 #if !defined(DRI_NEW_INTERFACE_ONLY)
508 void *__driCreateScreen(Display
*dpy
, int scrn
, __DRIscreen
*psc
,
509 int numConfigs
, __GLXvisualConfig
*config
)
511 __DRIscreenPrivate
*psp
;
512 psp
= __driUtilCreateScreen(dpy
, scrn
, psc
, numConfigs
, config
, &radeonAPI
);
515 #endif /* !defined(DRI_NEW_INTERFACE_ONLY) */
518 * This is the bootstrap function for the driver. libGL supplies all of the
519 * requisite information about the system, and the driver initializes itself.
520 * This routine also fills in the linked list pointed to by \c driver_modes
521 * with the \c __GLcontextModes that the driver can support for windows or
524 * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
527 #ifdef USE_NEW_INTERFACE
528 void * __driCreateNewScreen( __DRInativeDisplay
*dpy
, int scrn
, __DRIscreen
*psc
,
529 const __GLcontextModes
* modes
,
530 const __DRIversion
* ddx_version
,
531 const __DRIversion
* dri_version
,
532 const __DRIversion
* drm_version
,
533 const __DRIframebuffer
* frame_buffer
,
534 drmAddress pSAREA
, int fd
,
535 int internal_api_version
,
536 __GLcontextModes
** driver_modes
)
539 __DRIscreenPrivate
*psp
;
540 static const __DRIversion ddx_expected
= { 4, 0, 0 };
541 static const __DRIversion dri_expected
= { 4, 0, 0 };
542 static const __DRIversion drm_expected
= { 1, 3, 0 };
544 if ( ! driCheckDriDdxDrmVersions2( "Radeon",
545 dri_version
, & dri_expected
,
546 ddx_version
, & ddx_expected
,
547 drm_version
, & drm_expected
) ) {
551 psp
= __driUtilCreateNewScreen(dpy
, scrn
, psc
, NULL
,
552 ddx_version
, dri_version
, drm_version
,
553 frame_buffer
, pSAREA
, fd
,
554 internal_api_version
, &radeonAPI
);
556 create_context_modes
= (PFNGLXCREATECONTEXTMODES
)
557 glXGetProcAddress( (const GLubyte
*) "__glXCreateContextModes" );
558 if ( create_context_modes
!= NULL
) {
559 RADEONDRIPtr dri_priv
= (RADEONDRIPtr
) psp
->pDevPriv
;
560 *driver_modes
= radeonFillInModes( dri_priv
->bpp
,
561 (dri_priv
->bpp
== 16) ? 16 : 24,
562 (dri_priv
->bpp
== 16) ? 0 : 8,
563 (dri_priv
->backOffset
!= dri_priv
->depthOffset
) );
569 #endif /* USE_NEW_INTERFACE */
572 * Get information about previous buffer swaps.
575 getSwapInfo( __DRIdrawablePrivate
*dPriv
, __DRIswapInfo
* sInfo
)
577 radeonContextPtr rmesa
;
579 if ( (dPriv
== NULL
) || (dPriv
->driContextPriv
== NULL
)
580 || (dPriv
->driContextPriv
->driverPrivate
== NULL
)
581 || (sInfo
== NULL
) ) {
585 rmesa
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
586 sInfo
->swap_count
= rmesa
->swap_count
;
587 sInfo
->swap_ust
= rmesa
->swap_ust
;
588 sInfo
->swap_missed_count
= rmesa
->swap_missed_count
;
590 sInfo
->swap_missed_usage
= (sInfo
->swap_missed_count
!= 0)
591 ? driCalculateSwapUsage( dPriv
, 0, rmesa
->swap_missed_ust
)