1 /**************************************************************************
3 Copyright 2000, 2001 VA Linux Systems Inc., Fremont, California.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
31 * Gareth Hughes <gareth@valinux.com>
32 * Keith Whitwell <keith@tungstengraphics.com>
35 #include "main/glheader.h"
36 #include "main/imports.h"
37 #include "main/api_arrayelt.h"
38 #include "main/enums.h"
39 #include "main/light.h"
40 #include "main/state.h"
41 #include "main/context.h"
42 #include "main/framebuffer.h"
43 #include "main/simple_list.h"
47 #include "tnl/t_pipeline.h"
48 #include "swrast_setup/swrast_setup.h"
50 #include "radeon_context.h"
51 #include "radeon_mipmap_tree.h"
52 #include "radeon_ioctl.h"
53 #include "radeon_state.h"
54 #include "radeon_tcl.h"
55 #include "radeon_tex.h"
56 #include "radeon_swtcl.h"
57 #include "drirenderbuffer.h"
59 static void radeonUpdateSpecular( GLcontext
*ctx
);
61 /* =============================================================
65 static void radeonAlphaFunc( GLcontext
*ctx
, GLenum func
, GLfloat ref
)
67 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
68 int pp_misc
= rmesa
->hw
.ctx
.cmd
[CTX_PP_MISC
];
71 CLAMPED_FLOAT_TO_UBYTE(refByte
, ref
);
73 RADEON_STATECHANGE( rmesa
, ctx
);
75 pp_misc
&= ~(RADEON_ALPHA_TEST_OP_MASK
| RADEON_REF_ALPHA_MASK
);
76 pp_misc
|= (refByte
& RADEON_REF_ALPHA_MASK
);
80 pp_misc
|= RADEON_ALPHA_TEST_FAIL
;
83 pp_misc
|= RADEON_ALPHA_TEST_LESS
;
86 pp_misc
|= RADEON_ALPHA_TEST_EQUAL
;
89 pp_misc
|= RADEON_ALPHA_TEST_LEQUAL
;
92 pp_misc
|= RADEON_ALPHA_TEST_GREATER
;
95 pp_misc
|= RADEON_ALPHA_TEST_NEQUAL
;
98 pp_misc
|= RADEON_ALPHA_TEST_GEQUAL
;
101 pp_misc
|= RADEON_ALPHA_TEST_PASS
;
105 rmesa
->hw
.ctx
.cmd
[CTX_PP_MISC
] = pp_misc
;
108 static void radeonBlendEquationSeparate( GLcontext
*ctx
,
109 GLenum modeRGB
, GLenum modeA
)
111 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
112 GLuint b
= rmesa
->hw
.ctx
.cmd
[CTX_RB3D_BLENDCNTL
] & ~RADEON_COMB_FCN_MASK
;
113 GLboolean fallback
= GL_FALSE
;
115 assert( modeRGB
== modeA
);
120 b
|= RADEON_COMB_FCN_ADD_CLAMP
;
123 case GL_FUNC_SUBTRACT
:
124 b
|= RADEON_COMB_FCN_SUB_CLAMP
;
128 if (ctx
->Color
.BlendEnabled
)
131 b
|= RADEON_COMB_FCN_ADD_CLAMP
;
135 FALLBACK( rmesa
, RADEON_FALLBACK_BLEND_EQ
, fallback
);
137 RADEON_STATECHANGE( rmesa
, ctx
);
138 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_BLENDCNTL
] = b
;
139 if ( (ctx
->Color
.ColorLogicOpEnabled
|| (ctx
->Color
.BlendEnabled
140 && ctx
->Color
.BlendEquationRGB
== GL_LOGIC_OP
)) ) {
141 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] |= RADEON_ROP_ENABLE
;
143 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &= ~RADEON_ROP_ENABLE
;
148 static void radeonBlendFuncSeparate( GLcontext
*ctx
,
149 GLenum sfactorRGB
, GLenum dfactorRGB
,
150 GLenum sfactorA
, GLenum dfactorA
)
152 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
153 GLuint b
= rmesa
->hw
.ctx
.cmd
[CTX_RB3D_BLENDCNTL
] &
154 ~(RADEON_SRC_BLEND_MASK
| RADEON_DST_BLEND_MASK
);
155 GLboolean fallback
= GL_FALSE
;
157 switch ( ctx
->Color
.BlendSrcRGB
) {
159 b
|= RADEON_SRC_BLEND_GL_ZERO
;
162 b
|= RADEON_SRC_BLEND_GL_ONE
;
165 b
|= RADEON_SRC_BLEND_GL_DST_COLOR
;
167 case GL_ONE_MINUS_DST_COLOR
:
168 b
|= RADEON_SRC_BLEND_GL_ONE_MINUS_DST_COLOR
;
171 b
|= RADEON_SRC_BLEND_GL_SRC_COLOR
;
173 case GL_ONE_MINUS_SRC_COLOR
:
174 b
|= RADEON_SRC_BLEND_GL_ONE_MINUS_SRC_COLOR
;
177 b
|= RADEON_SRC_BLEND_GL_SRC_ALPHA
;
179 case GL_ONE_MINUS_SRC_ALPHA
:
180 b
|= RADEON_SRC_BLEND_GL_ONE_MINUS_SRC_ALPHA
;
183 b
|= RADEON_SRC_BLEND_GL_DST_ALPHA
;
185 case GL_ONE_MINUS_DST_ALPHA
:
186 b
|= RADEON_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA
;
188 case GL_SRC_ALPHA_SATURATE
:
189 b
|= RADEON_SRC_BLEND_GL_SRC_ALPHA_SATURATE
;
191 case GL_CONSTANT_COLOR
:
192 case GL_ONE_MINUS_CONSTANT_COLOR
:
193 case GL_CONSTANT_ALPHA
:
194 case GL_ONE_MINUS_CONSTANT_ALPHA
:
195 if (ctx
->Color
.BlendEnabled
)
198 b
|= RADEON_SRC_BLEND_GL_ONE
;
204 switch ( ctx
->Color
.BlendDstRGB
) {
206 b
|= RADEON_DST_BLEND_GL_ZERO
;
209 b
|= RADEON_DST_BLEND_GL_ONE
;
212 b
|= RADEON_DST_BLEND_GL_SRC_COLOR
;
214 case GL_ONE_MINUS_SRC_COLOR
:
215 b
|= RADEON_DST_BLEND_GL_ONE_MINUS_SRC_COLOR
;
218 b
|= RADEON_DST_BLEND_GL_SRC_ALPHA
;
220 case GL_ONE_MINUS_SRC_ALPHA
:
221 b
|= RADEON_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA
;
224 b
|= RADEON_DST_BLEND_GL_DST_COLOR
;
226 case GL_ONE_MINUS_DST_COLOR
:
227 b
|= RADEON_DST_BLEND_GL_ONE_MINUS_DST_COLOR
;
230 b
|= RADEON_DST_BLEND_GL_DST_ALPHA
;
232 case GL_ONE_MINUS_DST_ALPHA
:
233 b
|= RADEON_DST_BLEND_GL_ONE_MINUS_DST_ALPHA
;
235 case GL_CONSTANT_COLOR
:
236 case GL_ONE_MINUS_CONSTANT_COLOR
:
237 case GL_CONSTANT_ALPHA
:
238 case GL_ONE_MINUS_CONSTANT_ALPHA
:
239 if (ctx
->Color
.BlendEnabled
)
242 b
|= RADEON_DST_BLEND_GL_ZERO
;
248 FALLBACK( rmesa
, RADEON_FALLBACK_BLEND_FUNC
, fallback
);
250 RADEON_STATECHANGE( rmesa
, ctx
);
251 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_BLENDCNTL
] = b
;
256 /* =============================================================
260 static void radeonDepthFunc( GLcontext
*ctx
, GLenum func
)
262 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
264 RADEON_STATECHANGE( rmesa
, ctx
);
265 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] &= ~RADEON_Z_TEST_MASK
;
267 switch ( ctx
->Depth
.Func
) {
269 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_NEVER
;
272 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_LESS
;
275 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_EQUAL
;
278 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_LEQUAL
;
281 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_GREATER
;
284 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_NEQUAL
;
287 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_GEQUAL
;
290 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_TEST_ALWAYS
;
296 static void radeonDepthMask( GLcontext
*ctx
, GLboolean flag
)
298 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
299 RADEON_STATECHANGE( rmesa
, ctx
);
301 if ( ctx
->Depth
.Mask
) {
302 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_Z_WRITE_ENABLE
;
304 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] &= ~RADEON_Z_WRITE_ENABLE
;
308 static void radeonClearDepth( GLcontext
*ctx
, GLclampd d
)
310 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
311 GLuint format
= (rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] &
312 RADEON_DEPTH_FORMAT_MASK
);
315 case RADEON_DEPTH_FORMAT_16BIT_INT_Z
:
316 rmesa
->radeon
.state
.depth
.clear
= d
* 0x0000ffff;
318 case RADEON_DEPTH_FORMAT_24BIT_INT_Z
:
319 rmesa
->radeon
.state
.depth
.clear
= d
* 0x00ffffff;
325 /* =============================================================
330 static void radeonFogfv( GLcontext
*ctx
, GLenum pname
, const GLfloat
*param
)
332 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
333 union { int i
; float f
; } c
, d
;
338 if (!ctx
->Fog
.Enabled
)
340 RADEON_STATECHANGE(rmesa
, tcl
);
341 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] &= ~RADEON_TCL_FOG_MASK
;
342 switch (ctx
->Fog
.Mode
) {
344 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] |= RADEON_TCL_FOG_LINEAR
;
347 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] |= RADEON_TCL_FOG_EXP
;
350 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] |= RADEON_TCL_FOG_EXP2
;
359 if (!ctx
->Fog
.Enabled
)
361 c
.i
= rmesa
->hw
.fog
.cmd
[FOG_C
];
362 d
.i
= rmesa
->hw
.fog
.cmd
[FOG_D
];
363 switch (ctx
->Fog
.Mode
) {
366 /* While this is the opposite sign from the DDK, it makes the fog test
367 * pass, and matches r200.
369 d
.f
= -ctx
->Fog
.Density
;
373 d
.f
= -(ctx
->Fog
.Density
* ctx
->Fog
.Density
);
376 if (ctx
->Fog
.Start
== ctx
->Fog
.End
) {
380 c
.f
= ctx
->Fog
.End
/(ctx
->Fog
.End
-ctx
->Fog
.Start
);
381 /* While this is the opposite sign from the DDK, it makes the fog
382 * test pass, and matches r200.
384 d
.f
= -1.0/(ctx
->Fog
.End
-ctx
->Fog
.Start
);
390 if (c
.i
!= rmesa
->hw
.fog
.cmd
[FOG_C
] || d
.i
!= rmesa
->hw
.fog
.cmd
[FOG_D
]) {
391 RADEON_STATECHANGE( rmesa
, fog
);
392 rmesa
->hw
.fog
.cmd
[FOG_C
] = c
.i
;
393 rmesa
->hw
.fog
.cmd
[FOG_D
] = d
.i
;
397 RADEON_STATECHANGE( rmesa
, ctx
);
398 UNCLAMPED_FLOAT_TO_RGB_CHAN( col
, ctx
->Fog
.Color
);
399 rmesa
->hw
.ctx
.cmd
[CTX_PP_FOG_COLOR
] &= ~RADEON_FOG_COLOR_MASK
;
400 rmesa
->hw
.ctx
.cmd
[CTX_PP_FOG_COLOR
] |=
401 radeonPackColor( 4, col
[0], col
[1], col
[2], 0 );
403 case GL_FOG_COORD_SRC
:
404 radeonUpdateSpecular( ctx
);
411 /* =============================================================
415 static void radeonCullFace( GLcontext
*ctx
, GLenum unused
)
417 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
418 GLuint s
= rmesa
->hw
.set
.cmd
[SET_SE_CNTL
];
419 GLuint t
= rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
];
421 s
|= RADEON_FFACE_SOLID
| RADEON_BFACE_SOLID
;
422 t
&= ~(RADEON_CULL_FRONT
| RADEON_CULL_BACK
);
424 if ( ctx
->Polygon
.CullFlag
) {
425 switch ( ctx
->Polygon
.CullFaceMode
) {
427 s
&= ~RADEON_FFACE_SOLID
;
428 t
|= RADEON_CULL_FRONT
;
431 s
&= ~RADEON_BFACE_SOLID
;
432 t
|= RADEON_CULL_BACK
;
434 case GL_FRONT_AND_BACK
:
435 s
&= ~(RADEON_FFACE_SOLID
| RADEON_BFACE_SOLID
);
436 t
|= (RADEON_CULL_FRONT
| RADEON_CULL_BACK
);
441 if ( rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] != s
) {
442 RADEON_STATECHANGE(rmesa
, set
);
443 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] = s
;
446 if ( rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] != t
) {
447 RADEON_STATECHANGE(rmesa
, tcl
);
448 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] = t
;
452 static void radeonFrontFace( GLcontext
*ctx
, GLenum mode
)
454 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
456 RADEON_STATECHANGE( rmesa
, set
);
457 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] &= ~RADEON_FFACE_CULL_DIR_MASK
;
459 RADEON_STATECHANGE( rmesa
, tcl
);
460 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] &= ~RADEON_CULL_FRONT_IS_CCW
;
462 /* Winding is inverted when rendering to FBO */
463 if (ctx
->DrawBuffer
&& ctx
->DrawBuffer
->Name
)
464 mode
= (mode
== GL_CW
) ? GL_CCW
: GL_CW
;
468 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] |= RADEON_FFACE_CULL_CW
;
471 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] |= RADEON_FFACE_CULL_CCW
;
472 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] |= RADEON_CULL_FRONT_IS_CCW
;
478 /* =============================================================
481 static void radeonLineWidth( GLcontext
*ctx
, GLfloat widthf
)
483 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
485 RADEON_STATECHANGE( rmesa
, lin
);
486 RADEON_STATECHANGE( rmesa
, set
);
488 /* Line width is stored in U6.4 format.
490 rmesa
->hw
.lin
.cmd
[LIN_SE_LINE_WIDTH
] = (GLuint
)(widthf
* 16.0);
491 if ( widthf
> 1.0 ) {
492 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] |= RADEON_WIDELINE_ENABLE
;
494 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] &= ~RADEON_WIDELINE_ENABLE
;
498 static void radeonLineStipple( GLcontext
*ctx
, GLint factor
, GLushort pattern
)
500 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
502 RADEON_STATECHANGE( rmesa
, lin
);
503 rmesa
->hw
.lin
.cmd
[LIN_RE_LINE_PATTERN
] =
504 ((((GLuint
)factor
& 0xff) << 16) | ((GLuint
)pattern
));
508 /* =============================================================
511 static void radeonColorMask( GLcontext
*ctx
,
512 GLboolean r
, GLboolean g
,
513 GLboolean b
, GLboolean a
)
515 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
516 struct radeon_renderbuffer
*rrb
;
519 rrb
= radeon_get_colorbuffer(&rmesa
->radeon
);
523 mask
= radeonPackColor( rrb
->cpp
,
524 ctx
->Color
.ColorMask
[RCOMP
],
525 ctx
->Color
.ColorMask
[GCOMP
],
526 ctx
->Color
.ColorMask
[BCOMP
],
527 ctx
->Color
.ColorMask
[ACOMP
] );
529 if ( rmesa
->hw
.msk
.cmd
[MSK_RB3D_PLANEMASK
] != mask
) {
530 RADEON_STATECHANGE( rmesa
, msk
);
531 rmesa
->hw
.msk
.cmd
[MSK_RB3D_PLANEMASK
] = mask
;
536 /* =============================================================
540 static void radeonPolygonOffset( GLcontext
*ctx
,
541 GLfloat factor
, GLfloat units
)
543 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
544 const GLfloat depthScale
= 1.0F
/ ctx
->DrawBuffer
->_DepthMaxF
;
545 float_ui32_type constant
= { units
* depthScale
};
546 float_ui32_type factoru
= { factor
};
548 RADEON_STATECHANGE( rmesa
, zbs
);
549 rmesa
->hw
.zbs
.cmd
[ZBS_SE_ZBIAS_FACTOR
] = factoru
.ui32
;
550 rmesa
->hw
.zbs
.cmd
[ZBS_SE_ZBIAS_CONSTANT
] = constant
.ui32
;
553 static void radeonPolygonMode( GLcontext
*ctx
, GLenum face
, GLenum mode
)
555 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
556 GLboolean flag
= (ctx
->_TriangleCaps
& DD_TRI_UNFILLED
) != 0;
558 /* Can't generally do unfilled via tcl, but some good special
561 TCL_FALLBACK( ctx
, RADEON_TCL_FALLBACK_UNFILLED
, flag
);
562 if (rmesa
->radeon
.TclFallback
) {
563 radeonChooseRenderState( ctx
);
564 radeonChooseVertexState( ctx
);
569 /* =============================================================
570 * Rendering attributes
572 * We really don't want to recalculate all this every time we bind a
573 * texture. These things shouldn't change all that often, so it makes
574 * sense to break them out of the core texture state update routines.
577 /* Examine lighting and texture state to determine if separate specular
580 static void radeonUpdateSpecular( GLcontext
*ctx
)
582 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
583 uint32_t p
= rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
];
586 RADEON_STATECHANGE( rmesa
, tcl
);
588 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
] &= ~RADEON_TCL_COMPUTE_SPECULAR
;
589 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
] &= ~RADEON_TCL_COMPUTE_DIFFUSE
;
590 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] &= ~RADEON_TCL_VTX_PK_SPEC
;
591 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] &= ~RADEON_TCL_VTX_PK_DIFFUSE
;
592 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] &= ~RADEON_LIGHTING_ENABLE
;
594 p
&= ~RADEON_SPECULAR_ENABLE
;
596 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] |= RADEON_DIFFUSE_SPECULAR_COMBINE
;
599 if (ctx
->Light
.Enabled
&&
600 ctx
->Light
.Model
.ColorControl
== GL_SEPARATE_SPECULAR_COLOR
) {
601 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
] |= RADEON_TCL_COMPUTE_SPECULAR
;
602 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
] |= RADEON_TCL_COMPUTE_DIFFUSE
;
603 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_TCL_VTX_PK_SPEC
;
604 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_TCL_VTX_PK_DIFFUSE
;
605 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] |= RADEON_LIGHTING_ENABLE
;
606 p
|= RADEON_SPECULAR_ENABLE
;
607 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] &=
608 ~RADEON_DIFFUSE_SPECULAR_COMBINE
;
610 else if (ctx
->Light
.Enabled
) {
611 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
] |= RADEON_TCL_COMPUTE_DIFFUSE
;
612 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_TCL_VTX_PK_DIFFUSE
;
613 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] |= RADEON_LIGHTING_ENABLE
;
614 } else if (ctx
->Fog
.ColorSumEnabled
) {
615 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_TCL_VTX_PK_SPEC
;
616 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_TCL_VTX_PK_DIFFUSE
;
617 p
|= RADEON_SPECULAR_ENABLE
;
619 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_TCL_VTX_PK_DIFFUSE
;
622 if (ctx
->Fog
.Enabled
) {
623 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_TCL_VTX_PK_SPEC
;
624 if (ctx
->Fog
.FogCoordinateSource
== GL_FRAGMENT_DEPTH
) {
625 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
] |= RADEON_TCL_COMPUTE_SPECULAR
;
626 /* Bizzare: have to leave lighting enabled to get fog. */
627 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] |= RADEON_LIGHTING_ENABLE
;
630 /* cannot do tcl fog factor calculation with fog coord source
631 * (send precomputed factors). Cannot use precomputed fog
632 * factors together with tcl spec light (need tcl fallback) */
633 flag
= (rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
] &
634 RADEON_TCL_COMPUTE_SPECULAR
) != 0;
638 TCL_FALLBACK( ctx
, RADEON_TCL_FALLBACK_FOGCOORDSPEC
, flag
);
640 if (NEED_SECONDARY_COLOR(ctx
)) {
641 assert( (p
& RADEON_SPECULAR_ENABLE
) != 0 );
643 assert( (p
& RADEON_SPECULAR_ENABLE
) == 0 );
646 if ( rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] != p
) {
647 RADEON_STATECHANGE( rmesa
, ctx
);
648 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] = p
;
651 /* Update vertex/render formats
653 if (rmesa
->radeon
.TclFallback
) {
654 radeonChooseRenderState( ctx
);
655 radeonChooseVertexState( ctx
);
660 /* =============================================================
665 /* Update on colormaterial, material emmissive/ambient,
666 * lightmodel.globalambient
668 static void update_global_ambient( GLcontext
*ctx
)
670 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
671 float *fcmd
= (float *)RADEON_DB_STATE( glt
);
673 /* Need to do more if both emmissive & ambient are PREMULT:
674 * Hope this is not needed for MULT
676 if ((rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] &
677 ((3 << RADEON_EMISSIVE_SOURCE_SHIFT
) |
678 (3 << RADEON_AMBIENT_SOURCE_SHIFT
))) == 0)
680 COPY_3V( &fcmd
[GLT_RED
],
681 ctx
->Light
.Material
.Attrib
[MAT_ATTRIB_FRONT_EMISSION
]);
682 ACC_SCALE_3V( &fcmd
[GLT_RED
],
683 ctx
->Light
.Model
.Ambient
,
684 ctx
->Light
.Material
.Attrib
[MAT_ATTRIB_FRONT_AMBIENT
]);
688 COPY_3V( &fcmd
[GLT_RED
], ctx
->Light
.Model
.Ambient
);
691 RADEON_DB_STATECHANGE(rmesa
, &rmesa
->hw
.glt
);
694 /* Update on change to
698 static void update_light_colors( GLcontext
*ctx
, GLuint p
)
700 struct gl_light
*l
= &ctx
->Light
.Light
[p
];
702 /* fprintf(stderr, "%s\n", __FUNCTION__); */
705 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
706 float *fcmd
= (float *)RADEON_DB_STATE( lit
[p
] );
708 COPY_4V( &fcmd
[LIT_AMBIENT_RED
], l
->Ambient
);
709 COPY_4V( &fcmd
[LIT_DIFFUSE_RED
], l
->Diffuse
);
710 COPY_4V( &fcmd
[LIT_SPECULAR_RED
], l
->Specular
);
712 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.lit
[p
] );
716 /* Also fallback for asym colormaterial mode in twoside lighting...
718 static void check_twoside_fallback( GLcontext
*ctx
)
720 GLboolean fallback
= GL_FALSE
;
723 if (ctx
->Light
.Enabled
&& ctx
->Light
.Model
.TwoSide
) {
724 if (ctx
->Light
.ColorMaterialEnabled
&&
725 (ctx
->Light
.ColorMaterialBitmask
& BACK_MATERIAL_BITS
) !=
726 ((ctx
->Light
.ColorMaterialBitmask
& FRONT_MATERIAL_BITS
)<<1))
729 for (i
= MAT_ATTRIB_FRONT_AMBIENT
; i
< MAT_ATTRIB_FRONT_INDEXES
; i
+=2)
730 if (memcmp( ctx
->Light
.Material
.Attrib
[i
],
731 ctx
->Light
.Material
.Attrib
[i
+1],
732 sizeof(GLfloat
)*4) != 0) {
739 TCL_FALLBACK( ctx
, RADEON_TCL_FALLBACK_LIGHT_TWOSIDE
, fallback
);
743 static void radeonColorMaterial( GLcontext
*ctx
, GLenum face
, GLenum mode
)
745 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
746 GLuint light_model_ctl1
= rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
];
748 light_model_ctl1
&= ~((3 << RADEON_EMISSIVE_SOURCE_SHIFT
) |
749 (3 << RADEON_AMBIENT_SOURCE_SHIFT
) |
750 (3 << RADEON_DIFFUSE_SOURCE_SHIFT
) |
751 (3 << RADEON_SPECULAR_SOURCE_SHIFT
));
753 if (ctx
->Light
.ColorMaterialEnabled
) {
754 GLuint mask
= ctx
->Light
.ColorMaterialBitmask
;
756 if (mask
& MAT_BIT_FRONT_EMISSION
) {
757 light_model_ctl1
|= (RADEON_LM_SOURCE_VERTEX_DIFFUSE
<<
758 RADEON_EMISSIVE_SOURCE_SHIFT
);
761 light_model_ctl1
|= (RADEON_LM_SOURCE_STATE_MULT
<<
762 RADEON_EMISSIVE_SOURCE_SHIFT
);
765 if (mask
& MAT_BIT_FRONT_AMBIENT
) {
766 light_model_ctl1
|= (RADEON_LM_SOURCE_VERTEX_DIFFUSE
<<
767 RADEON_AMBIENT_SOURCE_SHIFT
);
770 light_model_ctl1
|= (RADEON_LM_SOURCE_STATE_MULT
<<
771 RADEON_AMBIENT_SOURCE_SHIFT
);
774 if (mask
& MAT_BIT_FRONT_DIFFUSE
) {
775 light_model_ctl1
|= (RADEON_LM_SOURCE_VERTEX_DIFFUSE
<<
776 RADEON_DIFFUSE_SOURCE_SHIFT
);
779 light_model_ctl1
|= (RADEON_LM_SOURCE_STATE_MULT
<<
780 RADEON_DIFFUSE_SOURCE_SHIFT
);
783 if (mask
& MAT_BIT_FRONT_SPECULAR
) {
784 light_model_ctl1
|= (RADEON_LM_SOURCE_VERTEX_DIFFUSE
<<
785 RADEON_SPECULAR_SOURCE_SHIFT
);
788 light_model_ctl1
|= (RADEON_LM_SOURCE_STATE_MULT
<<
789 RADEON_SPECULAR_SOURCE_SHIFT
);
795 light_model_ctl1
|= (RADEON_LM_SOURCE_STATE_MULT
<< RADEON_EMISSIVE_SOURCE_SHIFT
) |
796 (RADEON_LM_SOURCE_STATE_MULT
<< RADEON_AMBIENT_SOURCE_SHIFT
) |
797 (RADEON_LM_SOURCE_STATE_MULT
<< RADEON_DIFFUSE_SOURCE_SHIFT
) |
798 (RADEON_LM_SOURCE_STATE_MULT
<< RADEON_SPECULAR_SOURCE_SHIFT
);
801 if (light_model_ctl1
!= rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
]) {
802 RADEON_STATECHANGE( rmesa
, tcl
);
803 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] = light_model_ctl1
;
807 void radeonUpdateMaterial( GLcontext
*ctx
)
809 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
810 GLfloat (*mat
)[4] = ctx
->Light
.Material
.Attrib
;
811 GLfloat
*fcmd
= (GLfloat
*)RADEON_DB_STATE( mtl
);
814 if (ctx
->Light
.ColorMaterialEnabled
)
815 mask
&= ~ctx
->Light
.ColorMaterialBitmask
;
817 if (RADEON_DEBUG
& DEBUG_STATE
)
818 fprintf(stderr
, "%s\n", __FUNCTION__
);
821 if (mask
& MAT_BIT_FRONT_EMISSION
) {
822 fcmd
[MTL_EMMISSIVE_RED
] = mat
[MAT_ATTRIB_FRONT_EMISSION
][0];
823 fcmd
[MTL_EMMISSIVE_GREEN
] = mat
[MAT_ATTRIB_FRONT_EMISSION
][1];
824 fcmd
[MTL_EMMISSIVE_BLUE
] = mat
[MAT_ATTRIB_FRONT_EMISSION
][2];
825 fcmd
[MTL_EMMISSIVE_ALPHA
] = mat
[MAT_ATTRIB_FRONT_EMISSION
][3];
827 if (mask
& MAT_BIT_FRONT_AMBIENT
) {
828 fcmd
[MTL_AMBIENT_RED
] = mat
[MAT_ATTRIB_FRONT_AMBIENT
][0];
829 fcmd
[MTL_AMBIENT_GREEN
] = mat
[MAT_ATTRIB_FRONT_AMBIENT
][1];
830 fcmd
[MTL_AMBIENT_BLUE
] = mat
[MAT_ATTRIB_FRONT_AMBIENT
][2];
831 fcmd
[MTL_AMBIENT_ALPHA
] = mat
[MAT_ATTRIB_FRONT_AMBIENT
][3];
833 if (mask
& MAT_BIT_FRONT_DIFFUSE
) {
834 fcmd
[MTL_DIFFUSE_RED
] = mat
[MAT_ATTRIB_FRONT_DIFFUSE
][0];
835 fcmd
[MTL_DIFFUSE_GREEN
] = mat
[MAT_ATTRIB_FRONT_DIFFUSE
][1];
836 fcmd
[MTL_DIFFUSE_BLUE
] = mat
[MAT_ATTRIB_FRONT_DIFFUSE
][2];
837 fcmd
[MTL_DIFFUSE_ALPHA
] = mat
[MAT_ATTRIB_FRONT_DIFFUSE
][3];
839 if (mask
& MAT_BIT_FRONT_SPECULAR
) {
840 fcmd
[MTL_SPECULAR_RED
] = mat
[MAT_ATTRIB_FRONT_SPECULAR
][0];
841 fcmd
[MTL_SPECULAR_GREEN
] = mat
[MAT_ATTRIB_FRONT_SPECULAR
][1];
842 fcmd
[MTL_SPECULAR_BLUE
] = mat
[MAT_ATTRIB_FRONT_SPECULAR
][2];
843 fcmd
[MTL_SPECULAR_ALPHA
] = mat
[MAT_ATTRIB_FRONT_SPECULAR
][3];
845 if (mask
& MAT_BIT_FRONT_SHININESS
) {
846 fcmd
[MTL_SHININESS
] = mat
[MAT_ATTRIB_FRONT_SHININESS
][0];
849 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.mtl
);
851 check_twoside_fallback( ctx
);
852 /* update_global_ambient( ctx );*/
857 * _MESA_NEW_NEED_EYE_COORDS
859 * Uses derived state from mesa:
868 * which are calculated in light.c and are correct for the current
869 * lighting space (model or eye), hence dependencies on _NEW_MODELVIEW
870 * and _MESA_NEW_NEED_EYE_COORDS.
872 static void update_light( GLcontext
*ctx
)
874 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
876 /* Have to check these, or have an automatic shortcircuit mechanism
877 * to remove noop statechanges. (Or just do a better job on the
881 GLuint tmp
= rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
];
883 if (ctx
->_NeedEyeCoords
)
884 tmp
&= ~RADEON_LIGHT_IN_MODELSPACE
;
886 tmp
|= RADEON_LIGHT_IN_MODELSPACE
;
889 /* Leave this test disabled: (unexplained q3 lockup) (even with
892 if (tmp
!= rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
])
894 RADEON_STATECHANGE( rmesa
, tcl
);
895 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] = tmp
;
900 GLfloat
*fcmd
= (GLfloat
*)RADEON_DB_STATE( eye
);
901 fcmd
[EYE_X
] = ctx
->_EyeZDir
[0];
902 fcmd
[EYE_Y
] = ctx
->_EyeZDir
[1];
903 fcmd
[EYE_Z
] = - ctx
->_EyeZDir
[2];
904 fcmd
[EYE_RESCALE_FACTOR
] = ctx
->_ModelViewInvScale
;
905 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.eye
);
910 if (ctx
->Light
.Enabled
) {
912 for (p
= 0 ; p
< MAX_LIGHTS
; p
++) {
913 if (ctx
->Light
.Light
[p
].Enabled
) {
914 struct gl_light
*l
= &ctx
->Light
.Light
[p
];
915 GLfloat
*fcmd
= (GLfloat
*)RADEON_DB_STATE( lit
[p
] );
917 if (l
->EyePosition
[3] == 0.0) {
918 COPY_3FV( &fcmd
[LIT_POSITION_X
], l
->_VP_inf_norm
);
919 COPY_3FV( &fcmd
[LIT_DIRECTION_X
], l
->_h_inf_norm
);
920 fcmd
[LIT_POSITION_W
] = 0;
921 fcmd
[LIT_DIRECTION_W
] = 0;
923 COPY_4V( &fcmd
[LIT_POSITION_X
], l
->_Position
);
924 fcmd
[LIT_DIRECTION_X
] = -l
->_NormSpotDirection
[0];
925 fcmd
[LIT_DIRECTION_Y
] = -l
->_NormSpotDirection
[1];
926 fcmd
[LIT_DIRECTION_Z
] = -l
->_NormSpotDirection
[2];
927 fcmd
[LIT_DIRECTION_W
] = 0;
930 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.lit
[p
] );
936 static void radeonLightfv( GLcontext
*ctx
, GLenum light
,
937 GLenum pname
, const GLfloat
*params
)
939 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
940 GLint p
= light
- GL_LIGHT0
;
941 struct gl_light
*l
= &ctx
->Light
.Light
[p
];
942 GLfloat
*fcmd
= (GLfloat
*)rmesa
->hw
.lit
[p
].cmd
;
949 update_light_colors( ctx
, p
);
952 case GL_SPOT_DIRECTION
:
953 /* picked up in update_light */
957 /* positions picked up in update_light, but can do flag here */
959 GLuint idx
= TCL_PER_LIGHT_CTL_0
+ p
/2;
961 /* FIXME: Set RANGE_ATTEN only when needed */
963 flag
= RADEON_LIGHT_1_IS_LOCAL
;
965 flag
= RADEON_LIGHT_0_IS_LOCAL
;
967 RADEON_STATECHANGE(rmesa
, tcl
);
968 if (l
->EyePosition
[3] != 0.0F
)
969 rmesa
->hw
.tcl
.cmd
[idx
] |= flag
;
971 rmesa
->hw
.tcl
.cmd
[idx
] &= ~flag
;
975 case GL_SPOT_EXPONENT
:
976 RADEON_STATECHANGE(rmesa
, lit
[p
]);
977 fcmd
[LIT_SPOT_EXPONENT
] = params
[0];
980 case GL_SPOT_CUTOFF
: {
981 GLuint flag
= (p
&1) ? RADEON_LIGHT_1_IS_SPOT
: RADEON_LIGHT_0_IS_SPOT
;
982 GLuint idx
= TCL_PER_LIGHT_CTL_0
+ p
/2;
984 RADEON_STATECHANGE(rmesa
, lit
[p
]);
985 fcmd
[LIT_SPOT_CUTOFF
] = l
->_CosCutoff
;
987 RADEON_STATECHANGE(rmesa
, tcl
);
988 if (l
->SpotCutoff
!= 180.0F
)
989 rmesa
->hw
.tcl
.cmd
[idx
] |= flag
;
991 rmesa
->hw
.tcl
.cmd
[idx
] &= ~flag
;
996 case GL_CONSTANT_ATTENUATION
:
997 RADEON_STATECHANGE(rmesa
, lit
[p
]);
998 fcmd
[LIT_ATTEN_CONST
] = params
[0];
999 if ( params
[0] == 0.0 )
1000 fcmd
[LIT_ATTEN_CONST_INV
] = FLT_MAX
;
1002 fcmd
[LIT_ATTEN_CONST_INV
] = 1.0 / params
[0];
1004 case GL_LINEAR_ATTENUATION
:
1005 RADEON_STATECHANGE(rmesa
, lit
[p
]);
1006 fcmd
[LIT_ATTEN_LINEAR
] = params
[0];
1008 case GL_QUADRATIC_ATTENUATION
:
1009 RADEON_STATECHANGE(rmesa
, lit
[p
]);
1010 fcmd
[LIT_ATTEN_QUADRATIC
] = params
[0];
1016 /* Set RANGE_ATTEN only when needed */
1019 case GL_CONSTANT_ATTENUATION
:
1020 case GL_LINEAR_ATTENUATION
:
1021 case GL_QUADRATIC_ATTENUATION
:
1023 GLuint
*icmd
= (GLuint
*)RADEON_DB_STATE( tcl
);
1024 GLuint idx
= TCL_PER_LIGHT_CTL_0
+ p
/2;
1025 GLuint atten_flag
= ( p
&1 ) ? RADEON_LIGHT_1_ENABLE_RANGE_ATTEN
1026 : RADEON_LIGHT_0_ENABLE_RANGE_ATTEN
;
1027 GLuint atten_const_flag
= ( p
&1 ) ? RADEON_LIGHT_1_CONSTANT_RANGE_ATTEN
1028 : RADEON_LIGHT_0_CONSTANT_RANGE_ATTEN
;
1030 if ( l
->EyePosition
[3] == 0.0F
||
1031 ( ( fcmd
[LIT_ATTEN_CONST
] == 0.0 || fcmd
[LIT_ATTEN_CONST
] == 1.0 ) &&
1032 fcmd
[LIT_ATTEN_QUADRATIC
] == 0.0 && fcmd
[LIT_ATTEN_LINEAR
] == 0.0 ) ) {
1033 /* Disable attenuation */
1034 icmd
[idx
] &= ~atten_flag
;
1036 if ( fcmd
[LIT_ATTEN_QUADRATIC
] == 0.0 && fcmd
[LIT_ATTEN_LINEAR
] == 0.0 ) {
1037 /* Enable only constant portion of attenuation calculation */
1038 icmd
[idx
] |= ( atten_flag
| atten_const_flag
);
1040 /* Enable full attenuation calculation */
1041 icmd
[idx
] &= ~atten_const_flag
;
1042 icmd
[idx
] |= atten_flag
;
1046 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.tcl
);
1057 static void radeonLightModelfv( GLcontext
*ctx
, GLenum pname
,
1058 const GLfloat
*param
)
1060 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1063 case GL_LIGHT_MODEL_AMBIENT
:
1064 update_global_ambient( ctx
);
1067 case GL_LIGHT_MODEL_LOCAL_VIEWER
:
1068 RADEON_STATECHANGE( rmesa
, tcl
);
1069 if (ctx
->Light
.Model
.LocalViewer
)
1070 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] |= RADEON_LOCAL_VIEWER
;
1072 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] &= ~RADEON_LOCAL_VIEWER
;
1075 case GL_LIGHT_MODEL_TWO_SIDE
:
1076 RADEON_STATECHANGE( rmesa
, tcl
);
1077 if (ctx
->Light
.Model
.TwoSide
)
1078 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] |= RADEON_LIGHT_TWOSIDE
;
1080 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] &= ~RADEON_LIGHT_TWOSIDE
;
1082 check_twoside_fallback( ctx
);
1084 if (rmesa
->radeon
.TclFallback
) {
1085 radeonChooseRenderState( ctx
);
1086 radeonChooseVertexState( ctx
);
1090 case GL_LIGHT_MODEL_COLOR_CONTROL
:
1091 radeonUpdateSpecular(ctx
);
1099 static void radeonShadeModel( GLcontext
*ctx
, GLenum mode
)
1101 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1102 GLuint s
= rmesa
->hw
.set
.cmd
[SET_SE_CNTL
];
1104 s
&= ~(RADEON_DIFFUSE_SHADE_MASK
|
1105 RADEON_ALPHA_SHADE_MASK
|
1106 RADEON_SPECULAR_SHADE_MASK
|
1107 RADEON_FOG_SHADE_MASK
);
1111 s
|= (RADEON_DIFFUSE_SHADE_FLAT
|
1112 RADEON_ALPHA_SHADE_FLAT
|
1113 RADEON_SPECULAR_SHADE_FLAT
|
1114 RADEON_FOG_SHADE_FLAT
);
1117 s
|= (RADEON_DIFFUSE_SHADE_GOURAUD
|
1118 RADEON_ALPHA_SHADE_GOURAUD
|
1119 RADEON_SPECULAR_SHADE_GOURAUD
|
1120 RADEON_FOG_SHADE_GOURAUD
);
1126 if ( rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] != s
) {
1127 RADEON_STATECHANGE( rmesa
, set
);
1128 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] = s
;
1133 /* =============================================================
1137 static void radeonClipPlane( GLcontext
*ctx
, GLenum plane
, const GLfloat
*eq
)
1139 GLint p
= (GLint
) plane
- (GLint
) GL_CLIP_PLANE0
;
1140 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1141 GLint
*ip
= (GLint
*)ctx
->Transform
._ClipUserPlane
[p
];
1143 RADEON_STATECHANGE( rmesa
, ucp
[p
] );
1144 rmesa
->hw
.ucp
[p
].cmd
[UCP_X
] = ip
[0];
1145 rmesa
->hw
.ucp
[p
].cmd
[UCP_Y
] = ip
[1];
1146 rmesa
->hw
.ucp
[p
].cmd
[UCP_Z
] = ip
[2];
1147 rmesa
->hw
.ucp
[p
].cmd
[UCP_W
] = ip
[3];
1150 static void radeonUpdateClipPlanes( GLcontext
*ctx
)
1152 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1155 for (p
= 0; p
< ctx
->Const
.MaxClipPlanes
; p
++) {
1156 if (ctx
->Transform
.ClipPlanesEnabled
& (1 << p
)) {
1157 GLint
*ip
= (GLint
*)ctx
->Transform
._ClipUserPlane
[p
];
1159 RADEON_STATECHANGE( rmesa
, ucp
[p
] );
1160 rmesa
->hw
.ucp
[p
].cmd
[UCP_X
] = ip
[0];
1161 rmesa
->hw
.ucp
[p
].cmd
[UCP_Y
] = ip
[1];
1162 rmesa
->hw
.ucp
[p
].cmd
[UCP_Z
] = ip
[2];
1163 rmesa
->hw
.ucp
[p
].cmd
[UCP_W
] = ip
[3];
1169 /* =============================================================
1174 radeonStencilFuncSeparate( GLcontext
*ctx
, GLenum face
, GLenum func
,
1175 GLint ref
, GLuint mask
)
1177 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1178 GLuint refmask
= (((ctx
->Stencil
.Ref
[0] & 0xff) << RADEON_STENCIL_REF_SHIFT
) |
1179 ((ctx
->Stencil
.ValueMask
[0] & 0xff) << RADEON_STENCIL_MASK_SHIFT
));
1181 RADEON_STATECHANGE( rmesa
, ctx
);
1182 RADEON_STATECHANGE( rmesa
, msk
);
1184 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] &= ~RADEON_STENCIL_TEST_MASK
;
1185 rmesa
->hw
.msk
.cmd
[MSK_RB3D_STENCILREFMASK
] &= ~(RADEON_STENCIL_REF_MASK
|
1186 RADEON_STENCIL_VALUE_MASK
);
1188 switch ( ctx
->Stencil
.Function
[0] ) {
1190 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_TEST_NEVER
;
1193 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_TEST_LESS
;
1196 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_TEST_EQUAL
;
1199 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_TEST_LEQUAL
;
1202 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_TEST_GREATER
;
1205 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_TEST_NEQUAL
;
1208 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_TEST_GEQUAL
;
1211 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_TEST_ALWAYS
;
1215 rmesa
->hw
.msk
.cmd
[MSK_RB3D_STENCILREFMASK
] |= refmask
;
1219 radeonStencilMaskSeparate( GLcontext
*ctx
, GLenum face
, GLuint mask
)
1221 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1223 RADEON_STATECHANGE( rmesa
, msk
);
1224 rmesa
->hw
.msk
.cmd
[MSK_RB3D_STENCILREFMASK
] &= ~RADEON_STENCIL_WRITE_MASK
;
1225 rmesa
->hw
.msk
.cmd
[MSK_RB3D_STENCILREFMASK
] |=
1226 ((ctx
->Stencil
.WriteMask
[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT
);
1229 static void radeonStencilOpSeparate( GLcontext
*ctx
, GLenum face
, GLenum fail
,
1230 GLenum zfail
, GLenum zpass
)
1232 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1234 /* radeon 7200 have stencil bug, DEC and INC_WRAP will actually both do DEC_WRAP,
1235 and DEC_WRAP (and INVERT) will do INVERT. No way to get correct INC_WRAP and DEC,
1236 but DEC_WRAP can be fixed by using DEC and INC_WRAP at least use INC. */
1238 GLuint tempRADEON_STENCIL_FAIL_DEC_WRAP
;
1239 GLuint tempRADEON_STENCIL_FAIL_INC_WRAP
;
1240 GLuint tempRADEON_STENCIL_ZFAIL_DEC_WRAP
;
1241 GLuint tempRADEON_STENCIL_ZFAIL_INC_WRAP
;
1242 GLuint tempRADEON_STENCIL_ZPASS_DEC_WRAP
;
1243 GLuint tempRADEON_STENCIL_ZPASS_INC_WRAP
;
1245 if (rmesa
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_BROKEN_STENCIL
) {
1246 tempRADEON_STENCIL_FAIL_DEC_WRAP
= RADEON_STENCIL_FAIL_DEC
;
1247 tempRADEON_STENCIL_FAIL_INC_WRAP
= RADEON_STENCIL_FAIL_INC
;
1248 tempRADEON_STENCIL_ZFAIL_DEC_WRAP
= RADEON_STENCIL_ZFAIL_DEC
;
1249 tempRADEON_STENCIL_ZFAIL_INC_WRAP
= RADEON_STENCIL_ZFAIL_INC
;
1250 tempRADEON_STENCIL_ZPASS_DEC_WRAP
= RADEON_STENCIL_ZPASS_DEC
;
1251 tempRADEON_STENCIL_ZPASS_INC_WRAP
= RADEON_STENCIL_ZPASS_INC
;
1254 tempRADEON_STENCIL_FAIL_DEC_WRAP
= RADEON_STENCIL_FAIL_DEC_WRAP
;
1255 tempRADEON_STENCIL_FAIL_INC_WRAP
= RADEON_STENCIL_FAIL_INC_WRAP
;
1256 tempRADEON_STENCIL_ZFAIL_DEC_WRAP
= RADEON_STENCIL_ZFAIL_DEC_WRAP
;
1257 tempRADEON_STENCIL_ZFAIL_INC_WRAP
= RADEON_STENCIL_ZFAIL_INC_WRAP
;
1258 tempRADEON_STENCIL_ZPASS_DEC_WRAP
= RADEON_STENCIL_ZPASS_DEC_WRAP
;
1259 tempRADEON_STENCIL_ZPASS_INC_WRAP
= RADEON_STENCIL_ZPASS_INC_WRAP
;
1262 RADEON_STATECHANGE( rmesa
, ctx
);
1263 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] &= ~(RADEON_STENCIL_FAIL_MASK
|
1264 RADEON_STENCIL_ZFAIL_MASK
|
1265 RADEON_STENCIL_ZPASS_MASK
);
1267 switch ( ctx
->Stencil
.FailFunc
[0] ) {
1269 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_FAIL_KEEP
;
1272 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_FAIL_ZERO
;
1275 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_FAIL_REPLACE
;
1278 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_FAIL_INC
;
1281 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_FAIL_DEC
;
1284 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= tempRADEON_STENCIL_FAIL_INC_WRAP
;
1287 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= tempRADEON_STENCIL_FAIL_DEC_WRAP
;
1290 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_FAIL_INVERT
;
1294 switch ( ctx
->Stencil
.ZFailFunc
[0] ) {
1296 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZFAIL_KEEP
;
1299 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZFAIL_ZERO
;
1302 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZFAIL_REPLACE
;
1305 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZFAIL_INC
;
1308 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZFAIL_DEC
;
1311 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= tempRADEON_STENCIL_ZFAIL_INC_WRAP
;
1314 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= tempRADEON_STENCIL_ZFAIL_DEC_WRAP
;
1317 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZFAIL_INVERT
;
1321 switch ( ctx
->Stencil
.ZPassFunc
[0] ) {
1323 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZPASS_KEEP
;
1326 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZPASS_ZERO
;
1329 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZPASS_REPLACE
;
1332 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZPASS_INC
;
1335 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZPASS_DEC
;
1338 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= tempRADEON_STENCIL_ZPASS_INC_WRAP
;
1341 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= tempRADEON_STENCIL_ZPASS_DEC_WRAP
;
1344 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_ZSTENCILCNTL
] |= RADEON_STENCIL_ZPASS_INVERT
;
1349 static void radeonClearStencil( GLcontext
*ctx
, GLint s
)
1351 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1353 rmesa
->radeon
.state
.stencil
.clear
=
1354 ((GLuint
) (ctx
->Stencil
.Clear
& 0xff) |
1355 (0xff << RADEON_STENCIL_MASK_SHIFT
) |
1356 ((ctx
->Stencil
.WriteMask
[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT
));
1360 /* =============================================================
1361 * Window position and viewport transformation
1365 * To correctly position primitives:
1367 #define SUBPIXEL_X 0.125
1368 #define SUBPIXEL_Y 0.125
1372 * Called when window size or position changes or viewport or depth range
1373 * state is changed. We update the hardware viewport state here.
1375 void radeonUpdateWindow( GLcontext
*ctx
)
1377 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1378 __DRIdrawablePrivate
*dPriv
= radeon_get_drawable(&rmesa
->radeon
);
1379 GLfloat xoffset
= dPriv
? (GLfloat
) dPriv
->x
: 0;
1380 GLfloat yoffset
= dPriv
? (GLfloat
) dPriv
->y
+ dPriv
->h
: 0;
1381 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
1382 const GLboolean render_to_fbo
= (ctx
->DrawBuffer
? (ctx
->DrawBuffer
->Name
!= 0) : 0);
1383 const GLfloat depthScale
= 1.0F
/ ctx
->DrawBuffer
->_DepthMaxF
;
1384 GLfloat y_scale
, y_bias
;
1386 if (render_to_fbo
) {
1394 float_ui32_type sx
= { v
[MAT_SX
] };
1395 float_ui32_type tx
= { v
[MAT_TX
] + xoffset
+ SUBPIXEL_X
};
1396 float_ui32_type sy
= { v
[MAT_SY
] * y_scale
};
1397 float_ui32_type ty
= { (v
[MAT_TY
] * y_scale
) + y_bias
+ SUBPIXEL_Y
};
1398 float_ui32_type sz
= { v
[MAT_SZ
] * depthScale
};
1399 float_ui32_type tz
= { v
[MAT_TZ
] * depthScale
};
1401 RADEON_STATECHANGE( rmesa
, vpt
);
1403 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_XSCALE
] = sx
.ui32
;
1404 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_XOFFSET
] = tx
.ui32
;
1405 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_YSCALE
] = sy
.ui32
;
1406 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_YOFFSET
] = ty
.ui32
;
1407 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_ZSCALE
] = sz
.ui32
;
1408 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_ZOFFSET
] = tz
.ui32
;
1412 static void radeonViewport( GLcontext
*ctx
, GLint x
, GLint y
,
1413 GLsizei width
, GLsizei height
)
1415 /* Don't pipeline viewport changes, conflict with window offset
1416 * setting below. Could apply deltas to rescue pipelined viewport
1417 * values, or keep the originals hanging around.
1419 radeonUpdateWindow( ctx
);
1421 radeon_viewport(ctx
, x
, y
, width
, height
);
1424 static void radeonDepthRange( GLcontext
*ctx
, GLclampd nearval
,
1427 radeonUpdateWindow( ctx
);
1430 void radeonUpdateViewportOffset( GLcontext
*ctx
)
1432 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1433 __DRIdrawablePrivate
*dPriv
= radeon_get_drawable(&rmesa
->radeon
);
1434 GLfloat xoffset
= (GLfloat
)dPriv
->x
;
1435 GLfloat yoffset
= (GLfloat
)dPriv
->y
+ dPriv
->h
;
1436 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
1441 tx
.f
= v
[MAT_TX
] + xoffset
+ SUBPIXEL_X
;
1442 ty
.f
= (- v
[MAT_TY
]) + yoffset
+ SUBPIXEL_Y
;
1444 if ( rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_XOFFSET
] != tx
.ui32
||
1445 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_YOFFSET
] != ty
.ui32
)
1447 /* Note: this should also modify whatever data the context reset
1450 RADEON_STATECHANGE( rmesa
, vpt
);
1451 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_XOFFSET
] = tx
.ui32
;
1452 rmesa
->hw
.vpt
.cmd
[VPT_SE_VPORT_YOFFSET
] = ty
.ui32
;
1454 /* update polygon stipple x/y screen offset */
1457 GLuint m
= rmesa
->hw
.msc
.cmd
[MSC_RE_MISC
];
1459 m
&= ~(RADEON_STIPPLE_X_OFFSET_MASK
|
1460 RADEON_STIPPLE_Y_OFFSET_MASK
);
1462 /* add magic offsets, then invert */
1463 stx
= 31 - ((dPriv
->x
- 1) & RADEON_STIPPLE_COORD_MASK
);
1464 sty
= 31 - ((dPriv
->y
+ dPriv
->h
- 1)
1465 & RADEON_STIPPLE_COORD_MASK
);
1467 m
|= ((stx
<< RADEON_STIPPLE_X_OFFSET_SHIFT
) |
1468 (sty
<< RADEON_STIPPLE_Y_OFFSET_SHIFT
));
1470 if ( rmesa
->hw
.msc
.cmd
[MSC_RE_MISC
] != m
) {
1471 RADEON_STATECHANGE( rmesa
, msc
);
1472 rmesa
->hw
.msc
.cmd
[MSC_RE_MISC
] = m
;
1477 radeonUpdateScissor( ctx
);
1482 /* =============================================================
1486 static void radeonClearColor( GLcontext
*ctx
, const GLfloat color
[4] )
1488 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1490 struct radeon_renderbuffer
*rrb
;
1492 rrb
= radeon_get_colorbuffer(&rmesa
->radeon
);
1496 CLAMPED_FLOAT_TO_UBYTE(c
[0], color
[0]);
1497 CLAMPED_FLOAT_TO_UBYTE(c
[1], color
[1]);
1498 CLAMPED_FLOAT_TO_UBYTE(c
[2], color
[2]);
1499 CLAMPED_FLOAT_TO_UBYTE(c
[3], color
[3]);
1500 rmesa
->radeon
.state
.color
.clear
= radeonPackColor( rrb
->cpp
,
1501 c
[0], c
[1], c
[2], c
[3] );
1505 static void radeonRenderMode( GLcontext
*ctx
, GLenum mode
)
1507 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1508 FALLBACK( rmesa
, RADEON_FALLBACK_RENDER_MODE
, (mode
!= GL_RENDER
) );
1512 static GLuint radeon_rop_tab
[] = {
1515 RADEON_ROP_AND_REVERSE
,
1517 RADEON_ROP_AND_INVERTED
,
1524 RADEON_ROP_OR_REVERSE
,
1525 RADEON_ROP_COPY_INVERTED
,
1526 RADEON_ROP_OR_INVERTED
,
1531 static void radeonLogicOpCode( GLcontext
*ctx
, GLenum opcode
)
1533 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1534 GLuint rop
= (GLuint
)opcode
- GL_CLEAR
;
1538 RADEON_STATECHANGE( rmesa
, msk
);
1539 rmesa
->hw
.msk
.cmd
[MSK_RB3D_ROPCNTL
] = radeon_rop_tab
[rop
];
1542 /* =============================================================
1543 * State enable/disable
1546 static void radeonEnable( GLcontext
*ctx
, GLenum cap
, GLboolean state
)
1548 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1551 if ( RADEON_DEBUG
& DEBUG_STATE
)
1552 fprintf( stderr
, "%s( %s = %s )\n", __FUNCTION__
,
1553 _mesa_lookup_enum_by_nr( cap
),
1554 state
? "GL_TRUE" : "GL_FALSE" );
1557 /* Fast track this one...
1565 RADEON_STATECHANGE( rmesa
, ctx
);
1567 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] |= RADEON_ALPHA_TEST_ENABLE
;
1569 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] &= ~RADEON_ALPHA_TEST_ENABLE
;
1574 RADEON_STATECHANGE( rmesa
, ctx
);
1576 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] |= RADEON_ALPHA_BLEND_ENABLE
;
1578 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &= ~RADEON_ALPHA_BLEND_ENABLE
;
1580 if ( (ctx
->Color
.ColorLogicOpEnabled
|| (ctx
->Color
.BlendEnabled
1581 && ctx
->Color
.BlendEquationRGB
== GL_LOGIC_OP
)) ) {
1582 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] |= RADEON_ROP_ENABLE
;
1584 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &= ~RADEON_ROP_ENABLE
;
1587 /* Catch a possible fallback:
1590 ctx
->Driver
.BlendEquationSeparate( ctx
,
1591 ctx
->Color
.BlendEquationRGB
,
1592 ctx
->Color
.BlendEquationA
);
1593 ctx
->Driver
.BlendFuncSeparate( ctx
, ctx
->Color
.BlendSrcRGB
,
1594 ctx
->Color
.BlendDstRGB
,
1595 ctx
->Color
.BlendSrcA
,
1596 ctx
->Color
.BlendDstA
);
1599 FALLBACK( rmesa
, RADEON_FALLBACK_BLEND_FUNC
, GL_FALSE
);
1600 FALLBACK( rmesa
, RADEON_FALLBACK_BLEND_EQ
, GL_FALSE
);
1604 case GL_CLIP_PLANE0
:
1605 case GL_CLIP_PLANE1
:
1606 case GL_CLIP_PLANE2
:
1607 case GL_CLIP_PLANE3
:
1608 case GL_CLIP_PLANE4
:
1609 case GL_CLIP_PLANE5
:
1610 p
= cap
-GL_CLIP_PLANE0
;
1611 RADEON_STATECHANGE( rmesa
, tcl
);
1613 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] |= (RADEON_UCP_ENABLE_0
<<p
);
1614 radeonClipPlane( ctx
, cap
, NULL
);
1617 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] &= ~(RADEON_UCP_ENABLE_0
<<p
);
1621 case GL_COLOR_MATERIAL
:
1622 radeonColorMaterial( ctx
, 0, 0 );
1623 radeonUpdateMaterial( ctx
);
1627 radeonCullFace( ctx
, 0 );
1631 RADEON_STATECHANGE(rmesa
, ctx
);
1633 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] |= RADEON_Z_ENABLE
;
1635 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &= ~RADEON_Z_ENABLE
;
1640 RADEON_STATECHANGE(rmesa
, ctx
);
1642 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] |= RADEON_DITHER_ENABLE
;
1643 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &= ~rmesa
->radeon
.state
.color
.roundEnable
;
1645 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &= ~RADEON_DITHER_ENABLE
;
1646 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] |= rmesa
->radeon
.state
.color
.roundEnable
;
1651 RADEON_STATECHANGE(rmesa
, ctx
);
1653 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] |= RADEON_FOG_ENABLE
;
1654 radeonFogfv( ctx
, GL_FOG_MODE
, NULL
);
1656 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] &= ~RADEON_FOG_ENABLE
;
1657 RADEON_STATECHANGE(rmesa
, tcl
);
1658 rmesa
->hw
.tcl
.cmd
[TCL_UCP_VERT_BLEND_CTL
] &= ~RADEON_TCL_FOG_MASK
;
1660 radeonUpdateSpecular( ctx
); /* for PK_SPEC */
1661 _mesa_allow_light_in_model( ctx
, !state
);
1672 RADEON_STATECHANGE(rmesa
, tcl
);
1673 p
= cap
- GL_LIGHT0
;
1675 flag
= (RADEON_LIGHT_1_ENABLE
|
1676 RADEON_LIGHT_1_ENABLE_AMBIENT
|
1677 RADEON_LIGHT_1_ENABLE_SPECULAR
);
1679 flag
= (RADEON_LIGHT_0_ENABLE
|
1680 RADEON_LIGHT_0_ENABLE_AMBIENT
|
1681 RADEON_LIGHT_0_ENABLE_SPECULAR
);
1684 rmesa
->hw
.tcl
.cmd
[p
/2 + TCL_PER_LIGHT_CTL_0
] |= flag
;
1686 rmesa
->hw
.tcl
.cmd
[p
/2 + TCL_PER_LIGHT_CTL_0
] &= ~flag
;
1690 update_light_colors( ctx
, p
);
1694 RADEON_STATECHANGE(rmesa
, tcl
);
1695 radeonUpdateSpecular(ctx
);
1696 check_twoside_fallback( ctx
);
1699 case GL_LINE_SMOOTH
:
1700 RADEON_STATECHANGE( rmesa
, ctx
);
1702 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] |= RADEON_ANTI_ALIAS_LINE
;
1704 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] &= ~RADEON_ANTI_ALIAS_LINE
;
1708 case GL_LINE_STIPPLE
:
1709 RADEON_STATECHANGE( rmesa
, ctx
);
1711 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] |= RADEON_PATTERN_ENABLE
;
1713 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] &= ~RADEON_PATTERN_ENABLE
;
1717 case GL_COLOR_LOGIC_OP
:
1718 RADEON_STATECHANGE( rmesa
, ctx
);
1719 if ( (ctx
->Color
.ColorLogicOpEnabled
|| (ctx
->Color
.BlendEnabled
1720 && ctx
->Color
.BlendEquationRGB
== GL_LOGIC_OP
)) ) {
1721 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] |= RADEON_ROP_ENABLE
;
1723 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &= ~RADEON_ROP_ENABLE
;
1728 RADEON_STATECHANGE( rmesa
, tcl
);
1730 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] |= RADEON_NORMALIZE_NORMALS
;
1732 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] &= ~RADEON_NORMALIZE_NORMALS
;
1736 case GL_POLYGON_OFFSET_POINT
:
1737 RADEON_STATECHANGE( rmesa
, set
);
1739 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] |= RADEON_ZBIAS_ENABLE_POINT
;
1741 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] &= ~RADEON_ZBIAS_ENABLE_POINT
;
1745 case GL_POLYGON_OFFSET_LINE
:
1746 RADEON_STATECHANGE( rmesa
, set
);
1748 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] |= RADEON_ZBIAS_ENABLE_LINE
;
1750 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] &= ~RADEON_ZBIAS_ENABLE_LINE
;
1754 case GL_POLYGON_OFFSET_FILL
:
1755 RADEON_STATECHANGE( rmesa
, set
);
1757 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] |= RADEON_ZBIAS_ENABLE_TRI
;
1759 rmesa
->hw
.set
.cmd
[SET_SE_CNTL
] &= ~RADEON_ZBIAS_ENABLE_TRI
;
1763 case GL_POLYGON_SMOOTH
:
1764 RADEON_STATECHANGE( rmesa
, ctx
);
1766 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] |= RADEON_ANTI_ALIAS_POLY
;
1768 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] &= ~RADEON_ANTI_ALIAS_POLY
;
1772 case GL_POLYGON_STIPPLE
:
1773 RADEON_STATECHANGE(rmesa
, ctx
);
1775 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] |= RADEON_STIPPLE_ENABLE
;
1777 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] &= ~RADEON_STIPPLE_ENABLE
;
1781 case GL_RESCALE_NORMAL_EXT
: {
1782 GLboolean tmp
= ctx
->_NeedEyeCoords
? state
: !state
;
1783 RADEON_STATECHANGE( rmesa
, tcl
);
1785 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] |= RADEON_RESCALE_NORMALS
;
1787 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] &= ~RADEON_RESCALE_NORMALS
;
1792 case GL_SCISSOR_TEST
:
1793 radeon_firevertices(&rmesa
->radeon
);
1794 rmesa
->radeon
.state
.scissor
.enabled
= state
;
1795 radeonUpdateScissor( ctx
);
1798 case GL_STENCIL_TEST
:
1800 GLboolean hw_stencil
= GL_FALSE
;
1801 if (ctx
->DrawBuffer
) {
1802 struct radeon_renderbuffer
*rrbStencil
1803 = radeon_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_STENCIL
);
1804 hw_stencil
= (rrbStencil
&& rrbStencil
->bo
);
1808 RADEON_STATECHANGE( rmesa
, ctx
);
1810 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] |= RADEON_STENCIL_ENABLE
;
1812 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &= ~RADEON_STENCIL_ENABLE
;
1815 FALLBACK( rmesa
, RADEON_FALLBACK_STENCIL
, state
);
1820 case GL_TEXTURE_GEN_Q
:
1821 case GL_TEXTURE_GEN_R
:
1822 case GL_TEXTURE_GEN_S
:
1823 case GL_TEXTURE_GEN_T
:
1824 /* Picked up in radeonUpdateTextureState.
1826 rmesa
->recheck_texgen
[ctx
->Texture
.CurrentUnit
] = GL_TRUE
;
1829 case GL_COLOR_SUM_EXT
:
1830 radeonUpdateSpecular ( ctx
);
1839 static void radeonLightingSpaceChange( GLcontext
*ctx
)
1841 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1843 RADEON_STATECHANGE( rmesa
, tcl
);
1845 if (RADEON_DEBUG
& DEBUG_STATE
)
1846 fprintf(stderr
, "%s %d BEFORE %x\n", __FUNCTION__
, ctx
->_NeedEyeCoords
,
1847 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
]);
1849 if (ctx
->_NeedEyeCoords
)
1850 tmp
= ctx
->Transform
.RescaleNormals
;
1852 tmp
= !ctx
->Transform
.RescaleNormals
;
1855 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] |= RADEON_RESCALE_NORMALS
;
1857 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
] &= ~RADEON_RESCALE_NORMALS
;
1860 if (RADEON_DEBUG
& DEBUG_STATE
)
1861 fprintf(stderr
, "%s %d AFTER %x\n", __FUNCTION__
, ctx
->_NeedEyeCoords
,
1862 rmesa
->hw
.tcl
.cmd
[TCL_LIGHT_MODEL_CTL
]);
1865 /* =============================================================
1866 * Deferred state management - matrices, textures, other?
1870 void radeonUploadTexMatrix( r100ContextPtr rmesa
,
1871 int unit
, GLboolean swapcols
)
1873 /* Here's how this works: on r100, only 3 tex coords can be submitted, so the
1874 vector looks like this probably: (s t r|q 0) (not sure if the last coord
1875 is hardwired to 0, could be 1 too). Interestingly, it actually looks like
1876 texgen generates all 4 coords, at least tests with projtex indicated that.
1877 So: if we need the q coord in the end (solely determined by the texture
1878 target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row.
1879 Additionally, if we don't have texgen but 4 tex coords submitted, we swap
1880 column 3 and 4 (for the 2d / 1d / texrect targets) since the the q coord
1881 will get submitted in the "wrong", i.e. 3rd, slot.
1882 If an app submits 3 coords for 2d targets, we assume it is saving on vertex
1883 size and using the texture matrix to swap the r and q coords around (ut2k3
1884 does exactly that), so we don't need the 3rd / 4th column swap - still need
1885 the 3rd / 4th row swap of course. This will potentially break for apps which
1886 use TexCoord3x just for fun. Additionally, it will never work if an app uses
1887 an "advanced" texture matrix and relies on all 4 texcoord inputs to generate
1888 the maximum needed 3. This seems impossible to do with hw tcl on r100, and
1889 incredibly hard to detect so we can't just fallback in such a case. Assume
1890 it never happens... - rs
1893 int idx
= TEXMAT_0
+ unit
;
1894 float *dest
= ((float *)RADEON_DB_STATE( mat
[idx
] )) + MAT_ELT_0
;
1896 struct gl_texture_unit tUnit
= rmesa
->radeon
.glCtx
->Texture
.Unit
[unit
];
1897 GLfloat
*src
= rmesa
->tmpmat
[unit
].m
;
1899 rmesa
->TexMatColSwap
&= ~(1 << unit
);
1900 if ((tUnit
._ReallyEnabled
& (TEXTURE_3D_BIT
| TEXTURE_CUBE_BIT
)) == 0) {
1902 rmesa
->TexMatColSwap
|= 1 << unit
;
1903 /* attention some elems are swapped 2 times! */
1916 /* those last 4 are probably never used */
1923 for (i
= 0; i
< 2; i
++) {
1927 *dest
++ = src
[i
+12];
1929 for (i
= 3; i
>= 2; i
--) {
1933 *dest
++ = src
[i
+12];
1938 for (i
= 0 ; i
< 4 ; i
++) {
1942 *dest
++ = src
[i
+12];
1946 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.mat
[idx
] );
1950 static void upload_matrix( r100ContextPtr rmesa
, GLfloat
*src
, int idx
)
1952 float *dest
= ((float *)RADEON_DB_STATE( mat
[idx
] ))+MAT_ELT_0
;
1956 for (i
= 0 ; i
< 4 ; i
++) {
1960 *dest
++ = src
[i
+12];
1963 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.mat
[idx
] );
1966 static void upload_matrix_t( r100ContextPtr rmesa
, GLfloat
*src
, int idx
)
1968 float *dest
= ((float *)RADEON_DB_STATE( mat
[idx
] ))+MAT_ELT_0
;
1969 memcpy(dest
, src
, 16*sizeof(float));
1970 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.mat
[idx
] );
1974 static void update_texturematrix( GLcontext
*ctx
)
1976 r100ContextPtr rmesa
= R100_CONTEXT( ctx
);
1977 GLuint tpc
= rmesa
->hw
.tcl
.cmd
[TCL_TEXTURE_PROC_CTL
];
1978 GLuint vs
= rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
];
1980 GLuint texMatEnabled
= 0;
1981 rmesa
->NeedTexMatrix
= 0;
1982 rmesa
->TexMatColSwap
= 0;
1984 for (unit
= 0 ; unit
< ctx
->Const
.MaxTextureUnits
; unit
++) {
1985 if (ctx
->Texture
.Unit
[unit
]._ReallyEnabled
) {
1986 GLboolean needMatrix
= GL_FALSE
;
1987 if (ctx
->TextureMatrixStack
[unit
].Top
->type
!= MATRIX_IDENTITY
) {
1988 needMatrix
= GL_TRUE
;
1989 texMatEnabled
|= (RADEON_TEXGEN_TEXMAT_0_ENABLE
|
1990 RADEON_TEXMAT_0_ENABLE
) << unit
;
1992 if (rmesa
->TexGenEnabled
& (RADEON_TEXMAT_0_ENABLE
<< unit
)) {
1993 /* Need to preconcatenate any active texgen
1994 * obj/eyeplane matrices:
1996 _math_matrix_mul_matrix( &rmesa
->tmpmat
[unit
],
1997 ctx
->TextureMatrixStack
[unit
].Top
,
1998 &rmesa
->TexGenMatrix
[unit
] );
2001 _math_matrix_copy( &rmesa
->tmpmat
[unit
],
2002 ctx
->TextureMatrixStack
[unit
].Top
);
2005 else if (rmesa
->TexGenEnabled
& (RADEON_TEXMAT_0_ENABLE
<< unit
)) {
2006 _math_matrix_copy( &rmesa
->tmpmat
[unit
], &rmesa
->TexGenMatrix
[unit
] );
2007 needMatrix
= GL_TRUE
;
2010 rmesa
->NeedTexMatrix
|= 1 << unit
;
2011 radeonUploadTexMatrix( rmesa
, unit
,
2012 !ctx
->Texture
.Unit
[unit
].TexGenEnabled
);
2017 tpc
= (texMatEnabled
| rmesa
->TexGenEnabled
);
2019 /* TCL_TEX_COMPUTED_x is TCL_TEX_INPUT_x | 0x8 */
2020 vs
&= ~((RADEON_TCL_TEX_COMPUTED_TEX_0
<< RADEON_TCL_TEX_0_OUTPUT_SHIFT
) |
2021 (RADEON_TCL_TEX_COMPUTED_TEX_0
<< RADEON_TCL_TEX_1_OUTPUT_SHIFT
) |
2022 (RADEON_TCL_TEX_COMPUTED_TEX_0
<< RADEON_TCL_TEX_2_OUTPUT_SHIFT
));
2024 vs
|= (((tpc
& RADEON_TEXGEN_TEXMAT_0_ENABLE
) <<
2025 (RADEON_TCL_TEX_0_OUTPUT_SHIFT
+ 3)) |
2026 ((tpc
& RADEON_TEXGEN_TEXMAT_1_ENABLE
) <<
2027 (RADEON_TCL_TEX_1_OUTPUT_SHIFT
+ 2)) |
2028 ((tpc
& RADEON_TEXGEN_TEXMAT_2_ENABLE
) <<
2029 (RADEON_TCL_TEX_2_OUTPUT_SHIFT
+ 1)));
2031 if (tpc
!= rmesa
->hw
.tcl
.cmd
[TCL_TEXTURE_PROC_CTL
] ||
2032 vs
!= rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
]) {
2034 RADEON_STATECHANGE(rmesa
, tcl
);
2035 rmesa
->hw
.tcl
.cmd
[TCL_TEXTURE_PROC_CTL
] = tpc
;
2036 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXSEL
] = vs
;
2040 static GLboolean
r100ValidateBuffers(GLcontext
*ctx
)
2042 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
2043 struct radeon_renderbuffer
*rrb
;
2046 radeon_cs_space_reset_bos(rmesa
->radeon
.cmdbuf
.cs
);
2048 rrb
= radeon_get_colorbuffer(&rmesa
->radeon
);
2050 if (rrb
&& rrb
->bo
) {
2051 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
, rrb
->bo
,
2052 0, RADEON_GEM_DOMAIN_VRAM
);
2056 rrb
= radeon_get_depthbuffer(&rmesa
->radeon
);
2058 if (rrb
&& rrb
->bo
) {
2059 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
, rrb
->bo
,
2060 0, RADEON_GEM_DOMAIN_VRAM
);
2063 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; ++i
) {
2066 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
)
2069 t
= rmesa
->state
.texture
.unit
[i
].texobj
;
2070 if (t
->image_override
&& t
->bo
)
2071 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
, t
->bo
,
2072 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
2074 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
, t
->mt
->bo
,
2075 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
2078 ret
= radeon_cs_space_check_with_bo(rmesa
->radeon
.cmdbuf
.cs
, first_elem(&rmesa
->radeon
.dma
.reserved
)->bo
, RADEON_GEM_DOMAIN_GTT
, 0);
2084 GLboolean
radeonValidateState( GLcontext
*ctx
)
2086 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
2087 GLuint new_state
= rmesa
->radeon
.NewGLState
;
2089 if (new_state
& _NEW_BUFFERS
) {
2090 _mesa_update_framebuffer(ctx
);
2091 /* this updates the DrawBuffer's Width/Height if it's a FBO */
2092 _mesa_update_draw_buffer_bounds(ctx
);
2093 RADEON_STATECHANGE(rmesa
, ctx
);
2096 if (new_state
& _NEW_TEXTURE
) {
2097 radeonUpdateTextureState( ctx
);
2098 new_state
|= rmesa
->radeon
.NewGLState
; /* may add TEXTURE_MATRIX */
2101 /* we need to do a space check here */
2102 if (!r100ValidateBuffers(ctx
))
2105 /* Need an event driven matrix update?
2107 if (new_state
& (_NEW_MODELVIEW
|_NEW_PROJECTION
))
2108 upload_matrix( rmesa
, ctx
->_ModelProjectMatrix
.m
, MODEL_PROJ
);
2110 /* Need these for lighting (shouldn't upload otherwise)
2112 if (new_state
& (_NEW_MODELVIEW
)) {
2113 upload_matrix( rmesa
, ctx
->ModelviewMatrixStack
.Top
->m
, MODEL
);
2114 upload_matrix_t( rmesa
, ctx
->ModelviewMatrixStack
.Top
->inv
, MODEL_IT
);
2117 /* Does this need to be triggered on eg. modelview for
2118 * texgen-derived objplane/eyeplane matrices?
2120 if (new_state
& _NEW_TEXTURE_MATRIX
) {
2121 update_texturematrix( ctx
);
2124 if (new_state
& (_NEW_LIGHT
|_NEW_MODELVIEW
|_MESA_NEW_NEED_EYE_COORDS
)) {
2125 update_light( ctx
);
2128 /* emit all active clip planes if projection matrix changes.
2130 if (new_state
& (_NEW_PROJECTION
)) {
2131 if (ctx
->Transform
.ClipPlanesEnabled
)
2132 radeonUpdateClipPlanes( ctx
);
2136 rmesa
->radeon
.NewGLState
= 0;
2142 static void radeonInvalidateState( GLcontext
*ctx
, GLuint new_state
)
2144 _swrast_InvalidateState( ctx
, new_state
);
2145 _swsetup_InvalidateState( ctx
, new_state
);
2146 _vbo_InvalidateState( ctx
, new_state
);
2147 _tnl_InvalidateState( ctx
, new_state
);
2148 _ae_invalidate_state( ctx
, new_state
);
2149 R100_CONTEXT(ctx
)->radeon
.NewGLState
|= new_state
;
2153 /* A hack. Need a faster way to find this out.
2155 static GLboolean
check_material( GLcontext
*ctx
)
2157 TNLcontext
*tnl
= TNL_CONTEXT(ctx
);
2160 for (i
= _TNL_ATTRIB_MAT_FRONT_AMBIENT
;
2161 i
< _TNL_ATTRIB_MAT_BACK_INDEXES
;
2163 if (tnl
->vb
.AttribPtr
[i
] &&
2164 tnl
->vb
.AttribPtr
[i
]->stride
)
2171 static void radeonWrapRunPipeline( GLcontext
*ctx
)
2173 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
2174 GLboolean has_material
;
2177 fprintf(stderr
, "%s, newstate: %x\n", __FUNCTION__
, rmesa
->radeon
.NewGLState
);
2181 if (rmesa
->radeon
.NewGLState
)
2182 if (!radeonValidateState( ctx
))
2183 FALLBACK(rmesa
, RADEON_FALLBACK_TEXTURE
, GL_TRUE
);
2185 has_material
= (ctx
->Light
.Enabled
&& check_material( ctx
));
2188 TCL_FALLBACK( ctx
, RADEON_TCL_FALLBACK_MATERIAL
, GL_TRUE
);
2191 /* Run the pipeline.
2193 _tnl_run_pipeline( ctx
);
2196 TCL_FALLBACK( ctx
, RADEON_TCL_FALLBACK_MATERIAL
, GL_FALSE
);
2201 /* Initialize the driver's state functions.
2202 * Many of the ctx->Driver functions might have been initialized to
2203 * software defaults in the earlier _mesa_init_driver_functions() call.
2205 void radeonInitStateFuncs( GLcontext
*ctx
, GLboolean dri2
)
2207 ctx
->Driver
.UpdateState
= radeonInvalidateState
;
2208 ctx
->Driver
.LightingSpaceChange
= radeonLightingSpaceChange
;
2210 ctx
->Driver
.DrawBuffer
= radeonDrawBuffer
;
2211 ctx
->Driver
.ReadBuffer
= radeonReadBuffer
;
2213 ctx
->Driver
.AlphaFunc
= radeonAlphaFunc
;
2214 ctx
->Driver
.BlendEquationSeparate
= radeonBlendEquationSeparate
;
2215 ctx
->Driver
.BlendFuncSeparate
= radeonBlendFuncSeparate
;
2216 ctx
->Driver
.ClearColor
= radeonClearColor
;
2217 ctx
->Driver
.ClearDepth
= radeonClearDepth
;
2218 ctx
->Driver
.ClearIndex
= NULL
;
2219 ctx
->Driver
.ClearStencil
= radeonClearStencil
;
2220 ctx
->Driver
.ClipPlane
= radeonClipPlane
;
2221 ctx
->Driver
.ColorMask
= radeonColorMask
;
2222 ctx
->Driver
.CullFace
= radeonCullFace
;
2223 ctx
->Driver
.DepthFunc
= radeonDepthFunc
;
2224 ctx
->Driver
.DepthMask
= radeonDepthMask
;
2225 ctx
->Driver
.DepthRange
= radeonDepthRange
;
2226 ctx
->Driver
.Enable
= radeonEnable
;
2227 ctx
->Driver
.Fogfv
= radeonFogfv
;
2228 ctx
->Driver
.FrontFace
= radeonFrontFace
;
2229 ctx
->Driver
.Hint
= NULL
;
2230 ctx
->Driver
.IndexMask
= NULL
;
2231 ctx
->Driver
.LightModelfv
= radeonLightModelfv
;
2232 ctx
->Driver
.Lightfv
= radeonLightfv
;
2233 ctx
->Driver
.LineStipple
= radeonLineStipple
;
2234 ctx
->Driver
.LineWidth
= radeonLineWidth
;
2235 ctx
->Driver
.LogicOpcode
= radeonLogicOpCode
;
2236 ctx
->Driver
.PolygonMode
= radeonPolygonMode
;
2237 ctx
->Driver
.PolygonOffset
= radeonPolygonOffset
;
2239 ctx
->Driver
.PolygonStipple
= radeonPolygonStipple
;
2241 ctx
->Driver
.PolygonStipple
= radeonPolygonStipplePreKMS
;
2242 ctx
->Driver
.RenderMode
= radeonRenderMode
;
2243 ctx
->Driver
.Scissor
= radeonScissor
;
2244 ctx
->Driver
.ShadeModel
= radeonShadeModel
;
2245 ctx
->Driver
.StencilFuncSeparate
= radeonStencilFuncSeparate
;
2246 ctx
->Driver
.StencilMaskSeparate
= radeonStencilMaskSeparate
;
2247 ctx
->Driver
.StencilOpSeparate
= radeonStencilOpSeparate
;
2248 ctx
->Driver
.Viewport
= radeonViewport
;
2250 TNL_CONTEXT(ctx
)->Driver
.NotifyMaterialChange
= radeonUpdateMaterial
;
2251 TNL_CONTEXT(ctx
)->Driver
.RunPipeline
= radeonWrapRunPipeline
;