src/mesa/drivers/dri/radeon/radeon_tcl.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      Tungsten Graphics Inc., Austin, Texas.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  */
  34
  35 #include "main/glheader.h"
  36 #include "main/imports.h"
  37 #include "main/light.h"
  38 #include "main/mtypes.h"
  39 #include "main/enums.h"
  40
  41 #include "vbo/vbo.h"
  42 #include "tnl/tnl.h"
  43 #include "tnl/t_pipeline.h"
  44
  45 #include "radeon_context.h"
  46 #include "common_cmdbuf.h"
  47 #include "radeon_state.h"
  48 #include "radeon_ioctl.h"
  49 #include "radeon_tex.h"
  50 #include "radeon_tcl.h"
  51 #include "radeon_swtcl.h"
  52 #include "radeon_maos.h"
  53
  54
  55
  56 /*
  57  * Render unclipped vertex buffers by emitting vertices directly to
  58  * dma buffers.  Use strip/fan hardware primitives where possible.
  59  * Try to simulate missing primitives with indexed vertices.
  60  */
  61 #define HAVE_POINTS      1
  62 #define HAVE_LINES       1
  63 #define HAVE_LINE_LOOP   0
  64 #define HAVE_LINE_STRIPS 1
  65 #define HAVE_TRIANGLES   1
  66 #define HAVE_TRI_STRIPS  1
  67 #define HAVE_TRI_STRIP_1 0
  68 #define HAVE_TRI_FANS    1
  69 #define HAVE_QUADS       0
  70 #define HAVE_QUAD_STRIPS 0
  71 #define HAVE_POLYGONS    1
  72 #define HAVE_ELTS        1
  73
  74
  75 #define HW_POINTS           RADEON_CP_VC_CNTL_PRIM_TYPE_POINT
  76 #define HW_LINES            RADEON_CP_VC_CNTL_PRIM_TYPE_LINE
  77 #define HW_LINE_LOOP        0
  78 #define HW_LINE_STRIP       RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP
  79 #define HW_TRIANGLES        RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST
  80 #define HW_TRIANGLE_STRIP_0 RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP
  81 #define HW_TRIANGLE_STRIP_1 0
  82 #define HW_TRIANGLE_FAN     RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN
  83 #define HW_QUADS            0
  84 #define HW_QUAD_STRIP       0
  85 #define HW_POLYGON          RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN
  86
  87
  88 static GLboolean discrete_prim[0x10] = {
  89    0,                           /* 0 none */
  90    1,                           /* 1 points */
  91    1,                           /* 2 lines */
  92    0,                           /* 3 line_strip */
  93    1,                           /* 4 tri_list */
  94    0,                           /* 5 tri_fan */
  95    0,                           /* 6 tri_type2 */
  96    1,                           /* 7 rect list (unused) */
  97    1,                           /* 8 3vert point */
  98    1,                           /* 9 3vert line */
  99    0,
 100    0,
 101    0,
 102    0,
 103    0,
 104    0,
 105 };
 106
 107
 108 #define LOCAL_VARS r100ContextPtr rmesa = R100_CONTEXT(ctx)
 109 #define ELT_TYPE  GLushort
 110
 111 #define ELT_INIT(prim, hw_prim) \
 112    radeonTclPrimitive( ctx, prim, hw_prim | RADEON_CP_VC_CNTL_PRIM_WALK_IND )
 113
 114 #define GET_MESA_ELTS() rmesa->tcl.Elts
 115
 116
 117 /* Don't really know how many elts will fit in what's left of cmdbuf,
 118  * as there is state to emit, etc:
 119  */
 120
 121 /* Testing on isosurf shows a maximum around here.  Don't know if it's
 122  * the card or driver or kernel module that is causing the behaviour.
 123  */
 124 #define GET_MAX_HW_ELTS() 300
 125
 126
 127 #define RESET_STIPPLE() do {                    \
 128    RADEON_STATECHANGE( rmesa, lin );            \
 129    radeonEmitState( rmesa );                    \
 130 } while (0)
 131
 132 #define AUTO_STIPPLE( mode )  do {              \
 133    RADEON_STATECHANGE( rmesa, lin );            \
 134    if (mode)                                    \
 135       rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
 136          RADEON_LINE_PATTERN_AUTO_RESET;        \
 137    else                                         \
 138       rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
 139          ~RADEON_LINE_PATTERN_AUTO_RESET;       \
 140    radeonEmitState( rmesa );                    \
 141 } while (0)
 142
 143
 144
 145 #define ALLOC_ELTS(nr)  radeonAllocElts( rmesa, nr )
 146
 147 static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr )
 148 {
 149 #if 0
 150    if (rmesa->radeon.dma.flush == radeonFlushElts &&
 151        rmesa->tcl.elt_used + nr*2 < R200_ELT_BUF_SZ) {
 152
 153       GLushort *dest = (GLushort *)(rmesa->tcl.elt_dma_bo->ptr +
 154                                     rmesa->tcl.elt_used);
 155
 156       rmesa->tcl.elt_used += nr*2;
 157
 158       return dest;
 159    }
 160    else {
 161 #endif
 162       if (rmesa->radeon.dma.flush)
 163          rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 164
 165       rcommonEnsureCmdBufSpace(&rmesa->radeon, rmesa->hw.max_state_size + ELTS_BUFSZ(nr) +
 166                                AOS_BUFSZ(rmesa->tcl.nr_aos_components), __FUNCTION__);
 167
 168       radeonEmitAOS( rmesa,
 169                      rmesa->tcl.nr_aos_components, 0 );
 170
 171       return radeonAllocEltsOpenEnded( rmesa, rmesa->tcl.vertex_format,
 172                                        rmesa->tcl.hw_primitive, nr );
 173       //   }
 174 }
 175
 176 #define CLOSE_ELTS()  RADEON_NEWPRIM( rmesa )
 177
 178
 179
 180 /* TODO: Try to extend existing primitive if both are identical,
 181  * discrete and there are no intervening state changes.  (Somewhat
 182  * duplicates changes to DrawArrays code)
 183  */
 184 static void radeonEmitPrim( GLcontext *ctx,
 185                        GLenum prim,
 186                        GLuint hwprim,
 187                        GLuint start,
 188                        GLuint count)
 189 {
 190    r100ContextPtr rmesa = R100_CONTEXT( ctx );
 191    radeonTclPrimitive( ctx, prim, hwprim );
 192
 193    rcommonEnsureCmdBufSpace( &rmesa->radeon,
 194                              AOS_BUFSZ(rmesa->tcl.nr_aos_components) +
 195                              rmesa->hw.max_state_size + VBUF_BUFSZ, __FUNCTION__ );
 196
 197    radeonEmitAOS( rmesa,
 198                   rmesa->tcl.nr_aos_components,
 199                   start );
 200
 201    /* Why couldn't this packet have taken an offset param?
 202     */
 203    radeonEmitVbufPrim( rmesa,
 204                        rmesa->tcl.vertex_format,
 205                        rmesa->tcl.hw_primitive,
 206                        count - start );
 207 }
 208
 209 #define EMIT_PRIM( ctx, prim, hwprim, start, count ) do {       \
 210    radeonEmitPrim( ctx, prim, hwprim, start, count );           \
 211    (void) rmesa; } while (0)
 212
 213 /* Try & join small primitives
 214  */
 215 #if 0
 216 #define PREFER_DISCRETE_ELT_PRIM( NR, PRIM ) 0
 217 #else
 218 #define PREFER_DISCRETE_ELT_PRIM( NR, PRIM )                    \
 219   ((NR) < 20 ||                                                 \
 220    ((NR) < 40 &&                                                \
 221     rmesa->tcl.hw_primitive == (PRIM|                           \
 222                             RADEON_CP_VC_CNTL_PRIM_WALK_IND|    \
 223                             RADEON_CP_VC_CNTL_TCL_ENABLE)))
 224 #endif
 225
 226 #ifdef MESA_BIG_ENDIAN
 227 /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */
 228 #define EMIT_ELT(dest, offset, x) do {                          \
 229         int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 );     \
 230         GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 );    \
 231         (des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x);     \
 232         (void)rmesa; } while (0)
 233 #else
 234 #define EMIT_ELT(dest, offset, x) do {                          \
 235         (dest)[offset] = (GLushort) (x);                        \
 236         (void)rmesa; } while (0)
 237 #endif
 238
 239 #define EMIT_TWO_ELTS(dest, offset, x, y)  *(GLuint *)(dest+offset) = ((y)<<16)|(x);
 240
 241
 242
 243 #define TAG(x) tcl_##x
 244 #include "tnl_dd/t_dd_dmatmp2.h"
 245
 246 /**********************************************************************/
 247 /*                          External entrypoints                     */
 248 /**********************************************************************/
 249
 250 void radeonEmitPrimitive( GLcontext *ctx,
 251                           GLuint first,
 252                           GLuint last,
 253                           GLuint flags )
 254 {
 255    tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
 256 }
 257
 258 void radeonEmitEltPrimitive( GLcontext *ctx,
 259                              GLuint first,
 260                              GLuint last,
 261                              GLuint flags )
 262 {
 263    tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
 264 }
 265
 266 void radeonTclPrimitive( GLcontext *ctx,
 267                          GLenum prim,
 268                          int hw_prim )
 269 {
 270    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 271    GLuint se_cntl;
 272    GLuint newprim = hw_prim | RADEON_CP_VC_CNTL_TCL_ENABLE;
 273
 274    if (newprim != rmesa->tcl.hw_primitive ||
 275        !discrete_prim[hw_prim&0xf]) {
 276       RADEON_NEWPRIM( rmesa );
 277       rmesa->tcl.hw_primitive = newprim;
 278    }
 279
 280    se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL];
 281    se_cntl &= ~RADEON_FLAT_SHADE_VTX_LAST;
 282
 283    if (prim == GL_POLYGON && (ctx->_TriangleCaps & DD_FLATSHADE))
 284       se_cntl |= RADEON_FLAT_SHADE_VTX_0;
 285    else
 286       se_cntl |= RADEON_FLAT_SHADE_VTX_LAST;
 287
 288    if (se_cntl != rmesa->hw.set.cmd[SET_SE_CNTL]) {
 289       RADEON_STATECHANGE( rmesa, set );
 290       rmesa->hw.set.cmd[SET_SE_CNTL] = se_cntl;
 291    }
 292 }
 293
 294 /**********************************************************************/
 295 /*             Fog blend factor computation for hw tcl                */
 296 /*             same calculation used as in t_vb_fog.c                 */
 297 /**********************************************************************/
 298
 299 #define FOG_EXP_TABLE_SIZE 256
 300 #define FOG_MAX (10.0)
 301 #define EXP_FOG_MAX .0006595
 302 #define FOG_INCR (FOG_MAX/FOG_EXP_TABLE_SIZE)
 303 static GLfloat exp_table[FOG_EXP_TABLE_SIZE];
 304
 305 #if 1
 306 #define NEG_EXP( result, narg )                                         \
 307 do {                                                                    \
 308    GLfloat f = (GLfloat) (narg * (1.0/FOG_INCR));                       \
 309    GLint k = (GLint) f;                                                 \
 310    if (k > FOG_EXP_TABLE_SIZE-2)                                        \
 311       result = (GLfloat) EXP_FOG_MAX;                                   \
 312    else                                                                 \
 313       result = exp_table[k] + (f-k)*(exp_table[k+1]-exp_table[k]);      \
 314 } while (0)
 315 #else
 316 #define NEG_EXP( result, narg )                                 \
 317 do {                                                            \
 318    result = exp(-narg);                                         \
 319 } while (0)
 320 #endif
 321
 322
 323 /**
 324  * Initialize the exp_table[] lookup table for approximating exp().
 325  */
 326 void
 327 radeonInitStaticFogData( void )
 328 {
 329    GLfloat f = 0.0F;
 330    GLint i = 0;
 331    for ( ; i < FOG_EXP_TABLE_SIZE ; i++, f += FOG_INCR) {
 332       exp_table[i] = (GLfloat) exp(-f);
 333    }
 334 }
 335
 336
 337 /**
 338  * Compute per-vertex fog blend factors from fog coordinates by
 339  * evaluating the GL_LINEAR, GL_EXP or GL_EXP2 fog function.
 340  * Fog coordinates are distances from the eye (typically between the
 341  * near and far clip plane distances).
 342  * Note the fog (eye Z) coords may be negative so we use ABS(z) below.
 343  * Fog blend factors are in the range [0,1].
 344  */
 345 float
 346 radeonComputeFogBlendFactor( GLcontext *ctx, GLfloat fogcoord )
 347 {
 348    GLfloat end  = ctx->Fog.End;
 349    GLfloat d, temp;
 350    const GLfloat z = FABSF(fogcoord);
 351
 352    switch (ctx->Fog.Mode) {
 353    case GL_LINEAR:
 354       if (ctx->Fog.Start == ctx->Fog.End)
 355          d = 1.0F;
 356       else
 357          d = 1.0F / (ctx->Fog.End - ctx->Fog.Start);
 358       temp = (end - z) * d;
 359       return CLAMP(temp, 0.0F, 1.0F);
 360       break;
 361    case GL_EXP:
 362       d = ctx->Fog.Density;
 363       NEG_EXP( temp, d * z );
 364       return temp;
 365       break;
 366    case GL_EXP2:
 367       d = ctx->Fog.Density*ctx->Fog.Density;
 368       NEG_EXP( temp, d * z * z );
 369       return temp;
 370       break;
 371    default:
 372       _mesa_problem(ctx, "Bad fog mode in make_fog_coord");
 373       return 0;
 374    }
 375 }
 376
 377 /**********************************************************************/
 378 /*                          Render pipeline stage                     */
 379 /**********************************************************************/
 380
 381
 382 /* TCL render.
 383  */
 384 static GLboolean radeon_run_tcl_render( GLcontext *ctx,
 385                                         struct tnl_pipeline_stage *stage )
 386 {
 387    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 388    TNLcontext *tnl = TNL_CONTEXT(ctx);
 389    struct vertex_buffer *VB = &tnl->vb;
 390    GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0;
 391    GLuint i;
 392
 393    /* TODO: separate this from the swtnl pipeline
 394     */
 395    if (rmesa->radeon.TclFallback)
 396       return GL_TRUE;   /* fallback to software t&l */
 397
 398    if (VB->Count == 0)
 399       return GL_FALSE;
 400
 401    /* NOTE: inputs != tnl->render_inputs - these are the untransformed
 402     * inputs.
 403     */
 404    if (ctx->Light.Enabled) {
 405       inputs |= VERT_BIT_NORMAL;
 406    }
 407
 408    if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) {
 409       inputs |= VERT_BIT_COLOR1;
 410    }
 411
 412    if ( (ctx->Fog.FogCoordinateSource == GL_FOG_COORD) && ctx->Fog.Enabled ) {
 413       inputs |= VERT_BIT_FOG;
 414    }
 415
 416    for (i = 0 ; i < ctx->Const.MaxTextureUnits; i++) {
 417       if (ctx->Texture.Unit[i]._ReallyEnabled) {
 418       /* TODO: probably should not emit texture coords when texgen is enabled */
 419          if (rmesa->TexGenNeedNormals[i]) {
 420             inputs |= VERT_BIT_NORMAL;
 421          }
 422          inputs |= VERT_BIT_TEX(i);
 423       }
 424    }
 425
 426    radeonReleaseArrays( ctx, ~0 );
 427    radeonEmitArrays( ctx, inputs );
 428
 429    rmesa->tcl.Elts = VB->Elts;
 430
 431    for (i = 0 ; i < VB->PrimitiveCount ; i++)
 432    {
 433       GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
 434       GLuint start = VB->Primitive[i].start;
 435       GLuint length = VB->Primitive[i].count;
 436
 437       if (!length)
 438          continue;
 439
 440       if (rmesa->tcl.Elts)
 441          radeonEmitEltPrimitive( ctx, start, start+length, prim );
 442       else
 443          radeonEmitPrimitive( ctx, start, start+length, prim );
 444    }
 445
 446    return GL_FALSE;             /* finished the pipe */
 447 }
 448
 449
 450
 451 /* Initial state for tcl stage.
 452  */
 453 const struct tnl_pipeline_stage _radeon_tcl_stage =
 454 {
 455    "radeon render",
 456    NULL,
 457    NULL,
 458    NULL,
 459    NULL,
 460    radeon_run_tcl_render        /* run */
 461 };
 462
 463
 464
 465 /**********************************************************************/
 466 /*                 Validate state at pipeline start                   */
 467 /**********************************************************************/
 468
 469
 470 /*-----------------------------------------------------------------------
 471  * Manage TCL fallbacks
 472  */
 473
 474
 475 static void transition_to_swtnl( GLcontext *ctx )
 476 {
 477    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 478    TNLcontext *tnl = TNL_CONTEXT(ctx);
 479    GLuint se_cntl;
 480
 481    RADEON_NEWPRIM( rmesa );
 482    rmesa->swtcl.vertex_format = 0;
 483
 484    radeonChooseVertexState( ctx );
 485    radeonChooseRenderState( ctx );
 486
 487    _mesa_validate_all_lighting_tables( ctx );
 488
 489    tnl->Driver.NotifyMaterialChange =
 490       _mesa_validate_all_lighting_tables;
 491
 492    radeonReleaseArrays( ctx, ~0 );
 493
 494    se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL];
 495    se_cntl |= RADEON_FLAT_SHADE_VTX_LAST;
 496
 497    if (se_cntl != rmesa->hw.set.cmd[SET_SE_CNTL]) {
 498       RADEON_STATECHANGE( rmesa, set );
 499       rmesa->hw.set.cmd[SET_SE_CNTL] = se_cntl;
 500    }
 501 }
 502
 503
 504 static void transition_to_hwtnl( GLcontext *ctx )
 505 {
 506    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 507    TNLcontext *tnl = TNL_CONTEXT(ctx);
 508    GLuint se_coord_fmt = rmesa->hw.set.cmd[SET_SE_COORDFMT];
 509
 510    se_coord_fmt &= ~(RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
 511                      RADEON_VTX_Z_PRE_MULT_1_OVER_W0 |
 512                      RADEON_VTX_W0_IS_NOT_1_OVER_W0);
 513    se_coord_fmt |= RADEON_VTX_W0_IS_NOT_1_OVER_W0;
 514
 515    if ( se_coord_fmt != rmesa->hw.set.cmd[SET_SE_COORDFMT] ) {
 516       RADEON_STATECHANGE( rmesa, set );
 517       rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt;
 518       _tnl_need_projected_coords( ctx, GL_FALSE );
 519    }
 520
 521    radeonUpdateMaterial( ctx );
 522
 523    tnl->Driver.NotifyMaterialChange = radeonUpdateMaterial;
 524
 525    if ( rmesa->radeon.dma.flush )
 526       rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 527
 528    rmesa->radeon.dma.flush = NULL;
 529    rmesa->swtcl.vertex_format = 0;
 530
 531    //   if (rmesa->swtcl.indexed_verts.buf)
 532    //      radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts,
 533    //                         __FUNCTION__ );
 534
 535    if (RADEON_DEBUG & DEBUG_FALLBACKS)
 536       fprintf(stderr, "Radeon end tcl fallback\n");
 537 }
 538
 539 static char *fallbackStrings[] = {
 540    "Rasterization fallback",
 541    "Unfilled triangles",
 542    "Twosided lighting, differing materials",
 543    "Materials in VB (maybe between begin/end)",
 544    "Texgen unit 0",
 545    "Texgen unit 1",
 546    "Texgen unit 2",
 547    "User disable",
 548    "Fogcoord with separate specular lighting"
 549 };
 550
 551
 552 static char *getFallbackString(GLuint bit)
 553 {
 554    int i = 0;
 555    while (bit > 1) {
 556       i++;
 557       bit >>= 1;
 558    }
 559    return fallbackStrings[i];
 560 }
 561
 562
 563
 564 void radeonTclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
 565 {
 566    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 567    GLuint oldfallback = rmesa->radeon.TclFallback;
 568
 569    if (mode) {
 570       rmesa->radeon.TclFallback |= bit;
 571       if (oldfallback == 0) {
 572          if (RADEON_DEBUG & DEBUG_FALLBACKS)
 573             fprintf(stderr, "Radeon begin tcl fallback %s\n",
 574                     getFallbackString( bit ));
 575          transition_to_swtnl( ctx );
 576       }
 577    }
 578    else {
 579       rmesa->radeon.TclFallback &= ~bit;
 580       if (oldfallback == bit) {
 581          if (RADEON_DEBUG & DEBUG_FALLBACKS)
 582             fprintf(stderr, "Radeon end tcl fallback %s\n",
 583                     getFallbackString( bit ));
 584          transition_to_hwtnl( ctx );
 585       }
 586    }
 587 }