2 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
3 VA Linux Systems Inc., Fremont, California.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 * Gareth Hughes <gareth@valinux.com>
31 * Brian Paul <brianp@valinux.com>
34 #include "main/glheader.h"
35 #include "main/imports.h"
36 #include "main/context.h"
37 #include "main/enums.h"
38 #include "main/image.h"
39 #include "util/simple_list.h"
40 #include "main/teximage.h"
41 #include "main/texobj.h"
43 #include "radeon_context.h"
44 #include "radeon_mipmap_tree.h"
45 #include "radeon_ioctl.h"
46 #include "radeon_tex.h"
53 * Set the texture wrap modes.
55 * \param t Texture object whose wrap modes are to be set
56 * \param swrap Wrap mode for the \a s texture coordinate
57 * \param twrap Wrap mode for the \a t texture coordinate
60 static void radeonSetTexWrap( radeonTexObjPtr t
, GLenum swrap
, GLenum twrap
)
62 GLboolean is_clamp
= GL_FALSE
;
63 GLboolean is_clamp_to_border
= GL_FALSE
;
65 t
->pp_txfilter
&= ~(RADEON_CLAMP_S_MASK
| RADEON_CLAMP_T_MASK
| RADEON_BORDER_MODE_D3D
);
69 t
->pp_txfilter
|= RADEON_CLAMP_S_WRAP
;
72 t
->pp_txfilter
|= RADEON_CLAMP_S_CLAMP_GL
;
75 case GL_CLAMP_TO_EDGE
:
76 t
->pp_txfilter
|= RADEON_CLAMP_S_CLAMP_LAST
;
78 case GL_CLAMP_TO_BORDER
:
79 t
->pp_txfilter
|= RADEON_CLAMP_S_CLAMP_GL
;
80 is_clamp_to_border
= GL_TRUE
;
82 case GL_MIRRORED_REPEAT
:
83 t
->pp_txfilter
|= RADEON_CLAMP_S_MIRROR
;
85 case GL_MIRROR_CLAMP_EXT
:
86 t
->pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_GL
;
89 case GL_MIRROR_CLAMP_TO_EDGE_EXT
:
90 t
->pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_LAST
;
92 case GL_MIRROR_CLAMP_TO_BORDER_EXT
:
93 t
->pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_GL
;
94 is_clamp_to_border
= GL_TRUE
;
97 _mesa_problem(NULL
, "bad S wrap mode in %s", __func__
);
100 if (t
->base
.Target
!= GL_TEXTURE_1D
) {
103 t
->pp_txfilter
|= RADEON_CLAMP_T_WRAP
;
106 t
->pp_txfilter
|= RADEON_CLAMP_T_CLAMP_GL
;
109 case GL_CLAMP_TO_EDGE
:
110 t
->pp_txfilter
|= RADEON_CLAMP_T_CLAMP_LAST
;
112 case GL_CLAMP_TO_BORDER
:
113 t
->pp_txfilter
|= RADEON_CLAMP_T_CLAMP_GL
;
114 is_clamp_to_border
= GL_TRUE
;
116 case GL_MIRRORED_REPEAT
:
117 t
->pp_txfilter
|= RADEON_CLAMP_T_MIRROR
;
119 case GL_MIRROR_CLAMP_EXT
:
120 t
->pp_txfilter
|= RADEON_CLAMP_T_MIRROR_CLAMP_GL
;
123 case GL_MIRROR_CLAMP_TO_EDGE_EXT
:
124 t
->pp_txfilter
|= RADEON_CLAMP_T_MIRROR_CLAMP_LAST
;
126 case GL_MIRROR_CLAMP_TO_BORDER_EXT
:
127 t
->pp_txfilter
|= RADEON_CLAMP_T_MIRROR_CLAMP_GL
;
128 is_clamp_to_border
= GL_TRUE
;
131 _mesa_problem(NULL
, "bad T wrap mode in %s", __func__
);
135 if ( is_clamp_to_border
) {
136 t
->pp_txfilter
|= RADEON_BORDER_MODE_D3D
;
139 t
->border_fallback
= (is_clamp
&& is_clamp_to_border
);
142 static void radeonSetTexMaxAnisotropy( radeonTexObjPtr t
, GLfloat max
)
144 t
->pp_txfilter
&= ~RADEON_MAX_ANISO_MASK
;
147 t
->pp_txfilter
|= RADEON_MAX_ANISO_1_TO_1
;
148 } else if ( max
<= 2.0 ) {
149 t
->pp_txfilter
|= RADEON_MAX_ANISO_2_TO_1
;
150 } else if ( max
<= 4.0 ) {
151 t
->pp_txfilter
|= RADEON_MAX_ANISO_4_TO_1
;
152 } else if ( max
<= 8.0 ) {
153 t
->pp_txfilter
|= RADEON_MAX_ANISO_8_TO_1
;
155 t
->pp_txfilter
|= RADEON_MAX_ANISO_16_TO_1
;
160 * Set the texture magnification and minification modes.
162 * \param t Texture whose filter modes are to be set
163 * \param minf Texture minification mode
164 * \param magf Texture magnification mode
167 static void radeonSetTexFilter( radeonTexObjPtr t
, GLenum minf
, GLenum magf
)
169 GLuint anisotropy
= (t
->pp_txfilter
& RADEON_MAX_ANISO_MASK
);
171 /* Force revalidation to account for switches from/to mipmapping. */
172 t
->validated
= GL_FALSE
;
174 t
->pp_txfilter
&= ~(RADEON_MIN_FILTER_MASK
| RADEON_MAG_FILTER_MASK
);
176 /* r100 chips can't handle mipmaps/aniso for cubemap/volume textures */
177 if ( t
->base
.Target
== GL_TEXTURE_CUBE_MAP
) {
180 case GL_NEAREST_MIPMAP_NEAREST
:
181 case GL_NEAREST_MIPMAP_LINEAR
:
182 t
->pp_txfilter
|= RADEON_MIN_FILTER_NEAREST
;
185 case GL_LINEAR_MIPMAP_NEAREST
:
186 case GL_LINEAR_MIPMAP_LINEAR
:
187 t
->pp_txfilter
|= RADEON_MIN_FILTER_LINEAR
;
193 else if ( anisotropy
== RADEON_MAX_ANISO_1_TO_1
) {
196 t
->pp_txfilter
|= RADEON_MIN_FILTER_NEAREST
;
199 t
->pp_txfilter
|= RADEON_MIN_FILTER_LINEAR
;
201 case GL_NEAREST_MIPMAP_NEAREST
:
202 t
->pp_txfilter
|= RADEON_MIN_FILTER_NEAREST_MIP_NEAREST
;
204 case GL_NEAREST_MIPMAP_LINEAR
:
205 t
->pp_txfilter
|= RADEON_MIN_FILTER_LINEAR_MIP_NEAREST
;
207 case GL_LINEAR_MIPMAP_NEAREST
:
208 t
->pp_txfilter
|= RADEON_MIN_FILTER_NEAREST_MIP_LINEAR
;
210 case GL_LINEAR_MIPMAP_LINEAR
:
211 t
->pp_txfilter
|= RADEON_MIN_FILTER_LINEAR_MIP_LINEAR
;
217 t
->pp_txfilter
|= RADEON_MIN_FILTER_ANISO_NEAREST
;
220 t
->pp_txfilter
|= RADEON_MIN_FILTER_ANISO_LINEAR
;
222 case GL_NEAREST_MIPMAP_NEAREST
:
223 case GL_LINEAR_MIPMAP_NEAREST
:
224 t
->pp_txfilter
|= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST
;
226 case GL_NEAREST_MIPMAP_LINEAR
:
227 case GL_LINEAR_MIPMAP_LINEAR
:
228 t
->pp_txfilter
|= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR
;
235 t
->pp_txfilter
|= RADEON_MAG_FILTER_NEAREST
;
238 t
->pp_txfilter
|= RADEON_MAG_FILTER_LINEAR
;
243 static void radeonSetTexBorderColor( radeonTexObjPtr t
, const GLfloat color
[4] )
246 CLAMPED_FLOAT_TO_UBYTE(c
[0], color
[0]);
247 CLAMPED_FLOAT_TO_UBYTE(c
[1], color
[1]);
248 CLAMPED_FLOAT_TO_UBYTE(c
[2], color
[2]);
249 CLAMPED_FLOAT_TO_UBYTE(c
[3], color
[3]);
250 t
->pp_border_color
= radeonPackColor( 4, c
[0], c
[1], c
[2], c
[3] );
253 #define SCALED_FLOAT_TO_BYTE( x, scale ) \
254 (((GLuint)((255.0F / scale) * (x))) / 2)
256 static void radeonTexEnv( struct gl_context
*ctx
, GLenum target
,
257 GLenum pname
, const GLfloat
*param
)
259 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
260 GLuint unit
= ctx
->Texture
.CurrentUnit
;
261 struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[unit
];
263 if ( RADEON_DEBUG
& RADEON_STATE
) {
264 fprintf( stderr
, "%s( %s )\n",
265 __func__
, _mesa_enum_to_string( pname
) );
269 case GL_TEXTURE_ENV_COLOR
: {
272 _mesa_unclamped_float_rgba_to_ubyte(c
, texUnit
->EnvColor
);
273 envColor
= radeonPackColor( 4, c
[0], c
[1], c
[2], c
[3] );
274 if ( rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TFACTOR
] != envColor
) {
275 RADEON_STATECHANGE( rmesa
, tex
[unit
] );
276 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TFACTOR
] = envColor
;
281 case GL_TEXTURE_LOD_BIAS_EXT
: {
285 /* The Radeon's LOD bias is a signed 2's complement value with a
286 * range of -1.0 <= bias < 4.0. We break this into two linear
287 * functions, one mapping [-1.0,0.0] to [-128,0] and one mapping
288 * [0.0,4.0] to [0,127].
290 min
= driQueryOptionb (&rmesa
->radeon
.optionCache
, "no_neg_lod_bias") ?
292 bias
= CLAMP( *param
, min
, 4.0 );
295 } else if ( bias
> 0 ) {
296 b
= ((GLuint
)SCALED_FLOAT_TO_BYTE( bias
, 4.0 )) << RADEON_LOD_BIAS_SHIFT
;
298 b
= ((GLuint
)SCALED_FLOAT_TO_BYTE( bias
, 1.0 )) << RADEON_LOD_BIAS_SHIFT
;
300 if ( (rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFILTER
] & RADEON_LOD_BIAS_MASK
) != b
) {
301 RADEON_STATECHANGE( rmesa
, tex
[unit
] );
302 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFILTER
] &= ~RADEON_LOD_BIAS_MASK
;
303 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFILTER
] |= (b
& RADEON_LOD_BIAS_MASK
);
313 void radeonTexUpdateParameters(struct gl_context
*ctx
, GLuint unit
)
315 struct gl_sampler_object
*samp
= _mesa_get_samplerobj(ctx
, unit
);
316 radeonTexObj
* t
= radeon_tex_obj(ctx
->Texture
.Unit
[unit
]._Current
);
318 radeonSetTexMaxAnisotropy(t
, samp
->MaxAnisotropy
);
319 radeonSetTexFilter(t
, samp
->MinFilter
, samp
->MagFilter
);
320 radeonSetTexWrap(t
, samp
->WrapS
, samp
->WrapT
);
321 radeonSetTexBorderColor(t
, samp
->BorderColor
.f
);
326 * Changes variables and flags for a state update, which will happen at the
327 * next UpdateTextureState
330 static void radeonTexParameter( struct gl_context
*ctx
,
331 struct gl_texture_object
*texObj
,
334 radeonTexObj
* t
= radeon_tex_obj(texObj
);
336 radeon_print(RADEON_TEXTURE
, RADEON_VERBOSE
, "%s( %s )\n", __func__
,
337 _mesa_enum_to_string( pname
) );
340 case GL_TEXTURE_BASE_LEVEL
:
341 case GL_TEXTURE_MAX_LEVEL
:
342 case GL_TEXTURE_MIN_LOD
:
343 case GL_TEXTURE_MAX_LOD
:
344 t
->validated
= GL_FALSE
;
352 static void radeonDeleteTexture( struct gl_context
*ctx
,
353 struct gl_texture_object
*texObj
)
355 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
356 radeonTexObj
* t
= radeon_tex_obj(texObj
);
359 radeon_print(RADEON_TEXTURE
, RADEON_NORMAL
,
360 "%s( %p (target = %s) )\n", __func__
, (void *)texObj
,
361 _mesa_enum_to_string( texObj
->Target
) );
364 radeon_firevertices(&rmesa
->radeon
);
365 for ( i
= 0 ; i
< rmesa
->radeon
.glCtx
.Const
.MaxTextureUnits
; i
++ ) {
366 if ( t
== rmesa
->state
.texture
.unit
[i
].texobj
) {
367 rmesa
->state
.texture
.unit
[i
].texobj
= NULL
;
368 rmesa
->hw
.tex
[i
].dirty
= GL_FALSE
;
369 rmesa
->hw
.cube
[i
].dirty
= GL_FALSE
;
374 radeon_miptree_unreference(&t
->mt
);
376 /* Free mipmap images and the texture object itself */
377 _mesa_delete_texture_object(ctx
, texObj
);
381 * - Same GEN_MODE for all active bits
382 * - Same EyePlane/ObjPlane for all active bits when using Eye/Obj
383 * - STRQ presumably all supported (matrix means incoming R values
384 * can end up in STQ, this has implications for vertex support,
385 * presumably ok if maos is used, though?)
387 * Basically impossible to do this on the fly - just collect some
388 * basic info & do the checks from ValidateState().
390 static void radeonTexGen( struct gl_context
*ctx
,
393 const GLfloat
*params
)
395 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
396 GLuint unit
= ctx
->Texture
.CurrentUnit
;
397 rmesa
->recheck_texgen
[unit
] = GL_TRUE
;
401 * Allocate a new texture object.
402 * Called via ctx->Driver.NewTextureObject.
403 * Note: we could use containment here to 'derive' the driver-specific
404 * texture object from the core mesa gl_texture_object. Not done at this time.
406 static struct gl_texture_object
*
407 radeonNewTextureObject( struct gl_context
*ctx
, GLuint name
, GLenum target
)
409 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
410 radeonTexObj
* t
= CALLOC_STRUCT(radeon_tex_obj
);
412 _mesa_initialize_texture_object(ctx
, &t
->base
, name
, target
);
413 t
->base
.Sampler
.MaxAnisotropy
= rmesa
->radeon
.initialMaxAnisotropy
;
415 t
->border_fallback
= GL_FALSE
;
417 t
->pp_txfilter
= RADEON_BORDER_MODE_OGL
;
418 t
->pp_txformat
= (RADEON_TXFORMAT_ENDIAN_NO_SWAP
|
419 RADEON_TXFORMAT_PERSPECTIVE_ENABLE
);
421 radeonSetTexWrap( t
, t
->base
.Sampler
.WrapS
, t
->base
.Sampler
.WrapT
);
422 radeonSetTexMaxAnisotropy( t
, t
->base
.Sampler
.MaxAnisotropy
);
423 radeonSetTexFilter( t
, t
->base
.Sampler
.MinFilter
, t
->base
.Sampler
.MagFilter
);
424 radeonSetTexBorderColor( t
, t
->base
.Sampler
.BorderColor
.f
);
429 static struct gl_sampler_object
*
430 radeonNewSamplerObject(struct gl_context
*ctx
, GLuint name
)
432 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
433 struct gl_sampler_object
*samp
= _mesa_new_sampler_object(ctx
, name
);
435 samp
->MaxAnisotropy
= rmesa
->radeon
.initialMaxAnisotropy
;
440 void radeonInitTextureFuncs( radeonContextPtr radeon
, struct dd_function_table
*functions
)
442 radeon_init_common_texture_funcs(radeon
, functions
);
444 functions
->NewTextureObject
= radeonNewTextureObject
;
445 // functions->BindTexture = radeonBindTexture;
446 functions
->DeleteTexture
= radeonDeleteTexture
;
448 functions
->TexEnv
= radeonTexEnv
;
449 functions
->TexParameter
= radeonTexParameter
;
450 functions
->TexGen
= radeonTexGen
;
451 functions
->NewSamplerObject
= radeonNewSamplerObject
;