Convert all uses of CARD32 and CARD8 to int32_t and int8_t.
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_tex.c
1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_tex.c,v 1.6 2002/09/16 18:05:20 eich Exp $ */
2 /*
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5
6 All Rights Reserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 */
28
29 /*
30 * Authors:
31 * Gareth Hughes <gareth@valinux.com>
32 * Brian Paul <brianp@valinux.com>
33 */
34
35 #include "glheader.h"
36 #include "imports.h"
37 #include "colormac.h"
38 #include "context.h"
39 #include "enums.h"
40 #include "image.h"
41 #include "simple_list.h"
42 #include "texformat.h"
43 #include "texstore.h"
44 #include "teximage.h"
45 #include "texobj.h"
46
47
48 #include "radeon_context.h"
49 #include "radeon_state.h"
50 #include "radeon_ioctl.h"
51 #include "radeon_swtcl.h"
52 #include "radeon_tex.h"
53
54 #include "xmlpool.h"
55
56
57
58 /**
59 * Set the texture wrap modes.
60 *
61 * \param t Texture object whose wrap modes are to be set
62 * \param swrap Wrap mode for the \a s texture coordinate
63 * \param twrap Wrap mode for the \a t texture coordinate
64 */
65
66 static void radeonSetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap )
67 {
68 GLboolean is_clamp = GL_FALSE;
69 GLboolean is_clamp_to_border = GL_FALSE;
70
71 t->pp_txfilter &= ~(RADEON_CLAMP_S_MASK | RADEON_CLAMP_T_MASK | RADEON_BORDER_MODE_D3D);
72
73 switch ( swrap ) {
74 case GL_REPEAT:
75 t->pp_txfilter |= RADEON_CLAMP_S_WRAP;
76 break;
77 case GL_CLAMP:
78 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_GL;
79 is_clamp = GL_TRUE;
80 break;
81 case GL_CLAMP_TO_EDGE:
82 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_LAST;
83 break;
84 case GL_CLAMP_TO_BORDER:
85 t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_GL;
86 is_clamp_to_border = GL_TRUE;
87 break;
88 case GL_MIRRORED_REPEAT:
89 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR;
90 break;
91 case GL_MIRROR_CLAMP_EXT:
92 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
93 is_clamp = GL_TRUE;
94 break;
95 case GL_MIRROR_CLAMP_TO_EDGE_EXT:
96 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_LAST;
97 break;
98 case GL_MIRROR_CLAMP_TO_BORDER_EXT:
99 t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
100 is_clamp_to_border = GL_TRUE;
101 break;
102 default:
103 _mesa_problem(NULL, "bad S wrap mode in %s", __FUNCTION__);
104 }
105
106 switch ( twrap ) {
107 case GL_REPEAT:
108 t->pp_txfilter |= RADEON_CLAMP_T_WRAP;
109 break;
110 case GL_CLAMP:
111 t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_GL;
112 is_clamp = GL_TRUE;
113 break;
114 case GL_CLAMP_TO_EDGE:
115 t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_LAST;
116 break;
117 case GL_CLAMP_TO_BORDER:
118 t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_GL;
119 is_clamp_to_border = GL_TRUE;
120 break;
121 case GL_MIRRORED_REPEAT:
122 t->pp_txfilter |= RADEON_CLAMP_T_MIRROR;
123 break;
124 case GL_MIRROR_CLAMP_EXT:
125 t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_GL;
126 is_clamp = GL_TRUE;
127 break;
128 case GL_MIRROR_CLAMP_TO_EDGE_EXT:
129 t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_LAST;
130 break;
131 case GL_MIRROR_CLAMP_TO_BORDER_EXT:
132 t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_GL;
133 is_clamp_to_border = GL_TRUE;
134 break;
135 default:
136 _mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__);
137 }
138
139 if ( is_clamp_to_border ) {
140 t->pp_txfilter |= RADEON_BORDER_MODE_D3D;
141 }
142
143 t->border_fallback = (is_clamp && is_clamp_to_border);
144 }
145
146 static void radeonSetTexMaxAnisotropy( radeonTexObjPtr t, GLfloat max )
147 {
148 t->pp_txfilter &= ~RADEON_MAX_ANISO_MASK;
149
150 if ( max == 1.0 ) {
151 t->pp_txfilter |= RADEON_MAX_ANISO_1_TO_1;
152 } else if ( max <= 2.0 ) {
153 t->pp_txfilter |= RADEON_MAX_ANISO_2_TO_1;
154 } else if ( max <= 4.0 ) {
155 t->pp_txfilter |= RADEON_MAX_ANISO_4_TO_1;
156 } else if ( max <= 8.0 ) {
157 t->pp_txfilter |= RADEON_MAX_ANISO_8_TO_1;
158 } else {
159 t->pp_txfilter |= RADEON_MAX_ANISO_16_TO_1;
160 }
161 }
162
163 /**
164 * Set the texture magnification and minification modes.
165 *
166 * \param t Texture whose filter modes are to be set
167 * \param minf Texture minification mode
168 * \param magf Texture magnification mode
169 */
170
171 static void radeonSetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf )
172 {
173 GLuint anisotropy = (t->pp_txfilter & RADEON_MAX_ANISO_MASK);
174
175 t->pp_txfilter &= ~(RADEON_MIN_FILTER_MASK | RADEON_MAG_FILTER_MASK);
176
177 if ( anisotropy == RADEON_MAX_ANISO_1_TO_1 ) {
178 switch ( minf ) {
179 case GL_NEAREST:
180 t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST;
181 break;
182 case GL_LINEAR:
183 t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR;
184 break;
185 case GL_NEAREST_MIPMAP_NEAREST:
186 t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST_MIP_NEAREST;
187 break;
188 case GL_NEAREST_MIPMAP_LINEAR:
189 t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR_MIP_NEAREST;
190 break;
191 case GL_LINEAR_MIPMAP_NEAREST:
192 t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST_MIP_LINEAR;
193 break;
194 case GL_LINEAR_MIPMAP_LINEAR:
195 t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR_MIP_LINEAR;
196 break;
197 }
198 } else {
199 switch ( minf ) {
200 case GL_NEAREST:
201 t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST;
202 break;
203 case GL_LINEAR:
204 t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_LINEAR;
205 break;
206 case GL_NEAREST_MIPMAP_NEAREST:
207 case GL_LINEAR_MIPMAP_NEAREST:
208 t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST;
209 break;
210 case GL_NEAREST_MIPMAP_LINEAR:
211 case GL_LINEAR_MIPMAP_LINEAR:
212 t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR;
213 break;
214 }
215 }
216
217 switch ( magf ) {
218 case GL_NEAREST:
219 t->pp_txfilter |= RADEON_MAG_FILTER_NEAREST;
220 break;
221 case GL_LINEAR:
222 t->pp_txfilter |= RADEON_MAG_FILTER_LINEAR;
223 break;
224 }
225 }
226
227 static void radeonSetTexBorderColor( radeonTexObjPtr t, GLubyte c[4] )
228 {
229 t->pp_border_color = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
230 }
231
232
233 /**
234 * Allocate space for and load the mesa images into the texture memory block.
235 * This will happen before drawing with a new texture, or drawing with a
236 * texture after it was swapped out or teximaged again.
237 */
238
239 static radeonTexObjPtr radeonAllocTexObj( struct gl_texture_object *texObj )
240 {
241 radeonTexObjPtr t;
242
243 t = CALLOC_STRUCT( radeon_tex_obj );
244 texObj->DriverData = t;
245 if ( t != NULL ) {
246 if ( RADEON_DEBUG & DEBUG_TEXTURE ) {
247 fprintf( stderr, "%s( %p, %p )\n", __FUNCTION__, texObj, t );
248 }
249
250 /* Initialize non-image-dependent parts of the state:
251 */
252 t->base.tObj = texObj;
253 t->border_fallback = GL_FALSE;
254
255 t->pp_txfilter = RADEON_BORDER_MODE_OGL;
256 t->pp_txformat = (RADEON_TXFORMAT_ENDIAN_NO_SWAP |
257 RADEON_TXFORMAT_PERSPECTIVE_ENABLE);
258
259 make_empty_list( & t->base );
260
261 radeonSetTexWrap( t, texObj->WrapS, texObj->WrapT );
262 radeonSetTexMaxAnisotropy( t, texObj->MaxAnisotropy );
263 radeonSetTexFilter( t, texObj->MinFilter, texObj->MagFilter );
264 radeonSetTexBorderColor( t, texObj->_BorderChan );
265 }
266
267 return t;
268 }
269
270
271 static const struct gl_texture_format *
272 radeonChooseTextureFormat( GLcontext *ctx, GLint internalFormat,
273 GLenum format, GLenum type )
274 {
275 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
276 const GLboolean do32bpt =
277 ( rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_32 );
278 const GLboolean force16bpt =
279 ( rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FORCE_16 );
280 (void) format;
281
282 switch ( internalFormat ) {
283 case 4:
284 case GL_RGBA:
285 case GL_COMPRESSED_RGBA:
286 switch ( type ) {
287 case GL_UNSIGNED_INT_10_10_10_2:
288 case GL_UNSIGNED_INT_2_10_10_10_REV:
289 return do32bpt ? &_mesa_texformat_argb8888 : &_mesa_texformat_argb1555;
290 case GL_UNSIGNED_SHORT_4_4_4_4:
291 case GL_UNSIGNED_SHORT_4_4_4_4_REV:
292 return &_mesa_texformat_argb4444;
293 case GL_UNSIGNED_SHORT_5_5_5_1:
294 case GL_UNSIGNED_SHORT_1_5_5_5_REV:
295 return &_mesa_texformat_argb1555;
296 default:
297 return do32bpt ? &_mesa_texformat_rgba8888 : &_mesa_texformat_argb4444;
298 }
299
300 case 3:
301 case GL_RGB:
302 case GL_COMPRESSED_RGB:
303 switch ( type ) {
304 case GL_UNSIGNED_SHORT_4_4_4_4:
305 case GL_UNSIGNED_SHORT_4_4_4_4_REV:
306 return &_mesa_texformat_argb4444;
307 case GL_UNSIGNED_SHORT_5_5_5_1:
308 case GL_UNSIGNED_SHORT_1_5_5_5_REV:
309 return &_mesa_texformat_argb1555;
310 case GL_UNSIGNED_SHORT_5_6_5:
311 case GL_UNSIGNED_SHORT_5_6_5_REV:
312 return &_mesa_texformat_rgb565;
313 default:
314 return do32bpt ? &_mesa_texformat_rgba8888 : &_mesa_texformat_rgb565;
315 }
316
317 case GL_RGBA8:
318 case GL_RGB10_A2:
319 case GL_RGBA12:
320 case GL_RGBA16:
321 return !force16bpt ?
322 &_mesa_texformat_rgba8888 : &_mesa_texformat_argb4444;
323
324 case GL_RGBA4:
325 case GL_RGBA2:
326 return &_mesa_texformat_argb4444;
327
328 case GL_RGB5_A1:
329 return &_mesa_texformat_argb1555;
330
331 case GL_RGB8:
332 case GL_RGB10:
333 case GL_RGB12:
334 case GL_RGB16:
335 return !force16bpt ? &_mesa_texformat_rgba8888 : &_mesa_texformat_rgb565;
336
337 case GL_RGB5:
338 case GL_RGB4:
339 case GL_R3_G3_B2:
340 return &_mesa_texformat_rgb565;
341
342 case GL_ALPHA:
343 case GL_ALPHA4:
344 case GL_ALPHA8:
345 case GL_ALPHA12:
346 case GL_ALPHA16:
347 case GL_COMPRESSED_ALPHA:
348 return &_mesa_texformat_al88;
349
350 case 1:
351 case GL_LUMINANCE:
352 case GL_LUMINANCE4:
353 case GL_LUMINANCE8:
354 case GL_LUMINANCE12:
355 case GL_LUMINANCE16:
356 case GL_COMPRESSED_LUMINANCE:
357 return &_mesa_texformat_al88;
358
359 case 2:
360 case GL_LUMINANCE_ALPHA:
361 case GL_LUMINANCE4_ALPHA4:
362 case GL_LUMINANCE6_ALPHA2:
363 case GL_LUMINANCE8_ALPHA8:
364 case GL_LUMINANCE12_ALPHA4:
365 case GL_LUMINANCE12_ALPHA12:
366 case GL_LUMINANCE16_ALPHA16:
367 case GL_COMPRESSED_LUMINANCE_ALPHA:
368 return &_mesa_texformat_al88;
369
370 case GL_INTENSITY:
371 case GL_INTENSITY4:
372 case GL_INTENSITY8:
373 case GL_INTENSITY12:
374 case GL_INTENSITY16:
375 case GL_COMPRESSED_INTENSITY:
376 return &_mesa_texformat_i8;
377
378 case GL_YCBCR_MESA:
379 if (type == GL_UNSIGNED_SHORT_8_8_APPLE ||
380 type == GL_UNSIGNED_BYTE)
381 return &_mesa_texformat_ycbcr;
382 else
383 return &_mesa_texformat_ycbcr_rev;
384
385 default:
386 _mesa_problem(ctx, "unexpected texture format in %s", __FUNCTION__);
387 return NULL;
388 }
389
390 return NULL; /* never get here */
391 }
392
393
394 static void radeonTexImage1D( GLcontext *ctx, GLenum target, GLint level,
395 GLint internalFormat,
396 GLint width, GLint border,
397 GLenum format, GLenum type, const GLvoid *pixels,
398 const struct gl_pixelstore_attrib *packing,
399 struct gl_texture_object *texObj,
400 struct gl_texture_image *texImage )
401 {
402 driTextureObject * t = (driTextureObject *) texObj->DriverData;
403
404 if ( t ) {
405 driSwapOutTextureObject( t );
406 }
407 else {
408 t = (driTextureObject *) radeonAllocTexObj( texObj );
409 if (!t) {
410 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage1D");
411 return;
412 }
413 }
414
415 /* Note, this will call ChooseTextureFormat */
416 _mesa_store_teximage1d(ctx, target, level, internalFormat,
417 width, border, format, type, pixels,
418 &ctx->Unpack, texObj, texImage);
419
420 t->dirty_images[0] |= (1 << level);
421 }
422
423
424 static void radeonTexSubImage1D( GLcontext *ctx, GLenum target, GLint level,
425 GLint xoffset,
426 GLsizei width,
427 GLenum format, GLenum type,
428 const GLvoid *pixels,
429 const struct gl_pixelstore_attrib *packing,
430 struct gl_texture_object *texObj,
431 struct gl_texture_image *texImage )
432 {
433 driTextureObject * t = (driTextureObject *) texObj->DriverData;
434
435 assert( t ); /* this _should_ be true */
436 if ( t ) {
437 driSwapOutTextureObject( t );
438 }
439 else {
440 t = (driTextureObject *) radeonAllocTexObj( texObj );
441 if (!t) {
442 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage1D");
443 return;
444 }
445 }
446
447 _mesa_store_texsubimage1d(ctx, target, level, xoffset, width,
448 format, type, pixels, packing, texObj,
449 texImage);
450
451 t->dirty_images[0] |= (1 << level);
452 }
453
454
455 static void radeonTexImage2D( GLcontext *ctx, GLenum target, GLint level,
456 GLint internalFormat,
457 GLint width, GLint height, GLint border,
458 GLenum format, GLenum type, const GLvoid *pixels,
459 const struct gl_pixelstore_attrib *packing,
460 struct gl_texture_object *texObj,
461 struct gl_texture_image *texImage )
462 {
463 driTextureObject * t = (driTextureObject *) texObj->DriverData;
464 GLuint face;
465
466 /* which cube face or ordinary 2D image */
467 switch (target) {
468 case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
469 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
470 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
471 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
472 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
473 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
474 face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
475 ASSERT(face < 6);
476 break;
477 default:
478 face = 0;
479 }
480
481 if ( t != NULL ) {
482 driSwapOutTextureObject( t );
483 }
484 else {
485 t = (driTextureObject *) radeonAllocTexObj( texObj );
486 if (!t) {
487 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage2D");
488 return;
489 }
490 }
491
492 /* Note, this will call ChooseTextureFormat */
493 _mesa_store_teximage2d(ctx, target, level, internalFormat,
494 width, height, border, format, type, pixels,
495 &ctx->Unpack, texObj, texImage);
496
497 t->dirty_images[face] |= (1 << level);
498 }
499
500
501 static void radeonTexSubImage2D( GLcontext *ctx, GLenum target, GLint level,
502 GLint xoffset, GLint yoffset,
503 GLsizei width, GLsizei height,
504 GLenum format, GLenum type,
505 const GLvoid *pixels,
506 const struct gl_pixelstore_attrib *packing,
507 struct gl_texture_object *texObj,
508 struct gl_texture_image *texImage )
509 {
510 driTextureObject * t = (driTextureObject *) texObj->DriverData;
511 GLuint face;
512
513 /* which cube face or ordinary 2D image */
514 switch (target) {
515 case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
516 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
517 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
518 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
519 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
520 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
521 face = (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
522 ASSERT(face < 6);
523 break;
524 default:
525 face = 0;
526 }
527
528 assert( t ); /* this _should_ be true */
529 if ( t ) {
530 driSwapOutTextureObject( t );
531 }
532 else {
533 t = (driTextureObject *) radeonAllocTexObj( texObj );
534 if (!t) {
535 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage2D");
536 return;
537 }
538 }
539
540 _mesa_store_texsubimage2d(ctx, target, level, xoffset, yoffset, width,
541 height, format, type, pixels, packing, texObj,
542 texImage);
543
544 t->dirty_images[face] |= (1 << level);
545 }
546
547
548
549 #define SCALED_FLOAT_TO_BYTE( x, scale ) \
550 (((GLuint)((255.0F / scale) * (x))) / 2)
551
552 static void radeonTexEnv( GLcontext *ctx, GLenum target,
553 GLenum pname, const GLfloat *param )
554 {
555 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
556 GLuint unit = ctx->Texture.CurrentUnit;
557 struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
558
559 if ( RADEON_DEBUG & DEBUG_STATE ) {
560 fprintf( stderr, "%s( %s )\n",
561 __FUNCTION__, _mesa_lookup_enum_by_nr( pname ) );
562 }
563
564 switch ( pname ) {
565 case GL_TEXTURE_ENV_COLOR: {
566 GLubyte c[4];
567 GLuint envColor;
568 UNCLAMPED_FLOAT_TO_RGBA_CHAN( c, texUnit->EnvColor );
569 envColor = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
570 if ( rmesa->hw.tex[unit].cmd[TEX_PP_TFACTOR] != envColor ) {
571 RADEON_STATECHANGE( rmesa, tex[unit] );
572 rmesa->hw.tex[unit].cmd[TEX_PP_TFACTOR] = envColor;
573 }
574 break;
575 }
576
577 case GL_TEXTURE_LOD_BIAS_EXT: {
578 GLfloat bias, min;
579 GLuint b;
580
581 /* The Radeon's LOD bias is a signed 2's complement value with a
582 * range of -1.0 <= bias < 4.0. We break this into two linear
583 * functions, one mapping [-1.0,0.0] to [-128,0] and one mapping
584 * [0.0,4.0] to [0,127].
585 */
586 min = driQueryOptionb (&rmesa->optionCache, "no_neg_lod_bias") ?
587 0.0 : -1.0;
588 bias = CLAMP( *param, min, 4.0 );
589 if ( bias == 0 ) {
590 b = 0;
591 } else if ( bias > 0 ) {
592 b = ((GLuint)SCALED_FLOAT_TO_BYTE( bias, 4.0 )) << RADEON_LOD_BIAS_SHIFT;
593 } else {
594 b = ((GLuint)SCALED_FLOAT_TO_BYTE( bias, 1.0 )) << RADEON_LOD_BIAS_SHIFT;
595 }
596 if ( (rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] & RADEON_LOD_BIAS_MASK) != b ) {
597 RADEON_STATECHANGE( rmesa, tex[unit] );
598 rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] &= ~RADEON_LOD_BIAS_MASK;
599 rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] |= (b & RADEON_LOD_BIAS_MASK);
600 }
601 break;
602 }
603
604 default:
605 return;
606 }
607 }
608
609
610 /**
611 * Changes variables and flags for a state update, which will happen at the
612 * next UpdateTextureState
613 */
614
615 static void radeonTexParameter( GLcontext *ctx, GLenum target,
616 struct gl_texture_object *texObj,
617 GLenum pname, const GLfloat *params )
618 {
619 radeonTexObjPtr t = (radeonTexObjPtr) texObj->DriverData;
620
621 if ( RADEON_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
622 fprintf( stderr, "%s( %s )\n", __FUNCTION__,
623 _mesa_lookup_enum_by_nr( pname ) );
624 }
625
626 switch ( pname ) {
627 case GL_TEXTURE_MIN_FILTER:
628 case GL_TEXTURE_MAG_FILTER:
629 case GL_TEXTURE_MAX_ANISOTROPY_EXT:
630 radeonSetTexMaxAnisotropy( t, texObj->MaxAnisotropy );
631 radeonSetTexFilter( t, texObj->MinFilter, texObj->MagFilter );
632 break;
633
634 case GL_TEXTURE_WRAP_S:
635 case GL_TEXTURE_WRAP_T:
636 radeonSetTexWrap( t, texObj->WrapS, texObj->WrapT );
637 break;
638
639 case GL_TEXTURE_BORDER_COLOR:
640 radeonSetTexBorderColor( t, texObj->_BorderChan );
641 break;
642
643 case GL_TEXTURE_BASE_LEVEL:
644 case GL_TEXTURE_MAX_LEVEL:
645 case GL_TEXTURE_MIN_LOD:
646 case GL_TEXTURE_MAX_LOD:
647 /* This isn't the most efficient solution but there doesn't appear to
648 * be a nice alternative. Since there's no LOD clamping,
649 * we just have to rely on loading the right subset of mipmap levels
650 * to simulate a clamped LOD.
651 */
652 driSwapOutTextureObject( (driTextureObject *) t );
653 break;
654
655 default:
656 return;
657 }
658
659 /* Mark this texobj as dirty (one bit per tex unit)
660 */
661 t->dirty_state = TEX_ALL;
662 }
663
664
665 static void radeonBindTexture( GLcontext *ctx, GLenum target,
666 struct gl_texture_object *texObj )
667 {
668 if ( RADEON_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
669 fprintf( stderr, "%s( %p ) unit=%d\n", __FUNCTION__, texObj,
670 ctx->Texture.CurrentUnit );
671 }
672
673 assert( (target != GL_TEXTURE_1D && target != GL_TEXTURE_2D &&
674 target != GL_TEXTURE_RECTANGLE_NV) ||
675 (texObj->DriverData != NULL) );
676 }
677
678
679 static void radeonDeleteTexture( GLcontext *ctx,
680 struct gl_texture_object *texObj )
681 {
682 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
683 driTextureObject * t = (driTextureObject *) texObj->DriverData;
684
685 if ( RADEON_DEBUG & (DEBUG_STATE|DEBUG_TEXTURE) ) {
686 fprintf( stderr, "%s( %p (target = %s) )\n", __FUNCTION__, texObj,
687 _mesa_lookup_enum_by_nr( texObj->Target ) );
688 }
689
690 if ( t != NULL ) {
691 if ( rmesa ) {
692 RADEON_FIREVERTICES( rmesa );
693 }
694
695 driDestroyTextureObject( t );
696 }
697
698 /* Free mipmap images and the texture object itself */
699 _mesa_delete_texture_object(ctx, texObj);
700 }
701
702 /* Need:
703 * - Same GEN_MODE for all active bits
704 * - Same EyePlane/ObjPlane for all active bits when using Eye/Obj
705 * - STRQ presumably all supported (matrix means incoming R values
706 * can end up in STQ, this has implications for vertex support,
707 * presumably ok if maos is used, though?)
708 *
709 * Basically impossible to do this on the fly - just collect some
710 * basic info & do the checks from ValidateState().
711 */
712 static void radeonTexGen( GLcontext *ctx,
713 GLenum coord,
714 GLenum pname,
715 const GLfloat *params )
716 {
717 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
718 GLuint unit = ctx->Texture.CurrentUnit;
719 rmesa->recheck_texgen[unit] = GL_TRUE;
720 }
721
722 /**
723 * Allocate a new texture object.
724 * Called via ctx->Driver.NewTextureObject.
725 * Note: we could use containment here to 'derive' the driver-specific
726 * texture object from the core mesa gl_texture_object. Not done at this time.
727 */
728 static struct gl_texture_object *
729 radeonNewTextureObject( GLcontext *ctx, GLuint name, GLenum target )
730 {
731 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
732 struct gl_texture_object *obj;
733 obj = _mesa_new_texture_object(ctx, name, target);
734 if (!obj)
735 return NULL;
736 obj->MaxAnisotropy = rmesa->initialMaxAnisotropy;
737 radeonAllocTexObj( obj );
738 return obj;
739 }
740
741
742 void radeonInitTextureFuncs( struct dd_function_table *functions )
743 {
744 functions->ChooseTextureFormat = radeonChooseTextureFormat;
745 functions->TexImage1D = radeonTexImage1D;
746 functions->TexImage2D = radeonTexImage2D;
747 functions->TexSubImage1D = radeonTexSubImage1D;
748 functions->TexSubImage2D = radeonTexSubImage2D;
749
750 functions->NewTextureObject = radeonNewTextureObject;
751 functions->BindTexture = radeonBindTexture;
752 functions->DeleteTexture = radeonDeleteTexture;
753 functions->IsTextureResident = driIsTextureResident;
754
755 functions->TexEnv = radeonTexEnv;
756 functions->TexParameter = radeonTexParameter;
757 functions->TexGen = radeonTexGen;
758 }