2 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
3 VA Linux Systems Inc., Fremont, California.
7 Permission is hereby granted, free of charge, to any person obtaining
8 a copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sublicense, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial
17 portions of the Software.
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 * Gareth Hughes <gareth@valinux.com>
31 * Brian Paul <brianp@valinux.com>
34 #include "main/glheader.h"
35 #include "main/imports.h"
36 #include "main/colormac.h"
37 #include "main/context.h"
38 #include "main/enums.h"
39 #include "main/image.h"
40 #include "main/simple_list.h"
41 #include "main/teximage.h"
42 #include "main/texobj.h"
44 #include "radeon_context.h"
45 #include "radeon_mipmap_tree.h"
46 #include "radeon_ioctl.h"
47 #include "radeon_tex.h"
54 * Set the texture wrap modes.
56 * \param t Texture object whose wrap modes are to be set
57 * \param swrap Wrap mode for the \a s texture coordinate
58 * \param twrap Wrap mode for the \a t texture coordinate
61 static void radeonSetTexWrap( radeonTexObjPtr t
, GLenum swrap
, GLenum twrap
)
63 GLboolean is_clamp
= GL_FALSE
;
64 GLboolean is_clamp_to_border
= GL_FALSE
;
66 t
->pp_txfilter
&= ~(RADEON_CLAMP_S_MASK
| RADEON_CLAMP_T_MASK
| RADEON_BORDER_MODE_D3D
);
70 t
->pp_txfilter
|= RADEON_CLAMP_S_WRAP
;
73 t
->pp_txfilter
|= RADEON_CLAMP_S_CLAMP_GL
;
76 case GL_CLAMP_TO_EDGE
:
77 t
->pp_txfilter
|= RADEON_CLAMP_S_CLAMP_LAST
;
79 case GL_CLAMP_TO_BORDER
:
80 t
->pp_txfilter
|= RADEON_CLAMP_S_CLAMP_GL
;
81 is_clamp_to_border
= GL_TRUE
;
83 case GL_MIRRORED_REPEAT
:
84 t
->pp_txfilter
|= RADEON_CLAMP_S_MIRROR
;
86 case GL_MIRROR_CLAMP_EXT
:
87 t
->pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_GL
;
90 case GL_MIRROR_CLAMP_TO_EDGE_EXT
:
91 t
->pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_LAST
;
93 case GL_MIRROR_CLAMP_TO_BORDER_EXT
:
94 t
->pp_txfilter
|= RADEON_CLAMP_S_MIRROR_CLAMP_GL
;
95 is_clamp_to_border
= GL_TRUE
;
98 _mesa_problem(NULL
, "bad S wrap mode in %s", __FUNCTION__
);
101 if (t
->base
.Target
!= GL_TEXTURE_1D
) {
104 t
->pp_txfilter
|= RADEON_CLAMP_T_WRAP
;
107 t
->pp_txfilter
|= RADEON_CLAMP_T_CLAMP_GL
;
110 case GL_CLAMP_TO_EDGE
:
111 t
->pp_txfilter
|= RADEON_CLAMP_T_CLAMP_LAST
;
113 case GL_CLAMP_TO_BORDER
:
114 t
->pp_txfilter
|= RADEON_CLAMP_T_CLAMP_GL
;
115 is_clamp_to_border
= GL_TRUE
;
117 case GL_MIRRORED_REPEAT
:
118 t
->pp_txfilter
|= RADEON_CLAMP_T_MIRROR
;
120 case GL_MIRROR_CLAMP_EXT
:
121 t
->pp_txfilter
|= RADEON_CLAMP_T_MIRROR_CLAMP_GL
;
124 case GL_MIRROR_CLAMP_TO_EDGE_EXT
:
125 t
->pp_txfilter
|= RADEON_CLAMP_T_MIRROR_CLAMP_LAST
;
127 case GL_MIRROR_CLAMP_TO_BORDER_EXT
:
128 t
->pp_txfilter
|= RADEON_CLAMP_T_MIRROR_CLAMP_GL
;
129 is_clamp_to_border
= GL_TRUE
;
132 _mesa_problem(NULL
, "bad T wrap mode in %s", __FUNCTION__
);
136 if ( is_clamp_to_border
) {
137 t
->pp_txfilter
|= RADEON_BORDER_MODE_D3D
;
140 t
->border_fallback
= (is_clamp
&& is_clamp_to_border
);
143 static void radeonSetTexMaxAnisotropy( radeonTexObjPtr t
, GLfloat max
)
145 t
->pp_txfilter
&= ~RADEON_MAX_ANISO_MASK
;
148 t
->pp_txfilter
|= RADEON_MAX_ANISO_1_TO_1
;
149 } else if ( max
<= 2.0 ) {
150 t
->pp_txfilter
|= RADEON_MAX_ANISO_2_TO_1
;
151 } else if ( max
<= 4.0 ) {
152 t
->pp_txfilter
|= RADEON_MAX_ANISO_4_TO_1
;
153 } else if ( max
<= 8.0 ) {
154 t
->pp_txfilter
|= RADEON_MAX_ANISO_8_TO_1
;
156 t
->pp_txfilter
|= RADEON_MAX_ANISO_16_TO_1
;
161 * Set the texture magnification and minification modes.
163 * \param t Texture whose filter modes are to be set
164 * \param minf Texture minification mode
165 * \param magf Texture magnification mode
168 static void radeonSetTexFilter( radeonTexObjPtr t
, GLenum minf
, GLenum magf
)
170 GLuint anisotropy
= (t
->pp_txfilter
& RADEON_MAX_ANISO_MASK
);
172 /* Force revalidation to account for switches from/to mipmapping. */
173 t
->validated
= GL_FALSE
;
175 t
->pp_txfilter
&= ~(RADEON_MIN_FILTER_MASK
| RADEON_MAG_FILTER_MASK
);
177 /* r100 chips can't handle mipmaps/aniso for cubemap/volume textures */
178 if ( t
->base
.Target
== GL_TEXTURE_CUBE_MAP
) {
181 case GL_NEAREST_MIPMAP_NEAREST
:
182 case GL_NEAREST_MIPMAP_LINEAR
:
183 t
->pp_txfilter
|= RADEON_MIN_FILTER_NEAREST
;
186 case GL_LINEAR_MIPMAP_NEAREST
:
187 case GL_LINEAR_MIPMAP_LINEAR
:
188 t
->pp_txfilter
|= RADEON_MIN_FILTER_LINEAR
;
194 else if ( anisotropy
== RADEON_MAX_ANISO_1_TO_1
) {
197 t
->pp_txfilter
|= RADEON_MIN_FILTER_NEAREST
;
200 t
->pp_txfilter
|= RADEON_MIN_FILTER_LINEAR
;
202 case GL_NEAREST_MIPMAP_NEAREST
:
203 t
->pp_txfilter
|= RADEON_MIN_FILTER_NEAREST_MIP_NEAREST
;
205 case GL_NEAREST_MIPMAP_LINEAR
:
206 t
->pp_txfilter
|= RADEON_MIN_FILTER_LINEAR_MIP_NEAREST
;
208 case GL_LINEAR_MIPMAP_NEAREST
:
209 t
->pp_txfilter
|= RADEON_MIN_FILTER_NEAREST_MIP_LINEAR
;
211 case GL_LINEAR_MIPMAP_LINEAR
:
212 t
->pp_txfilter
|= RADEON_MIN_FILTER_LINEAR_MIP_LINEAR
;
218 t
->pp_txfilter
|= RADEON_MIN_FILTER_ANISO_NEAREST
;
221 t
->pp_txfilter
|= RADEON_MIN_FILTER_ANISO_LINEAR
;
223 case GL_NEAREST_MIPMAP_NEAREST
:
224 case GL_LINEAR_MIPMAP_NEAREST
:
225 t
->pp_txfilter
|= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST
;
227 case GL_NEAREST_MIPMAP_LINEAR
:
228 case GL_LINEAR_MIPMAP_LINEAR
:
229 t
->pp_txfilter
|= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR
;
236 t
->pp_txfilter
|= RADEON_MAG_FILTER_NEAREST
;
239 t
->pp_txfilter
|= RADEON_MAG_FILTER_LINEAR
;
244 static void radeonSetTexBorderColor( radeonTexObjPtr t
, const GLfloat color
[4] )
247 CLAMPED_FLOAT_TO_UBYTE(c
[0], color
[0]);
248 CLAMPED_FLOAT_TO_UBYTE(c
[1], color
[1]);
249 CLAMPED_FLOAT_TO_UBYTE(c
[2], color
[2]);
250 CLAMPED_FLOAT_TO_UBYTE(c
[3], color
[3]);
251 t
->pp_border_color
= radeonPackColor( 4, c
[0], c
[1], c
[2], c
[3] );
254 #define SCALED_FLOAT_TO_BYTE( x, scale ) \
255 (((GLuint)((255.0F / scale) * (x))) / 2)
257 static void radeonTexEnv( struct gl_context
*ctx
, GLenum target
,
258 GLenum pname
, const GLfloat
*param
)
260 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
261 GLuint unit
= ctx
->Texture
.CurrentUnit
;
262 struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[unit
];
264 if ( RADEON_DEBUG
& RADEON_STATE
) {
265 fprintf( stderr
, "%s( %s )\n",
266 __FUNCTION__
, _mesa_lookup_enum_by_nr( pname
) );
270 case GL_TEXTURE_ENV_COLOR
: {
273 _mesa_unclamped_float_rgba_to_ubyte(c
, texUnit
->EnvColor
);
274 envColor
= radeonPackColor( 4, c
[0], c
[1], c
[2], c
[3] );
275 if ( rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TFACTOR
] != envColor
) {
276 RADEON_STATECHANGE( rmesa
, tex
[unit
] );
277 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TFACTOR
] = envColor
;
282 case GL_TEXTURE_LOD_BIAS_EXT
: {
286 /* The Radeon's LOD bias is a signed 2's complement value with a
287 * range of -1.0 <= bias < 4.0. We break this into two linear
288 * functions, one mapping [-1.0,0.0] to [-128,0] and one mapping
289 * [0.0,4.0] to [0,127].
291 min
= driQueryOptionb (&rmesa
->radeon
.optionCache
, "no_neg_lod_bias") ?
293 bias
= CLAMP( *param
, min
, 4.0 );
296 } else if ( bias
> 0 ) {
297 b
= ((GLuint
)SCALED_FLOAT_TO_BYTE( bias
, 4.0 )) << RADEON_LOD_BIAS_SHIFT
;
299 b
= ((GLuint
)SCALED_FLOAT_TO_BYTE( bias
, 1.0 )) << RADEON_LOD_BIAS_SHIFT
;
301 if ( (rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFILTER
] & RADEON_LOD_BIAS_MASK
) != b
) {
302 RADEON_STATECHANGE( rmesa
, tex
[unit
] );
303 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFILTER
] &= ~RADEON_LOD_BIAS_MASK
;
304 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFILTER
] |= (b
& RADEON_LOD_BIAS_MASK
);
314 void radeonTexUpdateParameters(struct gl_context
*ctx
, GLuint unit
)
316 struct gl_sampler_object
*samp
= _mesa_get_samplerobj(ctx
, unit
);
317 radeonTexObj
* t
= radeon_tex_obj(ctx
->Texture
.Unit
[unit
]._Current
);
319 radeonSetTexMaxAnisotropy(t
, samp
->MaxAnisotropy
);
320 radeonSetTexFilter(t
, samp
->MinFilter
, samp
->MagFilter
);
321 radeonSetTexWrap(t
, samp
->WrapS
, samp
->WrapT
);
322 radeonSetTexBorderColor(t
, samp
->BorderColor
.f
);
327 * Changes variables and flags for a state update, which will happen at the
328 * next UpdateTextureState
331 static void radeonTexParameter( struct gl_context
*ctx
, GLenum target
,
332 struct gl_texture_object
*texObj
,
333 GLenum pname
, const GLfloat
*params
)
335 radeonTexObj
* t
= radeon_tex_obj(texObj
);
337 radeon_print(RADEON_TEXTURE
, RADEON_VERBOSE
, "%s( %s )\n", __FUNCTION__
,
338 _mesa_lookup_enum_by_nr( pname
) );
341 case GL_TEXTURE_BASE_LEVEL
:
342 case GL_TEXTURE_MAX_LEVEL
:
343 case GL_TEXTURE_MIN_LOD
:
344 case GL_TEXTURE_MAX_LOD
:
345 t
->validated
= GL_FALSE
;
353 static void radeonDeleteTexture( struct gl_context
*ctx
,
354 struct gl_texture_object
*texObj
)
356 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
357 radeonTexObj
* t
= radeon_tex_obj(texObj
);
360 radeon_print(RADEON_TEXTURE
, RADEON_NORMAL
,
361 "%s( %p (target = %s) )\n", __FUNCTION__
, (void *)texObj
,
362 _mesa_lookup_enum_by_nr( texObj
->Target
) );
365 radeon_firevertices(&rmesa
->radeon
);
366 for ( i
= 0 ; i
< rmesa
->radeon
.glCtx
.Const
.MaxTextureUnits
; i
++ ) {
367 if ( t
== rmesa
->state
.texture
.unit
[i
].texobj
) {
368 rmesa
->state
.texture
.unit
[i
].texobj
= NULL
;
369 rmesa
->hw
.tex
[i
].dirty
= GL_FALSE
;
370 rmesa
->hw
.cube
[i
].dirty
= GL_FALSE
;
375 radeon_miptree_unreference(&t
->mt
);
377 /* Free mipmap images and the texture object itself */
378 _mesa_delete_texture_object(ctx
, texObj
);
382 * - Same GEN_MODE for all active bits
383 * - Same EyePlane/ObjPlane for all active bits when using Eye/Obj
384 * - STRQ presumably all supported (matrix means incoming R values
385 * can end up in STQ, this has implications for vertex support,
386 * presumably ok if maos is used, though?)
388 * Basically impossible to do this on the fly - just collect some
389 * basic info & do the checks from ValidateState().
391 static void radeonTexGen( struct gl_context
*ctx
,
394 const GLfloat
*params
)
396 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
397 GLuint unit
= ctx
->Texture
.CurrentUnit
;
398 rmesa
->recheck_texgen
[unit
] = GL_TRUE
;
402 * Allocate a new texture object.
403 * Called via ctx->Driver.NewTextureObject.
404 * Note: we could use containment here to 'derive' the driver-specific
405 * texture object from the core mesa gl_texture_object. Not done at this time.
407 static struct gl_texture_object
*
408 radeonNewTextureObject( struct gl_context
*ctx
, GLuint name
, GLenum target
)
410 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
411 radeonTexObj
* t
= CALLOC_STRUCT(radeon_tex_obj
);
413 _mesa_initialize_texture_object(ctx
, &t
->base
, name
, target
);
414 t
->base
.Sampler
.MaxAnisotropy
= rmesa
->radeon
.initialMaxAnisotropy
;
416 t
->border_fallback
= GL_FALSE
;
418 t
->pp_txfilter
= RADEON_BORDER_MODE_OGL
;
419 t
->pp_txformat
= (RADEON_TXFORMAT_ENDIAN_NO_SWAP
|
420 RADEON_TXFORMAT_PERSPECTIVE_ENABLE
);
422 radeonSetTexWrap( t
, t
->base
.Sampler
.WrapS
, t
->base
.Sampler
.WrapT
);
423 radeonSetTexMaxAnisotropy( t
, t
->base
.Sampler
.MaxAnisotropy
);
424 radeonSetTexFilter( t
, t
->base
.Sampler
.MinFilter
, t
->base
.Sampler
.MagFilter
);
425 radeonSetTexBorderColor( t
, t
->base
.Sampler
.BorderColor
.f
);
430 static struct gl_sampler_object
*
431 radeonNewSamplerObject(struct gl_context
*ctx
, GLuint name
)
433 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
434 struct gl_sampler_object
*samp
= _mesa_new_sampler_object(ctx
, name
);
436 samp
->MaxAnisotropy
= rmesa
->radeon
.initialMaxAnisotropy
;
441 void radeonInitTextureFuncs( radeonContextPtr radeon
, struct dd_function_table
*functions
)
443 radeon_init_common_texture_funcs(radeon
, functions
);
445 functions
->NewTextureObject
= radeonNewTextureObject
;
446 // functions->BindTexture = radeonBindTexture;
447 functions
->DeleteTexture
= radeonDeleteTexture
;
449 functions
->TexEnv
= radeonTexEnv
;
450 functions
->TexParameter
= radeonTexParameter
;
451 functions
->TexGen
= radeonTexGen
;
452 functions
->NewSamplerObject
= radeonNewSamplerObject
;