c075c2c5625f21b21d036cab98c918f281234ebf
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_texmem.c
1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_texmem.c,v 1.7 2002/12/16 16:18:59 dawes Exp $ */
2 /**************************************************************************
3
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 VA Linux Systems Inc., Fremont, California.
6
7 All Rights Reserved.
8
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation on the rights to use, copy, modify, merge, publish,
13 distribute, sub license, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
16
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
20
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
24 NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR THEIR
25 SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
26 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR
27 IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
28 SOFTWARE.
29
30 **************************************************************************/
31
32 /*
33 * Authors:
34 * Kevin E. Martin <martin@valinux.com>
35 * Gareth Hughes <gareth@valinux.com>
36 *
37 */
38 #include <errno.h>
39
40 #include "glheader.h"
41 #include "imports.h"
42 #include "context.h"
43 #include "macros.h"
44
45 #include "radeon_context.h"
46 #include "radeon_ioctl.h"
47 #include "radeon_tex.h"
48
49
50 /**
51 * Destroy any device-dependent state associated with the texture. This may
52 * include NULLing out hardware state that points to the texture.
53 */
54 void
55 radeonDestroyTexObj( radeonContextPtr rmesa, radeonTexObjPtr t )
56 {
57 if ( RADEON_DEBUG & DEBUG_TEXTURE ) {
58 fprintf( stderr, "%s( %p, %p )\n", __FUNCTION__, (void *)t, (void *)t->base.tObj );
59 }
60
61 if ( rmesa != NULL ) {
62 unsigned i;
63
64
65 for ( i = 0 ; i < rmesa->glCtx->Const.MaxTextureUnits ; i++ ) {
66 if ( t == rmesa->state.texture.unit[i].texobj ) {
67 rmesa->state.texture.unit[i].texobj = NULL;
68 rmesa->hw.tex[i].dirty = GL_FALSE;
69 }
70 }
71 }
72 }
73
74
75 /* ------------------------------------------------------------
76 * Texture image conversions
77 */
78
79
80 static void radeonUploadRectSubImage( radeonContextPtr rmesa,
81 radeonTexObjPtr t,
82 struct gl_texture_image *texImage,
83 GLint x, GLint y,
84 GLint width, GLint height )
85 {
86 const struct gl_texture_format *texFormat = texImage->TexFormat;
87 int blit_format, dstPitch, done;
88
89 switch ( texFormat->TexelBytes ) {
90 case 1:
91 blit_format = RADEON_GMC_DST_8BPP_CI;
92 break;
93 case 2:
94 blit_format = RADEON_GMC_DST_16BPP;
95 break;
96 case 4:
97 blit_format = RADEON_GMC_DST_32BPP;
98 break;
99 default:
100 fprintf( stderr, "radeonUploadRectSubImage: unknown blit_format (texelbytes=%d)\n",
101 texFormat->TexelBytes);
102 return;
103 }
104
105 t->image[0][0].data = texImage->Data;
106
107 /* Currently don't need to cope with small pitches.
108 */
109 width = texImage->Width;
110 height = texImage->Height;
111 dstPitch = t->pp_txpitch + 32;
112
113 { /* FIXME: prefer GART-texturing if possible */
114 /* Data not in GART memory, or bad pitch.
115 */
116 for (done = 0; done < height ; ) {
117 struct radeon_dma_region region;
118 int lines = MIN2( height - done, RADEON_BUFFER_SIZE / dstPitch );
119 int src_pitch;
120 char *tex;
121
122 src_pitch = texImage->RowStride * texFormat->TexelBytes;
123
124 tex = (char *)texImage->Data + done * src_pitch;
125
126 memset(&region, 0, sizeof(region));
127 radeonAllocDmaRegion( rmesa, &region, lines * dstPitch, 1024 );
128
129 /* Copy texdata to dma:
130 */
131 if (0)
132 fprintf(stderr, "%s: src_pitch %d dst_pitch %d\n",
133 __FUNCTION__, src_pitch, dstPitch);
134
135 if (src_pitch == dstPitch) {
136 memcpy( region.address + region.start, tex, lines * src_pitch );
137 }
138 else {
139 char *buf = region.address + region.start;
140 int i;
141 for (i = 0 ; i < lines ; i++) {
142 memcpy( buf, tex, src_pitch );
143 buf += dstPitch;
144 tex += src_pitch;
145 }
146 }
147
148 radeonEmitWait( rmesa, RADEON_WAIT_3D );
149
150
151
152 /* Blit to framebuffer
153 */
154 radeonEmitBlit( rmesa,
155 blit_format,
156 dstPitch, GET_START( &region ),
157 dstPitch, t->bufAddr,
158 0, 0,
159 0, done,
160 width, lines );
161
162 radeonEmitWait( rmesa, RADEON_WAIT_2D );
163
164 radeonReleaseDmaRegion( rmesa, &region, __FUNCTION__ );
165 done += lines;
166 }
167 }
168 }
169
170
171 /**
172 * Upload the texture image associated with texture \a t at the specified
173 * level at the address relative to \a start.
174 */
175 static void uploadSubImage( radeonContextPtr rmesa, radeonTexObjPtr t,
176 GLint hwlevel,
177 GLint x, GLint y, GLint width, GLint height,
178 GLuint face )
179 {
180 struct gl_texture_image *texImage = NULL;
181 GLuint offset;
182 GLint imageWidth, imageHeight;
183 GLint ret;
184 drm_radeon_texture_t tex;
185 drm_radeon_tex_image_t tmp;
186 const int level = hwlevel + t->base.firstLevel;
187
188 if ( RADEON_DEBUG & DEBUG_TEXTURE ) {
189 fprintf( stderr, "%s( %p, %p ) level/width/height/face = %d/%d/%d/%u\n",
190 __FUNCTION__, (void *)t, (void *)t->base.tObj, level, width, height, face );
191 }
192
193 ASSERT(face < 6);
194
195 /* Ensure we have a valid texture to upload */
196 if ( ( hwlevel < 0 ) || ( hwlevel >= RADEON_MAX_TEXTURE_LEVELS ) ) {
197 _mesa_problem(NULL, "bad texture level in %s", __FUNCTION__);
198 return;
199 }
200
201 texImage = t->base.tObj->Image[face][level];
202
203 if ( !texImage ) {
204 if ( RADEON_DEBUG & DEBUG_TEXTURE )
205 fprintf( stderr, "%s: texImage %d is NULL!\n", __FUNCTION__, level );
206 return;
207 }
208 if ( !texImage->Data ) {
209 if ( RADEON_DEBUG & DEBUG_TEXTURE )
210 fprintf( stderr, "%s: image data is NULL!\n", __FUNCTION__ );
211 return;
212 }
213
214
215 if (t->base.tObj->Target == GL_TEXTURE_RECTANGLE_NV) {
216 assert(level == 0);
217 assert(hwlevel == 0);
218 if ( RADEON_DEBUG & DEBUG_TEXTURE )
219 fprintf( stderr, "%s: image data is rectangular\n", __FUNCTION__);
220 radeonUploadRectSubImage( rmesa, t, texImage, x, y, width, height );
221 return;
222 }
223
224 imageWidth = texImage->Width;
225 imageHeight = texImage->Height;
226
227 offset = t->bufAddr;
228
229 if ( RADEON_DEBUG & (DEBUG_TEXTURE|DEBUG_IOCTL) ) {
230 GLint imageX = 0;
231 GLint imageY = 0;
232 GLint blitX = t->image[face][hwlevel].x;
233 GLint blitY = t->image[face][hwlevel].y;
234 GLint blitWidth = t->image[face][hwlevel].width;
235 GLint blitHeight = t->image[face][hwlevel].height;
236 fprintf( stderr, " upload image: %d,%d at %d,%d\n",
237 imageWidth, imageHeight, imageX, imageY );
238 fprintf( stderr, " upload blit: %d,%d at %d,%d\n",
239 blitWidth, blitHeight, blitX, blitY );
240 fprintf( stderr, " blit ofs: 0x%07x level: %d/%d\n",
241 (GLuint)offset, hwlevel, level );
242 }
243
244 t->image[face][hwlevel].data = texImage->Data;
245
246 /* Init the DRM_RADEON_TEXTURE command / drm_radeon_texture_t struct.
247 * NOTE: we're always use a 1KB-wide blit and I8 texture format.
248 * We used to use 1, 2 and 4-byte texels and used to use the texture
249 * width to dictate the blit width - but that won't work for compressed
250 * textures. (Brian)
251 */
252 tex.offset = offset;
253 tex.pitch = BLIT_WIDTH_BYTES / 64;
254 tex.format = RADEON_TXFORMAT_I8; /* any 1-byte texel format */
255 if (texImage->TexFormat->TexelBytes) {
256 tex.width = imageWidth * texImage->TexFormat->TexelBytes; /* in bytes */
257 tex.height = imageHeight;
258 }
259 else {
260 tex.width = imageWidth; /* compressed */
261 tex.height = imageHeight;
262 if (tex.height < 4)
263 tex.height = 4;
264 }
265 tex.image = &tmp;
266
267 /* copy (x,y,width,height,data) */
268 memcpy( &tmp, &t->image[face][hwlevel], sizeof(drm_radeon_tex_image_t) );
269
270 LOCK_HARDWARE( rmesa );
271 do {
272 ret = drmCommandWriteRead( rmesa->dri.fd, DRM_RADEON_TEXTURE,
273 &tex, sizeof(drm_radeon_texture_t) );
274 } while ( ret && errno == EAGAIN );
275
276 UNLOCK_HARDWARE( rmesa );
277
278 if ( ret ) {
279 fprintf( stderr, "DRM_RADEON_TEXTURE: return = %d\n", ret );
280 fprintf( stderr, " offset=0x%08x\n",
281 offset );
282 fprintf( stderr, " image width=%d height=%d\n",
283 imageWidth, imageHeight );
284 fprintf( stderr, " blit width=%d height=%d data=%p\n",
285 t->image[face][hwlevel].width, t->image[face][hwlevel].height,
286 t->image[face][hwlevel].data );
287 exit( 1 );
288 }
289 }
290
291
292 /**
293 * Upload the texture images associated with texture \a t. This might
294 * require the allocation of texture memory.
295 *
296 * \param rmesa Context pointer
297 * \param t Texture to be uploaded
298 * \param face Cube map face to be uploaded. Zero for non-cube maps.
299 */
300
301 int radeonUploadTexImages( radeonContextPtr rmesa, radeonTexObjPtr t, GLuint face )
302 {
303 const int numLevels = t->base.lastLevel - t->base.firstLevel + 1;
304
305 if ( RADEON_DEBUG & (DEBUG_TEXTURE|DEBUG_IOCTL) ) {
306 fprintf( stderr, "%s( %p, %p ) sz=%d lvls=%d-%d\n", __FUNCTION__,
307 (void *)rmesa->glCtx, (void *)t->base.tObj, t->base.totalSize,
308 t->base.firstLevel, t->base.lastLevel );
309 }
310
311 if ( !t || t->base.totalSize == 0 )
312 return 0;
313
314 LOCK_HARDWARE( rmesa );
315
316 if ( t->base.memBlock == NULL ) {
317 int heap;
318
319 heap = driAllocateTexture( rmesa->texture_heaps, rmesa->nr_heaps,
320 (driTextureObject *) t );
321 if ( heap == -1 ) {
322 UNLOCK_HARDWARE( rmesa );
323 return -1;
324 }
325
326 /* Set the base offset of the texture image */
327 t->bufAddr = rmesa->radeonScreen->texOffset[heap]
328 + t->base.memBlock->ofs;
329 t->pp_txoffset = t->bufAddr;
330
331
332 /* Mark this texobj as dirty on all units:
333 */
334 t->dirty_state = TEX_ALL;
335 }
336
337
338 /* Let the world know we've used this memory recently.
339 */
340 driUpdateTextureLRU( (driTextureObject *) t );
341 UNLOCK_HARDWARE( rmesa );
342
343
344 /* Upload any images that are new */
345 if (t->base.dirty_images[face]) {
346 int i;
347 for ( i = 0 ; i < numLevels ; i++ ) {
348 if ( (t->base.dirty_images[face] & (1 << (i+t->base.firstLevel))) != 0 ) {
349 uploadSubImage( rmesa, t, i, 0, 0, t->image[face][i].width,
350 t->image[face][i].height, face );
351 }
352 }
353 t->base.dirty_images[face] = 0;
354 }
355
356 return 0;
357 }