1 /**************************************************************************
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
32 * Kevin E. Martin <martin@valinux.com>
33 * Gareth Hughes <gareth@valinux.com>
36 #include "main/glheader.h"
37 #include "main/imports.h"
38 #include "main/colormac.h"
39 #include "main/context.h"
40 #include "main/macros.h"
41 #include "main/texformat.h"
42 #include "main/texobj.h"
43 #include "main/enums.h"
45 #include "radeon_context.h"
46 #include "radeon_mipmap_tree.h"
47 #include "radeon_state.h"
48 #include "radeon_ioctl.h"
49 #include "radeon_swtcl.h"
50 #include "radeon_tex.h"
51 #include "radeon_tcl.h"
54 #define RADEON_TXFORMAT_A8 RADEON_TXFORMAT_I8
55 #define RADEON_TXFORMAT_L8 RADEON_TXFORMAT_I8
56 #define RADEON_TXFORMAT_AL88 RADEON_TXFORMAT_AI88
57 #define RADEON_TXFORMAT_YCBCR RADEON_TXFORMAT_YVYU422
58 #define RADEON_TXFORMAT_YCBCR_REV RADEON_TXFORMAT_VYUY422
59 #define RADEON_TXFORMAT_RGB_DXT1 RADEON_TXFORMAT_DXT1
60 #define RADEON_TXFORMAT_RGBA_DXT1 RADEON_TXFORMAT_DXT1
61 #define RADEON_TXFORMAT_RGBA_DXT3 RADEON_TXFORMAT_DXT23
62 #define RADEON_TXFORMAT_RGBA_DXT5 RADEON_TXFORMAT_DXT45
65 [ MESA_FORMAT_ ## f ] = { RADEON_TXFORMAT_ ## f, 0 }
66 #define _COLOR_REV(f) \
67 [ MESA_FORMAT_ ## f ## _REV ] = { RADEON_TXFORMAT_ ## f, 0 }
69 [ MESA_FORMAT_ ## f ] = { RADEON_TXFORMAT_ ## f | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }
70 #define _ALPHA_REV(f) \
71 [ MESA_FORMAT_ ## f ## _REV ] = { RADEON_TXFORMAT_ ## f | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }
73 [ MESA_FORMAT_ ## f ] = { RADEON_TXFORMAT_ ## f, RADEON_YUV_TO_RGB }
75 [ MESA_FORMAT_ ## f ] = { 0xffffffff, 0 }
76 #define VALID_FORMAT(f) ( ((f) <= MESA_FORMAT_RGBA_DXT5) \
77 && (tx_table[f].format != 0xffffffff) )
80 GLuint format
, filter
;
83 static const struct tx_table tx_table
[] =
89 [ MESA_FORMAT_RGB888
] = { RADEON_TXFORMAT_ARGB8888
, 0 },
116 /* ================================================================
117 * Texture combine functions
120 /* GL_ARB_texture_env_combine support
123 /* The color tables have combine functions for GL_SRC_COLOR,
124 * GL_ONE_MINUS_SRC_COLOR, GL_SRC_ALPHA and GL_ONE_MINUS_SRC_ALPHA.
126 static GLuint radeon_texture_color
[][RADEON_MAX_TEXTURE_UNITS
] =
129 RADEON_COLOR_ARG_A_T0_COLOR
,
130 RADEON_COLOR_ARG_A_T1_COLOR
,
131 RADEON_COLOR_ARG_A_T2_COLOR
134 RADEON_COLOR_ARG_A_T0_COLOR
| RADEON_COMP_ARG_A
,
135 RADEON_COLOR_ARG_A_T1_COLOR
| RADEON_COMP_ARG_A
,
136 RADEON_COLOR_ARG_A_T2_COLOR
| RADEON_COMP_ARG_A
139 RADEON_COLOR_ARG_A_T0_ALPHA
,
140 RADEON_COLOR_ARG_A_T1_ALPHA
,
141 RADEON_COLOR_ARG_A_T2_ALPHA
144 RADEON_COLOR_ARG_A_T0_ALPHA
| RADEON_COMP_ARG_A
,
145 RADEON_COLOR_ARG_A_T1_ALPHA
| RADEON_COMP_ARG_A
,
146 RADEON_COLOR_ARG_A_T2_ALPHA
| RADEON_COMP_ARG_A
150 static GLuint radeon_tfactor_color
[] =
152 RADEON_COLOR_ARG_A_TFACTOR_COLOR
,
153 RADEON_COLOR_ARG_A_TFACTOR_COLOR
| RADEON_COMP_ARG_A
,
154 RADEON_COLOR_ARG_A_TFACTOR_ALPHA
,
155 RADEON_COLOR_ARG_A_TFACTOR_ALPHA
| RADEON_COMP_ARG_A
158 static GLuint radeon_primary_color
[] =
160 RADEON_COLOR_ARG_A_DIFFUSE_COLOR
,
161 RADEON_COLOR_ARG_A_DIFFUSE_COLOR
| RADEON_COMP_ARG_A
,
162 RADEON_COLOR_ARG_A_DIFFUSE_ALPHA
,
163 RADEON_COLOR_ARG_A_DIFFUSE_ALPHA
| RADEON_COMP_ARG_A
166 static GLuint radeon_previous_color
[] =
168 RADEON_COLOR_ARG_A_CURRENT_COLOR
,
169 RADEON_COLOR_ARG_A_CURRENT_COLOR
| RADEON_COMP_ARG_A
,
170 RADEON_COLOR_ARG_A_CURRENT_ALPHA
,
171 RADEON_COLOR_ARG_A_CURRENT_ALPHA
| RADEON_COMP_ARG_A
174 /* GL_ZERO table - indices 0-3
175 * GL_ONE table - indices 1-4
177 static GLuint radeon_zero_color
[] =
179 RADEON_COLOR_ARG_A_ZERO
,
180 RADEON_COLOR_ARG_A_ZERO
| RADEON_COMP_ARG_A
,
181 RADEON_COLOR_ARG_A_ZERO
,
182 RADEON_COLOR_ARG_A_ZERO
| RADEON_COMP_ARG_A
,
183 RADEON_COLOR_ARG_A_ZERO
187 /* The alpha tables only have GL_SRC_ALPHA and GL_ONE_MINUS_SRC_ALPHA.
189 static GLuint radeon_texture_alpha
[][RADEON_MAX_TEXTURE_UNITS
] =
192 RADEON_ALPHA_ARG_A_T0_ALPHA
,
193 RADEON_ALPHA_ARG_A_T1_ALPHA
,
194 RADEON_ALPHA_ARG_A_T2_ALPHA
197 RADEON_ALPHA_ARG_A_T0_ALPHA
| RADEON_COMP_ARG_A
,
198 RADEON_ALPHA_ARG_A_T1_ALPHA
| RADEON_COMP_ARG_A
,
199 RADEON_ALPHA_ARG_A_T2_ALPHA
| RADEON_COMP_ARG_A
203 static GLuint radeon_tfactor_alpha
[] =
205 RADEON_ALPHA_ARG_A_TFACTOR_ALPHA
,
206 RADEON_ALPHA_ARG_A_TFACTOR_ALPHA
| RADEON_COMP_ARG_A
209 static GLuint radeon_primary_alpha
[] =
211 RADEON_ALPHA_ARG_A_DIFFUSE_ALPHA
,
212 RADEON_ALPHA_ARG_A_DIFFUSE_ALPHA
| RADEON_COMP_ARG_A
215 static GLuint radeon_previous_alpha
[] =
217 RADEON_ALPHA_ARG_A_CURRENT_ALPHA
,
218 RADEON_ALPHA_ARG_A_CURRENT_ALPHA
| RADEON_COMP_ARG_A
221 /* GL_ZERO table - indices 0-1
222 * GL_ONE table - indices 1-2
224 static GLuint radeon_zero_alpha
[] =
226 RADEON_ALPHA_ARG_A_ZERO
,
227 RADEON_ALPHA_ARG_A_ZERO
| RADEON_COMP_ARG_A
,
228 RADEON_ALPHA_ARG_A_ZERO
232 /* Extract the arg from slot A, shift it into the correct argument slot
233 * and set the corresponding complement bit.
235 #define RADEON_COLOR_ARG( n, arg ) \
238 ((color_arg[n] & RADEON_COLOR_ARG_MASK) \
239 << RADEON_COLOR_ARG_##arg##_SHIFT); \
241 ((color_arg[n] >> RADEON_COMP_ARG_SHIFT) \
242 << RADEON_COMP_ARG_##arg##_SHIFT); \
245 #define RADEON_ALPHA_ARG( n, arg ) \
248 ((alpha_arg[n] & RADEON_ALPHA_ARG_MASK) \
249 << RADEON_ALPHA_ARG_##arg##_SHIFT); \
251 ((alpha_arg[n] >> RADEON_COMP_ARG_SHIFT) \
252 << RADEON_COMP_ARG_##arg##_SHIFT); \
256 /* ================================================================
257 * Texture unit state management
260 static GLboolean
radeonUpdateTextureEnv( GLcontext
*ctx
, int unit
)
262 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
263 const struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[unit
];
264 GLuint color_combine
, alpha_combine
;
265 const GLuint color_combine0
= RADEON_COLOR_ARG_A_ZERO
| RADEON_COLOR_ARG_B_ZERO
266 | RADEON_COLOR_ARG_C_CURRENT_COLOR
| RADEON_BLEND_CTL_ADD
267 | RADEON_SCALE_1X
| RADEON_CLAMP_TX
;
268 const GLuint alpha_combine0
= RADEON_ALPHA_ARG_A_ZERO
| RADEON_ALPHA_ARG_B_ZERO
269 | RADEON_ALPHA_ARG_C_CURRENT_ALPHA
| RADEON_BLEND_CTL_ADD
270 | RADEON_SCALE_1X
| RADEON_CLAMP_TX
;
273 /* texUnit->_Current can be NULL if and only if the texture unit is
274 * not actually enabled.
276 assert( (texUnit
->_ReallyEnabled
== 0)
277 || (texUnit
->_Current
!= NULL
) );
279 if ( RADEON_DEBUG
& DEBUG_TEXTURE
) {
280 fprintf( stderr
, "%s( %p, %d )\n", __FUNCTION__
, (void *)ctx
, unit
);
283 /* Set the texture environment state. Isn't this nice and clean?
284 * The chip will automagically set the texture alpha to 0xff when
285 * the texture format does not include an alpha component. This
286 * reduces the amount of special-casing we have to do, alpha-only
287 * textures being a notable exception. Doesn't work for luminance
288 * textures realized with I8 and ALPHA_IN_MAP not set neither (on r100).
290 /* Don't cache these results.
292 rmesa
->state
.texture
.unit
[unit
].format
= 0;
293 rmesa
->state
.texture
.unit
[unit
].envMode
= 0;
295 if ( !texUnit
->_ReallyEnabled
) {
296 color_combine
= color_combine0
;
297 alpha_combine
= alpha_combine0
;
300 GLuint color_arg
[3], alpha_arg
[3];
302 const GLuint numColorArgs
= texUnit
->_CurrentCombine
->_NumArgsRGB
;
303 const GLuint numAlphaArgs
= texUnit
->_CurrentCombine
->_NumArgsA
;
304 GLuint RGBshift
= texUnit
->_CurrentCombine
->ScaleShiftRGB
;
305 GLuint Ashift
= texUnit
->_CurrentCombine
->ScaleShiftA
;
309 * Extract the color and alpha combine function arguments.
311 for ( i
= 0 ; i
< numColorArgs
; i
++ ) {
312 const GLint op
= texUnit
->_CurrentCombine
->OperandRGB
[i
] - GL_SRC_COLOR
;
313 const GLuint srcRGBi
= texUnit
->_CurrentCombine
->SourceRGB
[i
];
318 if (texUnit
->_Current
->Image
[0][0]->_BaseFormat
== GL_ALPHA
)
319 color_arg
[i
] = radeon_zero_color
[op
];
321 color_arg
[i
] = radeon_texture_color
[op
][unit
];
324 color_arg
[i
] = radeon_tfactor_color
[op
];
326 case GL_PRIMARY_COLOR
:
327 color_arg
[i
] = radeon_primary_color
[op
];
330 color_arg
[i
] = radeon_previous_color
[op
];
333 color_arg
[i
] = radeon_zero_color
[op
];
336 color_arg
[i
] = radeon_zero_color
[op
+1];
341 GLuint txunit
= srcRGBi
- GL_TEXTURE0
;
342 if (ctx
->Texture
.Unit
[txunit
]._Current
->Image
[0][0]->_BaseFormat
== GL_ALPHA
)
343 color_arg
[i
] = radeon_zero_color
[op
];
345 /* implement ogl 1.4/1.5 core spec here, not specification of
346 * GL_ARB_texture_env_crossbar (which would require disabling blending
347 * instead of undefined results when referencing not enabled texunit) */
348 color_arg
[i
] = radeon_texture_color
[op
][txunit
];
356 for ( i
= 0 ; i
< numAlphaArgs
; i
++ ) {
357 const GLint op
= texUnit
->_CurrentCombine
->OperandA
[i
] - GL_SRC_ALPHA
;
358 const GLuint srcAi
= texUnit
->_CurrentCombine
->SourceA
[i
];
363 if (texUnit
->_Current
->Image
[0][0]->_BaseFormat
== GL_LUMINANCE
)
364 alpha_arg
[i
] = radeon_zero_alpha
[op
+1];
366 alpha_arg
[i
] = radeon_texture_alpha
[op
][unit
];
369 alpha_arg
[i
] = radeon_tfactor_alpha
[op
];
371 case GL_PRIMARY_COLOR
:
372 alpha_arg
[i
] = radeon_primary_alpha
[op
];
375 alpha_arg
[i
] = radeon_previous_alpha
[op
];
378 alpha_arg
[i
] = radeon_zero_alpha
[op
];
381 alpha_arg
[i
] = radeon_zero_alpha
[op
+1];
386 GLuint txunit
= srcAi
- GL_TEXTURE0
;
387 if (ctx
->Texture
.Unit
[txunit
]._Current
->Image
[0][0]->_BaseFormat
== GL_LUMINANCE
)
388 alpha_arg
[i
] = radeon_zero_alpha
[op
+1];
390 alpha_arg
[i
] = radeon_texture_alpha
[op
][txunit
];
399 * Build up the color and alpha combine functions.
401 switch ( texUnit
->_CurrentCombine
->ModeRGB
) {
403 color_combine
= (RADEON_COLOR_ARG_A_ZERO
|
404 RADEON_COLOR_ARG_B_ZERO
|
405 RADEON_BLEND_CTL_ADD
|
407 RADEON_COLOR_ARG( 0, C
);
410 color_combine
= (RADEON_COLOR_ARG_C_ZERO
|
411 RADEON_BLEND_CTL_ADD
|
413 RADEON_COLOR_ARG( 0, A
);
414 RADEON_COLOR_ARG( 1, B
);
417 color_combine
= (RADEON_COLOR_ARG_B_ZERO
|
419 RADEON_BLEND_CTL_ADD
|
421 RADEON_COLOR_ARG( 0, A
);
422 RADEON_COLOR_ARG( 1, C
);
425 color_combine
= (RADEON_COLOR_ARG_B_ZERO
|
427 RADEON_BLEND_CTL_ADDSIGNED
|
429 RADEON_COLOR_ARG( 0, A
);
430 RADEON_COLOR_ARG( 1, C
);
433 color_combine
= (RADEON_COLOR_ARG_B_ZERO
|
435 RADEON_BLEND_CTL_SUBTRACT
|
437 RADEON_COLOR_ARG( 0, A
);
438 RADEON_COLOR_ARG( 1, C
);
441 color_combine
= (RADEON_BLEND_CTL_BLEND
|
443 RADEON_COLOR_ARG( 0, B
);
444 RADEON_COLOR_ARG( 1, A
);
445 RADEON_COLOR_ARG( 2, C
);
448 case GL_DOT3_RGB_EXT
:
449 case GL_DOT3_RGBA_EXT
:
450 /* The EXT version of the DOT3 extension does not support the
451 * scale factor, but the ARB version (and the version in OpenGL
459 /* The R100 / RV200 only support a 1X multiplier in hardware
462 if ( RGBshift
!= (RADEON_SCALE_1X
>> RADEON_SCALE_SHIFT
) ) {
467 if ( (texUnit
->_CurrentCombine
->ModeRGB
== GL_DOT3_RGBA_EXT
)
468 || (texUnit
->_CurrentCombine
->ModeRGB
== GL_DOT3_RGBA
) ) {
469 /* is it necessary to set this or will it be ignored anyway? */
473 color_combine
= (RADEON_COLOR_ARG_C_ZERO
|
474 RADEON_BLEND_CTL_DOT3
|
476 RADEON_COLOR_ARG( 0, A
);
477 RADEON_COLOR_ARG( 1, B
);
480 case GL_MODULATE_ADD_ATI
:
481 color_combine
= (RADEON_BLEND_CTL_ADD
|
483 RADEON_COLOR_ARG( 0, A
);
484 RADEON_COLOR_ARG( 1, C
);
485 RADEON_COLOR_ARG( 2, B
);
487 case GL_MODULATE_SIGNED_ADD_ATI
:
488 color_combine
= (RADEON_BLEND_CTL_ADDSIGNED
|
490 RADEON_COLOR_ARG( 0, A
);
491 RADEON_COLOR_ARG( 1, C
);
492 RADEON_COLOR_ARG( 2, B
);
494 case GL_MODULATE_SUBTRACT_ATI
:
495 color_combine
= (RADEON_BLEND_CTL_SUBTRACT
|
497 RADEON_COLOR_ARG( 0, A
);
498 RADEON_COLOR_ARG( 1, C
);
499 RADEON_COLOR_ARG( 2, B
);
505 switch ( texUnit
->_CurrentCombine
->ModeA
) {
507 alpha_combine
= (RADEON_ALPHA_ARG_A_ZERO
|
508 RADEON_ALPHA_ARG_B_ZERO
|
509 RADEON_BLEND_CTL_ADD
|
511 RADEON_ALPHA_ARG( 0, C
);
514 alpha_combine
= (RADEON_ALPHA_ARG_C_ZERO
|
515 RADEON_BLEND_CTL_ADD
|
517 RADEON_ALPHA_ARG( 0, A
);
518 RADEON_ALPHA_ARG( 1, B
);
521 alpha_combine
= (RADEON_ALPHA_ARG_B_ZERO
|
523 RADEON_BLEND_CTL_ADD
|
525 RADEON_ALPHA_ARG( 0, A
);
526 RADEON_ALPHA_ARG( 1, C
);
529 alpha_combine
= (RADEON_ALPHA_ARG_B_ZERO
|
531 RADEON_BLEND_CTL_ADDSIGNED
|
533 RADEON_ALPHA_ARG( 0, A
);
534 RADEON_ALPHA_ARG( 1, C
);
537 alpha_combine
= (RADEON_COLOR_ARG_B_ZERO
|
539 RADEON_BLEND_CTL_SUBTRACT
|
541 RADEON_ALPHA_ARG( 0, A
);
542 RADEON_ALPHA_ARG( 1, C
);
545 alpha_combine
= (RADEON_BLEND_CTL_BLEND
|
547 RADEON_ALPHA_ARG( 0, B
);
548 RADEON_ALPHA_ARG( 1, A
);
549 RADEON_ALPHA_ARG( 2, C
);
552 case GL_MODULATE_ADD_ATI
:
553 alpha_combine
= (RADEON_BLEND_CTL_ADD
|
555 RADEON_ALPHA_ARG( 0, A
);
556 RADEON_ALPHA_ARG( 1, C
);
557 RADEON_ALPHA_ARG( 2, B
);
559 case GL_MODULATE_SIGNED_ADD_ATI
:
560 alpha_combine
= (RADEON_BLEND_CTL_ADDSIGNED
|
562 RADEON_ALPHA_ARG( 0, A
);
563 RADEON_ALPHA_ARG( 1, C
);
564 RADEON_ALPHA_ARG( 2, B
);
566 case GL_MODULATE_SUBTRACT_ATI
:
567 alpha_combine
= (RADEON_BLEND_CTL_SUBTRACT
|
569 RADEON_ALPHA_ARG( 0, A
);
570 RADEON_ALPHA_ARG( 1, C
);
571 RADEON_ALPHA_ARG( 2, B
);
577 if ( (texUnit
->_CurrentCombine
->ModeRGB
== GL_DOT3_RGB_EXT
)
578 || (texUnit
->_CurrentCombine
->ModeRGB
== GL_DOT3_RGB
) ) {
579 alpha_combine
|= RADEON_DOT_ALPHA_DONT_REPLICATE
;
583 * Apply the scale factor.
585 color_combine
|= (RGBshift
<< RADEON_SCALE_SHIFT
);
586 alpha_combine
|= (Ashift
<< RADEON_SCALE_SHIFT
);
592 if ( rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXCBLEND
] != color_combine
||
593 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXABLEND
] != alpha_combine
) {
594 RADEON_STATECHANGE( rmesa
, tex
[unit
] );
595 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXCBLEND
] = color_combine
;
596 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXABLEND
] = alpha_combine
;
602 void radeonSetTexOffset(__DRIcontext
* pDRICtx
, GLint texname
,
603 unsigned long long offset
, GLint depth
, GLuint pitch
)
605 r100ContextPtr rmesa
= pDRICtx
->driverPrivate
;
606 struct gl_texture_object
*tObj
=
607 _mesa_lookup_texture(rmesa
->radeon
.glCtx
, texname
);
613 t
= (radeonTexObjPtr
) tObj
->DriverData
;
615 t
->image_override
= GL_TRUE
;
620 t
->pp_txoffset
= offset
;
621 t
->pp_txpitch
= pitch
- 32;
625 t
->pp_txformat
= tx_table
[MESA_FORMAT_ARGB8888
].format
;
626 t
->pp_txfilter
|= tx_table
[MESA_FORMAT_ARGB8888
].filter
;
630 t
->pp_txformat
= tx_table
[MESA_FORMAT_RGB888
].format
;
631 t
->pp_txfilter
|= tx_table
[MESA_FORMAT_RGB888
].filter
;
634 t
->pp_txformat
= tx_table
[MESA_FORMAT_RGB565
].format
;
635 t
->pp_txfilter
|= tx_table
[MESA_FORMAT_RGB565
].filter
;
640 #define TEXOBJ_TXFILTER_MASK (RADEON_MAX_MIP_LEVEL_MASK | \
641 RADEON_MIN_FILTER_MASK | \
642 RADEON_MAG_FILTER_MASK | \
643 RADEON_MAX_ANISO_MASK | \
644 RADEON_YUV_TO_RGB | \
645 RADEON_YUV_TEMPERATURE_MASK | \
646 RADEON_CLAMP_S_MASK | \
647 RADEON_CLAMP_T_MASK | \
648 RADEON_BORDER_MODE_D3D )
650 #define TEXOBJ_TXFORMAT_MASK (RADEON_TXFORMAT_WIDTH_MASK | \
651 RADEON_TXFORMAT_HEIGHT_MASK | \
652 RADEON_TXFORMAT_FORMAT_MASK | \
653 RADEON_TXFORMAT_F5_WIDTH_MASK | \
654 RADEON_TXFORMAT_F5_HEIGHT_MASK | \
655 RADEON_TXFORMAT_ALPHA_IN_MAP | \
656 RADEON_TXFORMAT_CUBIC_MAP_ENABLE | \
657 RADEON_TXFORMAT_NON_POWER2)
660 static void disable_tex_obj_state( r100ContextPtr rmesa
,
663 /* do not use RADEON_DB_STATE to avoid stale texture caches */
664 uint32_t *cmd
= &rmesa
->hw
.tex
[unit
].cmd
[TEX_CMD_0
];
665 GLuint se_coord_fmt
= rmesa
->hw
.set
.cmd
[SET_SE_COORDFMT
];
666 GLuint
*txr_cmd
= RADEON_DB_STATE( txr
[unit
] );
668 RADEON_STATECHANGE( rmesa
, tex
[unit
] );
670 RADEON_STATECHANGE( rmesa
, tcl
);
671 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] &= ~(RADEON_ST_BIT(unit
) |
674 if (rmesa
->radeon
.TclFallback
& (RADEON_TCL_FALLBACK_TEXGEN_0
<<unit
)) {
675 TCL_FALLBACK( rmesa
->radeon
.glCtx
, (RADEON_TCL_FALLBACK_TEXGEN_0
<<unit
), GL_FALSE
);
676 rmesa
->recheck_texgen
[unit
] = GL_TRUE
;
679 if (rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFORMAT
] & RADEON_TXFORMAT_CUBIC_MAP_ENABLE
) {
680 /* this seems to be a genuine (r100 only?) hw bug. Need to remove the
681 cubic_map bit on unit 2 when the unit is disabled, otherwise every
682 2nd (2d) mipmap on unit 0 will be broken (may not be needed for other
683 units, better be safe than sorry though).*/
684 RADEON_STATECHANGE( rmesa
, tex
[unit
] );
685 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFORMAT
] &= ~RADEON_TXFORMAT_CUBIC_MAP_ENABLE
;
689 GLuint inputshift
= RADEON_TEXGEN_0_INPUT_SHIFT
+ unit
*4;
690 GLuint tmp
= rmesa
->TexGenEnabled
;
692 rmesa
->TexGenEnabled
&= ~(RADEON_TEXGEN_TEXMAT_0_ENABLE
<<unit
);
693 rmesa
->TexGenEnabled
&= ~(RADEON_TEXMAT_0_ENABLE
<<unit
);
694 rmesa
->TexGenEnabled
&= ~(RADEON_TEXGEN_INPUT_MASK
<<inputshift
);
695 rmesa
->TexGenNeedNormals
[unit
] = 0;
696 rmesa
->TexGenEnabled
|=
697 (RADEON_TEXGEN_INPUT_TEXCOORD_0
+unit
) << inputshift
;
699 if (tmp
!= rmesa
->TexGenEnabled
) {
700 rmesa
->recheck_texgen
[unit
] = GL_TRUE
;
701 rmesa
->radeon
.NewGLState
|= _NEW_TEXTURE_MATRIX
;
706 static void import_tex_obj_state( r100ContextPtr rmesa
,
708 radeonTexObjPtr texobj
)
710 /* do not use RADEON_DB_STATE to avoid stale texture caches */
711 uint32_t *cmd
= &rmesa
->hw
.tex
[unit
].cmd
[TEX_CMD_0
];
712 GLuint se_coord_fmt
= rmesa
->hw
.set
.cmd
[SET_SE_COORDFMT
];
714 RADEON_STATECHANGE( rmesa
, tex
[unit
] );
716 cmd
[TEX_PP_TXFILTER
] &= ~TEXOBJ_TXFILTER_MASK
;
717 cmd
[TEX_PP_TXFILTER
] |= texobj
->pp_txfilter
& TEXOBJ_TXFILTER_MASK
;
718 cmd
[TEX_PP_TXFORMAT
] &= ~TEXOBJ_TXFORMAT_MASK
;
719 cmd
[TEX_PP_TXFORMAT
] |= texobj
->pp_txformat
& TEXOBJ_TXFORMAT_MASK
;
720 cmd
[TEX_PP_TXOFFSET
] = texobj
->pp_txoffset
;
721 cmd
[TEX_PP_BORDER_COLOR
] = texobj
->pp_border_color
;
723 if (texobj
->base
.Target
== GL_TEXTURE_RECTANGLE_NV
) {
724 GLuint
*txr_cmd
= RADEON_DB_STATE( txr
[unit
] );
725 txr_cmd
[TXR_PP_TEX_SIZE
] = texobj
->pp_txsize
; /* NPOT only! */
726 txr_cmd
[TXR_PP_TEX_PITCH
] = texobj
->pp_txpitch
; /* NPOT only! */
727 RADEON_DB_STATECHANGE( rmesa
, &rmesa
->hw
.txr
[unit
] );
728 se_coord_fmt
|= RADEON_VTX_ST0_NONPARAMETRIC
<< unit
;
731 se_coord_fmt
&= ~(RADEON_VTX_ST0_NONPARAMETRIC
<< unit
);
733 if (texobj
->base
.Target
== GL_TEXTURE_CUBE_MAP
) {
734 uint32_t *cube_cmd
= &rmesa
->hw
.cube
[unit
].cmd
[CUBE_CMD_0
];
735 // GLuint bytesPerFace = texobj->base.totalSize / 6;
736 // ASSERT(texobj->base.totalSize % 6 == 0);
737 GLuint bytesPerFace
= 1; // TODO
739 RADEON_STATECHANGE( rmesa
, cube
[unit
] );
740 cube_cmd
[CUBE_PP_CUBIC_FACES
] = texobj
->pp_cubic_faces
;
741 /* dont know if this setup conforms to OpenGL..
742 * at least it matches the behavior of mesa software renderer
744 cube_cmd
[CUBE_PP_CUBIC_OFFSET_0
] = texobj
->pp_txoffset
; /* right */
745 cube_cmd
[CUBE_PP_CUBIC_OFFSET_1
] = texobj
->pp_txoffset
+ 1 * bytesPerFace
; /* left */
746 cube_cmd
[CUBE_PP_CUBIC_OFFSET_2
] = texobj
->pp_txoffset
+ 2 * bytesPerFace
; /* top */
747 cube_cmd
[CUBE_PP_CUBIC_OFFSET_3
] = texobj
->pp_txoffset
+ 3 * bytesPerFace
; /* bottom */
748 cube_cmd
[CUBE_PP_CUBIC_OFFSET_4
] = texobj
->pp_txoffset
+ 4 * bytesPerFace
; /* front */
749 cmd
[TEX_PP_TXOFFSET
] = texobj
->pp_txoffset
+ 5 * bytesPerFace
; /* back */
753 if (se_coord_fmt
!= rmesa
->hw
.set
.cmd
[SET_SE_COORDFMT
]) {
754 RADEON_STATECHANGE( rmesa
, set
);
755 rmesa
->hw
.set
.cmd
[SET_SE_COORDFMT
] = se_coord_fmt
;
758 texobj
->dirty_state
&= ~(1<<unit
);
760 rmesa
->radeon
.NewGLState
|= _NEW_TEXTURE_MATRIX
;
764 static void set_texgen_matrix( r100ContextPtr rmesa
,
766 const GLfloat
*s_plane
,
767 const GLfloat
*t_plane
,
768 const GLfloat
*r_plane
,
769 const GLfloat
*q_plane
)
771 rmesa
->TexGenMatrix
[unit
].m
[0] = s_plane
[0];
772 rmesa
->TexGenMatrix
[unit
].m
[4] = s_plane
[1];
773 rmesa
->TexGenMatrix
[unit
].m
[8] = s_plane
[2];
774 rmesa
->TexGenMatrix
[unit
].m
[12] = s_plane
[3];
776 rmesa
->TexGenMatrix
[unit
].m
[1] = t_plane
[0];
777 rmesa
->TexGenMatrix
[unit
].m
[5] = t_plane
[1];
778 rmesa
->TexGenMatrix
[unit
].m
[9] = t_plane
[2];
779 rmesa
->TexGenMatrix
[unit
].m
[13] = t_plane
[3];
781 rmesa
->TexGenMatrix
[unit
].m
[2] = r_plane
[0];
782 rmesa
->TexGenMatrix
[unit
].m
[6] = r_plane
[1];
783 rmesa
->TexGenMatrix
[unit
].m
[10] = r_plane
[2];
784 rmesa
->TexGenMatrix
[unit
].m
[14] = r_plane
[3];
786 rmesa
->TexGenMatrix
[unit
].m
[3] = q_plane
[0];
787 rmesa
->TexGenMatrix
[unit
].m
[7] = q_plane
[1];
788 rmesa
->TexGenMatrix
[unit
].m
[11] = q_plane
[2];
789 rmesa
->TexGenMatrix
[unit
].m
[15] = q_plane
[3];
791 rmesa
->TexGenEnabled
|= RADEON_TEXMAT_0_ENABLE
<< unit
;
792 rmesa
->radeon
.NewGLState
|= _NEW_TEXTURE_MATRIX
;
795 /* Returns GL_FALSE if fallback required.
797 static GLboolean
radeon_validate_texgen( GLcontext
*ctx
, GLuint unit
)
799 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
800 struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[unit
];
801 GLuint inputshift
= RADEON_TEXGEN_0_INPUT_SHIFT
+ unit
*4;
802 GLuint tmp
= rmesa
->TexGenEnabled
;
803 static const GLfloat reflect
[16] = {
809 rmesa
->TexGenEnabled
&= ~(RADEON_TEXGEN_TEXMAT_0_ENABLE
<< unit
);
810 rmesa
->TexGenEnabled
&= ~(RADEON_TEXMAT_0_ENABLE
<< unit
);
811 rmesa
->TexGenEnabled
&= ~(RADEON_TEXGEN_INPUT_MASK
<< inputshift
);
812 rmesa
->TexGenNeedNormals
[unit
] = 0;
814 if ((texUnit
->TexGenEnabled
& (S_BIT
|T_BIT
|R_BIT
|Q_BIT
)) == 0) {
815 /* Disabled, no fallback:
817 rmesa
->TexGenEnabled
|=
818 (RADEON_TEXGEN_INPUT_TEXCOORD_0
+ unit
) << inputshift
;
821 /* the r100 cannot do texgen for some coords and not for others
822 * we do not detect such cases (certainly can't do it here) and just
823 * ASSUME that when S and T are texgen enabled we do not need other
824 * non-texgen enabled coords, no matter if the R and Q bits are texgen
825 * enabled. Still check for mixed mode texgen for all coords.
827 else if ( (texUnit
->TexGenEnabled
& S_BIT
) &&
828 (texUnit
->TexGenEnabled
& T_BIT
) &&
829 (texUnit
->GenModeS
== texUnit
->GenModeT
) ) {
830 if ( ((texUnit
->TexGenEnabled
& R_BIT
) &&
831 (texUnit
->GenModeS
!= texUnit
->GenModeR
)) ||
832 ((texUnit
->TexGenEnabled
& Q_BIT
) &&
833 (texUnit
->GenModeS
!= texUnit
->GenModeQ
)) ) {
834 /* Mixed modes, fallback:
836 if (RADEON_DEBUG
& DEBUG_FALLBACKS
)
837 fprintf(stderr
, "fallback mixed texgen\n");
840 rmesa
->TexGenEnabled
|= RADEON_TEXGEN_TEXMAT_0_ENABLE
<< unit
;
843 /* some texgen mode not including both S and T bits */
844 if (RADEON_DEBUG
& DEBUG_FALLBACKS
)
845 fprintf(stderr
, "fallback mixed texgen/nontexgen\n");
849 if ((texUnit
->TexGenEnabled
& (R_BIT
| Q_BIT
)) != 0) {
850 /* need this here for vtxfmt presumably. Argh we need to set
851 this from way too many places, would be much easier if we could leave
852 tcl q coord always enabled as on r200) */
853 RADEON_STATECHANGE( rmesa
, tcl
);
854 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_Q_BIT(unit
);
857 switch (texUnit
->GenModeS
) {
858 case GL_OBJECT_LINEAR
:
859 rmesa
->TexGenEnabled
|= RADEON_TEXGEN_INPUT_OBJ
<< inputshift
;
860 set_texgen_matrix( rmesa
, unit
,
861 texUnit
->ObjectPlaneS
,
862 texUnit
->ObjectPlaneT
,
863 texUnit
->ObjectPlaneR
,
864 texUnit
->ObjectPlaneQ
);
868 rmesa
->TexGenEnabled
|= RADEON_TEXGEN_INPUT_EYE
<< inputshift
;
869 set_texgen_matrix( rmesa
, unit
,
876 case GL_REFLECTION_MAP_NV
:
877 rmesa
->TexGenNeedNormals
[unit
] = GL_TRUE
;
878 rmesa
->TexGenEnabled
|= RADEON_TEXGEN_INPUT_EYE_REFLECT
<< inputshift
;
879 /* TODO: unknown if this is needed/correct */
880 set_texgen_matrix( rmesa
, unit
, reflect
, reflect
+ 4,
881 reflect
+ 8, reflect
+ 12 );
884 case GL_NORMAL_MAP_NV
:
885 rmesa
->TexGenNeedNormals
[unit
] = GL_TRUE
;
886 rmesa
->TexGenEnabled
|= RADEON_TEXGEN_INPUT_EYE_NORMAL
<< inputshift
;
890 /* the mode which everyone uses :-( */
892 /* Unsupported mode, fallback:
894 if (RADEON_DEBUG
& DEBUG_FALLBACKS
)
895 fprintf(stderr
, "fallback GL_SPHERE_MAP\n");
899 if (tmp
!= rmesa
->TexGenEnabled
) {
900 rmesa
->radeon
.NewGLState
|= _NEW_TEXTURE_MATRIX
;
907 * Compute the cached hardware register values for the given texture object.
909 * \param rmesa Context pointer
910 * \param t the r300 texture object
912 static GLboolean
setup_hardware_state(r100ContextPtr rmesa
, radeonTexObj
*t
, int unit
)
914 const struct gl_texture_image
*firstImage
;
915 GLint log2Width
, log2Height
, log2Depth
, texelBytes
;
917 firstImage
= t
->base
.Image
[0][t
->mt
->firstLevel
];
919 if (firstImage
->Border
> 0) {
920 fprintf(stderr
, "%s: border\n", __FUNCTION__
);
924 log2Width
= firstImage
->WidthLog2
;
925 log2Height
= firstImage
->HeightLog2
;
926 log2Depth
= firstImage
->DepthLog2
;
927 texelBytes
= firstImage
->TexFormat
->TexelBytes
;
929 if (!t
->image_override
) {
930 if (VALID_FORMAT(firstImage
->TexFormat
->MesaFormat
)) {
931 const struct tx_table
*table
= tx_table
;
933 t
->pp_txformat
&= ~(RADEON_TXFORMAT_FORMAT_MASK
|
934 RADEON_TXFORMAT_ALPHA_IN_MAP
);
935 t
->pp_txfilter
&= ~RADEON_YUV_TO_RGB
;
937 t
->pp_txformat
|= table
[ firstImage
->TexFormat
->MesaFormat
].format
;
938 t
->pp_txfilter
|= table
[ firstImage
->TexFormat
->MesaFormat
].filter
;
940 _mesa_problem(NULL
, "unexpected texture format in %s",
946 t
->pp_txfilter
&= ~RADEON_MAX_MIP_LEVEL_MASK
;
947 t
->pp_txfilter
|= (t
->mt
->lastLevel
- t
->mt
->firstLevel
) << RADEON_MAX_MIP_LEVEL_SHIFT
;
949 t
->pp_txformat
&= ~(RADEON_TXFORMAT_WIDTH_MASK
|
950 RADEON_TXFORMAT_HEIGHT_MASK
|
951 RADEON_TXFORMAT_CUBIC_MAP_ENABLE
|
952 RADEON_TXFORMAT_F5_WIDTH_MASK
|
953 RADEON_TXFORMAT_F5_HEIGHT_MASK
);
954 t
->pp_txformat
|= ((log2Width
<< RADEON_TXFORMAT_WIDTH_SHIFT
) |
955 (log2Height
<< RADEON_TXFORMAT_HEIGHT_SHIFT
));
959 if (t
->base
.Target
== GL_TEXTURE_CUBE_MAP
) {
960 ASSERT(log2Width
== log2Height
);
961 t
->pp_txformat
|= ((log2Width
<< RADEON_TXFORMAT_F5_WIDTH_SHIFT
) |
962 (log2Height
<< RADEON_TXFORMAT_F5_HEIGHT_SHIFT
) |
963 /* don't think we need this bit, if it exists at all - fglrx does not set it */
964 (RADEON_TXFORMAT_CUBIC_MAP_ENABLE
));
965 t
->pp_cubic_faces
= ((log2Width
<< RADEON_FACE_WIDTH_1_SHIFT
) |
966 (log2Height
<< RADEON_FACE_HEIGHT_1_SHIFT
) |
967 (log2Width
<< RADEON_FACE_WIDTH_2_SHIFT
) |
968 (log2Height
<< RADEON_FACE_HEIGHT_2_SHIFT
) |
969 (log2Width
<< RADEON_FACE_WIDTH_3_SHIFT
) |
970 (log2Height
<< RADEON_FACE_HEIGHT_3_SHIFT
) |
971 (log2Width
<< RADEON_FACE_WIDTH_4_SHIFT
) |
972 (log2Height
<< RADEON_FACE_HEIGHT_4_SHIFT
));
975 t
->pp_txsize
= (((firstImage
->Width
- 1) << RADEON_TEX_USIZE_SHIFT
)
976 | ((firstImage
->Height
- 1) << RADEON_TEX_VSIZE_SHIFT
));
978 if ( !t
->image_override
) {
979 if (firstImage
->IsCompressed
)
980 t
->pp_txpitch
= (firstImage
->Width
+ 63) & ~(63);
982 t
->pp_txpitch
= ((firstImage
->Width
* texelBytes
) + 63) & ~(63);
986 if (t
->base
.Target
== GL_TEXTURE_RECTANGLE_NV
) {
987 t
->pp_txformat
|= RADEON_TXFORMAT_NON_POWER2
;
992 static GLboolean
radeon_validate_texture(GLcontext
*ctx
, struct gl_texture_object
*texObj
, int unit
)
994 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
995 radeonTexObj
*t
= radeon_tex_obj(texObj
);
998 if (!radeon_validate_texture_miptree(ctx
, texObj
))
1001 /* yuv conversion only works in first unit */
1002 if (unit
!= 0 && (t
->pp_txfilter
& RADEON_YUV_TO_RGB
))
1006 ret
= setup_hardware_state(rmesa
, t
, unit
);
1007 if (ret
== GL_FALSE
)
1010 RADEON_STATECHANGE( rmesa
, ctx
);
1011 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] |=
1012 (RADEON_TEX_0_ENABLE
| RADEON_TEX_BLEND_0_ENABLE
) << unit
;
1014 RADEON_STATECHANGE( rmesa
, tcl
);
1015 rmesa
->hw
.tcl
.cmd
[TCL_OUTPUT_VTXFMT
] |= RADEON_ST_BIT(unit
);
1017 rmesa
->recheck_texgen
[unit
] = GL_TRUE
;
1019 if (t
->dirty_state
& (1<<unit
)) {
1020 import_tex_obj_state( rmesa
, unit
, t
);
1023 if (rmesa
->recheck_texgen
[unit
]) {
1024 GLboolean fallback
= !radeon_validate_texgen( ctx
, unit
);
1025 TCL_FALLBACK( ctx
, (RADEON_TCL_FALLBACK_TEXGEN_0
<<unit
), fallback
);
1026 rmesa
->recheck_texgen
[unit
] = 0;
1027 rmesa
->radeon
.NewGLState
|= _NEW_TEXTURE_MATRIX
;
1030 if ( ! radeonUpdateTextureEnv( ctx
, unit
) ) {
1033 FALLBACK( rmesa
, RADEON_FALLBACK_BORDER_MODE
, t
->border_fallback
);
1035 t
->validated
= GL_TRUE
;
1036 return !t
->border_fallback
;
1039 static GLboolean
radeonUpdateTextureUnit( GLcontext
*ctx
, int unit
)
1041 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1042 struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[unit
];
1045 if (ctx
->Texture
.Unit
[unit
]._ReallyEnabled
& TEXTURE_3D_BIT
) {
1049 if (!ctx
->Texture
.Unit
[unit
]._ReallyEnabled
) {
1050 /* disable the unit */
1051 disable_tex_obj_state(rmesa
, unit
);
1055 if (!radeon_validate_texture(ctx
, ctx
->Texture
.Unit
[unit
]._Current
, unit
)) {
1057 "failed to validate texture for unit %d.\n",
1059 rmesa
->state
.texture
.unit
[unit
].texobj
= NULL
;
1062 rmesa
->state
.texture
.unit
[unit
].texobj
= radeon_tex_obj(ctx
->Texture
.Unit
[unit
]._Current
);
1066 void radeonUpdateTextureState( GLcontext
*ctx
)
1068 r100ContextPtr rmesa
= R100_CONTEXT(ctx
);
1071 /* set the ctx all textures off */
1072 RADEON_STATECHANGE( rmesa
, ctx
);
1073 rmesa
->hw
.ctx
.cmd
[CTX_PP_CNTL
] &= ~((RADEON_TEX_ENABLE_MASK
) | (RADEON_TEX_BLEND_ENABLE_MASK
));
1075 ok
= (radeonUpdateTextureUnit( ctx
, 0 ) &&
1076 radeonUpdateTextureUnit( ctx
, 1 ) &&
1077 radeonUpdateTextureUnit( ctx
, 2 ));
1079 FALLBACK( rmesa
, RADEON_FALLBACK_TEXTURE
, !ok
);
1081 if (rmesa
->radeon
.TclFallback
)
1082 radeonChooseVertexState( ctx
);