src/mesa/drivers/dri/radeon/radeon_texture.c

   1 /*
   2  * Copyright (C) 2008 Nicolai Haehnle.
   3  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   4  *
   5  * The Weather Channel (TM) funded Tungsten Graphics to develop the
   6  * initial release of the Radeon 8500 driver under the XFree86 license.
   7  * This notice must be preserved.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining
  10  * a copy of this software and associated documentation files (the
  11  * "Software"), to deal in the Software without restriction, including
  12  * without limitation the rights to use, copy, modify, merge, publish,
  13  * distribute, sublicense, and/or sell copies of the Software, and to
  14  * permit persons to whom the Software is furnished to do so, subject to
  15  * the following conditions:
  16  *
  17  * The above copyright notice and this permission notice (including the
  18  * next paragraph) shall be included in all copies or substantial
  19  * portions of the Software.
  20  *
  21  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  22  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  23  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  24  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  25  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  26  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  27  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  28  *
  29  */
  30
  31 #include "main/glheader.h"
  32 #include "main/imports.h"
  33 #include "main/context.h"
  34 #include "main/convolve.h"
  35 #include "main/mipmap.h"
  36 #include "main/texcompress.h"
  37 #include "main/texformat.h"
  38 #include "main/texstore.h"
  39 #include "main/teximage.h"
  40 #include "main/texobj.h"
  41
  42 #include "xmlpool.h"            /* for symbolic values of enum-type options */
  43
  44 #include "radeon_common.h"
  45
  46 #include "radeon_mipmap_tree.h"
  47
  48
  49 static void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride,
  50         GLuint numrows, GLuint rowsize)
  51 {
  52         assert(rowsize <= dststride);
  53         assert(rowsize <= srcstride);
  54
  55         if (rowsize == srcstride && rowsize == dststride) {
  56                 memcpy(dst, src, numrows*rowsize);
  57         } else {
  58                 GLuint i;
  59                 for(i = 0; i < numrows; ++i) {
  60                         memcpy(dst, src, rowsize);
  61                         dst += dststride;
  62                         src += srcstride;
  63                 }
  64         }
  65 }
  66
  67 /* textures */
  68 /**
  69  * Allocate an empty texture image object.
  70  */
  71 struct gl_texture_image *radeonNewTextureImage(GLcontext *ctx)
  72 {
  73         return CALLOC(sizeof(radeon_texture_image));
  74 }
  75
  76 /**
  77  * Free memory associated with this texture image.
  78  */
  79 void radeonFreeTexImageData(GLcontext *ctx, struct gl_texture_image *timage)
  80 {
  81         radeon_texture_image* image = get_radeon_texture_image(timage);
  82
  83         if (image->mt) {
  84                 radeon_miptree_unreference(image->mt);
  85                 image->mt = 0;
  86                 assert(!image->base.Data);
  87         } else {
  88                 _mesa_free_texture_image_data(ctx, timage);
  89         }
  90         if (image->bo) {
  91                 radeon_bo_unref(image->bo);
  92                 image->bo = NULL;
  93         }
  94         if (timage->Data) {
  95                 _mesa_free_texmemory(timage->Data);
  96                 timage->Data = NULL;
  97         }
  98 }
  99
 100 /* Set Data pointer and additional data for mapped texture image */
 101 static void teximage_set_map_data(radeon_texture_image *image)
 102 {
 103         radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
 104
 105         image->base.Data = image->mt->bo->ptr + lvl->faces[image->mtface].offset;
 106         image->base.RowStride = lvl->rowstride / image->mt->bpp;
 107 }
 108
 109
 110 /**
 111  * Map a single texture image for glTexImage and friends.
 112  */
 113 void radeon_teximage_map(radeon_texture_image *image, GLboolean write_enable)
 114 {
 115         if (image->mt) {
 116                 assert(!image->base.Data);
 117
 118                 radeon_bo_map(image->mt->bo, write_enable);
 119                 teximage_set_map_data(image);
 120         }
 121 }
 122
 123
 124 void radeon_teximage_unmap(radeon_texture_image *image)
 125 {
 126         if (image->mt) {
 127                 assert(image->base.Data);
 128
 129                 image->base.Data = 0;
 130                 radeon_bo_unmap(image->mt->bo);
 131         }
 132 }
 133
 134 static void map_override(GLcontext *ctx, radeonTexObj *t)
 135 {
 136         radeon_texture_image *img = get_radeon_texture_image(t->base.Image[0][0]);
 137
 138         radeon_bo_map(t->bo, GL_FALSE);
 139
 140         img->base.Data = t->bo->ptr;
 141         _mesa_set_fetch_functions(&img->base, 2);
 142 }
 143
 144 static void unmap_override(GLcontext *ctx, radeonTexObj *t)
 145 {
 146         radeon_texture_image *img = get_radeon_texture_image(t->base.Image[0][0]);
 147
 148         radeon_bo_unmap(t->bo);
 149
 150         img->base.Data = NULL;
 151 }
 152
 153 /**
 154  * Map a validated texture for reading during software rendering.
 155  */
 156 void radeonMapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
 157 {
 158         radeonTexObj* t = radeon_tex_obj(texObj);
 159         int face, level;
 160
 161         if (!radeon_validate_texture_miptree(ctx, texObj))
 162           return;
 163
 164         /* for r100 3D sw fallbacks don't have mt */
 165         if (t->image_override && t->bo)
 166                 map_override(ctx, t);
 167
 168         if (!t->mt)
 169                 return;
 170
 171         radeon_bo_map(t->mt->bo, GL_FALSE);
 172         for(face = 0; face < t->mt->faces; ++face) {
 173                 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level)
 174                         teximage_set_map_data(get_radeon_texture_image(texObj->Image[face][level]));
 175         }
 176 }
 177
 178 void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
 179 {
 180         radeonTexObj* t = radeon_tex_obj(texObj);
 181         int face, level;
 182
 183         if (t->image_override && t->bo)
 184                 unmap_override(ctx, t);
 185         /* for r100 3D sw fallbacks don't have mt */
 186         if (!t->mt)
 187           return;
 188
 189         for(face = 0; face < t->mt->faces; ++face) {
 190                 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level)
 191                         texObj->Image[face][level]->Data = 0;
 192         }
 193         radeon_bo_unmap(t->mt->bo);
 194 }
 195
 196 GLuint radeon_face_for_target(GLenum target)
 197 {
 198         switch (target) {
 199         case GL_TEXTURE_CUBE_MAP_POSITIVE_X:
 200         case GL_TEXTURE_CUBE_MAP_NEGATIVE_X:
 201         case GL_TEXTURE_CUBE_MAP_POSITIVE_Y:
 202         case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y:
 203         case GL_TEXTURE_CUBE_MAP_POSITIVE_Z:
 204         case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z:
 205                 return (GLuint) target - (GLuint) GL_TEXTURE_CUBE_MAP_POSITIVE_X;
 206         default:
 207                 return 0;
 208         }
 209 }
 210
 211 /**
 212  * Wraps Mesa's implementation to ensure that the base level image is mapped.
 213  *
 214  * This relies on internal details of _mesa_generate_mipmap, in particular
 215  * the fact that the memory for recreated texture images is always freed.
 216  */
 217 static void radeon_generate_mipmap(GLcontext *ctx, GLenum target,
 218                                    struct gl_texture_object *texObj)
 219 {
 220         radeonTexObj* t = radeon_tex_obj(texObj);
 221         GLuint nr_faces = (t->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1;
 222         int i, face;
 223
 224
 225         _mesa_generate_mipmap(ctx, target, texObj);
 226
 227         for (face = 0; face < nr_faces; face++) {
 228                 for (i = texObj->BaseLevel + 1; i < texObj->MaxLevel; i++) {
 229                         radeon_texture_image *image;
 230
 231                         image = get_radeon_texture_image(texObj->Image[face][i]);
 232
 233                         if (image == NULL)
 234                                 break;
 235
 236                         image->mtlevel = i;
 237                         image->mtface = face;
 238
 239                         radeon_miptree_unreference(image->mt);
 240                         image->mt = NULL;
 241                 }
 242         }
 243
 244 }
 245
 246 void radeonGenerateMipmap(GLcontext* ctx, GLenum target, struct gl_texture_object *texObj)
 247 {
 248         GLuint face = radeon_face_for_target(target);
 249         radeon_texture_image *baseimage = get_radeon_texture_image(texObj->Image[face][texObj->BaseLevel]);
 250
 251         radeon_teximage_map(baseimage, GL_FALSE);
 252         radeon_generate_mipmap(ctx, target, texObj);
 253         radeon_teximage_unmap(baseimage);
 254 }
 255
 256
 257 /* try to find a format which will only need a memcopy */
 258 static const struct gl_texture_format *radeonChoose8888TexFormat(radeonContextPtr rmesa,
 259                                                                  GLenum srcFormat,
 260                                                                  GLenum srcType)
 261 {
 262         const GLuint ui = 1;
 263         const GLubyte littleEndian = *((const GLubyte *)&ui);
 264
 265         /* r100 can only do this */
 266         if (IS_R100_CLASS(rmesa->radeonScreen))
 267           return _dri_texformat_argb8888;
 268
 269         if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8) ||
 270             (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && !littleEndian) ||
 271             (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) ||
 272             (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && littleEndian)) {
 273                 return &_mesa_texformat_rgba8888;
 274         } else if ((srcFormat == GL_RGBA && srcType == GL_UNSIGNED_INT_8_8_8_8_REV) ||
 275                    (srcFormat == GL_RGBA && srcType == GL_UNSIGNED_BYTE && littleEndian) ||
 276                    (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_INT_8_8_8_8) ||
 277                    (srcFormat == GL_ABGR_EXT && srcType == GL_UNSIGNED_BYTE && !littleEndian)) {
 278                 return &_mesa_texformat_rgba8888_rev;
 279         } else if (IS_R200_CLASS(rmesa->radeonScreen)) {
 280                 return _dri_texformat_argb8888;
 281         } else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && !littleEndian) ||
 282                                             srcType == GL_UNSIGNED_INT_8_8_8_8)) {
 283                 return &_mesa_texformat_argb8888_rev;
 284         } else if (srcFormat == GL_BGRA && ((srcType == GL_UNSIGNED_BYTE && littleEndian) ||
 285                                             srcType == GL_UNSIGNED_INT_8_8_8_8_REV)) {
 286                 return &_mesa_texformat_argb8888;
 287         } else
 288                 return _dri_texformat_argb8888;
 289 }
 290
 291 const struct gl_texture_format *radeonChooseTextureFormat(GLcontext * ctx,
 292                                                           GLint internalFormat,
 293                                                           GLenum format,
 294                                                           GLenum type)
 295 {
 296         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 297         const GLboolean do32bpt =
 298             (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_32);
 299         const GLboolean force16bpt =
 300             (rmesa->texture_depth == DRI_CONF_TEXTURE_DEPTH_FORCE_16);
 301         (void)format;
 302
 303 #if 0
 304         fprintf(stderr, "InternalFormat=%s(%d) type=%s format=%s\n",
 305                 _mesa_lookup_enum_by_nr(internalFormat), internalFormat,
 306                 _mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format));
 307         fprintf(stderr, "do32bpt=%d force16bpt=%d\n", do32bpt, force16bpt);
 308 #endif
 309
 310         switch (internalFormat) {
 311         case 4:
 312         case GL_RGBA:
 313         case GL_COMPRESSED_RGBA:
 314                 switch (type) {
 315                 case GL_UNSIGNED_INT_10_10_10_2:
 316                 case GL_UNSIGNED_INT_2_10_10_10_REV:
 317                         return do32bpt ? _dri_texformat_argb8888 :
 318                             _dri_texformat_argb1555;
 319                 case GL_UNSIGNED_SHORT_4_4_4_4:
 320                 case GL_UNSIGNED_SHORT_4_4_4_4_REV:
 321                         return _dri_texformat_argb4444;
 322                 case GL_UNSIGNED_SHORT_5_5_5_1:
 323                 case GL_UNSIGNED_SHORT_1_5_5_5_REV:
 324                         return _dri_texformat_argb1555;
 325                 default:
 326                         return do32bpt ? radeonChoose8888TexFormat(rmesa, format, type) :
 327                             _dri_texformat_argb4444;
 328                 }
 329
 330         case 3:
 331         case GL_RGB:
 332         case GL_COMPRESSED_RGB:
 333                 switch (type) {
 334                 case GL_UNSIGNED_SHORT_4_4_4_4:
 335                 case GL_UNSIGNED_SHORT_4_4_4_4_REV:
 336                         return _dri_texformat_argb4444;
 337                 case GL_UNSIGNED_SHORT_5_5_5_1:
 338                 case GL_UNSIGNED_SHORT_1_5_5_5_REV:
 339                         return _dri_texformat_argb1555;
 340                 case GL_UNSIGNED_SHORT_5_6_5:
 341                 case GL_UNSIGNED_SHORT_5_6_5_REV:
 342                         return _dri_texformat_rgb565;
 343                 default:
 344                         return do32bpt ? _dri_texformat_argb8888 :
 345                             _dri_texformat_rgb565;
 346                 }
 347
 348         case GL_RGBA8:
 349         case GL_RGB10_A2:
 350         case GL_RGBA12:
 351         case GL_RGBA16:
 352                 return !force16bpt ?
 353                         radeonChoose8888TexFormat(rmesa, format,type) :
 354                         _dri_texformat_argb4444;
 355
 356         case GL_RGBA4:
 357         case GL_RGBA2:
 358                 return _dri_texformat_argb4444;
 359
 360         case GL_RGB5_A1:
 361                 return _dri_texformat_argb1555;
 362
 363         case GL_RGB8:
 364         case GL_RGB10:
 365         case GL_RGB12:
 366         case GL_RGB16:
 367                 return !force16bpt ? _dri_texformat_argb8888 :
 368                     _dri_texformat_rgb565;
 369
 370         case GL_RGB5:
 371         case GL_RGB4:
 372         case GL_R3_G3_B2:
 373                 return _dri_texformat_rgb565;
 374
 375         case GL_ALPHA:
 376         case GL_ALPHA4:
 377         case GL_ALPHA8:
 378         case GL_ALPHA12:
 379         case GL_ALPHA16:
 380         case GL_COMPRESSED_ALPHA:
 381                 /* r200: can't use a8 format since interpreting hw I8 as a8 would result
 382                    in wrong rgb values (same as alpha value instead of 0). */
 383                 if (IS_R200_CLASS(rmesa->radeonScreen))
 384                         return _dri_texformat_al88;
 385                 else
 386                         return _dri_texformat_a8;
 387         case 1:
 388         case GL_LUMINANCE:
 389         case GL_LUMINANCE4:
 390         case GL_LUMINANCE8:
 391         case GL_LUMINANCE12:
 392         case GL_LUMINANCE16:
 393         case GL_COMPRESSED_LUMINANCE:
 394                 return _dri_texformat_l8;
 395
 396         case 2:
 397         case GL_LUMINANCE_ALPHA:
 398         case GL_LUMINANCE4_ALPHA4:
 399         case GL_LUMINANCE6_ALPHA2:
 400         case GL_LUMINANCE8_ALPHA8:
 401         case GL_LUMINANCE12_ALPHA4:
 402         case GL_LUMINANCE12_ALPHA12:
 403         case GL_LUMINANCE16_ALPHA16:
 404         case GL_COMPRESSED_LUMINANCE_ALPHA:
 405                 return _dri_texformat_al88;
 406
 407         case GL_INTENSITY:
 408         case GL_INTENSITY4:
 409         case GL_INTENSITY8:
 410         case GL_INTENSITY12:
 411         case GL_INTENSITY16:
 412         case GL_COMPRESSED_INTENSITY:
 413                 return _dri_texformat_i8;
 414
 415         case GL_YCBCR_MESA:
 416                 if (type == GL_UNSIGNED_SHORT_8_8_APPLE ||
 417                     type == GL_UNSIGNED_BYTE)
 418                         return &_mesa_texformat_ycbcr;
 419                 else
 420                         return &_mesa_texformat_ycbcr_rev;
 421
 422         case GL_RGB_S3TC:
 423         case GL_RGB4_S3TC:
 424         case GL_COMPRESSED_RGB_S3TC_DXT1_EXT:
 425                 return &_mesa_texformat_rgb_dxt1;
 426
 427         case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT:
 428                 return &_mesa_texformat_rgba_dxt1;
 429
 430         case GL_RGBA_S3TC:
 431         case GL_RGBA4_S3TC:
 432         case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT:
 433                 return &_mesa_texformat_rgba_dxt3;
 434
 435         case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT:
 436                 return &_mesa_texformat_rgba_dxt5;
 437
 438         case GL_ALPHA16F_ARB:
 439                 return &_mesa_texformat_alpha_float16;
 440         case GL_ALPHA32F_ARB:
 441                 return &_mesa_texformat_alpha_float32;
 442         case GL_LUMINANCE16F_ARB:
 443                 return &_mesa_texformat_luminance_float16;
 444         case GL_LUMINANCE32F_ARB:
 445                 return &_mesa_texformat_luminance_float32;
 446         case GL_LUMINANCE_ALPHA16F_ARB:
 447                 return &_mesa_texformat_luminance_alpha_float16;
 448         case GL_LUMINANCE_ALPHA32F_ARB:
 449                 return &_mesa_texformat_luminance_alpha_float32;
 450         case GL_INTENSITY16F_ARB:
 451                 return &_mesa_texformat_intensity_float16;
 452         case GL_INTENSITY32F_ARB:
 453                 return &_mesa_texformat_intensity_float32;
 454         case GL_RGB16F_ARB:
 455                 return &_mesa_texformat_rgba_float16;
 456         case GL_RGB32F_ARB:
 457                 return &_mesa_texformat_rgba_float32;
 458         case GL_RGBA16F_ARB:
 459                 return &_mesa_texformat_rgba_float16;
 460         case GL_RGBA32F_ARB:
 461                 return &_mesa_texformat_rgba_float32;
 462
 463         case GL_DEPTH_COMPONENT:
 464         case GL_DEPTH_COMPONENT16:
 465         case GL_DEPTH_COMPONENT24:
 466         case GL_DEPTH_COMPONENT32:
 467         case GL_DEPTH_STENCIL_EXT:
 468         case GL_DEPTH24_STENCIL8_EXT:
 469                 return &_mesa_texformat_s8_z24;
 470         default:
 471                 _mesa_problem(ctx,
 472                               "unexpected internalFormat 0x%x in %s",
 473                               (int)internalFormat, __func__);
 474                 return NULL;
 475         }
 476
 477         return NULL;            /* never get here */
 478 }
 479
 480 /**
 481  * All glTexImage calls go through this function.
 482  */
 483 static void radeon_teximage(
 484         GLcontext *ctx, int dims,
 485         GLint face, GLint level,
 486         GLint internalFormat,
 487         GLint width, GLint height, GLint depth,
 488         GLsizei imageSize,
 489         GLenum format, GLenum type, const GLvoid * pixels,
 490         const struct gl_pixelstore_attrib *packing,
 491         struct gl_texture_object *texObj,
 492         struct gl_texture_image *texImage,
 493         int compressed)
 494 {
 495         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 496         radeonTexObj* t = radeon_tex_obj(texObj);
 497         radeon_texture_image* image = get_radeon_texture_image(texImage);
 498         GLuint dstRowStride;
 499         GLint postConvWidth = width;
 500         GLint postConvHeight = height;
 501         GLuint texelBytes;
 502
 503         radeon_firevertices(rmesa);
 504
 505         t->validated = GL_FALSE;
 506
 507         if (ctx->_ImageTransferState & IMAGE_CONVOLUTION_BIT) {
 508                _mesa_adjust_image_for_convolution(ctx, dims, &postConvWidth,
 509                                                   &postConvHeight);
 510         }
 511
 512         /* Choose and fill in the texture format for this image */
 513         texImage->TexFormat = radeonChooseTextureFormat(ctx, internalFormat, format, type);
 514         _mesa_set_fetch_functions(texImage, dims);
 515
 516         if (texImage->TexFormat->TexelBytes == 0) {
 517                 texelBytes = 0;
 518                 texImage->IsCompressed = GL_TRUE;
 519                 texImage->CompressedSize =
 520                         ctx->Driver.CompressedTextureSize(ctx, texImage->Width,
 521                                            texImage->Height, texImage->Depth,
 522                                            texImage->TexFormat->MesaFormat);
 523         } else {
 524                 texImage->IsCompressed = GL_FALSE;
 525                 texImage->CompressedSize = 0;
 526
 527                 texelBytes = texImage->TexFormat->TexelBytes;
 528                 /* Minimum pitch of 32 bytes */
 529                 if (postConvWidth * texelBytes < 32) {
 530                   postConvWidth = 32 / texelBytes;
 531                   texImage->RowStride = postConvWidth;
 532                 }
 533                 if (!image->mt) {
 534                         assert(texImage->RowStride == postConvWidth);
 535                 }
 536         }
 537
 538         /* Allocate memory for image */
 539         radeonFreeTexImageData(ctx, texImage); /* Mesa core only clears texImage->Data but not image->mt */
 540
 541         if (t->mt &&
 542             t->mt->firstLevel == level &&
 543             t->mt->lastLevel == level &&
 544             t->mt->target != GL_TEXTURE_CUBE_MAP_ARB &&
 545             !radeon_miptree_matches_image(t->mt, texImage, face, level)) {
 546           radeon_miptree_unreference(t->mt);
 547           t->mt = NULL;
 548         }
 549
 550         if (!t->mt)
 551                 radeon_try_alloc_miptree(rmesa, t, texImage, face, level);
 552         if (t->mt && radeon_miptree_matches_image(t->mt, texImage, face, level)) {
 553                 radeon_mipmap_level *lvl;
 554                 image->mt = t->mt;
 555                 image->mtlevel = level - t->mt->firstLevel;
 556                 image->mtface = face;
 557                 radeon_miptree_reference(t->mt);
 558                 lvl = &image->mt->levels[image->mtlevel];
 559                 dstRowStride = lvl->rowstride;
 560         } else {
 561                 int size;
 562                 if (texImage->IsCompressed) {
 563                         size = texImage->CompressedSize;
 564                 } else {
 565                         size = texImage->Width * texImage->Height * texImage->Depth * texImage->TexFormat->TexelBytes;
 566                 }
 567                 texImage->Data = _mesa_alloc_texmemory(size);
 568         }
 569
 570         /* Upload texture image; note that the spec allows pixels to be NULL */
 571         if (compressed) {
 572                 pixels = _mesa_validate_pbo_compressed_teximage(
 573                         ctx, imageSize, pixels, packing, "glCompressedTexImage");
 574         } else {
 575                 pixels = _mesa_validate_pbo_teximage(
 576                         ctx, dims, width, height, depth,
 577                         format, type, pixels, packing, "glTexImage");
 578         }
 579
 580         if (pixels) {
 581                 radeon_teximage_map(image, GL_TRUE);
 582
 583                 if (compressed) {
 584                         memcpy(texImage->Data, pixels, imageSize);
 585                 } else {
 586                         GLuint dstRowStride;
 587                         if (image->mt) {
 588                                 radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
 589                                 dstRowStride = lvl->rowstride;
 590                         } else {
 591                                 dstRowStride = texImage->Width * texImage->TexFormat->TexelBytes;
 592                         }
 593
 594                         if (!texImage->TexFormat->StoreImage(ctx, dims,
 595                                                 texImage->_BaseFormat,
 596                                                 texImage->TexFormat,
 597                                                 texImage->Data, 0, 0, 0, /* dstX/Y/Zoffset */
 598                                                 dstRowStride,
 599                                                 texImage->ImageOffsets,
 600                                                 width, height, depth,
 601                                                 format, type, pixels, packing))
 602                                 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage");
 603                 }
 604
 605         }
 606
 607         /* SGIS_generate_mipmap */
 608         if (level == texObj->BaseLevel && texObj->GenerateMipmap) {
 609                 radeon_generate_mipmap(ctx, texObj->Target, texObj);
 610         }
 611
 612         _mesa_unmap_teximage_pbo(ctx, packing);
 613
 614         if (pixels)
 615           radeon_teximage_unmap(image);
 616
 617
 618 }
 619
 620 void radeonTexImage1D(GLcontext * ctx, GLenum target, GLint level,
 621                       GLint internalFormat,
 622                       GLint width, GLint border,
 623                       GLenum format, GLenum type, const GLvoid * pixels,
 624                       const struct gl_pixelstore_attrib *packing,
 625                       struct gl_texture_object *texObj,
 626                       struct gl_texture_image *texImage)
 627 {
 628         radeon_teximage(ctx, 1, 0, level, internalFormat, width, 1, 1,
 629                 0, format, type, pixels, packing, texObj, texImage, 0);
 630 }
 631
 632 void radeonTexImage2D(GLcontext * ctx, GLenum target, GLint level,
 633                            GLint internalFormat,
 634                            GLint width, GLint height, GLint border,
 635                            GLenum format, GLenum type, const GLvoid * pixels,
 636                            const struct gl_pixelstore_attrib *packing,
 637                            struct gl_texture_object *texObj,
 638                            struct gl_texture_image *texImage)
 639
 640 {
 641         GLuint face = radeon_face_for_target(target);
 642
 643         radeon_teximage(ctx, 2, face, level, internalFormat, width, height, 1,
 644                 0, format, type, pixels, packing, texObj, texImage, 0);
 645 }
 646
 647 void radeonCompressedTexImage2D(GLcontext * ctx, GLenum target,
 648                                      GLint level, GLint internalFormat,
 649                                      GLint width, GLint height, GLint border,
 650                                      GLsizei imageSize, const GLvoid * data,
 651                                      struct gl_texture_object *texObj,
 652                                      struct gl_texture_image *texImage)
 653 {
 654         GLuint face = radeon_face_for_target(target);
 655
 656         radeon_teximage(ctx, 2, face, level, internalFormat, width, height, 1,
 657                 imageSize, 0, 0, data, &ctx->Unpack, texObj, texImage, 1);
 658 }
 659
 660 void radeonTexImage3D(GLcontext * ctx, GLenum target, GLint level,
 661                       GLint internalFormat,
 662                       GLint width, GLint height, GLint depth,
 663                       GLint border,
 664                       GLenum format, GLenum type, const GLvoid * pixels,
 665                       const struct gl_pixelstore_attrib *packing,
 666                       struct gl_texture_object *texObj,
 667                       struct gl_texture_image *texImage)
 668 {
 669         radeon_teximage(ctx, 3, 0, level, internalFormat, width, height, depth,
 670                 0, format, type, pixels, packing, texObj, texImage, 0);
 671 }
 672
 673 /**
 674  * Update a subregion of the given texture image.
 675  */
 676 static void radeon_texsubimage(GLcontext* ctx, int dims, int level,
 677                 GLint xoffset, GLint yoffset, GLint zoffset,
 678                 GLsizei width, GLsizei height, GLsizei depth,
 679                 GLsizei imageSize,
 680                 GLenum format, GLenum type,
 681                 const GLvoid * pixels,
 682                 const struct gl_pixelstore_attrib *packing,
 683                 struct gl_texture_object *texObj,
 684                 struct gl_texture_image *texImage,
 685                 int compressed)
 686 {
 687         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 688         radeonTexObj* t = radeon_tex_obj(texObj);
 689         radeon_texture_image* image = get_radeon_texture_image(texImage);
 690
 691         radeon_firevertices(rmesa);
 692
 693         t->validated = GL_FALSE;
 694         if (compressed) {
 695                 pixels = _mesa_validate_pbo_compressed_teximage(
 696                         ctx, imageSize, pixels, packing, "glCompressedTexImage");
 697         } else {
 698                 pixels = _mesa_validate_pbo_teximage(ctx, dims,
 699                         width, height, depth, format, type, pixels, packing, "glTexSubImage1D");
 700         }
 701
 702         if (pixels) {
 703                 GLint dstRowStride;
 704                 radeon_teximage_map(image, GL_TRUE);
 705
 706                 if (image->mt) {
 707                         radeon_mipmap_level *lvl = &image->mt->levels[image->mtlevel];
 708                         dstRowStride = lvl->rowstride;
 709                 } else {
 710                         dstRowStride = texImage->RowStride * texImage->TexFormat->TexelBytes;
 711                 }
 712
 713                 if (compressed) {
 714                         uint32_t srcRowStride, bytesPerRow, rows;
 715                         dstRowStride = _mesa_compressed_row_stride(texImage->TexFormat->MesaFormat, texImage->Width);
 716                         srcRowStride = _mesa_compressed_row_stride(texImage->TexFormat->MesaFormat, width);
 717                         bytesPerRow = srcRowStride;
 718                         rows = height / 4;
 719
 720                         copy_rows(texImage->Data, dstRowStride,  image->base.Data, srcRowStride, rows,
 721                                   bytesPerRow);
 722
 723                 } else {
 724                         if (!texImage->TexFormat->StoreImage(ctx, dims, texImage->_BaseFormat,
 725                                                              texImage->TexFormat, texImage->Data,
 726                                                              xoffset, yoffset, zoffset,
 727                                                              dstRowStride,
 728                                                              texImage->ImageOffsets,
 729                                                              width, height, depth,
 730                                                              format, type, pixels, packing))
 731                                 _mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexSubImage");
 732                 }
 733
 734         }
 735
 736         /* GL_SGIS_generate_mipmap */
 737         if (level == texObj->BaseLevel && texObj->GenerateMipmap) {
 738                 radeon_generate_mipmap(ctx, texObj->Target, texObj);
 739         }
 740         radeon_teximage_unmap(image);
 741
 742         _mesa_unmap_teximage_pbo(ctx, packing);
 743
 744
 745 }
 746
 747 void radeonTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
 748                          GLint xoffset,
 749                          GLsizei width,
 750                          GLenum format, GLenum type,
 751                          const GLvoid * pixels,
 752                          const struct gl_pixelstore_attrib *packing,
 753                          struct gl_texture_object *texObj,
 754                          struct gl_texture_image *texImage)
 755 {
 756         radeon_texsubimage(ctx, 1, level, xoffset, 0, 0, width, 1, 1, 0,
 757                 format, type, pixels, packing, texObj, texImage, 0);
 758 }
 759
 760 void radeonTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
 761                          GLint xoffset, GLint yoffset,
 762                          GLsizei width, GLsizei height,
 763                          GLenum format, GLenum type,
 764                          const GLvoid * pixels,
 765                          const struct gl_pixelstore_attrib *packing,
 766                          struct gl_texture_object *texObj,
 767                          struct gl_texture_image *texImage)
 768 {
 769         radeon_texsubimage(ctx, 2, level, xoffset, yoffset, 0, width, height, 1,
 770                            0, format, type, pixels, packing, texObj, texImage,
 771                            0);
 772 }
 773
 774 void radeonCompressedTexSubImage2D(GLcontext * ctx, GLenum target,
 775                                    GLint level, GLint xoffset,
 776                                    GLint yoffset, GLsizei width,
 777                                    GLsizei height, GLenum format,
 778                                    GLsizei imageSize, const GLvoid * data,
 779                                    struct gl_texture_object *texObj,
 780                                    struct gl_texture_image *texImage)
 781 {
 782         radeon_texsubimage(ctx, 2, level, xoffset, yoffset, 0, width, height, 1,
 783                 imageSize, format, 0, data, &ctx->Unpack, texObj, texImage, 1);
 784 }
 785
 786
 787 void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
 788                          GLint xoffset, GLint yoffset, GLint zoffset,
 789                          GLsizei width, GLsizei height, GLsizei depth,
 790                          GLenum format, GLenum type,
 791                          const GLvoid * pixels,
 792                          const struct gl_pixelstore_attrib *packing,
 793                          struct gl_texture_object *texObj,
 794                          struct gl_texture_image *texImage)
 795 {
 796         radeon_texsubimage(ctx, 3, level, xoffset, yoffset, zoffset, width, height, depth, 0,
 797                 format, type, pixels, packing, texObj, texImage, 0);
 798 }
 799
 800
 801
 802 /**
 803  * Ensure that the given image is stored in the given miptree from now on.
 804  */
 805 static void migrate_image_to_miptree(radeon_mipmap_tree *mt, radeon_texture_image *image, int face, int level)
 806 {
 807         radeon_mipmap_level *dstlvl = &mt->levels[level - mt->firstLevel];
 808         unsigned char *dest;
 809
 810         assert(image->mt != mt);
 811         assert(dstlvl->width == image->base.Width);
 812         assert(dstlvl->height == image->base.Height);
 813         assert(dstlvl->depth == image->base.Depth);
 814
 815
 816         radeon_bo_map(mt->bo, GL_TRUE);
 817         dest = mt->bo->ptr + dstlvl->faces[face].offset;
 818
 819         if (image->mt) {
 820                 /* Format etc. should match, so we really just need a memcpy().
 821                  * In fact, that memcpy() could be done by the hardware in many
 822                  * cases, provided that we have a proper memory manager.
 823                  */
 824                 radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel];
 825
 826                 assert(srclvl->size == dstlvl->size);
 827                 assert(srclvl->rowstride == dstlvl->rowstride);
 828
 829                 radeon_bo_map(image->mt->bo, GL_FALSE);
 830
 831                 memcpy(dest,
 832                         image->mt->bo->ptr + srclvl->faces[face].offset,
 833                         dstlvl->size);
 834                 radeon_bo_unmap(image->mt->bo);
 835
 836                 radeon_miptree_unreference(image->mt);
 837         } else {
 838                 uint32_t srcrowstride;
 839                 uint32_t height;
 840                 /* need to confirm this value is correct */
 841                 if (mt->compressed) {
 842                         height = image->base.Height / 4;
 843                         srcrowstride = image->base.RowStride * mt->bpp;
 844                 } else {
 845                         height = image->base.Height * image->base.Depth;
 846                         srcrowstride = image->base.Width * image->base.TexFormat->TexelBytes;
 847                 }
 848
 849 //              if (mt->tilebits)
 850 //                      WARN_ONCE("%s: tiling not supported yet", __FUNCTION__);
 851
 852                 copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
 853                           height, srcrowstride);
 854
 855                 _mesa_free_texmemory(image->base.Data);
 856                 image->base.Data = 0;
 857         }
 858
 859         radeon_bo_unmap(mt->bo);
 860
 861         image->mt = mt;
 862         image->mtface = face;
 863         image->mtlevel = level;
 864         radeon_miptree_reference(image->mt);
 865 }
 866
 867 int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj)
 868 {
 869         radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
 870         radeonTexObj *t = radeon_tex_obj(texObj);
 871         radeon_texture_image *baseimage = get_radeon_texture_image(texObj->Image[0][texObj->BaseLevel]);
 872         int face, level;
 873
 874         if (t->validated || t->image_override)
 875                 return GL_TRUE;
 876
 877         if (RADEON_DEBUG & DEBUG_TEXTURE)
 878                 fprintf(stderr, "%s: Validating texture %p now\n", __FUNCTION__, texObj);
 879
 880         if (baseimage->base.Border > 0)
 881                 return GL_FALSE;
 882
 883         /* Ensure a matching miptree exists.
 884          *
 885          * Differing mipmap trees can result when the app uses TexImage to
 886          * change texture dimensions.
 887          *
 888          * Prefer to use base image's miptree if it
 889          * exists, since that most likely contains more valid data (remember
 890          * that the base level is usually significantly larger than the rest
 891          * of the miptree, so cubemaps are the only possible exception).
 892          */
 893         if (baseimage->mt &&
 894             baseimage->mt != t->mt &&
 895             radeon_miptree_matches_texture(baseimage->mt, &t->base)) {
 896                 radeon_miptree_unreference(t->mt);
 897                 t->mt = baseimage->mt;
 898                 radeon_miptree_reference(t->mt);
 899         } else if (t->mt && !radeon_miptree_matches_texture(t->mt, &t->base)) {
 900                 radeon_miptree_unreference(t->mt);
 901                 t->mt = 0;
 902         }
 903
 904         if (!t->mt) {
 905                 if (RADEON_DEBUG & DEBUG_TEXTURE)
 906                         fprintf(stderr, " Allocate new miptree\n");
 907                 radeon_try_alloc_miptree(rmesa, t, &baseimage->base, 0, texObj->BaseLevel);
 908                 if (!t->mt) {
 909                         _mesa_problem(ctx, "r300_validate_texture failed to alloc miptree");
 910                         return GL_FALSE;
 911                 }
 912         }
 913
 914         /* Ensure all images are stored in the single main miptree */
 915         for(face = 0; face < t->mt->faces; ++face) {
 916                 for(level = t->mt->firstLevel; level <= t->mt->lastLevel; ++level) {
 917                         radeon_texture_image *image = get_radeon_texture_image(texObj->Image[face][level]);
 918                         if (RADEON_DEBUG & DEBUG_TEXTURE)
 919                                 fprintf(stderr, " face %i, level %i... %p vs %p ", face, level, t->mt, image->mt);
 920                         if (t->mt == image->mt) {
 921                                 if (RADEON_DEBUG & DEBUG_TEXTURE)
 922                                         fprintf(stderr, "OK\n");
 923                                 continue;
 924                         }
 925
 926                         if (RADEON_DEBUG & DEBUG_TEXTURE)
 927                                 fprintf(stderr, "migrating\n");
 928                         migrate_image_to_miptree(t->mt, image, face, level);
 929                 }
 930         }
 931
 932         return GL_TRUE;
 933 }
 934
 935
 936 /**
 937  * Need to map texture image into memory before copying image data,
 938  * then unmap it.
 939  */
 940 static void
 941 radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level,
 942                      GLenum format, GLenum type, GLvoid * pixels,
 943                      struct gl_texture_object *texObj,
 944                      struct gl_texture_image *texImage, int compressed)
 945 {
 946         radeon_texture_image *image = get_radeon_texture_image(texImage);
 947
 948         if (image->mt) {
 949                 /* Map the texture image read-only */
 950                 radeon_teximage_map(image, GL_FALSE);
 951         } else {
 952                 /* Image hasn't been uploaded to a miptree yet */
 953                 assert(image->base.Data);
 954         }
 955
 956         if (compressed) {
 957                 _mesa_get_compressed_teximage(ctx, target, level, pixels,
 958                                               texObj, texImage);
 959         } else {
 960                 _mesa_get_teximage(ctx, target, level, format, type, pixels,
 961                                    texObj, texImage);
 962         }
 963
 964         if (image->mt) {
 965                 radeon_teximage_unmap(image);
 966         }
 967 }
 968
 969 void
 970 radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level,
 971                   GLenum format, GLenum type, GLvoid * pixels,
 972                   struct gl_texture_object *texObj,
 973                   struct gl_texture_image *texImage)
 974 {
 975         radeon_get_tex_image(ctx, target, level, format, type, pixels,
 976                              texObj, texImage, 0);
 977 }
 978
 979 void
 980 radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
 981                             GLvoid *pixels,
 982                             struct gl_texture_object *texObj,
 983                             struct gl_texture_image *texImage)
 984 {
 985         radeon_get_tex_image(ctx, target, level, 0, 0, pixels,
 986                              texObj, texImage, 1);
 987 }