2 * Copyright (C) 2008 Nicolai Haehnle.
3 * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
5 * The Weather Channel (TM) funded Tungsten Graphics to develop the
6 * initial release of the Radeon 8500 driver under the XFree86 license.
7 * This notice must be preserved.
9 * Permission is hereby granted, free of charge, to any person obtaining
10 * a copy of this software and associated documentation files (the
11 * "Software"), to deal in the Software without restriction, including
12 * without limitation the rights to use, copy, modify, merge, publish,
13 * distribute, sublicense, and/or sell copies of the Software, and to
14 * permit persons to whom the Software is furnished to do so, subject to
15 * the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial
19 * portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 #include "main/glheader.h"
32 #include "main/imports.h"
33 #include "main/context.h"
34 #include "main/convolve.h"
35 #include "main/mipmap.h"
36 #include "main/texcompress.h"
37 #include "main/texformat.h"
38 #include "main/texstore.h"
39 #include "main/teximage.h"
40 #include "main/texobj.h"
42 #include "xmlpool.h" /* for symbolic values of enum-type options */
44 #include "radeon_common.h"
46 #include "radeon_mipmap_tree.h"
49 static void copy_rows(void* dst
, GLuint dststride
, const void* src
, GLuint srcstride
,
50 GLuint numrows
, GLuint rowsize
)
52 assert(rowsize
<= dststride
);
53 assert(rowsize
<= srcstride
);
55 if (rowsize
== srcstride
&& rowsize
== dststride
) {
56 memcpy(dst
, src
, numrows
*rowsize
);
59 for(i
= 0; i
< numrows
; ++i
) {
60 memcpy(dst
, src
, rowsize
);
69 * Allocate an empty texture image object.
71 struct gl_texture_image
*radeonNewTextureImage(GLcontext
*ctx
)
73 return CALLOC(sizeof(radeon_texture_image
));
77 * Free memory associated with this texture image.
79 void radeonFreeTexImageData(GLcontext
*ctx
, struct gl_texture_image
*timage
)
81 radeon_texture_image
* image
= get_radeon_texture_image(timage
);
84 radeon_miptree_unreference(image
->mt
);
86 assert(!image
->base
.Data
);
88 _mesa_free_texture_image_data(ctx
, timage
);
91 radeon_bo_unref(image
->bo
);
95 _mesa_free_texmemory(timage
->Data
);
100 /* Set Data pointer and additional data for mapped texture image */
101 static void teximage_set_map_data(radeon_texture_image
*image
)
103 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
105 image
->base
.Data
= image
->mt
->bo
->ptr
+ lvl
->faces
[image
->mtface
].offset
;
106 image
->base
.RowStride
= lvl
->rowstride
/ image
->mt
->bpp
;
111 * Map a single texture image for glTexImage and friends.
113 void radeon_teximage_map(radeon_texture_image
*image
, GLboolean write_enable
)
116 assert(!image
->base
.Data
);
118 radeon_bo_map(image
->mt
->bo
, write_enable
);
119 teximage_set_map_data(image
);
124 void radeon_teximage_unmap(radeon_texture_image
*image
)
127 assert(image
->base
.Data
);
129 image
->base
.Data
= 0;
130 radeon_bo_unmap(image
->mt
->bo
);
135 * Map a validated texture for reading during software rendering.
137 void radeonMapTexture(GLcontext
*ctx
, struct gl_texture_object
*texObj
)
139 radeonTexObj
* t
= radeon_tex_obj(texObj
);
142 if (!radeon_validate_texture_miptree(ctx
, texObj
))
145 /* for r100 3D sw fallbacks don't have mt */
149 radeon_bo_map(t
->mt
->bo
, GL_FALSE
);
150 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
151 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
)
152 teximage_set_map_data(get_radeon_texture_image(texObj
->Image
[face
][level
]));
156 void radeonUnmapTexture(GLcontext
*ctx
, struct gl_texture_object
*texObj
)
158 radeonTexObj
* t
= radeon_tex_obj(texObj
);
161 /* for r100 3D sw fallbacks don't have mt */
165 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
166 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
)
167 texObj
->Image
[face
][level
]->Data
= 0;
169 radeon_bo_unmap(t
->mt
->bo
);
172 GLuint
radeon_face_for_target(GLenum target
)
175 case GL_TEXTURE_CUBE_MAP_POSITIVE_X
:
176 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X
:
177 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y
:
178 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y
:
179 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z
:
180 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z
:
181 return (GLuint
) target
- (GLuint
) GL_TEXTURE_CUBE_MAP_POSITIVE_X
;
188 * Wraps Mesa's implementation to ensure that the base level image is mapped.
190 * This relies on internal details of _mesa_generate_mipmap, in particular
191 * the fact that the memory for recreated texture images is always freed.
193 static void radeon_generate_mipmap(GLcontext
*ctx
, GLenum target
,
194 struct gl_texture_object
*texObj
)
196 radeonTexObj
* t
= radeon_tex_obj(texObj
);
197 GLuint nr_faces
= (t
->base
.Target
== GL_TEXTURE_CUBE_MAP
) ? 6 : 1;
201 _mesa_generate_mipmap(ctx
, target
, texObj
);
203 for (face
= 0; face
< nr_faces
; face
++) {
204 for (i
= texObj
->BaseLevel
+ 1; i
< texObj
->MaxLevel
; i
++) {
205 radeon_texture_image
*image
;
207 image
= get_radeon_texture_image(texObj
->Image
[face
][i
]);
213 image
->mtface
= face
;
215 radeon_miptree_unreference(image
->mt
);
222 void radeonGenerateMipmap(GLcontext
* ctx
, GLenum target
, struct gl_texture_object
*texObj
)
224 GLuint face
= radeon_face_for_target(target
);
225 radeon_texture_image
*baseimage
= get_radeon_texture_image(texObj
->Image
[face
][texObj
->BaseLevel
]);
227 radeon_teximage_map(baseimage
, GL_FALSE
);
228 radeon_generate_mipmap(ctx
, target
, texObj
);
229 radeon_teximage_unmap(baseimage
);
233 /* try to find a format which will only need a memcopy */
234 static const struct gl_texture_format
*radeonChoose8888TexFormat(radeonContextPtr rmesa
,
239 const GLubyte littleEndian
= *((const GLubyte
*)&ui
);
241 /* r100 can only do this */
242 if (IS_R100_CLASS(rmesa
->radeonScreen
))
243 return _dri_texformat_argb8888
;
245 if ((srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_INT_8_8_8_8
) ||
246 (srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
) ||
247 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
) ||
248 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_BYTE
&& littleEndian
)) {
249 return &_mesa_texformat_rgba8888
;
250 } else if ((srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
) ||
251 (srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_BYTE
&& littleEndian
) ||
252 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_INT_8_8_8_8
) ||
253 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
)) {
254 return &_mesa_texformat_rgba8888_rev
;
255 } else if (srcFormat
== GL_BGRA
&& ((srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
) ||
256 srcType
== GL_UNSIGNED_INT_8_8_8_8
)) {
257 return &_mesa_texformat_argb8888_rev
;
258 } else if (srcFormat
== GL_BGRA
&& ((srcType
== GL_UNSIGNED_BYTE
&& littleEndian
) ||
259 srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
)) {
260 return &_mesa_texformat_argb8888
;
262 return _dri_texformat_argb8888
;
265 const struct gl_texture_format
*radeonChooseTextureFormat(GLcontext
* ctx
,
266 GLint internalFormat
,
270 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
271 const GLboolean do32bpt
=
272 (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_32
);
273 const GLboolean force16bpt
=
274 (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FORCE_16
);
278 fprintf(stderr
, "InternalFormat=%s(%d) type=%s format=%s\n",
279 _mesa_lookup_enum_by_nr(internalFormat
), internalFormat
,
280 _mesa_lookup_enum_by_nr(type
), _mesa_lookup_enum_by_nr(format
));
281 fprintf(stderr
, "do32bpt=%d force16bpt=%d\n", do32bpt
, force16bpt
);
284 switch (internalFormat
) {
287 case GL_COMPRESSED_RGBA
:
289 case GL_UNSIGNED_INT_10_10_10_2
:
290 case GL_UNSIGNED_INT_2_10_10_10_REV
:
291 return do32bpt
? _dri_texformat_argb8888
:
292 _dri_texformat_argb1555
;
293 case GL_UNSIGNED_SHORT_4_4_4_4
:
294 case GL_UNSIGNED_SHORT_4_4_4_4_REV
:
295 return _dri_texformat_argb4444
;
296 case GL_UNSIGNED_SHORT_5_5_5_1
:
297 case GL_UNSIGNED_SHORT_1_5_5_5_REV
:
298 return _dri_texformat_argb1555
;
300 return do32bpt
? radeonChoose8888TexFormat(rmesa
, format
, type
) :
301 _dri_texformat_argb4444
;
306 case GL_COMPRESSED_RGB
:
308 case GL_UNSIGNED_SHORT_4_4_4_4
:
309 case GL_UNSIGNED_SHORT_4_4_4_4_REV
:
310 return _dri_texformat_argb4444
;
311 case GL_UNSIGNED_SHORT_5_5_5_1
:
312 case GL_UNSIGNED_SHORT_1_5_5_5_REV
:
313 return _dri_texformat_argb1555
;
314 case GL_UNSIGNED_SHORT_5_6_5
:
315 case GL_UNSIGNED_SHORT_5_6_5_REV
:
316 return _dri_texformat_rgb565
;
318 return do32bpt
? _dri_texformat_argb8888
:
319 _dri_texformat_rgb565
;
327 radeonChoose8888TexFormat(rmesa
, format
,type
) :
328 _dri_texformat_argb4444
;
332 return _dri_texformat_argb4444
;
335 return _dri_texformat_argb1555
;
341 return !force16bpt
? _dri_texformat_argb8888
:
342 _dri_texformat_rgb565
;
347 return _dri_texformat_rgb565
;
354 case GL_COMPRESSED_ALPHA
:
355 return _dri_texformat_a8
;
363 case GL_COMPRESSED_LUMINANCE
:
364 return _dri_texformat_l8
;
367 case GL_LUMINANCE_ALPHA
:
368 case GL_LUMINANCE4_ALPHA4
:
369 case GL_LUMINANCE6_ALPHA2
:
370 case GL_LUMINANCE8_ALPHA8
:
371 case GL_LUMINANCE12_ALPHA4
:
372 case GL_LUMINANCE12_ALPHA12
:
373 case GL_LUMINANCE16_ALPHA16
:
374 case GL_COMPRESSED_LUMINANCE_ALPHA
:
375 return _dri_texformat_al88
;
382 case GL_COMPRESSED_INTENSITY
:
383 return _dri_texformat_i8
;
386 if (type
== GL_UNSIGNED_SHORT_8_8_APPLE
||
387 type
== GL_UNSIGNED_BYTE
)
388 return &_mesa_texformat_ycbcr
;
390 return &_mesa_texformat_ycbcr_rev
;
394 case GL_COMPRESSED_RGB_S3TC_DXT1_EXT
:
395 return &_mesa_texformat_rgb_dxt1
;
397 case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT
:
398 return &_mesa_texformat_rgba_dxt1
;
402 case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT
:
403 return &_mesa_texformat_rgba_dxt3
;
405 case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT
:
406 return &_mesa_texformat_rgba_dxt5
;
408 case GL_ALPHA16F_ARB
:
409 return &_mesa_texformat_alpha_float16
;
410 case GL_ALPHA32F_ARB
:
411 return &_mesa_texformat_alpha_float32
;
412 case GL_LUMINANCE16F_ARB
:
413 return &_mesa_texformat_luminance_float16
;
414 case GL_LUMINANCE32F_ARB
:
415 return &_mesa_texformat_luminance_float32
;
416 case GL_LUMINANCE_ALPHA16F_ARB
:
417 return &_mesa_texformat_luminance_alpha_float16
;
418 case GL_LUMINANCE_ALPHA32F_ARB
:
419 return &_mesa_texformat_luminance_alpha_float32
;
420 case GL_INTENSITY16F_ARB
:
421 return &_mesa_texformat_intensity_float16
;
422 case GL_INTENSITY32F_ARB
:
423 return &_mesa_texformat_intensity_float32
;
425 return &_mesa_texformat_rgba_float16
;
427 return &_mesa_texformat_rgba_float32
;
429 return &_mesa_texformat_rgba_float16
;
431 return &_mesa_texformat_rgba_float32
;
433 case GL_DEPTH_COMPONENT
:
434 case GL_DEPTH_COMPONENT16
:
435 case GL_DEPTH_COMPONENT24
:
436 case GL_DEPTH_COMPONENT32
:
439 case GL_UNSIGNED_BYTE
:
440 case GL_UNSIGNED_SHORT
:
441 return &_mesa_texformat_z16
;
442 case GL_UNSIGNED_INT
:
443 return &_mesa_texformat_z32
;
444 case GL_UNSIGNED_INT_24_8_EXT
:
446 return &_mesa_texformat_z24_s8
;
449 return &_mesa_texformat_z16
;
454 "unexpected internalFormat 0x%x in r300ChooseTextureFormat",
455 (int)internalFormat
);
459 return NULL
; /* never get here */
463 * All glTexImage calls go through this function.
465 static void radeon_teximage(
466 GLcontext
*ctx
, int dims
,
467 GLint face
, GLint level
,
468 GLint internalFormat
,
469 GLint width
, GLint height
, GLint depth
,
471 GLenum format
, GLenum type
, const GLvoid
* pixels
,
472 const struct gl_pixelstore_attrib
*packing
,
473 struct gl_texture_object
*texObj
,
474 struct gl_texture_image
*texImage
,
477 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
478 radeonTexObj
* t
= radeon_tex_obj(texObj
);
479 radeon_texture_image
* image
= get_radeon_texture_image(texImage
);
481 GLint postConvWidth
= width
;
482 GLint postConvHeight
= height
;
485 radeon_firevertices(rmesa
);
487 t
->validated
= GL_FALSE
;
489 if (ctx
->_ImageTransferState
& IMAGE_CONVOLUTION_BIT
) {
490 _mesa_adjust_image_for_convolution(ctx
, dims
, &postConvWidth
,
494 /* Choose and fill in the texture format for this image */
495 texImage
->TexFormat
= radeonChooseTextureFormat(ctx
, internalFormat
, format
, type
);
496 _mesa_set_fetch_functions(texImage
, dims
);
498 if (texImage
->TexFormat
->TexelBytes
== 0) {
500 texImage
->IsCompressed
= GL_TRUE
;
501 texImage
->CompressedSize
=
502 ctx
->Driver
.CompressedTextureSize(ctx
, texImage
->Width
,
503 texImage
->Height
, texImage
->Depth
,
504 texImage
->TexFormat
->MesaFormat
);
506 texImage
->IsCompressed
= GL_FALSE
;
507 texImage
->CompressedSize
= 0;
509 texelBytes
= texImage
->TexFormat
->TexelBytes
;
510 /* Minimum pitch of 32 bytes */
511 if (postConvWidth
* texelBytes
< 32) {
512 postConvWidth
= 32 / texelBytes
;
513 texImage
->RowStride
= postConvWidth
;
516 assert(texImage
->RowStride
== postConvWidth
);
520 /* Allocate memory for image */
521 radeonFreeTexImageData(ctx
, texImage
); /* Mesa core only clears texImage->Data but not image->mt */
524 t
->mt
->firstLevel
== level
&&
525 t
->mt
->lastLevel
== level
&&
526 t
->mt
->target
!= GL_TEXTURE_CUBE_MAP_ARB
&&
527 !radeon_miptree_matches_image(t
->mt
, texImage
, face
, level
)) {
528 radeon_miptree_unreference(t
->mt
);
533 radeon_try_alloc_miptree(rmesa
, t
, texImage
, face
, level
);
534 if (t
->mt
&& radeon_miptree_matches_image(t
->mt
, texImage
, face
, level
)) {
535 radeon_mipmap_level
*lvl
;
537 image
->mtlevel
= level
- t
->mt
->firstLevel
;
538 image
->mtface
= face
;
539 radeon_miptree_reference(t
->mt
);
540 lvl
= &image
->mt
->levels
[image
->mtlevel
];
541 dstRowStride
= lvl
->rowstride
;
544 if (texImage
->IsCompressed
) {
545 size
= texImage
->CompressedSize
;
547 size
= texImage
->Width
* texImage
->Height
* texImage
->Depth
* texImage
->TexFormat
->TexelBytes
;
549 texImage
->Data
= _mesa_alloc_texmemory(size
);
552 /* Upload texture image; note that the spec allows pixels to be NULL */
554 pixels
= _mesa_validate_pbo_compressed_teximage(
555 ctx
, imageSize
, pixels
, packing
, "glCompressedTexImage");
557 pixels
= _mesa_validate_pbo_teximage(
558 ctx
, dims
, width
, height
, depth
,
559 format
, type
, pixels
, packing
, "glTexImage");
563 radeon_teximage_map(image
, GL_TRUE
);
566 memcpy(texImage
->Data
, pixels
, imageSize
);
570 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
571 dstRowStride
= lvl
->rowstride
;
573 dstRowStride
= texImage
->Width
* texImage
->TexFormat
->TexelBytes
;
576 if (!texImage
->TexFormat
->StoreImage(ctx
, dims
,
577 texImage
->_BaseFormat
,
579 texImage
->Data
, 0, 0, 0, /* dstX/Y/Zoffset */
581 texImage
->ImageOffsets
,
582 width
, height
, depth
,
583 format
, type
, pixels
, packing
))
584 _mesa_error(ctx
, GL_OUT_OF_MEMORY
, "glTexImage");
589 /* SGIS_generate_mipmap */
590 if (level
== texObj
->BaseLevel
&& texObj
->GenerateMipmap
) {
591 radeon_generate_mipmap(ctx
, texObj
->Target
, texObj
);
594 _mesa_unmap_teximage_pbo(ctx
, packing
);
597 radeon_teximage_unmap(image
);
602 void radeonTexImage1D(GLcontext
* ctx
, GLenum target
, GLint level
,
603 GLint internalFormat
,
604 GLint width
, GLint border
,
605 GLenum format
, GLenum type
, const GLvoid
* pixels
,
606 const struct gl_pixelstore_attrib
*packing
,
607 struct gl_texture_object
*texObj
,
608 struct gl_texture_image
*texImage
)
610 radeon_teximage(ctx
, 1, 0, level
, internalFormat
, width
, 1, 1,
611 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
614 void radeonTexImage2D(GLcontext
* ctx
, GLenum target
, GLint level
,
615 GLint internalFormat
,
616 GLint width
, GLint height
, GLint border
,
617 GLenum format
, GLenum type
, const GLvoid
* pixels
,
618 const struct gl_pixelstore_attrib
*packing
,
619 struct gl_texture_object
*texObj
,
620 struct gl_texture_image
*texImage
)
623 GLuint face
= radeon_face_for_target(target
);
625 radeon_teximage(ctx
, 2, face
, level
, internalFormat
, width
, height
, 1,
626 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
629 void radeonCompressedTexImage2D(GLcontext
* ctx
, GLenum target
,
630 GLint level
, GLint internalFormat
,
631 GLint width
, GLint height
, GLint border
,
632 GLsizei imageSize
, const GLvoid
* data
,
633 struct gl_texture_object
*texObj
,
634 struct gl_texture_image
*texImage
)
636 GLuint face
= radeon_face_for_target(target
);
638 radeon_teximage(ctx
, 2, face
, level
, internalFormat
, width
, height
, 1,
639 imageSize
, 0, 0, data
, &ctx
->Unpack
, texObj
, texImage
, 1);
642 void radeonTexImage3D(GLcontext
* ctx
, GLenum target
, GLint level
,
643 GLint internalFormat
,
644 GLint width
, GLint height
, GLint depth
,
646 GLenum format
, GLenum type
, const GLvoid
* pixels
,
647 const struct gl_pixelstore_attrib
*packing
,
648 struct gl_texture_object
*texObj
,
649 struct gl_texture_image
*texImage
)
651 radeon_teximage(ctx
, 3, 0, level
, internalFormat
, width
, height
, depth
,
652 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
656 * Update a subregion of the given texture image.
658 static void radeon_texsubimage(GLcontext
* ctx
, int dims
, int level
,
659 GLint xoffset
, GLint yoffset
, GLint zoffset
,
660 GLsizei width
, GLsizei height
, GLsizei depth
,
662 GLenum format
, GLenum type
,
663 const GLvoid
* pixels
,
664 const struct gl_pixelstore_attrib
*packing
,
665 struct gl_texture_object
*texObj
,
666 struct gl_texture_image
*texImage
,
669 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
670 radeonTexObj
* t
= radeon_tex_obj(texObj
);
671 radeon_texture_image
* image
= get_radeon_texture_image(texImage
);
673 radeon_firevertices(rmesa
);
675 t
->validated
= GL_FALSE
;
677 pixels
= _mesa_validate_pbo_compressed_teximage(
678 ctx
, imageSize
, pixels
, packing
, "glCompressedTexImage");
680 pixels
= _mesa_validate_pbo_teximage(ctx
, dims
,
681 width
, height
, depth
, format
, type
, pixels
, packing
, "glTexSubImage1D");
686 radeon_teximage_map(image
, GL_TRUE
);
689 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
690 dstRowStride
= lvl
->rowstride
;
692 dstRowStride
= texImage
->RowStride
* texImage
->TexFormat
->TexelBytes
;
696 uint32_t srcRowStride
, bytesPerRow
, rows
;
697 dstRowStride
= _mesa_compressed_row_stride(texImage
->TexFormat
->MesaFormat
, texImage
->Width
);
698 srcRowStride
= _mesa_compressed_row_stride(texImage
->TexFormat
->MesaFormat
, width
);
699 bytesPerRow
= srcRowStride
;
702 copy_rows(texImage
->Data
, dstRowStride
, image
->base
.Data
, srcRowStride
, rows
,
706 if (!texImage
->TexFormat
->StoreImage(ctx
, dims
, texImage
->_BaseFormat
,
707 texImage
->TexFormat
, texImage
->Data
,
708 xoffset
, yoffset
, zoffset
,
710 texImage
->ImageOffsets
,
711 width
, height
, depth
,
712 format
, type
, pixels
, packing
))
713 _mesa_error(ctx
, GL_OUT_OF_MEMORY
, "glTexSubImage");
718 /* GL_SGIS_generate_mipmap */
719 if (level
== texObj
->BaseLevel
&& texObj
->GenerateMipmap
) {
720 radeon_generate_mipmap(ctx
, texObj
->Target
, texObj
);
722 radeon_teximage_unmap(image
);
724 _mesa_unmap_teximage_pbo(ctx
, packing
);
729 void radeonTexSubImage1D(GLcontext
* ctx
, GLenum target
, GLint level
,
732 GLenum format
, GLenum type
,
733 const GLvoid
* pixels
,
734 const struct gl_pixelstore_attrib
*packing
,
735 struct gl_texture_object
*texObj
,
736 struct gl_texture_image
*texImage
)
738 radeon_texsubimage(ctx
, 1, level
, xoffset
, 0, 0, width
, 1, 1, 0,
739 format
, type
, pixels
, packing
, texObj
, texImage
, 0);
742 void radeonTexSubImage2D(GLcontext
* ctx
, GLenum target
, GLint level
,
743 GLint xoffset
, GLint yoffset
,
744 GLsizei width
, GLsizei height
,
745 GLenum format
, GLenum type
,
746 const GLvoid
* pixels
,
747 const struct gl_pixelstore_attrib
*packing
,
748 struct gl_texture_object
*texObj
,
749 struct gl_texture_image
*texImage
)
751 radeon_texsubimage(ctx
, 2, level
, xoffset
, yoffset
, 0, width
, height
, 1,
752 0, format
, type
, pixels
, packing
, texObj
, texImage
,
756 void radeonCompressedTexSubImage2D(GLcontext
* ctx
, GLenum target
,
757 GLint level
, GLint xoffset
,
758 GLint yoffset
, GLsizei width
,
759 GLsizei height
, GLenum format
,
760 GLsizei imageSize
, const GLvoid
* data
,
761 struct gl_texture_object
*texObj
,
762 struct gl_texture_image
*texImage
)
764 radeon_texsubimage(ctx
, 2, level
, xoffset
, yoffset
, 0, width
, height
, 1,
765 imageSize
, format
, 0, data
, &ctx
->Unpack
, texObj
, texImage
, 1);
769 void radeonTexSubImage3D(GLcontext
* ctx
, GLenum target
, GLint level
,
770 GLint xoffset
, GLint yoffset
, GLint zoffset
,
771 GLsizei width
, GLsizei height
, GLsizei depth
,
772 GLenum format
, GLenum type
,
773 const GLvoid
* pixels
,
774 const struct gl_pixelstore_attrib
*packing
,
775 struct gl_texture_object
*texObj
,
776 struct gl_texture_image
*texImage
)
778 radeon_texsubimage(ctx
, 3, level
, xoffset
, yoffset
, zoffset
, width
, height
, depth
, 0,
779 format
, type
, pixels
, packing
, texObj
, texImage
, 0);
785 * Ensure that the given image is stored in the given miptree from now on.
787 static void migrate_image_to_miptree(radeon_mipmap_tree
*mt
, radeon_texture_image
*image
, int face
, int level
)
789 radeon_mipmap_level
*dstlvl
= &mt
->levels
[level
- mt
->firstLevel
];
792 assert(image
->mt
!= mt
);
793 assert(dstlvl
->width
== image
->base
.Width
);
794 assert(dstlvl
->height
== image
->base
.Height
);
795 assert(dstlvl
->depth
== image
->base
.Depth
);
798 radeon_bo_map(mt
->bo
, GL_TRUE
);
799 dest
= mt
->bo
->ptr
+ dstlvl
->faces
[face
].offset
;
802 /* Format etc. should match, so we really just need a memcpy().
803 * In fact, that memcpy() could be done by the hardware in many
804 * cases, provided that we have a proper memory manager.
806 radeon_mipmap_level
*srclvl
= &image
->mt
->levels
[image
->mtlevel
];
808 assert(srclvl
->size
== dstlvl
->size
);
809 assert(srclvl
->rowstride
== dstlvl
->rowstride
);
811 radeon_bo_map(image
->mt
->bo
, GL_FALSE
);
814 image
->mt
->bo
->ptr
+ srclvl
->faces
[face
].offset
,
816 radeon_bo_unmap(image
->mt
->bo
);
818 radeon_miptree_unreference(image
->mt
);
820 uint32_t srcrowstride
;
822 /* need to confirm this value is correct */
823 if (mt
->compressed
) {
824 height
= image
->base
.Height
/ 4;
825 srcrowstride
= image
->base
.RowStride
* mt
->bpp
;
827 height
= image
->base
.Height
* image
->base
.Depth
;
828 srcrowstride
= image
->base
.Width
* image
->base
.TexFormat
->TexelBytes
;
832 // WARN_ONCE("%s: tiling not supported yet", __FUNCTION__);
834 copy_rows(dest
, dstlvl
->rowstride
, image
->base
.Data
, srcrowstride
,
835 height
, srcrowstride
);
837 _mesa_free_texmemory(image
->base
.Data
);
838 image
->base
.Data
= 0;
841 radeon_bo_unmap(mt
->bo
);
844 image
->mtface
= face
;
845 image
->mtlevel
= level
;
846 radeon_miptree_reference(image
->mt
);
849 int radeon_validate_texture_miptree(GLcontext
* ctx
, struct gl_texture_object
*texObj
)
851 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
852 radeonTexObj
*t
= radeon_tex_obj(texObj
);
853 radeon_texture_image
*baseimage
= get_radeon_texture_image(texObj
->Image
[0][texObj
->BaseLevel
]);
856 if (t
->validated
|| t
->image_override
)
859 if (RADEON_DEBUG
& DEBUG_TEXTURE
)
860 fprintf(stderr
, "%s: Validating texture %p now\n", __FUNCTION__
, texObj
);
862 if (baseimage
->base
.Border
> 0)
865 /* Ensure a matching miptree exists.
867 * Differing mipmap trees can result when the app uses TexImage to
868 * change texture dimensions.
870 * Prefer to use base image's miptree if it
871 * exists, since that most likely contains more valid data (remember
872 * that the base level is usually significantly larger than the rest
873 * of the miptree, so cubemaps are the only possible exception).
876 baseimage
->mt
!= t
->mt
&&
877 radeon_miptree_matches_texture(baseimage
->mt
, &t
->base
)) {
878 radeon_miptree_unreference(t
->mt
);
879 t
->mt
= baseimage
->mt
;
880 radeon_miptree_reference(t
->mt
);
881 } else if (t
->mt
&& !radeon_miptree_matches_texture(t
->mt
, &t
->base
)) {
882 radeon_miptree_unreference(t
->mt
);
887 if (RADEON_DEBUG
& DEBUG_TEXTURE
)
888 fprintf(stderr
, " Allocate new miptree\n");
889 radeon_try_alloc_miptree(rmesa
, t
, &baseimage
->base
, 0, texObj
->BaseLevel
);
891 _mesa_problem(ctx
, "r300_validate_texture failed to alloc miptree");
896 /* Ensure all images are stored in the single main miptree */
897 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
898 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
) {
899 radeon_texture_image
*image
= get_radeon_texture_image(texObj
->Image
[face
][level
]);
900 if (RADEON_DEBUG
& DEBUG_TEXTURE
)
901 fprintf(stderr
, " face %i, level %i... %p vs %p ", face
, level
, t
->mt
, image
->mt
);
902 if (t
->mt
== image
->mt
) {
903 if (RADEON_DEBUG
& DEBUG_TEXTURE
)
904 fprintf(stderr
, "OK\n");
908 if (RADEON_DEBUG
& DEBUG_TEXTURE
)
909 fprintf(stderr
, "migrating\n");
910 migrate_image_to_miptree(t
->mt
, image
, face
, level
);
919 * Need to map texture image into memory before copying image data,
923 radeon_get_tex_image(GLcontext
* ctx
, GLenum target
, GLint level
,
924 GLenum format
, GLenum type
, GLvoid
* pixels
,
925 struct gl_texture_object
*texObj
,
926 struct gl_texture_image
*texImage
, int compressed
)
928 radeon_texture_image
*image
= get_radeon_texture_image(texImage
);
931 /* Map the texture image read-only */
932 radeon_teximage_map(image
, GL_FALSE
);
934 /* Image hasn't been uploaded to a miptree yet */
935 assert(image
->base
.Data
);
939 _mesa_get_compressed_teximage(ctx
, target
, level
, pixels
,
942 _mesa_get_teximage(ctx
, target
, level
, format
, type
, pixels
,
947 radeon_teximage_unmap(image
);
952 radeonGetTexImage(GLcontext
* ctx
, GLenum target
, GLint level
,
953 GLenum format
, GLenum type
, GLvoid
* pixels
,
954 struct gl_texture_object
*texObj
,
955 struct gl_texture_image
*texImage
)
957 radeon_get_tex_image(ctx
, target
, level
, format
, type
, pixels
,
958 texObj
, texImage
, 0);
962 radeonGetCompressedTexImage(GLcontext
*ctx
, GLenum target
, GLint level
,
964 struct gl_texture_object
*texObj
,
965 struct gl_texture_image
*texImage
)
967 radeon_get_tex_image(ctx
, target
, level
, 0, 0, pixels
,
968 texObj
, texImage
, 1);