2 * Copyright (C) 2008 Nicolai Haehnle.
3 * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
5 * The Weather Channel (TM) funded Tungsten Graphics to develop the
6 * initial release of the Radeon 8500 driver under the XFree86 license.
7 * This notice must be preserved.
9 * Permission is hereby granted, free of charge, to any person obtaining
10 * a copy of this software and associated documentation files (the
11 * "Software"), to deal in the Software without restriction, including
12 * without limitation the rights to use, copy, modify, merge, publish,
13 * distribute, sublicense, and/or sell copies of the Software, and to
14 * permit persons to whom the Software is furnished to do so, subject to
15 * the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial
19 * portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 #include "main/glheader.h"
32 #include "main/imports.h"
33 #include "main/context.h"
34 #include "main/convolve.h"
35 #include "main/mipmap.h"
36 #include "main/texcompress.h"
37 #include "main/texstore.h"
38 #include "main/teximage.h"
39 #include "main/texobj.h"
40 #include "main/texgetimage.h"
42 #include "xmlpool.h" /* for symbolic values of enum-type options */
44 #include "radeon_common.h"
46 #include "radeon_mipmap_tree.h"
49 static void copy_rows(void* dst
, GLuint dststride
, const void* src
, GLuint srcstride
,
50 GLuint numrows
, GLuint rowsize
)
52 assert(rowsize
<= dststride
);
53 assert(rowsize
<= srcstride
);
55 if (rowsize
== srcstride
&& rowsize
== dststride
) {
56 memcpy(dst
, src
, numrows
*rowsize
);
59 for(i
= 0; i
< numrows
; ++i
) {
60 memcpy(dst
, src
, rowsize
);
69 * Allocate an empty texture image object.
71 struct gl_texture_image
*radeonNewTextureImage(GLcontext
*ctx
)
73 return CALLOC(sizeof(radeon_texture_image
));
77 * Free memory associated with this texture image.
79 void radeonFreeTexImageData(GLcontext
*ctx
, struct gl_texture_image
*timage
)
81 radeon_texture_image
* image
= get_radeon_texture_image(timage
);
84 radeon_miptree_unreference(image
->mt
);
86 assert(!image
->base
.Data
);
88 _mesa_free_texture_image_data(ctx
, timage
);
91 radeon_bo_unref(image
->bo
);
95 _mesa_free_texmemory(timage
->Data
);
100 /* Set Data pointer and additional data for mapped texture image */
101 static void teximage_set_map_data(radeon_texture_image
*image
)
103 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
105 image
->base
.Data
= image
->mt
->bo
->ptr
+ lvl
->faces
[image
->mtface
].offset
;
106 image
->base
.RowStride
= lvl
->rowstride
/ image
->mt
->bpp
;
111 * Map a single texture image for glTexImage and friends.
113 void radeon_teximage_map(radeon_texture_image
*image
, GLboolean write_enable
)
116 assert(!image
->base
.Data
);
118 radeon_bo_map(image
->mt
->bo
, write_enable
);
119 teximage_set_map_data(image
);
124 void radeon_teximage_unmap(radeon_texture_image
*image
)
127 assert(image
->base
.Data
);
129 image
->base
.Data
= 0;
130 radeon_bo_unmap(image
->mt
->bo
);
134 static void map_override(GLcontext
*ctx
, radeonTexObj
*t
)
136 radeon_texture_image
*img
= get_radeon_texture_image(t
->base
.Image
[0][0]);
138 radeon_bo_map(t
->bo
, GL_FALSE
);
140 img
->base
.Data
= t
->bo
->ptr
;
143 static void unmap_override(GLcontext
*ctx
, radeonTexObj
*t
)
145 radeon_texture_image
*img
= get_radeon_texture_image(t
->base
.Image
[0][0]);
147 radeon_bo_unmap(t
->bo
);
149 img
->base
.Data
= NULL
;
153 * Map a validated texture for reading during software rendering.
155 void radeonMapTexture(GLcontext
*ctx
, struct gl_texture_object
*texObj
)
157 radeonTexObj
* t
= radeon_tex_obj(texObj
);
160 if (!radeon_validate_texture_miptree(ctx
, texObj
))
163 /* for r100 3D sw fallbacks don't have mt */
164 if (t
->image_override
&& t
->bo
)
165 map_override(ctx
, t
);
170 radeon_bo_map(t
->mt
->bo
, GL_FALSE
);
171 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
172 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
)
173 teximage_set_map_data(get_radeon_texture_image(texObj
->Image
[face
][level
]));
177 void radeonUnmapTexture(GLcontext
*ctx
, struct gl_texture_object
*texObj
)
179 radeonTexObj
* t
= radeon_tex_obj(texObj
);
182 if (t
->image_override
&& t
->bo
)
183 unmap_override(ctx
, t
);
184 /* for r100 3D sw fallbacks don't have mt */
188 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
189 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
)
190 texObj
->Image
[face
][level
]->Data
= 0;
192 radeon_bo_unmap(t
->mt
->bo
);
195 GLuint
radeon_face_for_target(GLenum target
)
198 case GL_TEXTURE_CUBE_MAP_POSITIVE_X
:
199 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X
:
200 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y
:
201 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y
:
202 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z
:
203 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z
:
204 return (GLuint
) target
- (GLuint
) GL_TEXTURE_CUBE_MAP_POSITIVE_X
;
211 * Wraps Mesa's implementation to ensure that the base level image is mapped.
213 * This relies on internal details of _mesa_generate_mipmap, in particular
214 * the fact that the memory for recreated texture images is always freed.
216 static void radeon_generate_mipmap(GLcontext
*ctx
, GLenum target
,
217 struct gl_texture_object
*texObj
)
219 radeonTexObj
* t
= radeon_tex_obj(texObj
);
220 GLuint nr_faces
= (t
->base
.Target
== GL_TEXTURE_CUBE_MAP
) ? 6 : 1;
224 _mesa_generate_mipmap(ctx
, target
, texObj
);
226 for (face
= 0; face
< nr_faces
; face
++) {
227 for (i
= texObj
->BaseLevel
+ 1; i
< texObj
->MaxLevel
; i
++) {
228 radeon_texture_image
*image
;
230 image
= get_radeon_texture_image(texObj
->Image
[face
][i
]);
236 image
->mtface
= face
;
238 radeon_miptree_unreference(image
->mt
);
245 void radeonGenerateMipmap(GLcontext
* ctx
, GLenum target
, struct gl_texture_object
*texObj
)
247 GLuint face
= radeon_face_for_target(target
);
248 radeon_texture_image
*baseimage
= get_radeon_texture_image(texObj
->Image
[face
][texObj
->BaseLevel
]);
250 radeon_teximage_map(baseimage
, GL_FALSE
);
251 radeon_generate_mipmap(ctx
, target
, texObj
);
252 radeon_teximage_unmap(baseimage
);
256 /* try to find a format which will only need a memcopy */
257 static gl_format
radeonChoose8888TexFormat(radeonContextPtr rmesa
,
259 GLenum srcType
, GLboolean fbo
)
262 const GLubyte littleEndian
= *((const GLubyte
*)&ui
);
264 /* r100 can only do this */
265 if (IS_R100_CLASS(rmesa
->radeonScreen
) || fbo
)
266 return _dri_texformat_argb8888
;
268 if ((srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_INT_8_8_8_8
) ||
269 (srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
) ||
270 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
) ||
271 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_BYTE
&& littleEndian
)) {
272 return MESA_FORMAT_RGBA8888
;
273 } else if ((srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
) ||
274 (srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_BYTE
&& littleEndian
) ||
275 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_INT_8_8_8_8
) ||
276 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
)) {
277 return MESA_FORMAT_RGBA8888_REV
;
278 } else if (IS_R200_CLASS(rmesa
->radeonScreen
)) {
279 return _dri_texformat_argb8888
;
280 } else if (srcFormat
== GL_BGRA
&& ((srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
) ||
281 srcType
== GL_UNSIGNED_INT_8_8_8_8
)) {
282 return MESA_FORMAT_ARGB8888_REV
;
283 } else if (srcFormat
== GL_BGRA
&& ((srcType
== GL_UNSIGNED_BYTE
&& littleEndian
) ||
284 srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
)) {
285 return MESA_FORMAT_ARGB8888
;
287 return _dri_texformat_argb8888
;
290 gl_format
radeonChooseTextureFormat_mesa(GLcontext
* ctx
,
291 GLint internalFormat
,
295 return radeonChooseTextureFormat(ctx
, internalFormat
, format
,
299 gl_format
radeonChooseTextureFormat(GLcontext
* ctx
,
300 GLint internalFormat
,
302 GLenum type
, GLboolean fbo
)
304 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
305 const GLboolean do32bpt
=
306 (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_32
);
307 const GLboolean force16bpt
=
308 (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FORCE_16
);
312 fprintf(stderr
, "InternalFormat=%s(%d) type=%s format=%s\n",
313 _mesa_lookup_enum_by_nr(internalFormat
), internalFormat
,
314 _mesa_lookup_enum_by_nr(type
), _mesa_lookup_enum_by_nr(format
));
315 fprintf(stderr
, "do32bpt=%d force16bpt=%d\n", do32bpt
, force16bpt
);
318 switch (internalFormat
) {
321 case GL_COMPRESSED_RGBA
:
323 case GL_UNSIGNED_INT_10_10_10_2
:
324 case GL_UNSIGNED_INT_2_10_10_10_REV
:
325 return do32bpt
? _dri_texformat_argb8888
:
326 _dri_texformat_argb1555
;
327 case GL_UNSIGNED_SHORT_4_4_4_4
:
328 case GL_UNSIGNED_SHORT_4_4_4_4_REV
:
329 return _dri_texformat_argb4444
;
330 case GL_UNSIGNED_SHORT_5_5_5_1
:
331 case GL_UNSIGNED_SHORT_1_5_5_5_REV
:
332 return _dri_texformat_argb1555
;
334 return do32bpt
? radeonChoose8888TexFormat(rmesa
, format
, type
, fbo
) :
335 _dri_texformat_argb4444
;
340 case GL_COMPRESSED_RGB
:
342 case GL_UNSIGNED_SHORT_4_4_4_4
:
343 case GL_UNSIGNED_SHORT_4_4_4_4_REV
:
344 return _dri_texformat_argb4444
;
345 case GL_UNSIGNED_SHORT_5_5_5_1
:
346 case GL_UNSIGNED_SHORT_1_5_5_5_REV
:
347 return _dri_texformat_argb1555
;
348 case GL_UNSIGNED_SHORT_5_6_5
:
349 case GL_UNSIGNED_SHORT_5_6_5_REV
:
350 return _dri_texformat_rgb565
;
352 return do32bpt
? _dri_texformat_argb8888
:
353 _dri_texformat_rgb565
;
361 radeonChoose8888TexFormat(rmesa
, format
, type
, fbo
) :
362 _dri_texformat_argb4444
;
366 return _dri_texformat_argb4444
;
369 return _dri_texformat_argb1555
;
375 return !force16bpt
? _dri_texformat_argb8888
:
376 _dri_texformat_rgb565
;
381 return _dri_texformat_rgb565
;
388 case GL_COMPRESSED_ALPHA
:
389 /* r200: can't use a8 format since interpreting hw I8 as a8 would result
390 in wrong rgb values (same as alpha value instead of 0). */
391 if (IS_R200_CLASS(rmesa
->radeonScreen
))
392 return _dri_texformat_al88
;
394 return _dri_texformat_a8
;
401 case GL_COMPRESSED_LUMINANCE
:
402 return _dri_texformat_l8
;
405 case GL_LUMINANCE_ALPHA
:
406 case GL_LUMINANCE4_ALPHA4
:
407 case GL_LUMINANCE6_ALPHA2
:
408 case GL_LUMINANCE8_ALPHA8
:
409 case GL_LUMINANCE12_ALPHA4
:
410 case GL_LUMINANCE12_ALPHA12
:
411 case GL_LUMINANCE16_ALPHA16
:
412 case GL_COMPRESSED_LUMINANCE_ALPHA
:
413 return _dri_texformat_al88
;
420 case GL_COMPRESSED_INTENSITY
:
421 return _dri_texformat_i8
;
424 if (type
== GL_UNSIGNED_SHORT_8_8_APPLE
||
425 type
== GL_UNSIGNED_BYTE
)
426 return MESA_FORMAT_YCBCR
;
428 return MESA_FORMAT_YCBCR_REV
;
432 case GL_COMPRESSED_RGB_S3TC_DXT1_EXT
:
433 return MESA_FORMAT_RGB_DXT1
;
435 case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT
:
436 return MESA_FORMAT_RGBA_DXT1
;
440 case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT
:
441 return MESA_FORMAT_RGBA_DXT3
;
443 case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT
:
444 return MESA_FORMAT_RGBA_DXT5
;
446 case GL_ALPHA16F_ARB
:
447 return MESA_FORMAT_ALPHA_FLOAT16
;
448 case GL_ALPHA32F_ARB
:
449 return MESA_FORMAT_ALPHA_FLOAT32
;
450 case GL_LUMINANCE16F_ARB
:
451 return MESA_FORMAT_LUMINANCE_FLOAT16
;
452 case GL_LUMINANCE32F_ARB
:
453 return MESA_FORMAT_LUMINANCE_FLOAT32
;
454 case GL_LUMINANCE_ALPHA16F_ARB
:
455 return MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16
;
456 case GL_LUMINANCE_ALPHA32F_ARB
:
457 return MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32
;
458 case GL_INTENSITY16F_ARB
:
459 return MESA_FORMAT_INTENSITY_FLOAT16
;
460 case GL_INTENSITY32F_ARB
:
461 return MESA_FORMAT_INTENSITY_FLOAT32
;
463 return MESA_FORMAT_RGBA_FLOAT16
;
465 return MESA_FORMAT_RGBA_FLOAT32
;
467 return MESA_FORMAT_RGBA_FLOAT16
;
469 return MESA_FORMAT_RGBA_FLOAT32
;
471 case GL_DEPTH_COMPONENT
:
472 case GL_DEPTH_COMPONENT16
:
473 case GL_DEPTH_COMPONENT24
:
474 case GL_DEPTH_COMPONENT32
:
475 case GL_DEPTH_STENCIL_EXT
:
476 case GL_DEPTH24_STENCIL8_EXT
:
477 return MESA_FORMAT_S8_Z24
;
479 /* EXT_texture_sRGB */
483 case GL_SRGB8_ALPHA8
:
484 case GL_COMPRESSED_SRGB
:
485 case GL_COMPRESSED_SRGB_ALPHA
:
486 return MESA_FORMAT_SRGBA8
;
490 case GL_COMPRESSED_SLUMINANCE
:
491 return MESA_FORMAT_SL8
;
493 case GL_SLUMINANCE_ALPHA
:
494 case GL_SLUMINANCE8_ALPHA8
:
495 case GL_COMPRESSED_SLUMINANCE_ALPHA
:
496 return MESA_FORMAT_SLA8
;
500 "unexpected internalFormat 0x%x in %s",
501 (int)internalFormat
, __func__
);
502 return MESA_FORMAT_NONE
;
505 return MESA_FORMAT_NONE
; /* never get here */
509 * All glTexImage calls go through this function.
511 static void radeon_teximage(
512 GLcontext
*ctx
, int dims
,
513 GLenum target
, GLint level
,
514 GLint internalFormat
,
515 GLint width
, GLint height
, GLint depth
,
517 GLenum format
, GLenum type
, const GLvoid
* pixels
,
518 const struct gl_pixelstore_attrib
*packing
,
519 struct gl_texture_object
*texObj
,
520 struct gl_texture_image
*texImage
,
523 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
524 radeonTexObj
* t
= radeon_tex_obj(texObj
);
525 radeon_texture_image
* image
= get_radeon_texture_image(texImage
);
527 GLint postConvWidth
= width
;
528 GLint postConvHeight
= height
;
530 GLuint face
= radeon_face_for_target(target
);
532 radeon_firevertices(rmesa
);
534 t
->validated
= GL_FALSE
;
536 if (ctx
->_ImageTransferState
& IMAGE_CONVOLUTION_BIT
) {
537 _mesa_adjust_image_for_convolution(ctx
, dims
, &postConvWidth
,
541 if (_mesa_is_format_compressed(texImage
->TexFormat
)) {
544 texelBytes
= _mesa_get_format_bytes(texImage
->TexFormat
);
545 /* Minimum pitch of 32 bytes */
546 if (postConvWidth
* texelBytes
< 32) {
547 postConvWidth
= 32 / texelBytes
;
548 texImage
->RowStride
= postConvWidth
;
551 assert(texImage
->RowStride
== postConvWidth
);
555 /* Allocate memory for image */
556 radeonFreeTexImageData(ctx
, texImage
); /* Mesa core only clears texImage->Data but not image->mt */
559 t
->mt
->firstLevel
== level
&&
560 t
->mt
->lastLevel
== level
&&
561 t
->mt
->target
!= GL_TEXTURE_CUBE_MAP_ARB
&&
562 !radeon_miptree_matches_image(t
->mt
, texImage
, face
, level
)) {
563 radeon_miptree_unreference(t
->mt
);
568 radeon_try_alloc_miptree(rmesa
, t
, image
, face
, level
);
569 if (t
->mt
&& radeon_miptree_matches_image(t
->mt
, texImage
, face
, level
)) {
570 radeon_mipmap_level
*lvl
;
572 image
->mtlevel
= level
- t
->mt
->firstLevel
;
573 image
->mtface
= face
;
574 radeon_miptree_reference(t
->mt
);
575 lvl
= &image
->mt
->levels
[image
->mtlevel
];
576 dstRowStride
= lvl
->rowstride
;
579 if (_mesa_is_format_compressed(texImage
->TexFormat
)) {
580 size
= _mesa_format_image_size(texImage
->TexFormat
,
585 size
= texImage
->Width
* texImage
->Height
* texImage
->Depth
* _mesa_get_format_bytes(texImage
->TexFormat
);
587 texImage
->Data
= _mesa_alloc_texmemory(size
);
590 /* Upload texture image; note that the spec allows pixels to be NULL */
592 pixels
= _mesa_validate_pbo_compressed_teximage(
593 ctx
, imageSize
, pixels
, packing
, "glCompressedTexImage");
595 pixels
= _mesa_validate_pbo_teximage(
596 ctx
, dims
, width
, height
, depth
,
597 format
, type
, pixels
, packing
, "glTexImage");
601 radeon_teximage_map(image
, GL_TRUE
);
604 uint32_t srcRowStride
, bytesPerRow
, rows
;
605 srcRowStride
= _mesa_format_row_stride(texImage
->TexFormat
, width
);
606 bytesPerRow
= srcRowStride
;
607 rows
= (height
+ 3) / 4;
608 copy_rows(texImage
->Data
, image
->mt
->levels
[level
].rowstride
,
609 pixels
, srcRowStride
, rows
, bytesPerRow
);
611 memcpy(texImage
->Data
, pixels
, imageSize
);
615 GLuint
*dstImageOffsets
;
618 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
619 dstRowStride
= lvl
->rowstride
;
621 dstRowStride
= texImage
->Width
* _mesa_get_format_bytes(texImage
->TexFormat
);
627 dstImageOffsets
= _mesa_malloc(depth
* sizeof(GLuint
)) ;
628 if (!dstImageOffsets
)
629 _mesa_error(ctx
, GL_OUT_OF_MEMORY
, "glTexImage");
631 for (i
= 0; i
< depth
; ++i
) {
632 dstImageOffsets
[i
] = dstRowStride
/_mesa_get_format_bytes(texImage
->TexFormat
) * height
* i
;
635 dstImageOffsets
= texImage
->ImageOffsets
;
638 if (!_mesa_texstore(ctx
, dims
,
639 texImage
->_BaseFormat
,
641 texImage
->Data
, 0, 0, 0, /* dstX/Y/Zoffset */
644 width
, height
, depth
,
645 format
, type
, pixels
, packing
)) {
646 _mesa_error(ctx
, GL_OUT_OF_MEMORY
, "glTexImage");
650 _mesa_free(dstImageOffsets
);
654 _mesa_unmap_teximage_pbo(ctx
, packing
);
657 radeon_teximage_unmap(image
);
662 void radeonTexImage1D(GLcontext
* ctx
, GLenum target
, GLint level
,
663 GLint internalFormat
,
664 GLint width
, GLint border
,
665 GLenum format
, GLenum type
, const GLvoid
* pixels
,
666 const struct gl_pixelstore_attrib
*packing
,
667 struct gl_texture_object
*texObj
,
668 struct gl_texture_image
*texImage
)
670 radeon_teximage(ctx
, 1, target
, level
, internalFormat
, width
, 1, 1,
671 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
674 void radeonTexImage2D(GLcontext
* ctx
, GLenum target
, GLint level
,
675 GLint internalFormat
,
676 GLint width
, GLint height
, GLint border
,
677 GLenum format
, GLenum type
, const GLvoid
* pixels
,
678 const struct gl_pixelstore_attrib
*packing
,
679 struct gl_texture_object
*texObj
,
680 struct gl_texture_image
*texImage
)
683 radeon_teximage(ctx
, 2, target
, level
, internalFormat
, width
, height
, 1,
684 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
687 void radeonCompressedTexImage2D(GLcontext
* ctx
, GLenum target
,
688 GLint level
, GLint internalFormat
,
689 GLint width
, GLint height
, GLint border
,
690 GLsizei imageSize
, const GLvoid
* data
,
691 struct gl_texture_object
*texObj
,
692 struct gl_texture_image
*texImage
)
694 radeon_teximage(ctx
, 2, target
, level
, internalFormat
, width
, height
, 1,
695 imageSize
, 0, 0, data
, &ctx
->Unpack
, texObj
, texImage
, 1);
698 void radeonTexImage3D(GLcontext
* ctx
, GLenum target
, GLint level
,
699 GLint internalFormat
,
700 GLint width
, GLint height
, GLint depth
,
702 GLenum format
, GLenum type
, const GLvoid
* pixels
,
703 const struct gl_pixelstore_attrib
*packing
,
704 struct gl_texture_object
*texObj
,
705 struct gl_texture_image
*texImage
)
707 radeon_teximage(ctx
, 3, target
, level
, internalFormat
, width
, height
, depth
,
708 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
712 * Update a subregion of the given texture image.
714 static void radeon_texsubimage(GLcontext
* ctx
, int dims
, GLenum target
, int level
,
715 GLint xoffset
, GLint yoffset
, GLint zoffset
,
716 GLsizei width
, GLsizei height
, GLsizei depth
,
718 GLenum format
, GLenum type
,
719 const GLvoid
* pixels
,
720 const struct gl_pixelstore_attrib
*packing
,
721 struct gl_texture_object
*texObj
,
722 struct gl_texture_image
*texImage
,
725 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
726 radeonTexObj
* t
= radeon_tex_obj(texObj
);
727 radeon_texture_image
* image
= get_radeon_texture_image(texImage
);
729 radeon_firevertices(rmesa
);
731 t
->validated
= GL_FALSE
;
733 pixels
= _mesa_validate_pbo_compressed_teximage(
734 ctx
, imageSize
, pixels
, packing
, "glCompressedTexImage");
736 pixels
= _mesa_validate_pbo_teximage(ctx
, dims
,
737 width
, height
, depth
, format
, type
, pixels
, packing
, "glTexSubImage1D");
742 radeon_teximage_map(image
, GL_TRUE
);
745 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
746 dstRowStride
= lvl
->rowstride
;
748 dstRowStride
= texImage
->RowStride
* _mesa_get_format_bytes(texImage
->TexFormat
);
752 uint32_t srcRowStride
, bytesPerRow
, rows
;
755 dstRowStride
= _mesa_format_row_stride(texImage
->TexFormat
, texImage
->Width
);
756 img_start
= _mesa_compressed_image_address(xoffset
, yoffset
, 0,
758 texImage
->Width
, texImage
->Data
);
761 uint32_t blocks_x
= dstRowStride
/ (image
->mt
->bpp
* 4);
762 img_start
= texImage
->Data
+ image
->mt
->bpp
* 4 * (blocks_x
* (yoffset
/ 4) + xoffset
/ 4);
764 srcRowStride
= _mesa_format_row_stride(texImage
->TexFormat
, width
);
765 bytesPerRow
= srcRowStride
;
766 rows
= (height
+ 3) / 4;
768 copy_rows(img_start
, dstRowStride
, pixels
, srcRowStride
, rows
, bytesPerRow
);
772 if (!_mesa_texstore(ctx
, dims
, texImage
->_BaseFormat
,
773 texImage
->TexFormat
, texImage
->Data
,
774 xoffset
, yoffset
, zoffset
,
776 texImage
->ImageOffsets
,
777 width
, height
, depth
,
778 format
, type
, pixels
, packing
)) {
779 _mesa_error(ctx
, GL_OUT_OF_MEMORY
, "glTexSubImage");
784 radeon_teximage_unmap(image
);
786 _mesa_unmap_teximage_pbo(ctx
, packing
);
791 void radeonTexSubImage1D(GLcontext
* ctx
, GLenum target
, GLint level
,
794 GLenum format
, GLenum type
,
795 const GLvoid
* pixels
,
796 const struct gl_pixelstore_attrib
*packing
,
797 struct gl_texture_object
*texObj
,
798 struct gl_texture_image
*texImage
)
800 radeon_texsubimage(ctx
, 1, target
, level
, xoffset
, 0, 0, width
, 1, 1, 0,
801 format
, type
, pixels
, packing
, texObj
, texImage
, 0);
804 void radeonTexSubImage2D(GLcontext
* ctx
, GLenum target
, GLint level
,
805 GLint xoffset
, GLint yoffset
,
806 GLsizei width
, GLsizei height
,
807 GLenum format
, GLenum type
,
808 const GLvoid
* pixels
,
809 const struct gl_pixelstore_attrib
*packing
,
810 struct gl_texture_object
*texObj
,
811 struct gl_texture_image
*texImage
)
813 radeon_texsubimage(ctx
, 2, target
, level
, xoffset
, yoffset
, 0, width
, height
, 1,
814 0, format
, type
, pixels
, packing
, texObj
, texImage
,
818 void radeonCompressedTexSubImage2D(GLcontext
* ctx
, GLenum target
,
819 GLint level
, GLint xoffset
,
820 GLint yoffset
, GLsizei width
,
821 GLsizei height
, GLenum format
,
822 GLsizei imageSize
, const GLvoid
* data
,
823 struct gl_texture_object
*texObj
,
824 struct gl_texture_image
*texImage
)
826 radeon_texsubimage(ctx
, 2, target
, level
, xoffset
, yoffset
, 0, width
, height
, 1,
827 imageSize
, format
, 0, data
, &ctx
->Unpack
, texObj
, texImage
, 1);
831 void radeonTexSubImage3D(GLcontext
* ctx
, GLenum target
, GLint level
,
832 GLint xoffset
, GLint yoffset
, GLint zoffset
,
833 GLsizei width
, GLsizei height
, GLsizei depth
,
834 GLenum format
, GLenum type
,
835 const GLvoid
* pixels
,
836 const struct gl_pixelstore_attrib
*packing
,
837 struct gl_texture_object
*texObj
,
838 struct gl_texture_image
*texImage
)
840 radeon_texsubimage(ctx
, 3, target
, level
, xoffset
, yoffset
, zoffset
, width
, height
, depth
, 0,
841 format
, type
, pixels
, packing
, texObj
, texImage
, 0);
847 * Ensure that the given image is stored in the given miptree from now on.
849 static void migrate_image_to_miptree(radeon_mipmap_tree
*mt
, radeon_texture_image
*image
, int face
, int level
)
851 radeon_mipmap_level
*dstlvl
= &mt
->levels
[level
- mt
->firstLevel
];
854 assert(image
->mt
!= mt
);
855 assert(dstlvl
->width
== image
->base
.Width
);
856 assert(dstlvl
->height
== image
->base
.Height
);
857 assert(dstlvl
->depth
== image
->base
.Depth
);
860 radeon_bo_map(mt
->bo
, GL_TRUE
);
861 dest
= mt
->bo
->ptr
+ dstlvl
->faces
[face
].offset
;
864 /* Format etc. should match, so we really just need a memcpy().
865 * In fact, that memcpy() could be done by the hardware in many
866 * cases, provided that we have a proper memory manager.
868 radeon_mipmap_level
*srclvl
= &image
->mt
->levels
[image
->mtlevel
-image
->mt
->firstLevel
];
870 assert(srclvl
->size
== dstlvl
->size
);
871 assert(srclvl
->rowstride
== dstlvl
->rowstride
);
873 radeon_bo_map(image
->mt
->bo
, GL_FALSE
);
876 image
->mt
->bo
->ptr
+ srclvl
->faces
[face
].offset
,
878 radeon_bo_unmap(image
->mt
->bo
);
880 radeon_miptree_unreference(image
->mt
);
882 uint32_t srcrowstride
;
884 /* need to confirm this value is correct */
885 if (mt
->compressed
) {
886 height
= (image
->base
.Height
+ 3) / 4;
887 srcrowstride
= _mesa_format_row_stride(image
->base
.TexFormat
, image
->base
.Width
);
889 height
= image
->base
.Height
* image
->base
.Depth
;
890 srcrowstride
= image
->base
.Width
* _mesa_get_format_bytes(image
->base
.TexFormat
);
894 // WARN_ONCE("%s: tiling not supported yet", __FUNCTION__);
896 copy_rows(dest
, dstlvl
->rowstride
, image
->base
.Data
, srcrowstride
,
897 height
, srcrowstride
);
899 _mesa_free_texmemory(image
->base
.Data
);
900 image
->base
.Data
= 0;
903 radeon_bo_unmap(mt
->bo
);
906 image
->mtface
= face
;
907 image
->mtlevel
= level
;
908 radeon_miptree_reference(image
->mt
);
911 int radeon_validate_texture_miptree(GLcontext
* ctx
, struct gl_texture_object
*texObj
)
913 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
914 radeonTexObj
*t
= radeon_tex_obj(texObj
);
915 radeon_texture_image
*baseimage
= get_radeon_texture_image(texObj
->Image
[0][texObj
->BaseLevel
]);
918 if (t
->validated
|| t
->image_override
)
921 if (RADEON_DEBUG
& RADEON_TEXTURE
)
922 fprintf(stderr
, "%s: Validating texture %p now\n", __FUNCTION__
, texObj
);
924 if (baseimage
->base
.Border
> 0)
927 /* Ensure a matching miptree exists.
929 * Differing mipmap trees can result when the app uses TexImage to
930 * change texture dimensions.
932 * Prefer to use base image's miptree if it
933 * exists, since that most likely contains more valid data (remember
934 * that the base level is usually significantly larger than the rest
935 * of the miptree, so cubemaps are the only possible exception).
938 baseimage
->mt
!= t
->mt
&&
939 radeon_miptree_matches_texture(baseimage
->mt
, &t
->base
)) {
940 radeon_miptree_unreference(t
->mt
);
941 t
->mt
= baseimage
->mt
;
942 radeon_miptree_reference(t
->mt
);
943 } else if (t
->mt
&& !radeon_miptree_matches_texture(t
->mt
, &t
->base
)) {
944 radeon_miptree_unreference(t
->mt
);
949 if (RADEON_DEBUG
& RADEON_TEXTURE
)
950 fprintf(stderr
, " Allocate new miptree\n");
951 radeon_try_alloc_miptree(rmesa
, t
, baseimage
, 0, texObj
->BaseLevel
);
953 _mesa_problem(ctx
, "radeon_validate_texture failed to alloc miptree");
958 /* Ensure all images are stored in the single main miptree */
959 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
960 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
) {
961 radeon_texture_image
*image
= get_radeon_texture_image(texObj
->Image
[face
][level
]);
962 if (RADEON_DEBUG
& RADEON_TEXTURE
)
963 fprintf(stderr
, " face %i, level %i... %p vs %p ", face
, level
, t
->mt
, image
->mt
);
964 if (t
->mt
== image
->mt
) {
965 if (RADEON_DEBUG
& RADEON_TEXTURE
)
966 fprintf(stderr
, "OK\n");
971 if (RADEON_DEBUG
& RADEON_TEXTURE
)
972 fprintf(stderr
, "migrating\n");
973 migrate_image_to_miptree(t
->mt
, image
, face
, level
);
982 * Need to map texture image into memory before copying image data,
986 radeon_get_tex_image(GLcontext
* ctx
, GLenum target
, GLint level
,
987 GLenum format
, GLenum type
, GLvoid
* pixels
,
988 struct gl_texture_object
*texObj
,
989 struct gl_texture_image
*texImage
, int compressed
)
991 radeon_texture_image
*image
= get_radeon_texture_image(texImage
);
994 /* Map the texture image read-only */
995 radeon_teximage_map(image
, GL_FALSE
);
997 /* Image hasn't been uploaded to a miptree yet */
998 assert(image
->base
.Data
);
1002 /* FIXME: this can't work for small textures (mips) which
1003 use different hw stride */
1004 _mesa_get_compressed_teximage(ctx
, target
, level
, pixels
,
1007 _mesa_get_teximage(ctx
, target
, level
, format
, type
, pixels
,
1012 radeon_teximage_unmap(image
);
1017 radeonGetTexImage(GLcontext
* ctx
, GLenum target
, GLint level
,
1018 GLenum format
, GLenum type
, GLvoid
* pixels
,
1019 struct gl_texture_object
*texObj
,
1020 struct gl_texture_image
*texImage
)
1022 radeon_get_tex_image(ctx
, target
, level
, format
, type
, pixels
,
1023 texObj
, texImage
, 0);
1027 radeonGetCompressedTexImage(GLcontext
*ctx
, GLenum target
, GLint level
,
1029 struct gl_texture_object
*texObj
,
1030 struct gl_texture_image
*texImage
)
1032 radeon_get_tex_image(ctx
, target
, level
, 0, 0, pixels
,
1033 texObj
, texImage
, 1);