2 * Copyright (C) 2008 Nicolai Haehnle.
3 * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
5 * The Weather Channel (TM) funded Tungsten Graphics to develop the
6 * initial release of the Radeon 8500 driver under the XFree86 license.
7 * This notice must be preserved.
9 * Permission is hereby granted, free of charge, to any person obtaining
10 * a copy of this software and associated documentation files (the
11 * "Software"), to deal in the Software without restriction, including
12 * without limitation the rights to use, copy, modify, merge, publish,
13 * distribute, sublicense, and/or sell copies of the Software, and to
14 * permit persons to whom the Software is furnished to do so, subject to
15 * the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial
19 * portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 #include "main/glheader.h"
32 #include "main/imports.h"
33 #include "main/context.h"
34 #include "main/convolve.h"
35 #include "main/mipmap.h"
36 #include "main/texcompress.h"
37 #include "main/texformat.h"
38 #include "main/texstore.h"
39 #include "main/teximage.h"
40 #include "main/texobj.h"
41 #include "main/texgetimage.h"
43 #include "xmlpool.h" /* for symbolic values of enum-type options */
45 #include "radeon_common.h"
47 #include "radeon_mipmap_tree.h"
50 static void copy_rows(void* dst
, GLuint dststride
, const void* src
, GLuint srcstride
,
51 GLuint numrows
, GLuint rowsize
)
53 assert(rowsize
<= dststride
);
54 assert(rowsize
<= srcstride
);
56 if (rowsize
== srcstride
&& rowsize
== dststride
) {
57 memcpy(dst
, src
, numrows
*rowsize
);
60 for(i
= 0; i
< numrows
; ++i
) {
61 memcpy(dst
, src
, rowsize
);
70 * Allocate an empty texture image object.
72 struct gl_texture_image
*radeonNewTextureImage(GLcontext
*ctx
)
74 return CALLOC(sizeof(radeon_texture_image
));
78 * Free memory associated with this texture image.
80 void radeonFreeTexImageData(GLcontext
*ctx
, struct gl_texture_image
*timage
)
82 radeon_texture_image
* image
= get_radeon_texture_image(timage
);
85 radeon_miptree_unreference(image
->mt
);
87 assert(!image
->base
.Data
);
89 _mesa_free_texture_image_data(ctx
, timage
);
92 radeon_bo_unref(image
->bo
);
96 _mesa_free_texmemory(timage
->Data
);
101 /* Set Data pointer and additional data for mapped texture image */
102 static void teximage_set_map_data(radeon_texture_image
*image
)
104 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
106 image
->base
.Data
= image
->mt
->bo
->ptr
+ lvl
->faces
[image
->mtface
].offset
;
107 image
->base
.RowStride
= lvl
->rowstride
/ image
->mt
->bpp
;
112 * Map a single texture image for glTexImage and friends.
114 void radeon_teximage_map(radeon_texture_image
*image
, GLboolean write_enable
)
117 assert(!image
->base
.Data
);
119 radeon_bo_map(image
->mt
->bo
, write_enable
);
120 teximage_set_map_data(image
);
125 void radeon_teximage_unmap(radeon_texture_image
*image
)
128 assert(image
->base
.Data
);
130 image
->base
.Data
= 0;
131 radeon_bo_unmap(image
->mt
->bo
);
135 static void map_override(GLcontext
*ctx
, radeonTexObj
*t
)
137 radeon_texture_image
*img
= get_radeon_texture_image(t
->base
.Image
[0][0]);
139 radeon_bo_map(t
->bo
, GL_FALSE
);
141 img
->base
.Data
= t
->bo
->ptr
;
144 static void unmap_override(GLcontext
*ctx
, radeonTexObj
*t
)
146 radeon_texture_image
*img
= get_radeon_texture_image(t
->base
.Image
[0][0]);
148 radeon_bo_unmap(t
->bo
);
150 img
->base
.Data
= NULL
;
154 * Map a validated texture for reading during software rendering.
156 void radeonMapTexture(GLcontext
*ctx
, struct gl_texture_object
*texObj
)
158 radeonTexObj
* t
= radeon_tex_obj(texObj
);
161 if (!radeon_validate_texture_miptree(ctx
, texObj
))
164 /* for r100 3D sw fallbacks don't have mt */
165 if (t
->image_override
&& t
->bo
)
166 map_override(ctx
, t
);
171 radeon_bo_map(t
->mt
->bo
, GL_FALSE
);
172 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
173 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
)
174 teximage_set_map_data(get_radeon_texture_image(texObj
->Image
[face
][level
]));
178 void radeonUnmapTexture(GLcontext
*ctx
, struct gl_texture_object
*texObj
)
180 radeonTexObj
* t
= radeon_tex_obj(texObj
);
183 if (t
->image_override
&& t
->bo
)
184 unmap_override(ctx
, t
);
185 /* for r100 3D sw fallbacks don't have mt */
189 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
190 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
)
191 texObj
->Image
[face
][level
]->Data
= 0;
193 radeon_bo_unmap(t
->mt
->bo
);
196 GLuint
radeon_face_for_target(GLenum target
)
199 case GL_TEXTURE_CUBE_MAP_POSITIVE_X
:
200 case GL_TEXTURE_CUBE_MAP_NEGATIVE_X
:
201 case GL_TEXTURE_CUBE_MAP_POSITIVE_Y
:
202 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Y
:
203 case GL_TEXTURE_CUBE_MAP_POSITIVE_Z
:
204 case GL_TEXTURE_CUBE_MAP_NEGATIVE_Z
:
205 return (GLuint
) target
- (GLuint
) GL_TEXTURE_CUBE_MAP_POSITIVE_X
;
212 * Wraps Mesa's implementation to ensure that the base level image is mapped.
214 * This relies on internal details of _mesa_generate_mipmap, in particular
215 * the fact that the memory for recreated texture images is always freed.
217 static void radeon_generate_mipmap(GLcontext
*ctx
, GLenum target
,
218 struct gl_texture_object
*texObj
)
220 radeonTexObj
* t
= radeon_tex_obj(texObj
);
221 GLuint nr_faces
= (t
->base
.Target
== GL_TEXTURE_CUBE_MAP
) ? 6 : 1;
225 _mesa_generate_mipmap(ctx
, target
, texObj
);
227 for (face
= 0; face
< nr_faces
; face
++) {
228 for (i
= texObj
->BaseLevel
+ 1; i
< texObj
->MaxLevel
; i
++) {
229 radeon_texture_image
*image
;
231 image
= get_radeon_texture_image(texObj
->Image
[face
][i
]);
237 image
->mtface
= face
;
239 radeon_miptree_unreference(image
->mt
);
246 void radeonGenerateMipmap(GLcontext
* ctx
, GLenum target
, struct gl_texture_object
*texObj
)
248 GLuint face
= radeon_face_for_target(target
);
249 radeon_texture_image
*baseimage
= get_radeon_texture_image(texObj
->Image
[face
][texObj
->BaseLevel
]);
251 radeon_teximage_map(baseimage
, GL_FALSE
);
252 radeon_generate_mipmap(ctx
, target
, texObj
);
253 radeon_teximage_unmap(baseimage
);
257 /* try to find a format which will only need a memcopy */
258 static gl_format
radeonChoose8888TexFormat(radeonContextPtr rmesa
,
260 GLenum srcType
, GLboolean fbo
)
263 const GLubyte littleEndian
= *((const GLubyte
*)&ui
);
265 /* r100 can only do this */
266 if (IS_R100_CLASS(rmesa
->radeonScreen
) || fbo
)
267 return _dri_texformat_argb8888
;
269 if ((srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_INT_8_8_8_8
) ||
270 (srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
) ||
271 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
) ||
272 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_BYTE
&& littleEndian
)) {
273 return MESA_FORMAT_RGBA8888
;
274 } else if ((srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
) ||
275 (srcFormat
== GL_RGBA
&& srcType
== GL_UNSIGNED_BYTE
&& littleEndian
) ||
276 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_INT_8_8_8_8
) ||
277 (srcFormat
== GL_ABGR_EXT
&& srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
)) {
278 return MESA_FORMAT_RGBA8888_REV
;
279 } else if (IS_R200_CLASS(rmesa
->radeonScreen
)) {
280 return _dri_texformat_argb8888
;
281 } else if (srcFormat
== GL_BGRA
&& ((srcType
== GL_UNSIGNED_BYTE
&& !littleEndian
) ||
282 srcType
== GL_UNSIGNED_INT_8_8_8_8
)) {
283 return MESA_FORMAT_ARGB8888_REV
;
284 } else if (srcFormat
== GL_BGRA
&& ((srcType
== GL_UNSIGNED_BYTE
&& littleEndian
) ||
285 srcType
== GL_UNSIGNED_INT_8_8_8_8_REV
)) {
286 return MESA_FORMAT_ARGB8888
;
288 return _dri_texformat_argb8888
;
291 gl_format
radeonChooseTextureFormat_mesa(GLcontext
* ctx
,
292 GLint internalFormat
,
296 return radeonChooseTextureFormat(ctx
, internalFormat
, format
,
300 gl_format
radeonChooseTextureFormat(GLcontext
* ctx
,
301 GLint internalFormat
,
303 GLenum type
, GLboolean fbo
)
305 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
306 const GLboolean do32bpt
=
307 (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_32
);
308 const GLboolean force16bpt
=
309 (rmesa
->texture_depth
== DRI_CONF_TEXTURE_DEPTH_FORCE_16
);
313 fprintf(stderr
, "InternalFormat=%s(%d) type=%s format=%s\n",
314 _mesa_lookup_enum_by_nr(internalFormat
), internalFormat
,
315 _mesa_lookup_enum_by_nr(type
), _mesa_lookup_enum_by_nr(format
));
316 fprintf(stderr
, "do32bpt=%d force16bpt=%d\n", do32bpt
, force16bpt
);
319 switch (internalFormat
) {
322 case GL_COMPRESSED_RGBA
:
324 case GL_UNSIGNED_INT_10_10_10_2
:
325 case GL_UNSIGNED_INT_2_10_10_10_REV
:
326 return do32bpt
? _dri_texformat_argb8888
:
327 _dri_texformat_argb1555
;
328 case GL_UNSIGNED_SHORT_4_4_4_4
:
329 case GL_UNSIGNED_SHORT_4_4_4_4_REV
:
330 return _dri_texformat_argb4444
;
331 case GL_UNSIGNED_SHORT_5_5_5_1
:
332 case GL_UNSIGNED_SHORT_1_5_5_5_REV
:
333 return _dri_texformat_argb1555
;
335 return do32bpt
? radeonChoose8888TexFormat(rmesa
, format
, type
, fbo
) :
336 _dri_texformat_argb4444
;
341 case GL_COMPRESSED_RGB
:
343 case GL_UNSIGNED_SHORT_4_4_4_4
:
344 case GL_UNSIGNED_SHORT_4_4_4_4_REV
:
345 return _dri_texformat_argb4444
;
346 case GL_UNSIGNED_SHORT_5_5_5_1
:
347 case GL_UNSIGNED_SHORT_1_5_5_5_REV
:
348 return _dri_texformat_argb1555
;
349 case GL_UNSIGNED_SHORT_5_6_5
:
350 case GL_UNSIGNED_SHORT_5_6_5_REV
:
351 return _dri_texformat_rgb565
;
353 return do32bpt
? _dri_texformat_argb8888
:
354 _dri_texformat_rgb565
;
362 radeonChoose8888TexFormat(rmesa
, format
, type
, fbo
) :
363 _dri_texformat_argb4444
;
367 return _dri_texformat_argb4444
;
370 return _dri_texformat_argb1555
;
376 return !force16bpt
? _dri_texformat_argb8888
:
377 _dri_texformat_rgb565
;
382 return _dri_texformat_rgb565
;
389 case GL_COMPRESSED_ALPHA
:
390 /* r200: can't use a8 format since interpreting hw I8 as a8 would result
391 in wrong rgb values (same as alpha value instead of 0). */
392 if (IS_R200_CLASS(rmesa
->radeonScreen
))
393 return _dri_texformat_al88
;
395 return _dri_texformat_a8
;
402 case GL_COMPRESSED_LUMINANCE
:
403 return _dri_texformat_l8
;
406 case GL_LUMINANCE_ALPHA
:
407 case GL_LUMINANCE4_ALPHA4
:
408 case GL_LUMINANCE6_ALPHA2
:
409 case GL_LUMINANCE8_ALPHA8
:
410 case GL_LUMINANCE12_ALPHA4
:
411 case GL_LUMINANCE12_ALPHA12
:
412 case GL_LUMINANCE16_ALPHA16
:
413 case GL_COMPRESSED_LUMINANCE_ALPHA
:
414 return _dri_texformat_al88
;
421 case GL_COMPRESSED_INTENSITY
:
422 return _dri_texformat_i8
;
425 if (type
== GL_UNSIGNED_SHORT_8_8_APPLE
||
426 type
== GL_UNSIGNED_BYTE
)
427 return MESA_FORMAT_YCBCR
;
429 return MESA_FORMAT_YCBCR_REV
;
433 case GL_COMPRESSED_RGB_S3TC_DXT1_EXT
:
434 return MESA_FORMAT_RGB_DXT1
;
436 case GL_COMPRESSED_RGBA_S3TC_DXT1_EXT
:
437 return MESA_FORMAT_RGBA_DXT1
;
441 case GL_COMPRESSED_RGBA_S3TC_DXT3_EXT
:
442 return MESA_FORMAT_RGBA_DXT3
;
444 case GL_COMPRESSED_RGBA_S3TC_DXT5_EXT
:
445 return MESA_FORMAT_RGBA_DXT5
;
447 case GL_ALPHA16F_ARB
:
448 return MESA_FORMAT_ALPHA_FLOAT16
;
449 case GL_ALPHA32F_ARB
:
450 return MESA_FORMAT_ALPHA_FLOAT32
;
451 case GL_LUMINANCE16F_ARB
:
452 return MESA_FORMAT_LUMINANCE_FLOAT16
;
453 case GL_LUMINANCE32F_ARB
:
454 return MESA_FORMAT_LUMINANCE_FLOAT32
;
455 case GL_LUMINANCE_ALPHA16F_ARB
:
456 return MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16
;
457 case GL_LUMINANCE_ALPHA32F_ARB
:
458 return MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32
;
459 case GL_INTENSITY16F_ARB
:
460 return MESA_FORMAT_INTENSITY_FLOAT16
;
461 case GL_INTENSITY32F_ARB
:
462 return MESA_FORMAT_INTENSITY_FLOAT32
;
464 return MESA_FORMAT_RGBA_FLOAT16
;
466 return MESA_FORMAT_RGBA_FLOAT32
;
468 return MESA_FORMAT_RGBA_FLOAT16
;
470 return MESA_FORMAT_RGBA_FLOAT32
;
472 case GL_DEPTH_COMPONENT
:
473 case GL_DEPTH_COMPONENT16
:
474 case GL_DEPTH_COMPONENT24
:
475 case GL_DEPTH_COMPONENT32
:
476 case GL_DEPTH_STENCIL_EXT
:
477 case GL_DEPTH24_STENCIL8_EXT
:
478 return MESA_FORMAT_S8_Z24
;
480 /* EXT_texture_sRGB */
484 case GL_SRGB8_ALPHA8
:
485 case GL_COMPRESSED_SRGB
:
486 case GL_COMPRESSED_SRGB_ALPHA
:
487 return MESA_FORMAT_SRGBA8
;
491 case GL_COMPRESSED_SLUMINANCE
:
492 return MESA_FORMAT_SL8
;
494 case GL_SLUMINANCE_ALPHA
:
495 case GL_SLUMINANCE8_ALPHA8
:
496 case GL_COMPRESSED_SLUMINANCE_ALPHA
:
497 return MESA_FORMAT_SLA8
;
501 "unexpected internalFormat 0x%x in %s",
502 (int)internalFormat
, __func__
);
503 return MESA_FORMAT_NONE
;
506 return MESA_FORMAT_NONE
; /* never get here */
510 * All glTexImage calls go through this function.
512 static void radeon_teximage(
513 GLcontext
*ctx
, int dims
,
514 GLenum target
, GLint level
,
515 GLint internalFormat
,
516 GLint width
, GLint height
, GLint depth
,
518 GLenum format
, GLenum type
, const GLvoid
* pixels
,
519 const struct gl_pixelstore_attrib
*packing
,
520 struct gl_texture_object
*texObj
,
521 struct gl_texture_image
*texImage
,
524 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
525 radeonTexObj
* t
= radeon_tex_obj(texObj
);
526 radeon_texture_image
* image
= get_radeon_texture_image(texImage
);
528 GLint postConvWidth
= width
;
529 GLint postConvHeight
= height
;
531 GLuint face
= radeon_face_for_target(target
);
533 radeon_firevertices(rmesa
);
535 t
->validated
= GL_FALSE
;
537 if (ctx
->_ImageTransferState
& IMAGE_CONVOLUTION_BIT
) {
538 _mesa_adjust_image_for_convolution(ctx
, dims
, &postConvWidth
,
542 /* Choose and fill in the texture format for this image */
543 texImage
->TexFormat
= radeonChooseTextureFormat(ctx
, internalFormat
, format
, type
, 0);
545 if (_mesa_is_format_compressed(texImage
->TexFormat
)) {
548 texelBytes
= _mesa_get_format_bytes(texImage
->TexFormat
);
549 /* Minimum pitch of 32 bytes */
550 if (postConvWidth
* texelBytes
< 32) {
551 postConvWidth
= 32 / texelBytes
;
552 texImage
->RowStride
= postConvWidth
;
555 assert(texImage
->RowStride
== postConvWidth
);
559 /* Allocate memory for image */
560 radeonFreeTexImageData(ctx
, texImage
); /* Mesa core only clears texImage->Data but not image->mt */
563 t
->mt
->firstLevel
== level
&&
564 t
->mt
->lastLevel
== level
&&
565 t
->mt
->target
!= GL_TEXTURE_CUBE_MAP_ARB
&&
566 !radeon_miptree_matches_image(t
->mt
, texImage
, face
, level
)) {
567 radeon_miptree_unreference(t
->mt
);
572 radeon_try_alloc_miptree(rmesa
, t
, image
, face
, level
);
573 if (t
->mt
&& radeon_miptree_matches_image(t
->mt
, texImage
, face
, level
)) {
574 radeon_mipmap_level
*lvl
;
576 image
->mtlevel
= level
- t
->mt
->firstLevel
;
577 image
->mtface
= face
;
578 radeon_miptree_reference(t
->mt
);
579 lvl
= &image
->mt
->levels
[image
->mtlevel
];
580 dstRowStride
= lvl
->rowstride
;
583 if (_mesa_is_format_compressed(texImage
->TexFormat
)) {
584 size
= ctx
->Driver
.CompressedTextureSize(ctx
,
588 texImage
->TexFormat
);
591 size
= texImage
->Width
* texImage
->Height
* texImage
->Depth
* _mesa_get_format_bytes(texImage
->TexFormat
);
593 texImage
->Data
= _mesa_alloc_texmemory(size
);
596 /* Upload texture image; note that the spec allows pixels to be NULL */
598 pixels
= _mesa_validate_pbo_compressed_teximage(
599 ctx
, imageSize
, pixels
, packing
, "glCompressedTexImage");
601 pixels
= _mesa_validate_pbo_teximage(
602 ctx
, dims
, width
, height
, depth
,
603 format
, type
, pixels
, packing
, "glTexImage");
607 radeon_teximage_map(image
, GL_TRUE
);
610 uint32_t srcRowStride
, bytesPerRow
, rows
;
611 srcRowStride
= _mesa_compressed_row_stride(texImage
->TexFormat
, width
);
612 bytesPerRow
= srcRowStride
;
613 rows
= (height
+ 3) / 4;
614 copy_rows(texImage
->Data
, image
->mt
->levels
[level
].rowstride
,
615 pixels
, srcRowStride
, rows
, bytesPerRow
);
617 memcpy(texImage
->Data
, pixels
, imageSize
);
621 GLuint
*dstImageOffsets
;
624 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
625 dstRowStride
= lvl
->rowstride
;
627 dstRowStride
= texImage
->Width
* _mesa_get_format_bytes(texImage
->TexFormat
);
633 dstImageOffsets
= _mesa_malloc(depth
* sizeof(GLuint
)) ;
634 if (!dstImageOffsets
)
635 _mesa_error(ctx
, GL_OUT_OF_MEMORY
, "glTexImage");
637 for (i
= 0; i
< depth
; ++i
) {
638 dstImageOffsets
[i
] = dstRowStride
/_mesa_get_format_bytes(texImage
->TexFormat
) * height
* i
;
641 dstImageOffsets
= texImage
->ImageOffsets
;
644 if (!_mesa_texstore(ctx
, dims
,
645 texImage
->_BaseFormat
,
647 texImage
->Data
, 0, 0, 0, /* dstX/Y/Zoffset */
650 width
, height
, depth
,
651 format
, type
, pixels
, packing
)) {
652 _mesa_error(ctx
, GL_OUT_OF_MEMORY
, "glTexImage");
656 _mesa_free(dstImageOffsets
);
660 _mesa_unmap_teximage_pbo(ctx
, packing
);
663 radeon_teximage_unmap(image
);
668 void radeonTexImage1D(GLcontext
* ctx
, GLenum target
, GLint level
,
669 GLint internalFormat
,
670 GLint width
, GLint border
,
671 GLenum format
, GLenum type
, const GLvoid
* pixels
,
672 const struct gl_pixelstore_attrib
*packing
,
673 struct gl_texture_object
*texObj
,
674 struct gl_texture_image
*texImage
)
676 radeon_teximage(ctx
, 1, target
, level
, internalFormat
, width
, 1, 1,
677 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
680 void radeonTexImage2D(GLcontext
* ctx
, GLenum target
, GLint level
,
681 GLint internalFormat
,
682 GLint width
, GLint height
, GLint border
,
683 GLenum format
, GLenum type
, const GLvoid
* pixels
,
684 const struct gl_pixelstore_attrib
*packing
,
685 struct gl_texture_object
*texObj
,
686 struct gl_texture_image
*texImage
)
689 radeon_teximage(ctx
, 2, target
, level
, internalFormat
, width
, height
, 1,
690 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
693 void radeonCompressedTexImage2D(GLcontext
* ctx
, GLenum target
,
694 GLint level
, GLint internalFormat
,
695 GLint width
, GLint height
, GLint border
,
696 GLsizei imageSize
, const GLvoid
* data
,
697 struct gl_texture_object
*texObj
,
698 struct gl_texture_image
*texImage
)
700 radeon_teximage(ctx
, 2, target
, level
, internalFormat
, width
, height
, 1,
701 imageSize
, 0, 0, data
, &ctx
->Unpack
, texObj
, texImage
, 1);
704 void radeonTexImage3D(GLcontext
* ctx
, GLenum target
, GLint level
,
705 GLint internalFormat
,
706 GLint width
, GLint height
, GLint depth
,
708 GLenum format
, GLenum type
, const GLvoid
* pixels
,
709 const struct gl_pixelstore_attrib
*packing
,
710 struct gl_texture_object
*texObj
,
711 struct gl_texture_image
*texImage
)
713 radeon_teximage(ctx
, 3, target
, level
, internalFormat
, width
, height
, depth
,
714 0, format
, type
, pixels
, packing
, texObj
, texImage
, 0);
718 * Update a subregion of the given texture image.
720 static void radeon_texsubimage(GLcontext
* ctx
, int dims
, GLenum target
, int level
,
721 GLint xoffset
, GLint yoffset
, GLint zoffset
,
722 GLsizei width
, GLsizei height
, GLsizei depth
,
724 GLenum format
, GLenum type
,
725 const GLvoid
* pixels
,
726 const struct gl_pixelstore_attrib
*packing
,
727 struct gl_texture_object
*texObj
,
728 struct gl_texture_image
*texImage
,
731 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
732 radeonTexObj
* t
= radeon_tex_obj(texObj
);
733 radeon_texture_image
* image
= get_radeon_texture_image(texImage
);
735 radeon_firevertices(rmesa
);
737 t
->validated
= GL_FALSE
;
739 pixels
= _mesa_validate_pbo_compressed_teximage(
740 ctx
, imageSize
, pixels
, packing
, "glCompressedTexImage");
742 pixels
= _mesa_validate_pbo_teximage(ctx
, dims
,
743 width
, height
, depth
, format
, type
, pixels
, packing
, "glTexSubImage1D");
748 radeon_teximage_map(image
, GL_TRUE
);
751 radeon_mipmap_level
*lvl
= &image
->mt
->levels
[image
->mtlevel
];
752 dstRowStride
= lvl
->rowstride
;
754 dstRowStride
= texImage
->RowStride
* _mesa_get_format_bytes(texImage
->TexFormat
);
758 uint32_t srcRowStride
, bytesPerRow
, rows
;
761 dstRowStride
= _mesa_compressed_row_stride(texImage
->TexFormat
, texImage
->Width
);
762 img_start
= _mesa_compressed_image_address(xoffset
, yoffset
, 0,
764 texImage
->Width
, texImage
->Data
);
767 uint32_t blocks_x
= dstRowStride
/ (image
->mt
->bpp
* 4);
768 img_start
= texImage
->Data
+ image
->mt
->bpp
* 4 * (blocks_x
* (yoffset
/ 4) + xoffset
/ 4);
770 srcRowStride
= _mesa_compressed_row_stride(texImage
->TexFormat
, width
);
771 bytesPerRow
= srcRowStride
;
772 rows
= (height
+ 3) / 4;
774 copy_rows(img_start
, dstRowStride
, pixels
, srcRowStride
, rows
, bytesPerRow
);
778 if (!_mesa_texstore(ctx
, dims
, texImage
->_BaseFormat
,
779 texImage
->TexFormat
, texImage
->Data
,
780 xoffset
, yoffset
, zoffset
,
782 texImage
->ImageOffsets
,
783 width
, height
, depth
,
784 format
, type
, pixels
, packing
)) {
785 _mesa_error(ctx
, GL_OUT_OF_MEMORY
, "glTexSubImage");
790 radeon_teximage_unmap(image
);
792 _mesa_unmap_teximage_pbo(ctx
, packing
);
797 void radeonTexSubImage1D(GLcontext
* ctx
, GLenum target
, GLint level
,
800 GLenum format
, GLenum type
,
801 const GLvoid
* pixels
,
802 const struct gl_pixelstore_attrib
*packing
,
803 struct gl_texture_object
*texObj
,
804 struct gl_texture_image
*texImage
)
806 radeon_texsubimage(ctx
, 1, target
, level
, xoffset
, 0, 0, width
, 1, 1, 0,
807 format
, type
, pixels
, packing
, texObj
, texImage
, 0);
810 void radeonTexSubImage2D(GLcontext
* ctx
, GLenum target
, GLint level
,
811 GLint xoffset
, GLint yoffset
,
812 GLsizei width
, GLsizei height
,
813 GLenum format
, GLenum type
,
814 const GLvoid
* pixels
,
815 const struct gl_pixelstore_attrib
*packing
,
816 struct gl_texture_object
*texObj
,
817 struct gl_texture_image
*texImage
)
819 radeon_texsubimage(ctx
, 2, target
, level
, xoffset
, yoffset
, 0, width
, height
, 1,
820 0, format
, type
, pixels
, packing
, texObj
, texImage
,
824 void radeonCompressedTexSubImage2D(GLcontext
* ctx
, GLenum target
,
825 GLint level
, GLint xoffset
,
826 GLint yoffset
, GLsizei width
,
827 GLsizei height
, GLenum format
,
828 GLsizei imageSize
, const GLvoid
* data
,
829 struct gl_texture_object
*texObj
,
830 struct gl_texture_image
*texImage
)
832 radeon_texsubimage(ctx
, 2, target
, level
, xoffset
, yoffset
, 0, width
, height
, 1,
833 imageSize
, format
, 0, data
, &ctx
->Unpack
, texObj
, texImage
, 1);
837 void radeonTexSubImage3D(GLcontext
* ctx
, GLenum target
, GLint level
,
838 GLint xoffset
, GLint yoffset
, GLint zoffset
,
839 GLsizei width
, GLsizei height
, GLsizei depth
,
840 GLenum format
, GLenum type
,
841 const GLvoid
* pixels
,
842 const struct gl_pixelstore_attrib
*packing
,
843 struct gl_texture_object
*texObj
,
844 struct gl_texture_image
*texImage
)
846 radeon_texsubimage(ctx
, 3, target
, level
, xoffset
, yoffset
, zoffset
, width
, height
, depth
, 0,
847 format
, type
, pixels
, packing
, texObj
, texImage
, 0);
853 * Ensure that the given image is stored in the given miptree from now on.
855 static void migrate_image_to_miptree(radeon_mipmap_tree
*mt
, radeon_texture_image
*image
, int face
, int level
)
857 radeon_mipmap_level
*dstlvl
= &mt
->levels
[level
- mt
->firstLevel
];
860 assert(image
->mt
!= mt
);
861 assert(dstlvl
->width
== image
->base
.Width
);
862 assert(dstlvl
->height
== image
->base
.Height
);
863 assert(dstlvl
->depth
== image
->base
.Depth
);
866 radeon_bo_map(mt
->bo
, GL_TRUE
);
867 dest
= mt
->bo
->ptr
+ dstlvl
->faces
[face
].offset
;
870 /* Format etc. should match, so we really just need a memcpy().
871 * In fact, that memcpy() could be done by the hardware in many
872 * cases, provided that we have a proper memory manager.
874 radeon_mipmap_level
*srclvl
= &image
->mt
->levels
[image
->mtlevel
-image
->mt
->firstLevel
];
876 assert(srclvl
->size
== dstlvl
->size
);
877 assert(srclvl
->rowstride
== dstlvl
->rowstride
);
879 radeon_bo_map(image
->mt
->bo
, GL_FALSE
);
882 image
->mt
->bo
->ptr
+ srclvl
->faces
[face
].offset
,
884 radeon_bo_unmap(image
->mt
->bo
);
886 radeon_miptree_unreference(image
->mt
);
888 uint32_t srcrowstride
;
890 /* need to confirm this value is correct */
891 if (mt
->compressed
) {
892 height
= (image
->base
.Height
+ 3) / 4;
893 srcrowstride
= _mesa_compressed_row_stride(image
->base
.TexFormat
, image
->base
.Width
);
895 height
= image
->base
.Height
* image
->base
.Depth
;
896 srcrowstride
= image
->base
.Width
* _mesa_get_format_bytes(image
->base
.TexFormat
);
900 // WARN_ONCE("%s: tiling not supported yet", __FUNCTION__);
902 copy_rows(dest
, dstlvl
->rowstride
, image
->base
.Data
, srcrowstride
,
903 height
, srcrowstride
);
905 _mesa_free_texmemory(image
->base
.Data
);
906 image
->base
.Data
= 0;
909 radeon_bo_unmap(mt
->bo
);
912 image
->mtface
= face
;
913 image
->mtlevel
= level
;
914 radeon_miptree_reference(image
->mt
);
917 int radeon_validate_texture_miptree(GLcontext
* ctx
, struct gl_texture_object
*texObj
)
919 radeonContextPtr rmesa
= RADEON_CONTEXT(ctx
);
920 radeonTexObj
*t
= radeon_tex_obj(texObj
);
921 radeon_texture_image
*baseimage
= get_radeon_texture_image(texObj
->Image
[0][texObj
->BaseLevel
]);
924 if (t
->validated
|| t
->image_override
)
927 if (RADEON_DEBUG
& RADEON_TEXTURE
)
928 fprintf(stderr
, "%s: Validating texture %p now\n", __FUNCTION__
, texObj
);
930 if (baseimage
->base
.Border
> 0)
933 /* Ensure a matching miptree exists.
935 * Differing mipmap trees can result when the app uses TexImage to
936 * change texture dimensions.
938 * Prefer to use base image's miptree if it
939 * exists, since that most likely contains more valid data (remember
940 * that the base level is usually significantly larger than the rest
941 * of the miptree, so cubemaps are the only possible exception).
944 baseimage
->mt
!= t
->mt
&&
945 radeon_miptree_matches_texture(baseimage
->mt
, &t
->base
)) {
946 radeon_miptree_unreference(t
->mt
);
947 t
->mt
= baseimage
->mt
;
948 radeon_miptree_reference(t
->mt
);
949 } else if (t
->mt
&& !radeon_miptree_matches_texture(t
->mt
, &t
->base
)) {
950 radeon_miptree_unreference(t
->mt
);
955 if (RADEON_DEBUG
& RADEON_TEXTURE
)
956 fprintf(stderr
, " Allocate new miptree\n");
957 radeon_try_alloc_miptree(rmesa
, t
, baseimage
, 0, texObj
->BaseLevel
);
959 _mesa_problem(ctx
, "radeon_validate_texture failed to alloc miptree");
964 /* Ensure all images are stored in the single main miptree */
965 for(face
= 0; face
< t
->mt
->faces
; ++face
) {
966 for(level
= t
->mt
->firstLevel
; level
<= t
->mt
->lastLevel
; ++level
) {
967 radeon_texture_image
*image
= get_radeon_texture_image(texObj
->Image
[face
][level
]);
968 if (RADEON_DEBUG
& RADEON_TEXTURE
)
969 fprintf(stderr
, " face %i, level %i... %p vs %p ", face
, level
, t
->mt
, image
->mt
);
970 if (t
->mt
== image
->mt
) {
971 if (RADEON_DEBUG
& RADEON_TEXTURE
)
972 fprintf(stderr
, "OK\n");
977 if (RADEON_DEBUG
& RADEON_TEXTURE
)
978 fprintf(stderr
, "migrating\n");
979 migrate_image_to_miptree(t
->mt
, image
, face
, level
);
988 * Need to map texture image into memory before copying image data,
992 radeon_get_tex_image(GLcontext
* ctx
, GLenum target
, GLint level
,
993 GLenum format
, GLenum type
, GLvoid
* pixels
,
994 struct gl_texture_object
*texObj
,
995 struct gl_texture_image
*texImage
, int compressed
)
997 radeon_texture_image
*image
= get_radeon_texture_image(texImage
);
1000 /* Map the texture image read-only */
1001 radeon_teximage_map(image
, GL_FALSE
);
1003 /* Image hasn't been uploaded to a miptree yet */
1004 assert(image
->base
.Data
);
1008 /* FIXME: this can't work for small textures (mips) which
1009 use different hw stride */
1010 _mesa_get_compressed_teximage(ctx
, target
, level
, pixels
,
1013 _mesa_get_teximage(ctx
, target
, level
, format
, type
, pixels
,
1018 radeon_teximage_unmap(image
);
1023 radeonGetTexImage(GLcontext
* ctx
, GLenum target
, GLint level
,
1024 GLenum format
, GLenum type
, GLvoid
* pixels
,
1025 struct gl_texture_object
*texObj
,
1026 struct gl_texture_image
*texImage
)
1028 radeon_get_tex_image(ctx
, target
, level
, format
, type
, pixels
,
1029 texObj
, texImage
, 0);
1033 radeonGetCompressedTexImage(GLcontext
*ctx
, GLenum target
, GLint level
,
1035 struct gl_texture_object
*texObj
,
1036 struct gl_texture_image
*texImage
)
1038 radeon_get_tex_image(ctx
, target
, level
, 0, 0, pixels
,
1039 texObj
, texImage
, 1);