Merge branch 'master' of git+ssh://znh@git.freedesktop.org/git/mesa/mesa
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_vtxfmt_sse.c
1 /* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_vtxfmt_sse.c,v 1.1 2002/10/30 12:51:58 alanh Exp $ */
2 /**************************************************************************
3
4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
5 Tungsten Graphics Inc., Cedar Park, Texas.
6
7 All Rights Reserved.
8
9 Permission is hereby granted, free of charge, to any person obtaining
10 a copy of this software and associated documentation files (the
11 "Software"), to deal in the Software without restriction, including
12 without limitation the rights to use, copy, modify, merge, publish,
13 distribute, sublicense, and/or sell copies of the Software, and to
14 permit persons to whom the Software is furnished to do so, subject to
15 the following conditions:
16
17 The above copyright notice and this permission notice (including the
18 next paragraph) shall be included in all copies or substantial
19 portions of the Software.
20
21 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28
29 **************************************************************************/
30
31 /*
32 * Authors:
33 * Keith Whitwell <keith@tungstengraphics.com>
34 */
35
36 #include "glheader.h"
37 #include "imports.h"
38 #include "simple_list.h"
39 #include "radeon_vtxfmt.h"
40
41 #if defined(USE_SSE_ASM)
42 #include "x86/common_x86_asm.h"
43
44 #define EXTERN( FUNC ) \
45 extern const char *FUNC; \
46 extern const char *FUNC##_end
47
48 EXTERN( _sse_Attribute2fv );
49 EXTERN( _sse_Attribute2f );
50 EXTERN( _sse_Attribute3fv );
51 EXTERN( _sse_Attribute3f );
52 EXTERN( _sse_MultiTexCoord2fv );
53 EXTERN( _sse_MultiTexCoord2f );
54 EXTERN( _sse_MultiTexCoord2fv_2 );
55 EXTERN( _sse_MultiTexCoord2f_2 );
56
57 /* Build specialized versions of the immediate calls on the fly for
58 * the current state.
59 */
60
61 static struct dynfn *radeon_makeSSEAttribute2fv( struct dynfn * cache, int key,
62 const char * name, void * dest)
63 {
64 struct dynfn *dfn = MALLOC_STRUCT( dynfn );
65
66 if (RADEON_DEBUG & DEBUG_CODEGEN)
67 fprintf(stderr, "%s 0x%08x\n", name, key );
68
69 DFN ( _sse_Attribute2fv, (*cache) );
70 FIXUP(dfn->code, 10, 0x0, (int)dest);
71 return dfn;
72 }
73
74 static struct dynfn *radeon_makeSSEAttribute2f( struct dynfn * cache, int key,
75 const char * name, void * dest )
76 {
77 struct dynfn *dfn = MALLOC_STRUCT( dynfn );
78
79 if (RADEON_DEBUG & DEBUG_CODEGEN)
80 fprintf(stderr, "%s 0x%08x\n", name, key );
81
82 DFN ( _sse_Attribute2f, (*cache) );
83 FIXUP(dfn->code, 8, 0x0, (int)dest);
84 return dfn;
85 }
86
87 static struct dynfn *radeon_makeSSEAttribute3fv( struct dynfn * cache, int key,
88 const char * name, void * dest)
89 {
90 struct dynfn *dfn = MALLOC_STRUCT( dynfn );
91
92 if (RADEON_DEBUG & DEBUG_CODEGEN)
93 fprintf(stderr, "%s 0x%08x\n", name, key );
94
95 DFN ( _sse_Attribute3fv, (*cache) );
96 FIXUP(dfn->code, 13, 0x0, (int)dest);
97 FIXUP(dfn->code, 18, 0x8, 8+(int)dest);
98 return dfn;
99 }
100
101 static struct dynfn *radeon_makeSSEAttribute3f( struct dynfn * cache, int key,
102 const char * name, void * dest )
103 {
104 struct dynfn *dfn = MALLOC_STRUCT( dynfn );
105
106 if (RADEON_DEBUG & DEBUG_CODEGEN)
107 fprintf(stderr, "%s 0x%08x\n", name, key );
108
109 DFN ( _sse_Attribute3f, (*cache) );
110 FIXUP(dfn->code, 12, 0x0, (int)dest);
111 FIXUP(dfn->code, 17, 0x8, 8+(int)dest);
112 return dfn;
113 }
114
115 static struct dynfn * radeon_makeSSENormal3fv( GLcontext *ctx, int key )
116 {
117 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
118
119 return radeon_makeSSEAttribute3fv( & rmesa->vb.dfn_cache.Normal3fv, key,
120 __FUNCTION__, rmesa->vb.normalptr );
121 }
122
123 static struct dynfn *radeon_makeSSENormal3f( GLcontext *ctx, int key )
124 {
125 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
126
127 return radeon_makeSSEAttribute3f( & rmesa->vb.dfn_cache.Normal3f, key,
128 __FUNCTION__, rmesa->vb.normalptr );
129 }
130
131 static struct dynfn *radeon_makeSSEColor3fv( GLcontext *ctx, int key )
132 {
133 if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA))
134 return NULL;
135 else
136 {
137 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
138
139 return radeon_makeSSEAttribute3fv( & rmesa->vb.dfn_cache.Color3fv, key,
140 __FUNCTION__, rmesa->vb.floatcolorptr );
141 }
142 }
143
144 static struct dynfn *radeon_makeSSEColor3f( GLcontext *ctx, int key )
145 {
146 if (key & (RADEON_CP_VC_FRMT_PKCOLOR|RADEON_CP_VC_FRMT_FPALPHA))
147 return NULL;
148 else
149 {
150 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
151
152 return radeon_makeSSEAttribute3f( & rmesa->vb.dfn_cache.Color3f, key,
153 __FUNCTION__, rmesa->vb.floatcolorptr );
154 }
155 }
156
157 static struct dynfn *radeon_makeSSETexCoord2fv( GLcontext *ctx, int key )
158 {
159 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
160
161 return radeon_makeSSEAttribute2fv( & rmesa->vb.dfn_cache.TexCoord2fv, key,
162 __FUNCTION__, rmesa->vb.texcoordptr[0] );
163 }
164
165 static struct dynfn *radeon_makeSSETexCoord2f( GLcontext *ctx, int key )
166 {
167 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
168
169 return radeon_makeSSEAttribute2f( & rmesa->vb.dfn_cache.TexCoord2f, key,
170 __FUNCTION__, rmesa->vb.texcoordptr[0] );
171 }
172
173 #if 0 /* Temporarily disabled - probably needs adjustments for more than 2 tex units -rs */
174 static struct dynfn *radeon_makeSSEMultiTexCoord2fv( GLcontext *ctx, int key )
175 {
176 struct dynfn *dfn = MALLOC_STRUCT( dynfn );
177 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
178
179 if (RADEON_DEBUG & DEBUG_CODEGEN)
180 fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key );
181
182 if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) ==
183 (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) {
184 DFN ( _sse_MultiTexCoord2fv, rmesa->vb.dfn_cache.MultiTexCoord2fvARB );
185 FIXUP(dfn->code, 18, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]);
186 } else {
187 DFN ( _sse_MultiTexCoord2fv_2, rmesa->vb.dfn_cache.MultiTexCoord2fvARB );
188 FIXUP(dfn->code, 14, 0x0, (int)rmesa->vb.texcoordptr);
189 }
190 return dfn;
191 }
192
193 static struct dynfn *radeon_makeSSEMultiTexCoord2f( GLcontext *ctx, int key )
194 {
195 struct dynfn *dfn = MALLOC_STRUCT( dynfn );
196 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
197
198 if (RADEON_DEBUG & DEBUG_CODEGEN)
199 fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key );
200
201 if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) ==
202 (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) {
203 DFN ( _sse_MultiTexCoord2f, rmesa->vb.dfn_cache.MultiTexCoord2fARB );
204 FIXUP(dfn->code, 16, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]);
205 } else {
206 DFN ( _sse_MultiTexCoord2f_2, rmesa->vb.dfn_cache.MultiTexCoord2fARB );
207 FIXUP(dfn->code, 15, 0x0, (int)rmesa->vb.texcoordptr);
208 }
209 return dfn;
210 }
211 #endif
212
213 void radeonInitSSECodegen( struct dfn_generators *gen )
214 {
215 if ( cpu_has_xmm ) {
216 gen->Normal3fv = (void *) radeon_makeSSENormal3fv;
217 gen->Normal3f = (void *) radeon_makeSSENormal3f;
218 gen->Color3fv = (void *) radeon_makeSSEColor3fv;
219 gen->Color3f = (void *) radeon_makeSSEColor3f;
220 gen->TexCoord2fv = (void *) radeon_makeSSETexCoord2fv;
221 gen->TexCoord2f = (void *) radeon_makeSSETexCoord2f;
222 #if 0 /* Temporarily disabled - probably needs adjustments for more than 2 tex units -rs */
223 gen->MultiTexCoord2fvARB = (void *) radeon_makeSSEMultiTexCoord2fv;
224 gen->MultiTexCoord2fARB = (void *) radeon_makeSSEMultiTexCoord2f;
225 #endif
226 }
227 }
228
229 #else
230
231 void radeonInitSSECodegen( struct dfn_generators *gen )
232 {
233 (void) gen;
234 }
235
236 #endif