src/mesa/drivers/dri/savage/savage_3d_reg.h

   1 /*
   2  * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
   3  * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  */
  24
  25
  26 #ifndef SAVAGE_3D_REG_H
  27 #define SAVAGE_3D_REG_H
  28
  29 #define VIDEO_MEM_ADR                   0x02
  30 #define SYSTEM_MEM_ADR                  0x01
  31 #define AGP_MEM_ADR                     0x03
  32
  33 /***********************************************************
  34
  35   ----------- 3D ENGINE UNIT Registers -------------
  36
  37   *********************************************************/
  38
  39 typedef union
  40 {
  41     struct
  42     {
  43         unsigned reserved : 4;
  44         unsigned ofs      : 28;
  45     }ni;
  46     u_int32_t ui;
  47 } savageRegZPixelOffset;
  48
  49 /* This reg exists only on Savage4. */
  50 typedef union
  51 {
  52     struct
  53     {
  54         unsigned cmpFunc     :  3;
  55         unsigned stencilEn   :  1;
  56         unsigned readMask    :  8;
  57         unsigned writeMask   :  8;
  58         unsigned failOp      :  3;
  59         unsigned passZfailOp :  3;
  60         unsigned passZpassOp :  3;
  61         unsigned reserved    :  3;
  62     }ni;
  63     u_int32_t ui;
  64 } savageRegStencilCtrl;
  65
  66 /**************************
  67  Texture Registers
  68 **************************/
  69 /* The layout of this reg differs between Savage4 and Savage3D. */
  70 typedef union
  71 {
  72     struct
  73     {
  74         unsigned tex0Width  : 4;
  75         unsigned tex0Height : 4;
  76         unsigned tex0Fmt    : 4;
  77         unsigned tex1Width  : 4;
  78         unsigned tex1Height : 4;
  79         unsigned tex1Fmt    : 4;
  80         unsigned texBLoopEn : 1;
  81         unsigned tex0En     : 1;
  82         unsigned tex1En     : 1;
  83         unsigned orthProjEn : 1;
  84         unsigned reserved   : 1;
  85         unsigned palSize    : 2;
  86         unsigned newPal     : 1;
  87     }ni;
  88     u_int32_t ui;
  89 } savageRegTexDescr_s4;
  90 typedef union
  91 {
  92     struct
  93     {
  94         unsigned texWidth  : 4;
  95         unsigned reserved1 : 4;
  96         unsigned texHeight : 4;
  97         unsigned reserved2 : 4;
  98         /* Savage3D supports only the first 8 texture formats defined in
  99            enum TexFmt in savge_bci.h. */
 100         unsigned texFmt    : 3;
 101         unsigned palSize   : 2;
 102         unsigned reserved3 : 10;
 103         unsigned newPal    : 1;
 104     }ni;
 105     u_int32_t ui;
 106 } savageRegTexDescr_s3d;
 107
 108 /* The layout of this reg is the same on Savage4 and Savage3D,
 109    but the Savage4 has two of them, Savage3D has only one. */
 110 typedef union
 111 {
 112     struct
 113     {
 114         unsigned inSysTex : 1;
 115         unsigned inAGPTex : 1;
 116         unsigned reserved : 1;
 117         unsigned addr     : 29;
 118     }ni;
 119     u_int32_t ui;
 120 } savageRegTexAddr;
 121
 122 /* The layout of this reg is the same on Savage4 and Savage3D. */
 123 typedef union
 124 {
 125     struct
 126     {
 127         unsigned reserved : 3;
 128         unsigned addr     : 29;
 129     }ni;
 130     u_int32_t ui;
 131 } savageRegTexPalAddr;
 132
 133 /* The layout of this reg on Savage4 and Savage3D are very similar. */
 134 typedef union
 135 {
 136     struct
 137     {
 138         unsigned xprClr0 : 16;
 139         unsigned xprClr1 : 16; /* this is reserved on Savage3D */
 140     }ni;
 141     u_int32_t ui;
 142 } savageRegTexXprClr;   /* transparency color in RGB565 format*/
 143
 144 /* The layout of this reg differs between Savage4 and Savage3D.
 145  * Savage4 has two of them, Savage3D has only one. */
 146 typedef union
 147 {
 148     struct
 149     {
 150         unsigned filterMode         : 2;
 151         unsigned mipmapEnable       : 1;
 152         unsigned dBias              : 9;
 153         unsigned dMax               : 4;
 154         unsigned uMode              : 2;
 155         unsigned vMode              : 2;
 156         unsigned useDFraction       : 1;
 157         unsigned texXprEn           : 1;
 158         unsigned clrBlendAlphaSel   : 2;
 159         unsigned clrArg1CopyAlpha   : 1;
 160         unsigned clrArg2CopyAlpha   : 1;
 161         unsigned clrArg1Invert      : 1;
 162         unsigned clrArg2Invert      : 1;
 163         unsigned alphaBlendAlphaSel : 2;
 164         unsigned alphaArg1Invert    : 1;
 165         unsigned alphaArg2Invert    : 1;
 166     }ni;
 167     u_int32_t ui;
 168 } savageRegTexCtrl_s4;
 169 typedef union
 170 {
 171     struct
 172     {
 173         unsigned filterMode    : 2;
 174         unsigned mipmapDisable : 1;
 175         unsigned dBias         : 9;
 176         unsigned uWrapEn       : 1;
 177         unsigned vWrapEn       : 1;
 178         unsigned wrapMode      : 2;
 179         unsigned texEn         : 1;
 180         unsigned useDFraction  : 1;
 181         unsigned reserved1     : 1;
 182         /* Color Compare Alpha Blend Control
 183            0 -  reduce dest alpha to 0 or 1
 184            1 - blend with destination
 185            The Utah-Driver doesn't know how to use it and sets it to 0. */
 186         unsigned CCA           : 1;
 187         unsigned texXprEn      : 1;
 188         unsigned reserved2     : 11;
 189     }ni;
 190     u_int32_t ui;
 191 } savageRegTexCtrl_s3d;
 192
 193 /* This reg exists only on Savage4. */
 194 typedef union
 195 {
 196     struct
 197     {
 198         unsigned colorArg1Sel    : 2;
 199         unsigned colorArg2Sel    : 3;
 200         unsigned colorInvAlphaEn : 1;
 201         unsigned colorInvArg2En  : 1;
 202         unsigned colorPremodSel  : 1;
 203         unsigned colorMod1Sel    : 1;
 204         unsigned colorMod2Sel    : 2;
 205         unsigned colorAddSel     : 2;
 206         unsigned colorDoBlend    : 1;
 207         unsigned colorDo2sCompl  : 1;
 208         unsigned colorAddBiasEn  : 1;
 209         unsigned alphaArg1Sel    : 2;
 210         unsigned alphaArg2Sel    : 3;
 211         unsigned alphaMod1Sel    : 1;
 212         unsigned alphaMod2Sel    : 2;
 213         unsigned alphaAdd0Sel    : 1;
 214         unsigned alphaDoBlend    : 1;
 215         unsigned alphaDo2sCompl  : 1;
 216         unsigned colorStageClamp : 1;
 217         unsigned alphaStageClamp : 1;
 218         unsigned colorDoDiffMul  : 1;
 219         unsigned LeftShiftVal    : 2;
 220     }ni;
 221     u_int32_t ui;
 222 } savageRegTexBlendCtrl;
 223
 224 /* This reg exists only on Savage4. */
 225 typedef union
 226 {
 227     struct
 228     {
 229         unsigned blue  : 8;
 230         unsigned green : 8;
 231         unsigned red   : 8;
 232         unsigned alpha : 8;
 233     }ni;
 234     u_int32_t ui;
 235 } savageRegTexBlendColor;
 236
 237 /********************************
 238  Tiled Surface Registers
 239 **********************************/
 240
 241 typedef union
 242 {
 243     struct
 244     {
 245         unsigned frmBufOffset : 13;
 246         unsigned reserved     : 12;
 247         unsigned widthInTile  : 6;
 248         unsigned bitPerPixel  : 1;
 249     }ni;
 250     u_int32_t ui;
 251 } savageRegTiledSurface;
 252
 253 /********************************
 254  Draw/Shading Control Registers
 255 **********************************/
 256
 257 /* This reg exists only on Savage4. */
 258 typedef union
 259 {
 260     struct
 261     {
 262         unsigned scissorXStart : 11;
 263         unsigned dPerfAccelEn  : 1;
 264         unsigned scissorYStart : 12;
 265         unsigned alphaRefVal   : 8;
 266     }ni;
 267     u_int32_t ui;
 268 } savageRegDrawCtrl0;
 269
 270 /* This reg exists only on Savage4. */
 271 typedef union
 272 {
 273     struct
 274     {
 275         unsigned scissorXEnd      : 11;
 276         unsigned xyOffsetEn       :  1;
 277         unsigned scissorYEnd      : 12;
 278         unsigned ditherEn         :  1;
 279         unsigned nonNormTexCoord  :  1;
 280         unsigned cullMode         :  2;
 281         unsigned alphaTestCmpFunc :  3;
 282         unsigned alphaTestEn      :  1;
 283     }ni;
 284     u_int32_t ui;
 285 } savageRegDrawCtrl1;
 286
 287 /* This reg exists only on Savage4. */
 288 typedef union
 289 {
 290     struct
 291     {
 292         unsigned dstAlphaMode        :  3;
 293         unsigned dstMinusSrc         :  1;
 294         unsigned srcAlphaMode        :  3;
 295         unsigned binaryFinalAlpha    :  1;
 296         unsigned dstAlphaModeHighBit :  1;
 297         unsigned srcAlphaModeHighBit :  1;
 298         unsigned reserved1           : 15;
 299         unsigned wrZafterAlphaTst    :  1;
 300         unsigned drawUpdateEn        :  1;
 301         unsigned zUpdateEn           :  1;
 302         unsigned flatShadeEn         :  1;
 303         unsigned specShadeEn         :  1;
 304         unsigned flushPdDestWrites   :  1;
 305         unsigned flushPdZbufWrites   :  1;
 306     }ni;
 307     u_int32_t ui;
 308 } savageRegDrawLocalCtrl;
 309
 310 /* This reg exists only on Savage3D. */
 311 typedef union
 312 {
 313     struct
 314     {
 315         unsigned ditherEn          : 1;
 316         unsigned xyOffsetEn        : 1;
 317         unsigned cullMode          : 2;
 318         unsigned vertexCountReset  : 1;
 319         unsigned flatShadeEn       : 1;
 320         unsigned specShadeEn       : 1;
 321         unsigned dstAlphaMode      : 3;
 322         unsigned srcAlphaMode      : 3;
 323         unsigned reserved1         : 1;
 324         unsigned alphaTestCmpFunc  : 3;
 325         unsigned alphaTestEn       : 1;
 326         unsigned alphaRefVal       : 8;
 327         unsigned texBlendCtrl      : 3;
 328         unsigned flushPdDestWrites : 1;
 329         unsigned flushPdZbufWrites : 1;
 330         /* havn't found an equivalent for Savage4. Utah-driver sets it to 0. */
 331         unsigned interpMode        : 1;
 332     }ni;
 333     u_int32_t ui;
 334 } savageRegDrawCtrl;
 335
 336 #define SAVAGETBC_DECAL_S3D                     0
 337 #define SAVAGETBC_MODULATE_S3D                  1
 338 #define SAVAGETBC_DECALALPHA_S3D                2
 339 #define SAVAGETBC_MODULATEALPHA_S3D             3
 340 #define SAVAGETBC_4_S3D                         4
 341 #define SAVAGETBC_5_S3D                         5
 342 #define SAVAGETBC_COPY_S3D                      6
 343 #define SAVAGETBC_7_S3D                         7
 344
 345 /* This reg exists only on Savage3D. */
 346 typedef union
 347 {
 348     struct
 349     {
 350         unsigned scissorXStart : 11;
 351         unsigned reserved1     : 5;
 352         unsigned scissorYStart : 11;
 353         unsigned reserved2     : 5;
 354     } ni;
 355     u_int32_t ui;
 356 } savageRegScissorsStart;
 357
 358 /* This reg exists only on Savage3D. */
 359 typedef union
 360 {
 361     struct
 362     {
 363         unsigned scissorXEnd : 11;
 364         unsigned reserved1   : 5;
 365         unsigned scissorYEnd : 11;
 366         unsigned reserved2   : 5;
 367     } ni;
 368     u_int32_t ui;
 369 } savageRegScissorsEnd;
 370
 371 /********************************
 372  Address Registers
 373 **********************************/
 374
 375 /* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
 376  * But Tim Roberts claims that the Savage3D supports DMA vertex and
 377  * command buffers. */
 378 typedef union
 379 {
 380     struct
 381     {
 382         unsigned isSys    : 1;
 383         unsigned isAGP    : 1;
 384         unsigned reserved : 1;
 385         unsigned addr     : 29; /*quad word aligned*/
 386     }ni;
 387     u_int32_t ui;
 388 } savageRegVertBufAddr;
 389
 390 /* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
 391  * But Tim Roberts claims that the Savage3D supports DMA vertex and
 392  * command buffers. */
 393 typedef union
 394 {
 395     struct
 396     {
 397         unsigned isSys    : 1;
 398         unsigned isAGP    : 1;
 399         unsigned reserved : 1;
 400         unsigned addr     : 29; /*4-quad word aligned*/
 401     }ni;
 402     u_int32_t ui;
 403 } savageRegDMABufAddr;
 404
 405 /********************************
 406  H/W Debug Registers
 407 **********************************/
 408 /* The layout of this reg is the same on Savage4 and Savage3D. */
 409 typedef union
 410 {
 411     struct
 412     {
 413         unsigned y01        : 1;
 414         unsigned y12        : 1;
 415         unsigned y20        : 1;
 416         unsigned u01        : 1;
 417         unsigned u12        : 1;
 418         unsigned u20        : 1;
 419         unsigned v01        : 1;
 420         unsigned v12        : 1;
 421         unsigned v20        : 1;
 422         unsigned cullEn     : 1;
 423         unsigned cullOrient : 1;
 424         unsigned loadNewTex : 1;
 425         unsigned loadNewPal : 1;
 426         unsigned doDSetup   : 1;
 427         unsigned reserved   : 17;
 428         unsigned kickOff    : 1;
 429     }ni;
 430     u_int32_t ui;
 431 } savageRegFlag;
 432
 433 /********************************
 434  Z Buffer Registers -- Global
 435 **********************************/
 436
 437 /* The layout of this reg differs between Savage4 and Savage3D. */
 438 typedef union
 439 {
 440     struct
 441     {
 442         unsigned zCmpFunc      : 3;
 443         unsigned reserved1     : 2;
 444         unsigned zBufEn        : 1;
 445         unsigned reserved2     : 1;
 446         unsigned zExpOffset    : 8;
 447         unsigned reserved3     : 1;
 448         unsigned stencilRefVal : 8;
 449         unsigned autoZEnable   : 1;
 450         unsigned frameID       : 1;
 451         unsigned reserved4     : 4;
 452         unsigned floatZEn      : 1;
 453         unsigned wToZEn        : 1;
 454     }ni;
 455     u_int32_t ui;
 456 } savageRegZBufCtrl_s4;
 457 typedef union
 458 {
 459     struct {
 460         unsigned zCmpFunc         : 3;
 461         unsigned drawUpdateEn     : 1;
 462         unsigned zUpdateEn        : 1;
 463         unsigned zBufEn           : 1;
 464
 465         /**
 466          * We suspect that, in conjunction with
 467          * \c savageRegZBufOffset::zDepthSelect, these 2 bits are actually
 468          * \c stencilUpdateEn and \c stencilBufEn.  If not, then some of
 469          * the bits in \c reserved2 may fulfill that purpose.
 470          */
 471         unsigned reserved1        : 2;
 472
 473         unsigned zExpOffset       : 8;
 474         unsigned wrZafterAlphaTst : 1;
 475         unsigned reserved2        : 15;
 476     }ni;
 477     u_int32_t ui;
 478 } savageRegZBufCtrl_s3d;
 479
 480 /* The layout of this reg on Savage4 and Savage3D is very similar. */
 481 typedef union
 482 {
 483     struct
 484     {
 485         /* In the Utah-Driver the offset is defined as 13-bit, 2k-aligned. */
 486         unsigned offset           : 14;
 487         unsigned reserved         : 11; /* 12-bits in Utah-driver */
 488         unsigned zBufWidthInTiles : 6;
 489
 490         /**
 491          * 0 selects 16-bit depth buffer.  On Savage4 hardware, 1 selects
 492          * 24-bit depth buffer (with 8-bits for stencil).  Though it has never
 493          * been tried, we suspect that on Savage3D hardware, 1 selects 15-bit
 494          * depth buffer (with 1-bit for stencil).
 495          */
 496         unsigned zDepthSelect     : 1;
 497     }ni;
 498     u_int32_t ui;
 499 } savageRegZBufOffset;
 500
 501 /* The layout of this reg is the same on Savage4 and Savage3D. */
 502 typedef union
 503 {
 504     struct
 505     {
 506         unsigned rLow      : 6;
 507         unsigned reserved1 : 2;
 508         unsigned rHigh     : 6;
 509         unsigned reserved2 : 2;
 510         unsigned wLow      : 6;
 511         unsigned reserved3 : 2;
 512         unsigned wHigh     : 6;
 513         unsigned reserved4 : 2;
 514     }ni;
 515     u_int32_t ui;
 516 } savageRegZWatermarks;
 517
 518 /********************************
 519  Fog Registers -- Global
 520 **********************************/
 521 /* The layout of this reg is the same on Savage4 and Savage3D. */
 522 typedef union
 523 {
 524     struct
 525     {
 526         unsigned fogClr      : 24;
 527         unsigned expShift    : 3;
 528         unsigned reserved    : 1;
 529         unsigned fogEn       : 1;
 530         unsigned fogMode     : 1;
 531         unsigned fogEndShift : 2;
 532     }ni;
 533     u_int32_t ui;
 534 } savageRegFogCtrl;
 535
 536 /*not in spec, but tempo for pp and driver*/
 537 typedef union
 538 {
 539     struct
 540     {
 541         unsigned fogDensity : 16;
 542         unsigned fogStart   : 16;
 543     }ni;
 544     u_int32_t ui;
 545 } savageRegFogParam;
 546
 547 /**************************************
 548  Destination Buffer Registers -- Global
 549 ***************************************/
 550
 551 /* The layout of this reg on Savage4 and Savage3D are very similar. */
 552 typedef union
 553 {
 554     struct
 555     {
 556         unsigned dstWidthInTile :  7;
 557         unsigned reserved       :  1;
 558         /* In the Utah-Driver the offset is defined as 13-bit, 2k-aligned. */
 559         unsigned offset         : 14;
 560         unsigned reserved1      :  7;
 561         /* antiAliasMode does not exist in the Utah-driver. But it includes the
 562          * high bit of this in the destPixFmt. However, only values 0 and 2
 563          * are used as dstPixFmt, so antiAliasMode is effectively always 0
 564          * in the Utah-driver. In other words, treat as reserved on Savage3D.*/
 565         unsigned antiAliasMode  :  2;
 566         unsigned dstPixFmt      :  1;
 567     }ni;
 568     u_int32_t ui;
 569 } savageRegDestCtrl;
 570
 571 /* The layout of this reg on Savage4 and Savage3D are very similar. */
 572 typedef union
 573 {
 574     struct
 575     {
 576         unsigned destReadLow   : 6;
 577         unsigned destReadHigh  : 6;
 578         unsigned destWriteLow  : 6;
 579         unsigned destWriteHigh : 6;
 580         unsigned texRead       : 4;
 581         unsigned reserved4     : 2;
 582         /* The Utah-driver calls this pixel FIFO length:
 583          * 00 - 240, 01 - 180, 10 - 120, 11 - 60
 584          * However, it is not used in either driver. */
 585         unsigned destFlush     : 2;
 586     }ni;
 587     u_int32_t ui;
 588 } savageRegDestTexWatermarks;
 589
 590 /* Savage4/Twister/ProSavage register BCI addresses */
 591 #define SAVAGE_DRAWLOCALCTRL_S4       0x1e
 592 #define SAVAGE_TEXPALADDR_S4          0x1f
 593 #define SAVAGE_TEXCTRL0_S4            0x20
 594 #define SAVAGE_TEXCTRL1_S4            0x21
 595 #define SAVAGE_TEXADDR0_S4            0x22
 596 #define SAVAGE_TEXADDR1_S4            0x23
 597 #define SAVAGE_TEXBLEND0_S4           0x24
 598 #define SAVAGE_TEXBLEND1_S4           0x25
 599 #define SAVAGE_TEXXPRCLR_S4           0x26 /* never used */
 600 #define SAVAGE_TEXDESCR_S4            0x27
 601 #define SAVAGE_FOGTABLE_S4            0x28
 602 #define SAVAGE_FOGCTRL_S4             0x30
 603 #define SAVAGE_STENCILCTRL_S4         0x31
 604 #define SAVAGE_ZBUFCTRL_S4            0x32
 605 #define SAVAGE_ZBUFOFF_S4             0x33
 606 #define SAVAGE_DESTCTRL_S4            0x34
 607 #define SAVAGE_DRAWCTRLGLOBAL0_S4     0x35
 608 #define SAVAGE_DRAWCTRLGLOBAL1_S4     0x36
 609 #define SAVAGE_ZWATERMARK_S4          0x37
 610 #define SAVAGE_DESTTEXRWWATERMARK_S4  0x38
 611 #define SAVAGE_TEXBLENDCOLOR_S4       0x39
 612 /* Savage3D/MX/IC register BCI addresses */
 613 #define SAVAGE_TEXPALADDR_S3D         0x18
 614 #define SAVAGE_TEXXPRCLR_S3D          0x19 /* never used */
 615 #define SAVAGE_TEXADDR_S3D            0x1A
 616 #define SAVAGE_TEXDESCR_S3D           0x1B
 617 #define SAVAGE_TEXCTRL_S3D            0x1C
 618 #define SAVAGE_FOGTABLE_S3D           0x20
 619 #define SAVAGE_FOGCTRL_S3D            0x30
 620 #define SAVAGE_DRAWCTRL_S3D           0x31
 621 #define SAVAGE_ZBUFCTRL_S3D           0x32
 622 #define SAVAGE_ZBUFOFF_S3D            0x33
 623 #define SAVAGE_DESTCTRL_S3D           0x34
 624 #define SAVAGE_SCSTART_S3D            0x35
 625 #define SAVAGE_SCEND_S3D              0x36
 626 #define SAVAGE_ZWATERMARK_S3D         0x37
 627 #define SAVAGE_DESTTEXRWWATERMARK_S3D 0x38
 628
 629 #define SAVAGE_FIRST_REG 0x18
 630 #define SAVAGE_NR_REGS   34
 631 typedef struct savage_registers_s4_t {
 632     u_int32_t                   unused1[6];        /* 0x18-0x1d */
 633     savageRegDrawLocalCtrl     drawLocalCtrl;     /* 0x1e */
 634     savageRegTexPalAddr        texPalAddr;        /* 0x1f */
 635     savageRegTexCtrl_s4        texCtrl[2];        /* 0x20, 0x21 */
 636     savageRegTexAddr           texAddr[2];        /* 0x22, 0x23 */
 637     savageRegTexBlendCtrl      texBlendCtrl[2];   /* 0x24, 0x25 */
 638     savageRegTexXprClr         texXprClr;         /* 0x26 */
 639     savageRegTexDescr_s4       texDescr;          /* 0x27 */
 640     u_int8_t                   fogTable[32];      /* 0x28-0x2f (8dwords) */
 641     savageRegFogCtrl           fogCtrl;           /* 0x30 */
 642     savageRegStencilCtrl       stencilCtrl;       /* 0x31 */
 643     savageRegZBufCtrl_s4       zBufCtrl;          /* 0x32 */
 644     savageRegZBufOffset        zBufOffset;        /* 0x33 */
 645     savageRegDestCtrl          destCtrl;          /* 0x34 */
 646     savageRegDrawCtrl0         drawCtrl0;         /* 0x35 */
 647     savageRegDrawCtrl1         drawCtrl1;         /* 0x36 */
 648     savageRegZWatermarks       zWatermarks;       /* 0x37 */
 649     savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */
 650     savageRegTexBlendColor     texBlendColor;     /* 0x39 */
 651 } savageRegistersS4;
 652 typedef struct savage_registers_s3d_t {
 653     savageRegTexPalAddr        texPalAddr;        /* 0x18 */
 654     savageRegTexXprClr         texXprClr;         /* 0x19 */
 655     savageRegTexAddr           texAddr;           /* 0x1a */
 656     savageRegTexDescr_s3d      texDescr;          /* 0x1b */
 657     savageRegTexCtrl_s3d       texCtrl;           /* 0x1c */
 658     u_int32_t                  unused1[3];        /* 0x1d-0x1f */
 659     u_int8_t                   fogTable[64];      /* 0x20-0x2f (16dwords) */
 660     savageRegFogCtrl           fogCtrl;           /* 0x30 */
 661     savageRegDrawCtrl          drawCtrl;          /* 0x31 */
 662     savageRegZBufCtrl_s3d      zBufCtrl;          /* 0x32 */
 663     savageRegZBufOffset        zBufOffset;        /* 0x33 */
 664     savageRegDestCtrl          destCtrl;          /* 0x34 */
 665     savageRegScissorsStart     scissorsStart;     /* 0x35 */
 666     savageRegScissorsEnd       scissorsEnd;       /* 0x36 */
 667     savageRegZWatermarks       zWatermarks;       /* 0x37 */
 668     savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */
 669     u_int32_t                   unused2;           /* 0x39 */
 670 } savageRegistersS3D;
 671 typedef union savage_registers_t {
 672     savageRegistersS4  s4;
 673     savageRegistersS3D s3d;
 674     u_int32_t           ui[SAVAGE_NR_REGS];
 675 } savageRegisters;
 676
 677
 678 #define DV_PF_555           (0x1<<8)
 679 #define DV_PF_565           (0x2<<8)
 680 #define DV_PF_8888          (0x4<<8)
 681
 682 #define SAVAGEPACKCOLORA4L4(l,a) \
 683   ((l >> 4) | (a & 0xf0))
 684
 685 #define SAVAGEPACKCOLOR4444(r,g,b,a) \
 686   ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
 687
 688 #define SAVAGEPACKCOLOR1555(r,g,b,a) \
 689   ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
 690     ((a) ? 0x8000 : 0))
 691
 692 #define SAVAGEPACKCOLOR8888(r,g,b,a) \
 693   (((a) << 24) | ((r) << 16) | ((g) << 8) | (b))
 694
 695 #define SAVAGEPACKCOLOR565(r,g,b) \
 696   ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
 697
 698
 699 #endif