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[mesa.git] / src / mesa / drivers / dri / savage / savage_3d_reg.h
1 /*
2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25
26 #ifndef SAVAGE_3D_REG_H
27 #define SAVAGE_3D_REG_H
28
29 #define VIDEO_MEM_ADR 0x02
30 #define SYSTEM_MEM_ADR 0x01
31 #define AGP_MEM_ADR 0x03
32
33 /***********************************************************
34
35 ----------- 3D ENGINE UNIT Registers -------------
36
37 *********************************************************/
38
39 typedef union
40 {
41 struct
42 {
43 unsigned reserved : 4;
44 unsigned ofs : 28;
45 }ni;
46 u_int32_t ui;
47 } savageRegZPixelOffset;
48
49 /* This reg exists only on Savage4. */
50 typedef union
51 {
52 struct
53 {
54 unsigned cmpFunc : 3;
55 unsigned stencilEn : 1;
56 unsigned readMask : 8;
57 unsigned writeMask : 8;
58 unsigned failOp : 3;
59 unsigned passZfailOp : 3;
60 unsigned passZpassOp : 3;
61 unsigned reserved : 3;
62 }ni;
63 u_int32_t ui;
64 } savageRegStencilCtrl;
65
66 /**************************
67 Texture Registers
68 **************************/
69 /* The layout of this reg differs between Savage4 and Savage3D. */
70 typedef union
71 {
72 struct
73 {
74 unsigned tex0Width : 4;
75 unsigned tex0Height : 4;
76 unsigned tex0Fmt : 4;
77 unsigned tex1Width : 4;
78 unsigned tex1Height : 4;
79 unsigned tex1Fmt : 4;
80 unsigned texBLoopEn : 1;
81 unsigned tex0En : 1;
82 unsigned tex1En : 1;
83 unsigned orthProjEn : 1;
84 unsigned reserved : 1;
85 unsigned palSize : 2;
86 unsigned newPal : 1;
87 }ni;
88 u_int32_t ui;
89 } savageRegTexDescr_s4;
90 typedef union
91 {
92 struct
93 {
94 unsigned texWidth : 4;
95 unsigned reserved1 : 4;
96 unsigned texHeight : 4;
97 unsigned reserved2 : 4;
98 /* Savage3D supports only the first 8 texture formats defined in
99 enum TexFmt in savge_bci.h. */
100 unsigned texFmt : 3;
101 unsigned palSize : 2;
102 unsigned reserved3 : 10;
103 unsigned newPal : 1;
104 }ni;
105 u_int32_t ui;
106 } savageRegTexDescr_s3d;
107
108 /* The layout of this reg is the same on Savage4 and Savage3D,
109 but the Savage4 has two of them, Savage3D has only one. */
110 typedef union
111 {
112 struct
113 {
114 unsigned inSysTex : 1;
115 unsigned inAGPTex : 1;
116 unsigned reserved : 1;
117 unsigned addr : 29;
118 }ni;
119 u_int32_t ui;
120 } savageRegTexAddr;
121
122 /* The layout of this reg is the same on Savage4 and Savage3D. */
123 typedef union
124 {
125 struct
126 {
127 unsigned reserved : 3;
128 unsigned addr : 29;
129 }ni;
130 u_int32_t ui;
131 } savageRegTexPalAddr;
132
133 /* The layout of this reg on Savage4 and Savage3D are very similar. */
134 typedef union
135 {
136 struct
137 {
138 unsigned xprClr0 : 16;
139 unsigned xprClr1 : 16; /* this is reserved on Savage3D */
140 }ni;
141 u_int32_t ui;
142 } savageRegTexXprClr; /* transparency color in RGB565 format*/
143
144 /* The layout of this reg differs between Savage4 and Savage3D.
145 * Savage4 has two of them, Savage3D has only one. */
146 typedef union
147 {
148 struct
149 {
150 unsigned filterMode : 2;
151 unsigned mipmapEnable : 1;
152 unsigned dBias : 9;
153 unsigned dMax : 4;
154 unsigned uMode : 2;
155 unsigned vMode : 2;
156 unsigned useDFraction : 1;
157 unsigned texXprEn : 1;
158 unsigned clrBlendAlphaSel : 2;
159 unsigned clrArg1CopyAlpha : 1;
160 unsigned clrArg2CopyAlpha : 1;
161 unsigned clrArg1Invert : 1;
162 unsigned clrArg2Invert : 1;
163 unsigned alphaBlendAlphaSel : 2;
164 unsigned alphaArg1Invert : 1;
165 unsigned alphaArg2Invert : 1;
166 }ni;
167 u_int32_t ui;
168 } savageRegTexCtrl_s4;
169 typedef union
170 {
171 struct
172 {
173 unsigned filterMode : 2;
174 unsigned mipmapDisable : 1;
175 unsigned dBias : 9;
176 unsigned uWrapEn : 1;
177 unsigned vWrapEn : 1;
178 unsigned wrapMode : 2;
179 unsigned texEn : 1;
180 unsigned useDFraction : 1;
181 unsigned reserved1 : 1;
182 /* Color Compare Alpha Blend Control
183 0 - reduce dest alpha to 0 or 1
184 1 - blend with destination
185 The Utah-Driver doesn't know how to use it and sets it to 0. */
186 unsigned CCA : 1;
187 unsigned texXprEn : 1;
188 unsigned reserved2 : 11;
189 }ni;
190 u_int32_t ui;
191 } savageRegTexCtrl_s3d;
192
193 /* This reg exists only on Savage4. */
194 typedef union
195 {
196 struct
197 {
198 unsigned colorArg1Sel : 2;
199 unsigned colorArg2Sel : 3;
200 unsigned colorInvAlphaEn : 1;
201 unsigned colorInvArg2En : 1;
202 unsigned colorPremodSel : 1;
203 unsigned colorMod1Sel : 1;
204 unsigned colorMod2Sel : 2;
205 unsigned colorAddSel : 2;
206 unsigned colorDoBlend : 1;
207 unsigned colorDo2sCompl : 1;
208 unsigned colorAddBiasEn : 1;
209 unsigned alphaArg1Sel : 2;
210 unsigned alphaArg2Sel : 3;
211 unsigned alphaMod1Sel : 1;
212 unsigned alphaMod2Sel : 2;
213 unsigned alphaAdd0Sel : 1;
214 unsigned alphaDoBlend : 1;
215 unsigned alphaDo2sCompl : 1;
216 unsigned colorStageClamp : 1;
217 unsigned alphaStageClamp : 1;
218 unsigned colorDoDiffMul : 1;
219 unsigned LeftShiftVal : 2;
220 }ni;
221 u_int32_t ui;
222 } savageRegTexBlendCtrl;
223
224 /* This reg exists only on Savage4. */
225 typedef union
226 {
227 struct
228 {
229 unsigned blue : 8;
230 unsigned green : 8;
231 unsigned red : 8;
232 unsigned alpha : 8;
233 }ni;
234 u_int32_t ui;
235 } savageRegTexBlendColor;
236
237 /********************************
238 Tiled Surface Registers
239 **********************************/
240
241 typedef union
242 {
243 struct
244 {
245 unsigned frmBufOffset : 13;
246 unsigned reserved : 12;
247 unsigned widthInTile : 6;
248 unsigned bitPerPixel : 1;
249 }ni;
250 u_int32_t ui;
251 } savageRegTiledSurface;
252
253 /********************************
254 Draw/Shading Control Registers
255 **********************************/
256
257 /* This reg exists only on Savage4. */
258 typedef union
259 {
260 struct
261 {
262 unsigned scissorXStart : 11;
263 unsigned dPerfAccelEn : 1;
264 unsigned scissorYStart : 12;
265 unsigned alphaRefVal : 8;
266 }ni;
267 u_int32_t ui;
268 } savageRegDrawCtrl0;
269
270 /* This reg exists only on Savage4. */
271 typedef union
272 {
273 struct
274 {
275 unsigned scissorXEnd : 11;
276 unsigned xyOffsetEn : 1;
277 unsigned scissorYEnd : 12;
278 unsigned ditherEn : 1;
279 unsigned nonNormTexCoord : 1;
280 unsigned cullMode : 2;
281 unsigned alphaTestCmpFunc : 3;
282 unsigned alphaTestEn : 1;
283 }ni;
284 u_int32_t ui;
285 } savageRegDrawCtrl1;
286
287 /* This reg exists only on Savage4. */
288 typedef union
289 {
290 struct
291 {
292 unsigned dstAlphaMode : 3;
293
294 /**
295 * This bit enables \c GL_FUNC_SUBTRACT. Like most DirectX oriented
296 * hardware, there's no way to do \c GL_FUNC_REVERSE_SUBTRACT.
297 *
298 * \todo
299 * Add support for \c GL_FUNC_SUBTRACT!
300 */
301 unsigned dstMinusSrc : 1;
302 unsigned srcAlphaMode : 3;
303 unsigned binaryFinalAlpha : 1;
304 unsigned dstAlphaModeHighBit : 1;
305 unsigned srcAlphaModeHighBit : 1;
306 unsigned reserved1 : 15;
307 unsigned wrZafterAlphaTst : 1;
308 unsigned drawUpdateEn : 1;
309 unsigned zUpdateEn : 1;
310 unsigned flatShadeEn : 1;
311 unsigned specShadeEn : 1;
312 unsigned flushPdDestWrites : 1;
313 unsigned flushPdZbufWrites : 1;
314 }ni;
315 u_int32_t ui;
316 } savageRegDrawLocalCtrl;
317
318 /* This reg exists only on Savage3D. */
319 typedef union
320 {
321 struct
322 {
323 unsigned ditherEn : 1;
324 unsigned xyOffsetEn : 1;
325 unsigned cullMode : 2;
326 unsigned vertexCountReset : 1;
327 unsigned flatShadeEn : 1;
328 unsigned specShadeEn : 1;
329 unsigned dstAlphaMode : 3;
330 unsigned srcAlphaMode : 3;
331 unsigned reserved1 : 1;
332 unsigned alphaTestCmpFunc : 3;
333 unsigned alphaTestEn : 1;
334 unsigned alphaRefVal : 8;
335 unsigned texBlendCtrl : 3;
336 unsigned flushPdDestWrites : 1;
337 unsigned flushPdZbufWrites : 1;
338
339 /**
340 * Disable perspective correct interpolation for vertex color, vertex
341 * fog, and vertex alpha. For OpenGL, this should \b always be zero.
342 */
343 unsigned interpMode : 1;
344 }ni;
345 u_int32_t ui;
346 } savageRegDrawCtrl;
347
348 #define SAVAGETBC_DECAL_S3D 0
349 #define SAVAGETBC_MODULATE_S3D 1
350 #define SAVAGETBC_DECALALPHA_S3D 2
351 #define SAVAGETBC_MODULATEALPHA_S3D 3
352 #define SAVAGETBC_4_S3D 4
353 #define SAVAGETBC_5_S3D 5
354 #define SAVAGETBC_COPY_S3D 6
355 #define SAVAGETBC_7_S3D 7
356
357 /* This reg exists only on Savage3D. */
358 typedef union
359 {
360 struct
361 {
362 unsigned scissorXStart : 11;
363 unsigned reserved1 : 5;
364 unsigned scissorYStart : 11;
365 unsigned reserved2 : 5;
366 } ni;
367 u_int32_t ui;
368 } savageRegScissorsStart;
369
370 /* This reg exists only on Savage3D. */
371 typedef union
372 {
373 struct
374 {
375 unsigned scissorXEnd : 11;
376 unsigned reserved1 : 5;
377 unsigned scissorYEnd : 11;
378 unsigned reserved2 : 5;
379 } ni;
380 u_int32_t ui;
381 } savageRegScissorsEnd;
382
383 /********************************
384 Address Registers
385 **********************************/
386
387 /* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
388 * But Tim Roberts claims that the Savage3D supports DMA vertex and
389 * command buffers. */
390 typedef union
391 {
392 struct
393 {
394 unsigned isSys : 1;
395 unsigned isAGP : 1;
396 unsigned reserved : 1;
397 unsigned addr : 29; /*quad word aligned*/
398 }ni;
399 u_int32_t ui;
400 } savageRegVertBufAddr;
401
402 /* I havn't found a Savage3D equivalent of this reg in the Utah-driver.
403 * But Tim Roberts claims that the Savage3D supports DMA vertex and
404 * command buffers. */
405 typedef union
406 {
407 struct
408 {
409 unsigned isSys : 1;
410 unsigned isAGP : 1;
411 unsigned reserved : 1;
412 unsigned addr : 29; /*4-quad word aligned*/
413 }ni;
414 u_int32_t ui;
415 } savageRegDMABufAddr;
416
417 /********************************
418 H/W Debug Registers
419 **********************************/
420 /* The layout of this reg is the same on Savage4 and Savage3D. */
421 typedef union
422 {
423 struct
424 {
425 unsigned y01 : 1;
426 unsigned y12 : 1;
427 unsigned y20 : 1;
428 unsigned u01 : 1;
429 unsigned u12 : 1;
430 unsigned u20 : 1;
431 unsigned v01 : 1;
432 unsigned v12 : 1;
433 unsigned v20 : 1;
434 unsigned cullEn : 1;
435 unsigned cullOrient : 1;
436 unsigned loadNewTex : 1;
437 unsigned loadNewPal : 1;
438 unsigned doDSetup : 1;
439 unsigned reserved : 17;
440 unsigned kickOff : 1;
441 }ni;
442 u_int32_t ui;
443 } savageRegFlag;
444
445 /********************************
446 Z Buffer Registers -- Global
447 **********************************/
448
449 /* The layout of this reg differs between Savage4 and Savage3D. */
450 typedef union
451 {
452 struct
453 {
454 unsigned zCmpFunc : 3;
455 unsigned reserved1 : 2;
456 unsigned zBufEn : 1;
457 unsigned reserved2 : 1;
458 unsigned zExpOffset : 8;
459 unsigned reserved3 : 1;
460 unsigned stencilRefVal : 8;
461 unsigned autoZEnable : 1;
462 unsigned frameID : 1;
463 unsigned reserved4 : 4;
464 unsigned floatZEn : 1;
465 unsigned wToZEn : 1;
466 }ni;
467 u_int32_t ui;
468 } savageRegZBufCtrl_s4;
469 typedef union
470 {
471 struct {
472 unsigned zCmpFunc : 3;
473 unsigned drawUpdateEn : 1;
474 unsigned zUpdateEn : 1;
475 unsigned zBufEn : 1;
476
477 /**
478 * We suspect that, in conjunction with
479 * \c savageRegZBufOffset::zDepthSelect, these 2 bits are actually
480 * \c stencilUpdateEn and \c stencilBufEn. If not, then some of
481 * the bits in \c reserved2 may fulfill that purpose.
482 */
483 unsigned reserved1 : 2;
484
485 unsigned zExpOffset : 8;
486 unsigned wrZafterAlphaTst : 1;
487 unsigned reserved2 : 15;
488 }ni;
489 u_int32_t ui;
490 } savageRegZBufCtrl_s3d;
491
492 /* The layout of this reg on Savage4 and Savage3D is very similar. */
493 typedef union
494 {
495 struct
496 {
497 /* In the Utah-Driver the offset is defined as 13-bit, 2k-aligned. */
498 unsigned offset : 14;
499 unsigned reserved : 11; /* 12-bits in Utah-driver */
500 unsigned zBufWidthInTiles : 6;
501
502 /**
503 * 0 selects 16-bit depth buffer. On Savage4 hardware, 1 selects
504 * 24-bit depth buffer (with 8-bits for stencil). Though it has never
505 * been tried, we suspect that on Savage3D hardware, 1 selects 15-bit
506 * depth buffer (with 1-bit for stencil).
507 */
508 unsigned zDepthSelect : 1;
509 }ni;
510 u_int32_t ui;
511 } savageRegZBufOffset;
512
513 /* The layout of this reg is the same on Savage4 and Savage3D. */
514 typedef union
515 {
516 struct
517 {
518 unsigned rLow : 6;
519 unsigned reserved1 : 2;
520 unsigned rHigh : 6;
521 unsigned reserved2 : 2;
522 unsigned wLow : 6;
523 unsigned reserved3 : 2;
524 unsigned wHigh : 6;
525 unsigned reserved4 : 2;
526 }ni;
527 u_int32_t ui;
528 } savageRegZWatermarks;
529
530 /********************************
531 Fog Registers -- Global
532 **********************************/
533 /* The layout of this reg is the same on Savage4 and Savage3D. */
534 typedef union
535 {
536 struct
537 {
538 unsigned fogClr : 24;
539 unsigned expShift : 3;
540 unsigned reserved : 1;
541 unsigned fogEn : 1;
542 unsigned fogMode : 1;
543 unsigned fogEndShift : 2;
544 }ni;
545 u_int32_t ui;
546 } savageRegFogCtrl;
547
548 /*not in spec, but tempo for pp and driver*/
549 typedef union
550 {
551 struct
552 {
553 unsigned fogDensity : 16;
554 unsigned fogStart : 16;
555 }ni;
556 u_int32_t ui;
557 } savageRegFogParam;
558
559 /**************************************
560 Destination Buffer Registers -- Global
561 ***************************************/
562
563 /* The layout of this reg on Savage4 and Savage3D are very similar. */
564 typedef union
565 {
566 struct
567 {
568 unsigned dstWidthInTile : 7;
569 unsigned reserved : 1;
570 /* In the Utah-Driver the offset is defined as 13-bit, 2k-aligned. */
571 unsigned offset : 14;
572 unsigned reserved1 : 7;
573 /* antiAliasMode does not exist in the Utah-driver. But it includes the
574 * high bit of this in the destPixFmt. However, only values 0 and 2
575 * are used as dstPixFmt, so antiAliasMode is effectively always 0
576 * in the Utah-driver. In other words, treat as reserved on Savage3D.*/
577 unsigned antiAliasMode : 2;
578 unsigned dstPixFmt : 1;
579 }ni;
580 u_int32_t ui;
581 } savageRegDestCtrl;
582
583 /* The layout of this reg on Savage4 and Savage3D are very similar. */
584 typedef union
585 {
586 struct
587 {
588 unsigned destReadLow : 6;
589 unsigned destReadHigh : 6;
590 unsigned destWriteLow : 6;
591 unsigned destWriteHigh : 6;
592 unsigned texRead : 4;
593 unsigned reserved4 : 2;
594 /* The Utah-driver calls this pixel FIFO length:
595 * 00 - 240, 01 - 180, 10 - 120, 11 - 60
596 * However, it is not used in either driver. */
597 unsigned destFlush : 2;
598 }ni;
599 u_int32_t ui;
600 } savageRegDestTexWatermarks;
601
602 /* Savage4/Twister/ProSavage register BCI addresses */
603 #define SAVAGE_DRAWLOCALCTRL_S4 0x1e
604 #define SAVAGE_TEXPALADDR_S4 0x1f
605 #define SAVAGE_TEXCTRL0_S4 0x20
606 #define SAVAGE_TEXCTRL1_S4 0x21
607 #define SAVAGE_TEXADDR0_S4 0x22
608 #define SAVAGE_TEXADDR1_S4 0x23
609 #define SAVAGE_TEXBLEND0_S4 0x24
610 #define SAVAGE_TEXBLEND1_S4 0x25
611 #define SAVAGE_TEXXPRCLR_S4 0x26 /* never used */
612 #define SAVAGE_TEXDESCR_S4 0x27
613 #define SAVAGE_FOGTABLE_S4 0x28
614 #define SAVAGE_FOGCTRL_S4 0x30
615 #define SAVAGE_STENCILCTRL_S4 0x31
616 #define SAVAGE_ZBUFCTRL_S4 0x32
617 #define SAVAGE_ZBUFOFF_S4 0x33
618 #define SAVAGE_DESTCTRL_S4 0x34
619 #define SAVAGE_DRAWCTRLGLOBAL0_S4 0x35
620 #define SAVAGE_DRAWCTRLGLOBAL1_S4 0x36
621 #define SAVAGE_ZWATERMARK_S4 0x37
622 #define SAVAGE_DESTTEXRWWATERMARK_S4 0x38
623 #define SAVAGE_TEXBLENDCOLOR_S4 0x39
624 /* Savage3D/MX/IC register BCI addresses */
625 #define SAVAGE_TEXPALADDR_S3D 0x18
626 #define SAVAGE_TEXXPRCLR_S3D 0x19 /* never used */
627 #define SAVAGE_TEXADDR_S3D 0x1A
628 #define SAVAGE_TEXDESCR_S3D 0x1B
629 #define SAVAGE_TEXCTRL_S3D 0x1C
630 #define SAVAGE_FOGTABLE_S3D 0x20
631 #define SAVAGE_FOGCTRL_S3D 0x30
632 #define SAVAGE_DRAWCTRL_S3D 0x31
633 #define SAVAGE_ZBUFCTRL_S3D 0x32
634 #define SAVAGE_ZBUFOFF_S3D 0x33
635 #define SAVAGE_DESTCTRL_S3D 0x34
636 #define SAVAGE_SCSTART_S3D 0x35
637 #define SAVAGE_SCEND_S3D 0x36
638 #define SAVAGE_ZWATERMARK_S3D 0x37
639 #define SAVAGE_DESTTEXRWWATERMARK_S3D 0x38
640
641 #define SAVAGE_FIRST_REG 0x18
642 #define SAVAGE_NR_REGS 34
643 typedef struct savage_registers_s4_t {
644 u_int32_t unused1[6]; /* 0x18-0x1d */
645 savageRegDrawLocalCtrl drawLocalCtrl; /* 0x1e */
646 savageRegTexPalAddr texPalAddr; /* 0x1f */
647 savageRegTexCtrl_s4 texCtrl[2]; /* 0x20, 0x21 */
648 savageRegTexAddr texAddr[2]; /* 0x22, 0x23 */
649 savageRegTexBlendCtrl texBlendCtrl[2]; /* 0x24, 0x25 */
650 savageRegTexXprClr texXprClr; /* 0x26 */
651 savageRegTexDescr_s4 texDescr; /* 0x27 */
652 u_int8_t fogTable[32]; /* 0x28-0x2f (8dwords) */
653 savageRegFogCtrl fogCtrl; /* 0x30 */
654 savageRegStencilCtrl stencilCtrl; /* 0x31 */
655 savageRegZBufCtrl_s4 zBufCtrl; /* 0x32 */
656 savageRegZBufOffset zBufOffset; /* 0x33 */
657 savageRegDestCtrl destCtrl; /* 0x34 */
658 savageRegDrawCtrl0 drawCtrl0; /* 0x35 */
659 savageRegDrawCtrl1 drawCtrl1; /* 0x36 */
660 savageRegZWatermarks zWatermarks; /* 0x37 */
661 savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */
662 savageRegTexBlendColor texBlendColor; /* 0x39 */
663 } savageRegistersS4;
664 typedef struct savage_registers_s3d_t {
665 savageRegTexPalAddr texPalAddr; /* 0x18 */
666 savageRegTexXprClr texXprClr; /* 0x19 */
667 savageRegTexAddr texAddr; /* 0x1a */
668 savageRegTexDescr_s3d texDescr; /* 0x1b */
669 savageRegTexCtrl_s3d texCtrl; /* 0x1c */
670 u_int32_t unused1[3]; /* 0x1d-0x1f */
671 u_int8_t fogTable[64]; /* 0x20-0x2f (16dwords) */
672 savageRegFogCtrl fogCtrl; /* 0x30 */
673 savageRegDrawCtrl drawCtrl; /* 0x31 */
674 savageRegZBufCtrl_s3d zBufCtrl; /* 0x32 */
675 savageRegZBufOffset zBufOffset; /* 0x33 */
676 savageRegDestCtrl destCtrl; /* 0x34 */
677 savageRegScissorsStart scissorsStart; /* 0x35 */
678 savageRegScissorsEnd scissorsEnd; /* 0x36 */
679 savageRegZWatermarks zWatermarks; /* 0x37 */
680 savageRegDestTexWatermarks destTexWatermarks; /* 0x38 */
681 u_int32_t unused2; /* 0x39 */
682 } savageRegistersS3D;
683 typedef union savage_registers_t {
684 savageRegistersS4 s4;
685 savageRegistersS3D s3d;
686 u_int32_t ui[SAVAGE_NR_REGS];
687 } savageRegisters;
688
689
690 #define DV_PF_555 (0x1<<8)
691 #define DV_PF_565 (0x2<<8)
692 #define DV_PF_8888 (0x4<<8)
693
694 #define SAVAGEPACKCOLORA4L4(l,a) \
695 ((l >> 4) | (a & 0xf0))
696
697 #define SAVAGEPACKCOLOR4444(r,g,b,a) \
698 ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4))
699
700 #define SAVAGEPACKCOLOR1555(r,g,b,a) \
701 ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \
702 ((a) ? 0x8000 : 0))
703
704 #define SAVAGEPACKCOLOR8888(r,g,b,a) \
705 (((a) << 24) | ((r) << 16) | ((g) << 8) | (b))
706
707 #define SAVAGEPACKCOLOR565(r,g,b) \
708 ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3))
709
710
711 #endif