src/mesa/drivers/dri/savage/savage_init.h

   1 /*
   2  * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
   3  * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  */
  24
  25
  26 #ifndef _SAVAGE_INIT_H_
  27 #define _SAVAGE_INIT_H_
  28
  29 #include <sys/time.h>
  30 #include "dri_util.h"
  31 #include "mtypes.h"
  32
  33 #include "xmlconfig.h"
  34
  35 typedef struct {
  36    drm_handle_t handle;
  37    drmSize size;
  38    char *map;
  39 } savageRegion, *savageRegionPtr;
  40
  41 typedef struct {
  42    int chipset;
  43    int width;
  44    int height;
  45    int mem;
  46
  47    int cpp;                     /* for front and back buffers */
  48    int zpp;
  49
  50    int agpMode;
  51
  52    unsigned int bufferSize;
  53
  54 #if 0
  55    int bitsPerPixel;
  56 #endif
  57    unsigned int frontFormat;
  58    unsigned int frontOffset;
  59    unsigned int backOffset;
  60    unsigned int depthOffset;
  61
  62    unsigned int aperturePitch;
  63
  64    unsigned int textureOffset[SAVAGE_NR_TEX_HEAPS];
  65    unsigned int textureSize[SAVAGE_NR_TEX_HEAPS];
  66    unsigned int logTextureGranularity[SAVAGE_NR_TEX_HEAPS];
  67    drmAddress texVirtual[SAVAGE_NR_TEX_HEAPS];
  68
  69    __DRIscreenPrivate *driScrnPriv;
  70
  71    savageRegion aperture;
  72    savageRegion agpTextures;
  73
  74    drmBufMapPtr bufs;
  75
  76    unsigned int sarea_priv_offset;
  77
  78    /* Configuration cache with default values for all contexts */
  79    driOptionCache optionCache;
  80 } savageScreenPrivate;
  81
  82
  83 /**
  84  * savageRenderbuffer, derived from Mesa's gl_renderbuffer
  85  */
  86 typedef struct {
  87    struct gl_renderbuffer Base;
  88    /* XXX per-window info should go here */
  89    int foo, bar;
  90 } savageRenderbuffer;
  91
  92
  93 #include "savagecontext.h"
  94
  95 extern void savageGetLock( savageContextPtr imesa, GLuint flags );
  96 extern void savageXMesaSetBackClipRects( savageContextPtr imesa );
  97 extern void savageXMesaSetFrontClipRects( savageContextPtr imesa );
  98
  99
 100 #define GET_DISPATCH_AGE( imesa ) imesa->sarea->last_dispatch
 101 #define GET_ENQUEUE_AGE( imesa ) imesa->sarea->last_enqueue
 102
 103
 104 /* Lock the hardware and validate our state.
 105  */
 106 #define LOCK_HARDWARE( imesa )                          \
 107   do {                                                  \
 108     char __ret=0;                                       \
 109     DRM_CAS(imesa->driHwLock, imesa->hHWContext,        \
 110             (DRM_LOCK_HELD|imesa->hHWContext), __ret);  \
 111     if (__ret)                                          \
 112         savageGetLock( imesa, 0 );                      \
 113   } while (0)
 114
 115
 116
 117 /* Unlock the hardware using the global current context
 118  */
 119 #define UNLOCK_HARDWARE(imesa)                                  \
 120     DRM_UNLOCK(imesa->driFd, imesa->driHwLock, imesa->hHWContext);
 121
 122
 123 /* This is the wrong way to do it, I'm sure.  Otherwise the drm
 124  * bitches that I've already got the heavyweight lock.  At worst,
 125  * this is 3 ioctls.  The best solution probably only gets me down
 126  * to 2 ioctls in the worst case.
 127  */
 128 #define LOCK_HARDWARE_QUIESCENT( imesa ) do {   \
 129    LOCK_HARDWARE( imesa );                      \
 130    savageRegetLockQuiescent( imesa );           \
 131 } while(0)
 132
 133 /* The following definitions are copied from savage_regs.h in the XFree86
 134  * driver. They are unlikely to change. If they do we need to keep them in
 135  * sync. */
 136
 137 #define S3_SAVAGE3D_SERIES(chip)  ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
 138
 139 #define S3_SAVAGE4_SERIES(chip)  ((chip==S3_SAVAGE4)            \
 140                                   || (chip==S3_PROSAVAGE)       \
 141                                   || (chip==S3_TWISTER)         \
 142                                   || (chip==S3_PROSAVAGEDDR))
 143
 144 #define S3_SAVAGE_MOBILE_SERIES(chip)   ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
 145
 146 #define S3_SAVAGE_SERIES(chip)    ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
 147
 148 #define S3_MOBILE_TWISTER_SERIES(chip)   ((chip==S3_TWISTER)    \
 149                                           ||(chip==S3_PROSAVAGEDDR))
 150
 151 /* Chip tags.  These are used to group the adapters into
 152  * related families.
 153  */
 154
 155 enum S3CHIPTAGS {
 156     S3_UNKNOWN = 0,
 157     S3_SAVAGE3D,
 158     S3_SAVAGE_MX,
 159     S3_SAVAGE4,
 160     S3_PROSAVAGE,
 161     S3_TWISTER,
 162     S3_PROSAVAGEDDR,
 163     S3_SUPERSAVAGE,
 164     S3_SAVAGE2000,
 165     S3_LAST
 166 };
 167
 168 #endif