Merge branch 'dri2'
[mesa.git] / src / mesa / drivers / dri / savage / savage_init.h
1 /*
2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25
26 #ifndef _SAVAGE_INIT_H_
27 #define _SAVAGE_INIT_H_
28
29 #include <sys/time.h>
30 #include "dri_util.h"
31 #include "mtypes.h"
32
33 #include "xmlconfig.h"
34
35 typedef struct {
36 drm_handle_t handle;
37 drmSize size;
38 char *map;
39 } savageRegion, *savageRegionPtr;
40
41 typedef struct {
42 int chipset;
43 int width;
44 int height;
45 int mem;
46
47 int cpp; /* for front and back buffers */
48 int zpp;
49
50 int agpMode;
51
52 unsigned int bufferSize;
53
54 #if 0
55 int bitsPerPixel;
56 #endif
57 unsigned int frontFormat;
58 unsigned int frontOffset;
59 unsigned int backOffset;
60 unsigned int depthOffset;
61
62 unsigned int aperturePitch;
63
64 unsigned int textureOffset[SAVAGE_NR_TEX_HEAPS];
65 unsigned int textureSize[SAVAGE_NR_TEX_HEAPS];
66 unsigned int logTextureGranularity[SAVAGE_NR_TEX_HEAPS];
67 drmAddress texVirtual[SAVAGE_NR_TEX_HEAPS];
68
69 __DRIscreenPrivate *driScrnPriv;
70
71 savageRegion aperture;
72 savageRegion agpTextures;
73
74 drmBufMapPtr bufs;
75
76 unsigned int sarea_priv_offset;
77
78 /* Configuration cache with default values for all contexts */
79 driOptionCache optionCache;
80 } savageScreenPrivate;
81
82
83 #include "savagecontext.h"
84
85 extern void savageGetLock( savageContextPtr imesa, GLuint flags );
86 extern void savageXMesaSetClipRects(savageContextPtr imesa);
87
88
89 #define GET_DISPATCH_AGE( imesa ) imesa->sarea->last_dispatch
90 #define GET_ENQUEUE_AGE( imesa ) imesa->sarea->last_enqueue
91
92
93 /* Lock the hardware and validate our state.
94 */
95 #define LOCK_HARDWARE( imesa ) \
96 do { \
97 char __ret=0; \
98 DRM_CAS(imesa->driHwLock, imesa->hHWContext, \
99 (DRM_LOCK_HELD|imesa->hHWContext), __ret); \
100 if (__ret) \
101 savageGetLock( imesa, 0 ); \
102 } while (0)
103
104
105
106 /* Unlock the hardware using the global current context
107 */
108 #define UNLOCK_HARDWARE(imesa) \
109 DRM_UNLOCK(imesa->driFd, imesa->driHwLock, imesa->hHWContext);
110
111
112 /* This is the wrong way to do it, I'm sure. Otherwise the drm
113 * bitches that I've already got the heavyweight lock. At worst,
114 * this is 3 ioctls. The best solution probably only gets me down
115 * to 2 ioctls in the worst case.
116 */
117 #define LOCK_HARDWARE_QUIESCENT( imesa ) do { \
118 LOCK_HARDWARE( imesa ); \
119 savageRegetLockQuiescent( imesa ); \
120 } while(0)
121
122 /* The following definitions are copied from savage_regs.h in the XFree86
123 * driver. They are unlikely to change. If they do we need to keep them in
124 * sync. */
125
126 #define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
127
128 #define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
129 || (chip==S3_PROSAVAGE) \
130 || (chip==S3_TWISTER) \
131 || (chip==S3_PROSAVAGEDDR))
132
133 #define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
134
135 #define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
136
137 #define S3_MOBILE_TWISTER_SERIES(chip) ((chip==S3_TWISTER) \
138 ||(chip==S3_PROSAVAGEDDR))
139
140 /* Chip tags. These are used to group the adapters into
141 * related families.
142 */
143
144 enum S3CHIPTAGS {
145 S3_UNKNOWN = 0,
146 S3_SAVAGE3D,
147 S3_SAVAGE_MX,
148 S3_SAVAGE4,
149 S3_PROSAVAGE,
150 S3_TWISTER,
151 S3_PROSAVAGEDDR,
152 S3_SUPERSAVAGE,
153 S3_SAVAGE2000,
154 S3_LAST
155 };
156
157 #endif