(Stephane Marchesin, me) add hyperz support to radeon and r200 drivers. Only fast...
[mesa.git] / src / mesa / drivers / dri / savage / savage_init.h
1 /*
2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25
26 #ifndef _SAVAGE_INIT_H_
27 #define _SAVAGE_INIT_H_
28
29 #ifdef GLX_DIRECT_RENDERING
30
31 #include <sys/time.h>
32 #include "dri_util.h"
33 #include "mtypes.h"
34
35 typedef struct {
36 drm_handle_t handle;
37 drmSize size;
38 char *map;
39 } savageRegion, *savageRegionPtr;
40
41 typedef struct {
42 savageRegion front;
43 savageRegion back;
44 savageRegion depth;
45 savageRegion aperture;
46
47 int chipset;
48 int width;
49 int height;
50 int mem;
51
52 int cpp; /* for front and back buffers */
53 int zpp;
54 #if 0
55 int bitsPerPixel;
56 #endif
57 unsigned int frontFormat;
58 unsigned int frontOffset;
59 unsigned int frontPitch;
60 unsigned int frontBitmapDesc;
61
62 unsigned int backOffset;
63 unsigned int backBitmapDesc;
64 unsigned int depthOffset;
65 unsigned int depthBitmapDesc;
66
67 unsigned int backPitch;
68 unsigned int backPitchBits;
69
70 unsigned int textureOffset[SAVAGE_NR_TEX_HEAPS];
71 unsigned int textureSize[SAVAGE_NR_TEX_HEAPS];
72 unsigned int logTextureGranularity[SAVAGE_NR_TEX_HEAPS];
73 drmAddress texVirtual[SAVAGE_NR_TEX_HEAPS];
74
75 __DRIscreenPrivate *driScrnPriv;
76 drmBufMapPtr bufs;
77 int use_copy_buf;
78 unsigned int sarea_priv_offset;
79 } savageScreenPrivate;
80
81
82 #include "savagecontext.h"
83
84 extern void savageGetLock( savageContextPtr imesa, GLuint flags );
85 extern void savageEmitHwStateLocked( savageContextPtr imesa );
86 extern void savageEmitScissorValues( savageContextPtr imesa, int box_nr, int emit );
87 extern void savageEmitDrawingRectangle( savageContextPtr imesa );
88 extern void savageXMesaSetBackClipRects( savageContextPtr imesa );
89 extern void savageXMesaSetFrontClipRects( savageContextPtr imesa );
90
91
92 #define GET_DISPATCH_AGE( imesa ) imesa->sarea->last_dispatch
93 #define GET_ENQUEUE_AGE( imesa ) imesa->sarea->last_enqueue
94
95
96 /* Lock the hardware and validate our state.
97 */
98 #define LOCK_HARDWARE( imesa ) \
99 do { \
100 char __ret=0; \
101 DRM_CAS(imesa->driHwLock, imesa->hHWContext, \
102 (DRM_LOCK_HELD|imesa->hHWContext), __ret); \
103 if (__ret) \
104 savageGetLock( imesa, 0 ); \
105 } while (0)
106
107
108
109 /* Unlock the hardware using the global current context
110 */
111 #define UNLOCK_HARDWARE(imesa) \
112 DRM_UNLOCK(imesa->driFd, imesa->driHwLock, imesa->hHWContext);
113
114
115 /* This is the wrong way to do it, I'm sure. Otherwise the drm
116 * bitches that I've already got the heavyweight lock. At worst,
117 * this is 3 ioctls. The best solution probably only gets me down
118 * to 2 ioctls in the worst case.
119 */
120 #define LOCK_HARDWARE_QUIESCENT( imesa ) do { \
121 LOCK_HARDWARE( imesa ); \
122 savageRegetLockQuiescent( imesa ); \
123 } while(0)
124
125 /* The following definitions are copied from savage_regs.h in the XFree86
126 * driver. They are unlikely to change. If they do we need to keep them in
127 * sync. */
128
129 #define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
130
131 #define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) \
132 || (chip==S3_PROSAVAGE) \
133 || (chip==S3_TWISTER) \
134 || (chip==S3_PROSAVAGEDDR))
135
136 #define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
137
138 #define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
139
140 #define S3_MOBILE_TWISTER_SERIES(chip) ((chip==S3_TWISTER) \
141 ||(chip==S3_PROSAVAGEDDR))
142
143 /* Chip tags. These are used to group the adapters into
144 * related families.
145 */
146
147 enum S3CHIPTAGS {
148 S3_UNKNOWN = 0,
149 S3_SAVAGE3D,
150 S3_SAVAGE_MX,
151 S3_SAVAGE4,
152 S3_PROSAVAGE,
153 S3_TWISTER,
154 S3_PROSAVAGEDDR,
155 S3_SUPERSAVAGE,
156 S3_SAVAGE2000,
157 S3_LAST
158 };
159
160 #endif
161 #endif