i965: Reduce repeated calculation of the attribute-offset-in-VUE.
[mesa.git] / src / mesa / drivers / dri / sis / sis6326_reg.h
1 /*
2 * Copyright 2005 Eric Anholt
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <anholt@FreeBSD.org>
26 *
27 */
28
29 #ifndef _sis6326_reg_h_
30 #define _sis6326_reg_h_
31
32 #define REG_6326_BitBlt_SrcAddr 0x8280
33 #define REG_6326_BitBlt_DstAddr 0x8284
34 #define REG_6326_BitBlt_DstSrcPitch 0x8288
35 #define REG_6326_BitBlt_HeightWidth 0x828c
36 #define REG_6326_BitBlt_fgColor 0x8290
37 #define REG_6326_BitBlt_bgColor 0x8294
38 #define REG_6326_BitBlt_Mask30 0x8298
39 #define REG_6326_BitBlt_Mask74 0x829c
40 #define REG_6326_BitBlt_ClipTopLeft 0x82a0
41 #define REG_6326_BitBlt_ClitBottomRight 0x82a4
42 #define REG_6326_BitBlt_Cmd 0x82a8
43 #define REG_6326_BitBlt_Pat 0x82ac
44
45 #define REG_6326_3D_TSFSa 0x8800
46 #define REG_6326_3D_TSZa 0x8804
47 #define REG_6326_3D_TSXa 0x8808
48 #define REG_6326_3D_TSYa 0x880C
49 #define REG_6326_3D_TSARGBa 0x8810
50 #define REG_6326_3D_TSUa 0x8814
51 #define REG_6326_3D_TSVa 0x8818
52 #define REG_6326_3D_TSWa 0x881C
53
54 #define REG_6326_3D_TSFSb 0x8820
55 #define REG_6326_3D_TSZb 0x8824
56 #define REG_6326_3D_TSXb 0x8828
57 #define REG_6326_3D_TSYb 0x882C
58 #define REG_6326_3D_TSARGBb 0x8830
59 #define REG_6326_3D_TSUb 0x8834
60 #define REG_6326_3D_TSVb 0x8838
61 #define REG_6326_3D_TSWb 0x883C
62
63 #define REG_6326_3D_TSFSc 0x8840
64 #define REG_6326_3D_TSZc 0x8844
65 #define REG_6326_3D_TSXc 0x8848
66 #define REG_6326_3D_TSYc 0x884C
67 #define REG_6326_3D_TSARGBc 0x8850
68 #define REG_6326_3D_TSUc 0x8854
69 #define REG_6326_3D_TSVc 0x8858
70 #define REG_6326_3D_TSWc 0x885C
71
72 #define REG_6326_3D_TEnable 0x8A00
73 #define REG_6326_3D_ZSet 0x8A04
74 #define REG_6326_3D_ZAddress 0x8A08
75
76 #define REG_6326_3D_AlphaSet 0x8A0C
77 #define REG_6326_3D_AlphaAddress 0x8A10
78 #define REG_6326_3D_DstSet 0x8A14
79 #define REG_6326_3D_DstAddress 0x8A18
80 #define REG_6326_3D_LinePattern 0x8A1C
81 #define REG_6326_3D_FogSet 0x8A20
82
83 #define REG_6326_3D_DstSrcBlendMode 0x8A28
84
85 #define REG_6326_3D_ClipTopBottom 0x8A30
86 #define REG_6326_3D_ClipLeftRight 0x8A34
87
88 #define REG_6326_3D_TextureSet 0x8A38
89 #define REG_6326_3D_TextureBlendSet 0x8A3C
90 /* Low transparency value is in TextureBlendSet */
91 #define REG_6326_3D_TextureTransparencyColorHigh 0x8A40
92
93 #define REG_6326_3D_TextureAddress0 0x8A44
94 #define REG_6326_3D_TextureAddress1 0x8A48
95 #define REG_6326_3D_TextureAddress2 0x8A4C
96 #define REG_6326_3D_TextureAddress3 0x8A50
97 #define REG_6326_3D_TextureAddress4 0x8A54
98 #define REG_6326_3D_TextureAddress5 0x8A58
99 #define REG_6326_3D_TextureAddress6 0x8A5C
100 #define REG_6326_3D_TextureAddress7 0x8A60
101 #define REG_6326_3D_TextureAddress8 0x8A64
102 #define REG_6326_3D_TextureAddress9 0x8A68
103
104 #define REG_6326_3D_TexturePitch01 0x8A6C
105 #define REG_6326_3D_TexturePitch23 0x8A70
106 #define REG_6326_3D_TexturePitch45 0x8A74
107 #define REG_6326_3D_TexturePitch67 0x8A78
108 #define REG_6326_3D_TexturePitch89 0x8A7C
109
110 #define REG_6326_3D_TextureWidthHeight 0x8A80
111 #define REG_6326_3D_TextureBorderColor 0x8A90
112
113 #define REG_6326_3D_EndPrimitiveList 0x8Aff
114
115 /*
116 * REG_6326_BitBlt_fgColor (0x8290-0x8293)
117 * REG_6326_BitBlt_bgColor (0x8294-0x8297)
118 */
119 #define MASK_BltRop 0xff000000
120 #define MASK_BltColor 0x00ffffff
121
122 #define SiS_ROP_SRCCOPY 0xcc000000
123 #define SiS_ROP_PATCOPY 0xf0000000
124
125 /*
126 * REG_6326_BitBlt_Cmd (0x82a8-0x82ab)
127 */
128 #define MASK_QueueStatus 0x0000ffff
129 #define MASK_BltCmd0 0x00ff0000
130 #define MASK_BltCmd1 0xff000000
131
132 #define BLT_SRC_BG 0x00000000
133 #define BLT_SRC_FG 0x00010000
134 #define BLT_SRC_VID 0x00020000
135 #define BLT_SRC_CPU 0x00030000
136 #define BLT_PAT_BG 0x00000000
137 #define BLT_PAT_FG 0x00040000
138 #define BLT_PAT_PAT 0x000b0000
139 #define BLT_XINC 0x00100000
140 #define BLT_YINC 0x00200000
141 #define BLT_CLIP 0x00400000
142 #define BLT_BUSY 0x04000000
143
144 /*
145 * REG_3D_PrimitiveSet -- Define Fire Primitive Mask (89F8h-89FBh)
146 */
147 #define MASK_6326_DrawPrimitiveCommand 0x00000007
148 #define MASK_6326_SetFirePosition 0x00000F00
149 #define MASK_6326_ShadingMode 0x001c0000
150 #define MASK_6326_Direction 0x0003f000
151
152 /* OP_3D_{POINT,LINE,TRIANGLE}_DRAW same as 300-series */
153 /* OP_3D_DIRECTION*_ same as 300-series */
154
155 #define OP_6326_3D_FIRE_TFIRE 0x00000000
156 #define OP_6326_3D_FIRE_TSARGBa 0x00000100
157 #define OP_6326_3D_FIRE_TSWa 0x00000200
158 #define OP_6326_3D_FIRE_TSARGBb 0x00000300
159 #define OP_6326_3D_FIRE_TSWb 0x00000400
160 #define OP_6326_3D_FIRE_TSARGBc 0x00000500
161 #define OP_6326_3D_FIRE_TSWc 0x00000600
162 #define OP_6326_3D_FIRE_TSVc 0x00000700
163
164 #define OP_6326_3D_ATOP 0x00000000
165 #define OP_6326_3D_BTOP 0x00010000
166 #define OP_6326_3D_CTOP 0x00020000
167 #define OP_6326_3D_AMID 0x00000000
168 #define OP_6326_3D_BMID 0x00004000
169 #define OP_6326_3D_CMID 0x00008000
170 #define OP_6326_3D_ABOT 0x00000000
171 #define OP_6326_3D_BBOT 0x00001000
172 #define OP_6326_3D_CBOT 0x00002000
173
174 #define OP_6326_3D_SHADE_FLAT_TOP 0x00040000
175 #define OP_6326_3D_SHADE_FLAT_MID 0x00080000
176 #define OP_6326_3D_SHADE_FLAT_BOT 0x000c0000
177 #define OP_6326_3D_SHADE_FLAT_GOURAUD 0x00100000
178
179
180 /*
181 * REG_6326_3D_EngineFire
182 */
183 #define MASK_CmdQueueLen 0x0FFF0000
184 #define ENG_3DIDLEQE 0x00000002
185 #define ENG_3DIDLE 0x00000001
186
187 /*
188 * REG_6326_3D_TEnable -- Define Capility Enable Mask (8A00h-8A03h)
189 */
190 #define S_ENABLE_Dither (1 << 0)
191 #define S_ENABLE_Transparency (1 << 1)
192 #define S_ENABLE_Blend (1 << 2)
193 #define S_ENABLE_Fog (1 << 3)
194 #define S_ENABLE_Specular (1 << 4)
195 #define S_ENABLE_LargeCache (1 << 5)
196 #define S_ENABLE_TextureCache (1 << 7)
197 #define S_ENABLE_TextureTransparency (1 << 8)
198 #define S_ENABLE_TexturePerspective (1 << 9)
199 #define S_ENABLE_Texture (1 << 10)
200 #define S_ENABLE_PrimSetup (1 << 11)
201 #define S_ENABLE_LinePattern (1 << 12)
202 #define S_ENABLE_StippleAlpha (1 << 13) /* requires S_ENABLE_Stipple */
203 #define S_ENABLE_Stipple (1 << 14)
204 #define S_ENABLE_AlphaBuffer (1 << 16)
205 #define S_ENABLE_AlphaTest (1 << 17)
206 #define S_ENABLE_AlphaWrite (1 << 18)
207 #define S_ENABLE_ZTest (1 << 20)
208 #define S_ENABLE_ZWrite (1 << 21)
209
210 /*
211 * REG_3D_ZSet -- Define Z Buffer Setting Mask (8A08h-8A0Bh)
212 */
213 #define MASK_6326_ZBufferPitch 0x00003FFF
214 #define MASK_6326_ZTestMode 0x00070000
215 #define MASK_6326_ZBufferFormat 0x00100000
216
217 #define S_ZSET_FORMAT_8 0x00000000
218 #define S_ZSET_FORMAT_16 0x00100000
219
220 #define S_ZSET_PASS_NEVER 0x00000000
221 #define S_ZSET_PASS_LESS 0x00010000
222 #define S_ZSET_PASS_EQUAL 0x00020000
223 #define S_ZSET_PASS_LEQUAL 0x00030000
224 #define S_ZSET_PASS_GREATER 0x00040000
225 #define S_ZSET_PASS_NOTEQUAL 0x00050000
226 #define S_ZSET_PASS_GEQUAL 0x00060000
227 #define S_ZSET_PASS_ALWAYS 0x00070000
228
229 /*
230 * REG_3D_AlphaSet -- Define Alpha Buffer Setting Mask (8A0Ch-8A0Fh)
231 */
232 #define MASK_AlphaBufferPitch 0x000003FF
233 #define MASK_AlphaRefValue 0x00FF0000
234 #define MASK_AlphaTestMode 0x07000000
235 #define MASK_AlphaBufferFormat 0x30000000
236
237 #define S_ASET_FORMAT_8 0x30000000
238
239 #define S_ASET_PASS_NEVER 0x00000000
240 #define S_ASET_PASS_LESS 0x01000000
241 #define S_ASET_PASS_EQUAL 0x02000000
242 #define S_ASET_PASS_LEQUAL 0x03000000
243 #define S_ASET_PASS_GREATER 0x04000000
244 #define S_ASET_PASS_NOTEQUAL 0x05000000
245 #define S_ASET_PASS_GEQUAL 0x06000000
246 #define S_ASET_PASS_ALWAYS 0x07000000
247
248 /*
249 * REG_3D_DstSet -- Define Destination Buffer Setting Mask (8A14h-8A17h)
250 */
251 /* pitch, format, depth, rgborder, rop bits same as 300-series */
252
253 /*
254 * REG_6326_3D_FogSet -- Define Fog Mask (8A20h-8A23h)
255 */
256 #define MASK_6326_FogColor 0x00FFFFFF
257 #define MASK_6326_FogMode 0x01000000
258
259 #define FOGMODE_6326_CONST 0x00000000
260 #define FOGMODE_6326_LINEAR 0x01000000
261
262 /*
263 * REG_6326_3D_DstSrcBlendMode (0x8A28 - 0x8A2B)
264 */
265 #define MASK_6326_SrcBlendMode 0xf0000000
266 #define MASK_6326_DstBlendMode 0x0f000000
267 #define MASK_6326_TransparencyColor 0x00ffffff
268
269 #define S_DBLEND_ZERO 0x00000000
270 #define S_DBLEND_ONE 0x10000000
271 #define S_DBLEND_SRC_COLOR 0x20000000
272 #define S_DBLEND_INV_SRC_COLOR 0x30000000
273 #define S_DBLEND_SRC_ALPHA 0x40000000
274 #define S_DBLEND_INV_SRC_ALPHA 0x50000000
275 #define S_DBLEND_DST_ALPHA 0x60000000
276 #define S_DBLEND_INV_DST_ALPHA 0x70000000
277
278 #define S_SBLEND_ZERO 0x00000000
279 #define S_SBLEND_ONE 0x01000000
280 #define S_SBLEND_SRC_ALPHA 0x04000000
281 #define S_SBLEND_INV_SRC_ALPHA 0x05000000
282 #define S_SBLEND_DST_ALPHA 0x06000000
283 #define S_SBLEND_INV_DST_ALPHA 0x07000000
284 #define S_SBLEND_DST_COLOR 0x08000000
285 #define S_SBLEND_INV_DST_COLOR 0x09000000
286 #define S_SBLEND_SRC_ALPHA_SAT 0x0A000000
287 #define S_SBLEND_BOTH_SRC_ALPHA 0x0B000000
288 #define S_SBLEND_BOTH_INV_SRC_ALPHA 0x0C000000
289
290 /*
291 * REG_6326_3D_TextureSet (0x8A38 - 0x8A3B)
292 */
293 #define MASK_6326_TextureMinFilter 0x00000007
294 #define MASK_6326_TextureMagFilter 0x00000008
295 #define MASK_6326_ClearTexCache 0x00000010
296 #define MASK_6326_TextureInSystem 0x00000020
297 #define MASK_6326_TextureLevel 0x00000F00
298 #define MASK_6326_TextureSignYUVFormat 0x00008000
299 #define MASK_6326_TextureMappingMode 0x00FF0000
300
301 #define TEXEL_6326_BGR_ORDER 0x80000000
302
303 #define TEXEL_6326_INDEX1 0x00000000
304 #define TEXEL_6326_INDEX2 0x01000000
305 #define TEXEL_6326_INDEX4 0x02000000
306
307 #define TEXEL_6326_M4 0x10000000
308 #define TEXEL_6326_AM44 0x16000000
309
310 #define TEXEL_6326_YUV422 0x20000000 /* YUYV */
311 #define TEXEL_6326_YVU422 0x21000000 /* YVYU */
312 #define TEXEL_6326_UVY422 0x22000000 /* UYVY */
313 #define TEXEL_6326_VUY422 0x23000000 /* VYUY */
314
315 #define TEXEL_6326_L1 0x30000000
316 #define TEXEL_6326_L2 0x31000000
317 #define TEXEL_6326_L4 0x32000000
318 #define TEXEL_6326_L8 0x33000000
319
320 #define TEXEL_6326_AL22 0x35000000
321 #define TEXEL_6326_AL44 0x38000000
322 #define TEXEL_6326_AL88 0x3c000000
323
324 #define TEXEL_6326_RGB_332_8 0x40000000
325 #define TEXEL_6326_RGB_233_8 0x41000000
326 #define TEXEL_6326_RGB_232_8 0x42000000
327 #define TEXEL_6326_ARGB_1232_8 0x43000000
328
329 #define TEXEL_6326_RGB_555_16 0x50000000
330 #define TEXEL_6326_RGB_565_16 0x51000000
331 #define TEXEL_6326_ARGB_1555_16 0x52000000
332 #define TEXEL_6326_ARGB_4444_16 0x53000000
333 #define TEXEL_6326_ARGB_8332_16 0x54000000
334 #define TEXEL_6326_ARGB_8233_16 0x55000000
335 #define TEXEL_6326_ARGB_8232_16 0x56000000
336
337 #define TEXEL_6326_ARGB_8565_24 0x63000000
338 #define TEXEL_6326_ARGB_8555_24 0x67000000
339 #define TEXEL_6326_RGB_888_24 0x68000000
340
341 #define TEXEL_6326_ARGB_8888_32 0x73000000
342 #define TEXEL_6326_ARGB_0888_32 0x74000000
343
344 #define TEX_MAP_WRAP_U 0x00010000
345 #define TEX_MAP_WRAP_V 0x00020000
346 #define TEX_MAP_MIRROR_U 0x00040000
347 #define TEX_MAP_MIRROR_V 0x00080000
348 #define TEX_MAP_CLAMP_U 0x00100000
349 #define TEX_MAP_CLAMP_V 0x00200000
350 #define TEX_MAP_USE_CTB_SMOOTH 0x00400000
351 #define TEX_MAP_USE_CTB 0x00800000
352
353 #define TEX_FILTER_NEAREST 0x00000000
354 #define TEX_FILTER_LINEAR 0x00000001
355 #define TEX_FILTER_NEAREST_MIP_NEAREST 0x00000002
356 #define TEX_FILTER_NEAREST_MIP_LINEAR 0x00000003
357 #define TEX_FILTER_LINEAR_MIP_NEAREST 0x00000004
358 #define TEX_FILTER_LINEAR_MIP_LINEAR 0x00000005
359 #define TEX_FILTER_MAG_NEAREST 0x00000000
360 #define TEX_FILTER_MAG_LINEAR 0x00000008
361
362 /*
363 * REG_6326_3D_TextureBlendSet (0x8A3C - 0x8A3F)
364 */
365 #define MASK_TextureTransparencyLowB 0x000000ff
366 #define MASK_TextureTransparencyLowG 0x0000FF00
367 #define MASK_TextureTransparencyLowR 0x00ff0000
368 #define MASK_TextureBlend 0x0f000000
369
370 #define TB_C_CS (0 << 26)
371 #define TB_C_CF (1 << 26)
372 #define TB_C_CFCS (2 << 26) /* also 3 << 26 */
373 #define TB_C_CFOMAS_ASCS (4 << 26)
374 #define TB_C_CSOMAF_AFCF (6 << 26) /* also 7 << 26 */
375
376 #define TB_A_AS (0 << 24)
377 #define TB_A_AF (1 << 24)
378 #define TB_A_AFAS (1 << 24)
379
380 /*
381 * REG_6326_3D_TextureTransparencyColorHigh (0x8A40 - 0x8A43)
382 */
383 #define MASK_TextureTransparencyHighB 0x000000FF
384 #define MASK_TextureTransparencyHighG 0x0000FF00
385 #define MASK_TextureTransparencyHighR 0x00FF0000
386
387 /*
388 * REG_3D_TexturePitch01-89 (0x8A6C - 0x8A7F)
389 */
390 #define MASK_TexturePitchOdd 0x000003FF
391 #define MASK_TexturePitchEven 0x03FF0000
392 #define SHIFT_TexturePitchEven 16
393
394 /*
395 * REG_3D_TextureWidthHeightMix (0x8A80 - 0x8A83)
396 */
397 #define MASK_TextureWidthLog2 0xf0000000
398 #define MASK_TextureHeightLog2 0x0f000000
399
400 /*
401 * REG_3D_TextureBorderColor (0x8A90 - 0x8A93)
402 */
403 #define MASK_TextureBorderColorB 0x000000FF
404 #define MASK_TextureBorderColorG 0x0000FF00
405 #define MASK_TextureBorderColorR 0x00FF0000
406 #define MASK_TextureBorderColorA 0xFF000000
407
408 #endif /* _sis6326_reg_h_ */