Cut a bunch of code by not trying to precompute the blit commands and instead
[mesa.git] / src / mesa / drivers / dri / sis / sis_reg.h
1 /**************************************************************************
2
3 Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
4 Copyright 2003 Eric Anholt
5 All Rights Reserved.
6
7 Permission is hereby granted, free of charge, to any person obtaining a
8 copy of this software and associated documentation files (the
9 "Software"), to deal in the Software without restriction, including
10 without limitation the rights to use, copy, modify, merge, publish,
11 distribute, sub license, and/or sell copies of the Software, and to
12 permit persons to whom the Software is furnished to do so, subject to
13 the following conditions:
14
15 The above copyright notice and this permission notice (including the
16 next paragraph) shall be included in all copies or substantial portions
17 of the Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
22 ERIC ANHOLT OR SILICON INTEGRATED SYSTEMS CORP BE LIABLE FOR ANY CLAIM,
23 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
25 USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **************************************************************************/
28 /* $XFree86: xc/lib/GL/mesa/src/drv/sis/sis_reg.h,v 1.3 2000/09/26 15:56:48 tsi Exp $ */
29
30 /*
31 * Authors:
32 * Sung-Ching Lin <sclin@sis.com.tw>
33 * Eric Anholt <anholt@FreeBSD.org>
34 */
35
36 #ifndef _sis_reg_h_
37 #define _sis_reg_h_
38
39 /*
40 * Define All the Register Address of 6327
41 */
42 #define REG_SRC_ADDR 0x8200
43 #define REG_SRC_PITCH 0x8204
44 # define BLIT_DEPTH_8 0x00000000
45 # define BLIT_DEPTH_15 0x40000000
46 # define BLIT_DEPTH_16 0x80000000
47 # define BLIT_DEPTH_32 0xc0000000
48 #define REG_SRC_X_Y 0x8208
49 #define REG_DST_X_Y 0x820c
50 #define REG_DST_ADDR 0x8210
51 #define REG_DST_PITCH_HEIGHT 0x8214
52 #define REG_WIDTH_HEIGHT 0x8218
53 #define REG_PATFG 0x821c
54 #define REG_PATBG 0x8220
55 #define REG_SRCFG 0x8224
56 #define REG_SRCBG 0x8228
57 #define REG_MONOPAT0 0x822c
58 #define REG_MONOPAT1 0x8230
59 #define REG_CLIPLT 0x8234
60 #define REG_CLIPRB 0x8238
61 #define REG_BLIT_CMD 0x823c
62 # define CMD_ROP_PAT 0x0000f000
63 # define CMD_ROP_SRC 0x0000cc00
64 # define CMD_DD_ENABLE 0x00000006
65 # define CMD_SRC_VIDEO 0x00000000
66 # define CMD_SRC_CPU 0x00000010
67 # define CMD_DIR_X_DEC 0x00000000
68 # define CMD_DIR_X_INC 0x00010000
69 # define CMD_DIR_Y_DEC 0x00000000
70 # define CMD_DIR_Y_INC 0x00020000
71
72 #define REG_CommandQueue 0x8240
73
74 #define REG_3D_TSFSa 0x8800
75 #define REG_3D_TSZa 0x8804
76 #define REG_3D_TSXa 0x8808
77 #define REG_3D_TSYa 0x880C
78 #define REG_3D_TSARGBa 0x8810
79 #define REG_3D_TSWGa 0x8814
80 #define REG_3D_TSUAa 0x8818
81 #define REG_3D_TSVAa 0x881C
82 #define REG_3D_TSUBa 0x8820
83 #define REG_3D_TSVBa 0x8824
84 #define REG_3D_TSUCa 0x8828
85 #define REG_3D_TSVCa 0x882C
86
87 #define REG_3D_TSFSb 0x8830
88 #define REG_3D_TSZb 0x8834
89 #define REG_3D_TSXb 0x8838
90 #define REG_3D_TSYb 0x883C
91 #define REG_3D_TSARGBb 0x8840
92 #define REG_3D_TSWGb 0x8844
93 #define REG_3D_TSUAb 0x8848
94 #define REG_3D_TSVAb 0x884C
95 #define REG_3D_TSUBb 0x8850
96 #define REG_3D_TSVBb 0x8854
97 #define REG_3D_TSUCb 0x8858
98 #define REG_3D_TSVCb 0x885C
99
100 #define REG_3D_TSFSc 0x8860
101 #define REG_3D_TSZc 0x8864
102 #define REG_3D_TSXc 0x8868
103 #define REG_3D_TSYc 0x886C
104 #define REG_3D_TSARGBc 0x8870
105 #define REG_3D_TSWGc 0x8874
106 #define REG_3D_TSUAc 0x8878
107 #define REG_3D_TSVAc 0x887C
108 #define REG_3D_TSUBc 0x8880
109 #define REG_3D_TSVBc 0x8884
110 #define REG_3D_TSUCc 0x8888
111 #define REG_3D_TSVCc 0x888C
112
113 /*
114 * REG_3D_AGPCmdSetting (89e4h-89f7)
115 */
116 #define REG_3D_AGPCmBase 0x89E4
117 #define REG_3D_AGPRmDwNum 0x89E8
118 #define REG_3D_AGPTtDwNum 0x89EC
119 #define REG_3D_AGPCmFire 0x89F0
120
121 #define REG_3D_ParsingSet 0x89F4
122 #define REG_3D_PrimitiveSet 0x89F8
123 #define REG_3D_ShadeMode 0x89F8
124 #define REG_3D_EngineFire 0x89FC
125 #define REG_3D_EngineStatus 0x89FC
126 #define REG_3D_TEnable 0x8A00
127 #define REG_3D_TEnable2 0x8A04
128
129 #define REG_3D_ZSet 0x8A08
130 #define REG_3D_ZBias 0x8A0C
131 #define REG_3D_ZStWriteMask 0x8A10
132
133 #define REG_3D_ZAddress 0x8A14
134 #define REG_3D_AlphaSet 0x8A18
135 #define REG_3D_AlphaAddress 0x8A1C
136 #define REG_3D_DstSet 0x8A20
137 #define REG_3D_DstAlphaWriteMask 0x8A24
138
139 #define REG_3D_DstAddress 0x8A28
140
141 #define REG_3D_LinePattern 0x8A2C
142
143 #define REG_3D_FogSet 0x8A30
144
145 #define REG_3D_FogFarDistance 0x8A34
146 #define REG_3D_FogInverseDistance 0x8A38
147 #define REG_3D_FogFactorDensity 0x8A3C
148
149 #define REG_3D_StencilSet 0x8A44
150 #define REG_3D_StencilSet2 0x8A48
151 #define REG_3D_StencilAddress 0x8A4C
152
153 #define REG_3D_DstBlendMode 0x8A50
154 #define REG_3D_SrcBlendMode 0x8A50
155 #define REG_3D_ClipTopBottom 0x8A54
156 #define REG_3D_ClipLeftRight 0x8A58
157
158 #define REG_3D_Brightness 0x8A5C
159
160 #define REG_3D_BumpMapSet 0x8A68
161 #define REG_3D_BumpMapAddress 0x8A6C
162 #define REG_3D_BumpMapPitch 0x8A70
163 #define REG_3D_BumpMapMatrix0 0x8A74
164 #define REG_3D_BumpMapMatrix1 0x8A78
165
166 /*
167 * Define the Texture Register Address of 6326
168 */
169 #define REG_3D_TextureSet 0x8A7C
170 #define REG_3D_TextureWidthHeight 0x8A7C
171 #define REG_3D_TextureMip 0x8A80
172
173 #define REG_3D_TextureTransparencyColorHigh 0x8A84
174 #define REG_3D_TextureTransparencyColorLow 0x8A88
175 #define REG_3D_TextureBorderColor 0x8A8C
176 #define REG_3D_TextureAddress0 0x8A90
177 #define REG_3D_TextureAddress1 0x8A94
178 #define REG_3D_TextureAddress2 0x8A98
179 #define REG_3D_TextureAddress3 0x8A9C
180 #define REG_3D_TextureAddress4 0x8AA0
181 #define REG_3D_TextureAddress5 0x8AA4
182 #define REG_3D_TextureAddress6 0x8AA8
183 #define REG_3D_TextureAddress7 0x8AAC
184 #define REG_3D_TextureAddress8 0x8AB0
185 #define REG_3D_TextureAddress9 0x8AB4
186 #define REG_3D_TextureAddress10 0x8AB8
187 #define REG_3D_TextureAddress11 0x8ABC
188 #define REG_3D_TexturePitch0 0x8AC0
189 #define REG_3D_TexturePitch1 0x8AC0
190 #define REG_3D_TexturePitch2 0x8AC4
191 #define REG_3D_TexturePitch3 0x8AC4
192 #define REG_3D_TexturePitch4 0x8AC8
193 #define REG_3D_TexturePitch5 0x8AC8
194 #define REG_3D_TexturePitch6 0x8ACC
195 #define REG_3D_TexturePitch7 0x8ACC
196 #define REG_3D_TexturePitch8 0x8AD0
197 #define REG_3D_TexturePitch9 0x8AD0
198 #define REG_3D_TexturePitch10 0x8AD4
199
200 #define REG_3D_Texture1Set 0x8ADC
201 #define REG_3D_Texture1WidthHeight 0x8ADC
202 #define REG_3D_Texture1Mip 0x8AE0
203
204 #define REG_3D_Texture1TransparencyColorHigh 0x8AE4
205 #define REG_3D_Texture1TransparencyColorLow 0x8AE8
206 #define REG_3D_Texture1BorderColor 0x8AEC
207 #define REG_3D_Texture1Address0 0x8AF0
208 #define REG_3D_Texture1Address1 0x8AF4
209 #define REG_3D_Texture1Address2 0x8AF8
210 #define REG_3D_Texture1Address3 0x8AFC
211 #define REG_3D_Texture1Address4 0x8B00
212 #define REG_3D_Texture1Address5 0x8B04
213 #define REG_3D_Texture1Address6 0x8B08
214 #define REG_3D_Texture1Address7 0x8B0C
215 #define REG_3D_Texture1Address8 0x8B10
216 #define REG_3D_Texture1Address9 0x8B14
217 #define REG_3D_Texture1Address10 0x8B18
218 #define REG_3D_Texture1Address11 0x8B1C
219 #define REG_3D_Texture1Pitch0 0x8B20
220 #define REG_3D_Texture1Pitch1 0x8B20
221 #define REG_3D_Texture1Pitch2 0x8B24
222 #define REG_3D_Texture1Pitch3 0x8B24
223 #define REG_3D_Texture1Pitch4 0x8B28
224 #define REG_3D_Texture1Pitch5 0x8B28
225 #define REG_3D_Texture1Pitch6 0x8B2C
226 #define REG_3D_Texture1Pitch7 0x8B2C
227 #define REG_3D_Texture1Pitch8 0x8B30
228 #define REG_3D_Texture1Pitch9 0x8B30
229 #define REG_3D_Texture1Pitch10 0x8B34
230
231 #define REG_3D_TextureBlendFactor 0x8B3C
232 #define REG_3D_TextureColorBlendSet0 0x8B40
233 #define REG_3D_TextureColorBlendSet1 0x8B44
234 #define REG_3D_TextureAlphaBlendSet0 0x8B48
235 #define REG_3D_TextureAlphaBlendSet1 0x8B4C
236 /*
237 * Define the End of Primitive List of 6326
238 */
239 #define REG_3D_EndPrimitiveList 0X8B50
240
241
242 /*
243 * Define the Stipple Register Address of 6326
244 */
245 #define REG_3D_Stipple0 0X8B60
246
247 #define REG_3D_TexturePalette 0x8C00
248
249 /*
250 * REG_CommandQueue -- (8240h-8243h)
251 */
252 #define MASK_QueueLen 0x0000ffff
253 #define SiS_EngIdle2d 0x80000000
254 #define SiS_EngIdle 0xe0000000
255 #define MASK_EngState 0xf0000000
256
257 /*
258 * REG_3D_ParsingSet -- Define Parsing Mask (89F4h-89F7h)
259 */
260 #define MASK_VertexDWSize 0xf0000000
261 #define MASK_VertexDataFormat 0x0fff0000
262 /* Because the original MASK_PsVertex_* names of these bits appared to be
263 * wrong, new names SiS_PS_* based off of the 4.3.0 driver and research are
264 * below.
265 */
266 #define SiS_PS_HAS_XYZ MASK_PsVertex_HAS_RHW
267 #define SiS_PS_HAS_W MASK_PsVertex_HAS_NORMALXYZ
268 #define SiS_PS_HAS_DIFFUSE MASK_PsVertex_HAS_SPECULAR
269 #define SiS_PS_HAS_SPECULAR MASK_PsVertex_HAS_DIFFUSE
270 #define SiS_PS_HAS_UV0 MASK_PsVertex_HAS_UVSet2
271 #define SiS_PS_HAS_UV1 MASK_PsVertex_HAS_UVSet3
272 #define MASK_PsVertex_HAS_RHW 0x08000000
273 #define MASK_PsVertex_HAS_NORMALXYZ 0x04000000
274 #define MASK_PsVertex_HAS_DIFFUSE 0x02000000
275 #define MASK_PsVertex_HAS_SPECULAR 0x01000000
276 #define MASK_PsUVSet 0x00ff0000
277 #define MASK_PsVertex_HAS_1SetUV 0x00800000
278 #define MASK_PsVertex_HAS_2SetUV 0x00c00000
279 #define MASK_PsVertex_HAS_3SetUV 0x00e00000
280 #define MASK_PsVertex_HAS_UVSet1 0x00800000
281 #define MASK_PsVertex_HAS_UVSet2 0x00400000
282 #define MASK_PsVertex_HAS_UVSet3 0x00200000
283 #define MASK_PsCullDirection_CCW 0x00008000
284 #define MASK_PsShadingMode 0x00007000
285 /* XXX Shading modes just a guess, but seem to work*/
286 #define MASK_PsShadingFlatA 0x00001000
287 #define MASK_PsShadingFlatB 0x00002000
288 #define MASK_PsShadingFlatC 0x00003000
289 #define MASK_PsShadingSmooth 0x00004000
290 #define MASK_PsTextureFrom 0x000003f0
291 #define MASK_PsTexture0FromA 0x00000000
292 #define MASK_PsTexture1FromA 0x00000000
293 #define MASK_PsTexture1FromB 0x00000040
294 #define MASK_PsBumpTextureFromA 0x00000000
295 #define MASK_PsBumpTextureFromB 0x00000010
296 #define MASK_PsBumpTextureFromC 0x00000020
297 #define MASK_PsDataType 0x0000000f
298 #define MASK_PsPointList 0x00000000
299 #define MASK_PsLineList 0x00000004
300 #define MASK_PsLineStrip 0x00000005
301 #define MASK_PsTriangleList 0x00000008
302 #define MASK_PsTriangleStrip 0x00000009
303 #define MASK_PsTriangleFan 0x0000000a
304
305 /*
306 * REG_3D_PrimitiveSet -- Define Fire Primitive Mask (89F8h-89FBh)
307 */
308 #define MASK_DrawPrimitiveCommand 0x00000007
309 #define MASK_SetFirePosition 0x00001F00
310 #define MASK_BumpTextureFrom 0x00030000
311 #define MASK_Texture1From 0x000C0000
312 #define MASK_Texture0From 0x00300000
313 #define MASK_ShadingMode 0x07000000
314 #define MASK_CullDirection 0x08000000
315
316 #define OP_3D_POINT_DRAW 0x00000000
317 #define OP_3D_LINE_DRAW 0x00000001
318 #define OP_3D_TRIANGLE_DRAW 0x00000002
319
320 #define OP_3D_DIRECTION_RIGHT 0x00000000
321 #define OP_3D_DIRECTION_LEFT 0x00000100
322 #define OP_3D_DIRECTION_HORIZONTAL 0x00000000
323 #define OP_3D_DIRECTION_VERTICAL 0x00000100
324
325 #define OP_3D_FIRE_TFIRE 0x00000000
326 #define OP_3D_FIRE_TSARGBa 0x00000100
327 #define OP_3D_FIRE_TSWa 0x00000200
328 #define OP_3D_FIRE_TSVAa 0x00000300
329 #define OP_3D_FIRE_TSVBa 0x00000400
330 #define OP_3D_FIRE_TSVCa 0x00000500
331
332 #define OP_3D_FIRE_TSARGBb 0x00000900
333 #define OP_3D_FIRE_TSWb 0x00000a00
334 #define OP_3D_FIRE_TSVAb 0x00000b00
335 #define OP_3D_FIRE_TSVBb 0x00000c00
336 #define OP_3D_FIRE_TSVCb 0x00000d00
337
338 #define OP_3D_FIRE_TSARGBc 0x00001100
339 #define OP_3D_FIRE_TSWc 0x00001200
340 #define OP_3D_FIRE_TSVAc 0x00001300
341 #define OP_3D_FIRE_TSVBc 0x00001400
342 #define OP_3D_FIRE_TSVCc 0x00001500
343
344 #define OP_3D_Texture0FromA 0x00000000
345 #define OP_3D_Texture0FromB 0x00100000
346 #define OP_3D_Texture0FromC 0x00200000
347 #define OP_3D_Texture1FromA 0x00000000
348 #define OP_3D_Texture1FromB 0x00040000
349 #define OP_3D_Texture1FromC 0x00080000
350 #define OP_3D_TextureBumpFromA 0x00000000
351 #define OP_3D_TextureBumpFromB 0x00010000
352 #define OP_3D_TextureBumpFromC 0x00020000
353
354 #define OP_3D_CullDirection_CCW 0x08000000
355
356 #define SHADE_FLAT_VertexA 0x01000000
357 #define SHADE_FLAT_VertexB 0x02000000
358 #define SHADE_FLAT_VertexC 0x03000000
359 #define SHADE_GOURAUD 0x04000000
360
361 /*
362 * Define Command Queue Length Mask (89FCh-89FF)
363 */
364 #define MASK_CmdQueueLen 0x0FFF0000
365
366 /*
367 * REG_3D_TEnable -- Define Capility Enable Mask (8A00h-8A03h)
368 */
369 #define MASK_DitherEnable 0x00000001
370 #define MASK_BlendEnable 0x00000002
371 #define MASK_FogTestEnable 0x00000004
372 #define MASK_FogEnable 0x00000008
373 #define MASK_SpecularEnable 0x00000010
374 #define MASK_FogPerspectiveEnable 0x00000020
375 #define MASK_TextureCacheClear 0x00000040
376 #define MASK_TextureCacheEnable 0x00000080
377 #define MASK_BumpMapEnable 0x00000100
378 #define MASK_TexturePerspectiveEnable 0x00000200
379 #define MASK_TextureEnable 0x00000400
380 #define MASK_CullEnable 0x00000800
381 #define MASK_TextureNumUsed 0x0000F000
382 #define MASK_AlphaBufferEnable 0x00010000
383 #define MASK_AlphaTestEnable 0x00020000
384 #define MASK_AlphaWriteEnable 0x00040000
385 #define MASK_ZTestEnable 0x00080000
386 #define MASK_ZWriteEnable 0x00100000
387 #define MASK_StencilBufferEnable 0x00200000
388 #define MASK_StencilTestEnable 0x00400000
389 #define MASK_StencilWriteEnable 0x00800000
390 #define MASK_Texture0TransparencyEnable 0x01000000
391 #define MASK_Texture1TransparencyEnable 0x02000000
392 #define MASK_TextureAWrapUCorrection 0x04000000
393 #define MASK_TextureAWrapVCorrection 0x08000000
394 #define MASK_TextureBWrapUCorrection 0x10000000
395 #define MASK_TextureBWrapVCorrection 0x20000000
396 #define MASK_TextureCWrapUCorrection 0x40000000
397 #define MASK_TextureCWrapVCorrection 0x80000000
398
399 /*
400 * REG_3D_TEnable2 -- Define Capility Enable Mask2 (8A04h-8A07h)
401 */
402 #define MASK_Texture0BlockTextureEnable 0x00000001
403 #define MASK_Texture1BlockTextureEnable 0x00000002
404 #define MASK_Texture0AnisotropicEnable 0x00000010
405 #define MASK_Texture1AnisotropicEnable 0x00000020
406 #define MASK_TextureMipmapBiasEnable 0x00000040
407 #define MASK_LinePatternEnable 0x00000100
408 #define MASK_StippleAlphaEnable 0x00000200
409 #define MASK_StippleEnable 0x00000400
410 #define MASK_AntiAliasEnable 0x00000800
411 #define MASK_ZMaskWriteEnable 0x00001000
412 #define MASK_StencilMaskWriteEnable 0x00002000
413 #define MASK_AlphaMaskWriteEnable 0x00004000
414 #define MASK_ColorMaskWriteEnable 0x00008000
415 #define MASK_ZCacheClear 0x00010000
416 #define MASK_ZCacheEnable 0x00020000
417 #define MASK_StencilCacheClear 0x00040000
418 #define MASK_StencilCacheEnable 0x00080000
419 #define MASK_AlphaCacheClear 0x00100000
420 #define MASK_AlphaCacheEnable 0x00200000
421 #define MASK_ColorCacheClear 0x00400000
422 #define MASK_ColorCacheEnable 0x00800000
423
424 /*
425 * REG_3D_ZSet -- Define Z Buffer Setting Mask (8A08h-8A0Bh)
426 */
427 #define MASK_ZBufferPitch 0x00000FFF
428 #define MASK_ZTestMode 0x00070000
429 #define MASK_ZBufferInSystem 0x00080000
430 #define MASK_ZBufferFormat 0x01F00000
431
432 #define SiS_Z_COMP_NEVER 0x00000000
433 #define SiS_Z_COMP_S_LT_B 0x00010000
434 #define SiS_Z_COMP_S_EQ_B 0x00020000
435 #define SiS_Z_COMP_S_LE_B 0x00030000
436 #define SiS_Z_COMP_S_GT_B 0x00040000
437 #define SiS_Z_COMP_S_NE_B 0x00050000
438 #define SiS_Z_COMP_S_GE_B 0x00060000
439 #define SiS_Z_COMP_ALWAYS 0x00070000
440
441 #define SiS_ZFORMAT_Z16 0x00000000
442 #define SiS_ZFORMAT_Z16_INT 0x00100000
443 #define SiS_ZFORMAT_S1Z15 0x00400000
444 #define SiS_ZFORMAT_S1Z15_INT 0x00500000
445 #define SiS_ZFORMAT_Z32 0x00800000
446 #define SiS_ZFORMAT_S1Z31 0x00C00000
447 #define SiS_ZFORMAT_S2Z30 0x00D00000
448 #define SiS_ZFORMAT_S4Z28 0x00E00000
449 #define SiS_ZFORMAT_S8Z24 0x00F00000
450 #define SiS_ZFORMAT_FZ30 0x01800000
451 #define SiS_ZFORMAT_FS1Z30 0x01C00000
452 #define SiS_ZFORMAT_FS2Z30 0x01D00000
453
454 /*
455 * REG_3D_ZBias -- Define Z Buffer Setting Mask (8A0Ch-8A0Fh)
456 */
457 #define MASK_ZBias 0xFFFFFFFF
458
459 /*
460 * REG_3D_ZStWriteMask -- Define Z and Stencil Buffer Mask (8A10h-8A13h)
461 */
462 #define MASK_ZWriteMask 0x00FFFFFF
463
464 /*
465 * REG_3D_ZAddress -- Define Z Buffer Base Address(8A14h-8A17h)
466 */
467 #define MASK_ZAddress 0xFFFFFFFF
468
469 /*
470 * REG_3D_AlphaSet -- Define Alpha Buffer Setting Mask (8A18h-8A1Bh)
471 */
472 #define MASK_AlphaBufferPitch 0x000003FF
473 #define MASK_AlphaRefValue 0x00FF0000
474 #define MASK_AlphaTestMode 0x07000000
475 #define MASK_AlphaBufferInSystem 0x08000000
476 #define MASK_AlphaBufferFormat 0x30000000
477
478 #define SiS_ALPHA_NEVER 0x00000000
479 #define SiS_ALPHA_LESS 0x01000000
480 #define SiS_ALPHA_EQUAL 0x02000000
481 #define SiS_ALPHA_LEQUAL 0x03000000
482 #define SiS_ALPHA_GREATER 0x04000000
483 #define SiS_ALPHA_NOTEQUAL 0x05000000
484 #define SiS_ALPHA_GEQUAL 0x06000000
485 #define SiS_ALPHA_ALWAYS 0x07000000
486
487 /*
488 * REG_3D_AlphaAddress -- Define Alpha Buffer Base Address(8A1Ch-8A1Fh)
489 */
490 #define MASK_AlphaAddress 0xFFFFFFFF
491
492 /*
493 * REG_3D_DstSet -- Define Destination Buffer Setting Mask (8A20h-8A23h)
494 */
495 #define MASK_DstBufferPitch 0x00000FFF
496 #define MASK_DstBufferFormat 0x000F0000
497 #define MASK_DstBufferBitDepth 0x00300000
498 #define MASK_DstBufferRgbOrder 0x00400000
499 #define MASK_DstBufferInSystem 0x00800000
500 #define MASK_Dst7BitFormat 0x007F0000
501 #define MASK_ROP2 0x0F000000
502
503 #define DST_FORMAT_RGB_555 0x00100000
504 #define DST_FORMAT_RGB_565 0x00110000
505 #define DST_FORMAT_ARGB_1555 0x00120000
506 #define DST_FORMAT_ARGB_4444 0x00130000
507 #define DST_FORMAT_ARGB_1888 0x00300000
508 #define DST_FORMAT_ARGB_2888 0x00310000
509 #define DST_FORMAT_ARGB_4888 0x00320000
510 #define DST_FORMAT_ARGB_8888 0x00330000
511 #define DST_FORMAT_ARGB_0888 0x00340000
512
513 #define DST_FORMAT_BGR_555 0x00500000
514 #define DST_FORMAT_BGR_565 0x00510000
515 #define DST_FORMAT_ABGR_1555 0x00520000
516 #define DST_FORMAT_ABGR_4444 0x00530000
517 #define DST_FORMAT_ABGR_1888 0x00700000
518 #define DST_FORMAT_ABGR_2888 0x00710000
519 #define DST_FORMAT_ABGR_4888 0x00720000
520 #define DST_FORMAT_ABGR_8888 0x00730000
521 #define DST_FORMAT_ABGR_0888 0x00740000
522
523 #define LOP_CLEAR 0x00000000
524 #define LOP_NOR 0x01000000
525 #define LOP_AND_INVERTED 0x02000000
526 #define LOP_COPY_INVERTED 0x03000000
527 #define LOP_AND_REVERSE 0x04000000
528 #define LOP_INVERT 0x05000000
529 #define LOP_XOR 0x06000000
530 #define LOP_NAND 0x07000000
531 #define LOP_AND 0x08000000
532 #define LOP_EQUIV 0x09000000
533 #define LOP_NOOP 0x0a000000
534 #define LOP_OR_INVERTED 0x0b000000
535 #define LOP_COPY 0x0c000000
536 #define LOP_OR_REVERSE 0x0d000000
537 #define LOP_OR 0x0e000000
538 #define LOP_SET 0x0f000000
539
540 /*
541 * REG_3D_DstAlphaWriteMask -- Define Destination/Alpha Buffer Write Mask (8A24h-8A27h)
542 */
543 #define MASK_ColorWriteMask 0x00FFFFFF
544 #define MASK_AlphaWriteMask 0xFF000000
545
546 /*
547 * REG_3D_DstAddress -- Define Destination Buffer Base Address(8A1Ch-8A1Fh)
548 */
549 #define MASK_DstAddress 0xFFFFFFFF
550
551 /*
552 * REG_3D_LinePattern -- Define Line Pattern (8A2Ch-8A2Fh)
553 */
554 #define MASK_LinePatternRepeatFactor 0x00007FFF
555 #define MASK_LinePatternLastPixelFlag 0x00008000
556 #define MASK_LinePattern 0xFFFF0000
557
558 /*
559 * REG_3D_FogSet -- Define Fog Mask (8A30h-8A33h)
560 */
561 #define MASK_FogColor 0x00FFFFFF
562 #define MASK_FogMode 0x07000000
563 #define MASK_FogZLookup 0x08000000
564
565 #define FOGMODE_CHEAP 0x04000000
566 #define FOGMODE_LINEAR 0x05000000
567 #define FOGMODE_EXP 0x06000000
568 #define FOGMODE_EXP2 0x07000000
569
570 /*
571 * REG_3D_FogStartEnd -- Define Fog Start End Setting (0x8A34 - 0x8A37)
572 */
573 #define MASK_FogFarDistance 0x0007FFFF
574
575 /*
576 * REG_3D_FogStartEnd -- Define Fog End Setting (0x8A38 - 0x8A3B)
577 */
578 #define MASK_FogInvFarDistance 0x0007FFFF
579
580 /*
581 * REG_3D_FogFactorDensity (0x8A3C - 0x8A3F)
582 */
583 #define MASK_FogDensity 0x0003FFFF
584 #define MASK_FogFactor 0xFF000000
585
586 /*
587 * REG_3D_StencilSet -- Define stencil test (8A44h-8A47h)
588 */
589 #define MASK_StencilValueMask 0x000000ff
590 #define MASK_StencilRefMask 0x0000ff00
591 #define MASK_StencilTestMode 0x07000000
592 #define MASK_StencilBufferInSystem 0x08000000
593 #define MASK_StencilFormat 0x30000000
594
595 #define SiS_STENCIL_NEVER 0x00000000
596 #define SiS_STENCIL_LESS 0x01000000
597 #define SiS_STENCIL_EQUAL 0x02000000
598 #define SiS_STENCIL_LEQUAL 0x03000000
599 #define SiS_STENCIL_GREATER 0x04000000
600 #define SiS_STENCIL_NOTEQUAL 0x05000000
601 #define SiS_STENCIL_GEQUAL 0x06000000
602 #define SiS_STENCIL_ALWAYS 0x07000000
603
604 #define STENCIL_FORMAT_1 0x00000000
605 #define STENCIL_FORMAT_2 0x10000000
606 #define STENCIL_FORMAT_4 0x20000000
607 #define STENCIL_FORMAT_8 0x30000000
608
609 /*
610 * REG_3D_StencilSet2 -- Define stencil test (8A4h-8A47h)
611 */
612 #define MASK_StencilBufferPitch 0x00000FFF
613 #define MASK_StencilZPassOp 0x00007000
614 #define MASK_StencilZFailOp 0x00070000
615 #define MASK_StencilFailOp 0x00700000
616 #define MASK_StencilWriteMask 0xFF000000
617
618 #define SiS_SFAIL_KEEP 0x00000000
619 #define SiS_SFAIL_ZERO 0x00100000
620 #define SiS_SFAIL_REPLACE 0x00200000
621 #define SiS_SFAIL_INCR 0x00300000 /* guess -- was _WRAP */
622 #define SiS_SFAIL_DECR 0x00400000 /* guess -- was _WRAP */
623 #define SiS_SFAIL_INVERT 0x00500000
624 #define SiS_SFAIL_INCR_WRAP 0x00600000 /* guess */
625 #define SiS_SFAIL_DECR_WRAP 0x00700000 /* guess */
626
627 #define SiS_SPASS_ZFAIL_KEEP 0x00000000
628 #define SiS_SPASS_ZFAIL_ZERO 0x00010000
629 #define SiS_SPASS_ZFAIL_REPLACE 0x00020000
630 #define SiS_SPASS_ZFAIL_INCR 0x00030000 /* guess -- was _WRAP */
631 #define SiS_SPASS_ZFAIL_DECR 0x00040000 /* guess -- was _WRAP */
632 #define SiS_SPASS_ZFAIL_INVERT 0x00050000
633 #define SiS_SPASS_ZFAIL_INCR_WRAP 0x00060000 /* guess */
634 #define SiS_SPASS_ZFAIL_DECR_WRAP 0x00070000 /* guess */
635
636 #define SiS_SPASS_ZPASS_KEEP 0x00000000
637 #define SiS_SPASS_ZPASS_ZERO 0x00001000
638 #define SiS_SPASS_ZPASS_REPLACE 0x00002000
639 #define SiS_SPASS_ZPASS_INCR 0x00003000 /* guess -- was _WRAP */
640 #define SiS_SPASS_ZPASS_DECR 0x00004000 /* guess -- was _WRAP */
641 #define SiS_SPASS_ZPASS_INVERT 0x00005000
642 #define SiS_SPASS_ZPASS_INCR_WRAP 0x00006000 /* guess */
643 #define SiS_SPASS_ZPASS_DECR_WRAP 0x00007000 /* guess */
644
645 /*
646 * REG_3D_DstBlendMode (0x8A50 - 0x8A53)
647 */
648 #define MASK_SrcBlendMode 0x0000000F
649 #define MASK_DstBlendMode 0x000000F0
650
651 #define SiS_D_ZERO 0x00000000
652 #define SiS_D_ONE 0x00000010
653 #define SiS_D_SRC_COLOR 0x00000020
654 #define SiS_D_ONE_MINUS_SRC_COLOR 0x00000030
655 #define SiS_D_SRC_ALPHA 0x00000040
656 #define SiS_D_ONE_MINUS_SRC_ALPHA 0x00000050
657 #define SiS_D_DST_ALPHA 0x00000060
658 #define SiS_D_ONE_MINUS_DST_ALPHA 0x00000070
659 #define SiS_D_DST_COLOR 0x00000080
660 #define SiS_D_ONE_MINUS_DST_COLOR 0x00000090
661 #define SiS_D_SRC_ALPHA_SAT 0x000000a0
662
663 #define SiS_S_ZERO 0x00000000
664 #define SiS_S_ONE 0x00000001
665 #define SiS_S_SRC_COLOR 0x00000002
666 #define SiS_S_ONE_MINUS_SRC_COLOR 0x00000003
667 #define SiS_S_SRC_ALPHA 0x00000004
668 #define SiS_S_ONE_MINUS_SRC_ALPHA 0x00000005
669 #define SiS_S_DST_ALPHA 0x00000006
670 #define SiS_S_ONE_MINUS_DST_ALPHA 0x00000007
671 #define SiS_S_DST_COLOR 0x00000008
672 #define SiS_S_ONE_MINUS_DST_COLOR 0x00000009
673 #define SiS_S_SRC_ALPHA_SATURATE 0x0000000a
674 #define SiS_S_BOTH_SRC_ALPHA 0x0000000b
675 #define SiS_S_BOTH_ONE_MINUS_SRC_ALPHA 0x0000000c
676
677 /*
678 * REG_3D_ClipTopBottom (0x8A54 - 0x8A57)
679 */
680 #define MASK_BottomClip 0x00001FFF
681 #define MASK_TopClip 0x03FFE000
682
683 /*
684 * REG_3D_ClipLeftRight (0x8A58 - 0x8A5B)
685 */
686 #define MASK_RightClip 0x00001FFF
687 #define MASK_LeftClip 0x03FFE000
688
689 /*
690 * REG_3D_TextureSet (0x8A7C - 0x8A7F)
691 * REG_3D_Texture1Set (0x8ADC - 0x8ADF)
692 */
693 #define MASK_TextureHeight 0x0000000F
694 #define MASK_TextureWidth 0x000000F0
695 #define MASK_TextureLevel 0x00000F00
696 #define MASK_TextureSignYUVFormat 0x00001000
697 #define MASK_TextureMappingMode 0x00FF0000
698 #define MASK_TextureWrapU 0x00010000
699 #define MASK_TextureWrapV 0x00020000
700 #define MASK_TextureMirrorU 0x00040000
701 #define MASK_TextureMirrorV 0x00080000
702 #define MASK_TextureClampU 0x00100000
703 #define MASK_TextureClampV 0x00200000
704 #define MASK_TextureBorderU 0x00400000
705 #define MASK_TextureBorderV 0x00800000
706 #define MASK_TextureFormat 0xFF000000
707 #define MASK_TextureBitDepth 0x70000000
708 #define MASK_TextureRgbOrder 0x80000000
709
710 #define TEXEL_INDEX1 0x00000000
711 #define TEXEL_INDEX2 0x01000000
712 #define TEXEL_INDEX4 0x02000000
713 #define TEXEL_INDEX8 0x03000000
714
715 #define TEXEL_INDEX1WithAlpha 0x04000000
716 #define TEXEL_INDEX2WithAlpha 0x05000000
717 #define TEXEL_INDEX4WithAlpha 0x06000000
718 #define TEXEL_INDEX8WithAlpha 0x07000000
719
720 #define TEXEL_I1 0x10000000
721 #define TEXEL_I2 0x11000000
722 #define TEXEL_I4 0x12000000
723 #define TEXEL_I8 0x13000000
724
725 #define TEXEL_DXT1 0x19000000
726 #define TEXEL_DXT2 0x1A000000
727 #define TEXEL_DXT3 0x1B000000
728
729 #define TEXEL_YUV422 0x20000000
730 #define TEXEL_YVU422 0x21000000
731 #define TEXEL_UVY422 0x22000000
732 #define TEXEL_VUY422 0x23000000
733 #define TEXEL_YUV411 0x24000000
734
735 #define TEXEL_L1 0x30000000
736 #define TEXEL_L2 0x31000000
737 #define TEXEL_L4 0x32000000
738 #define TEXEL_L8 0x33000000
739
740 #define TEXEL_AL11 0x34000000
741 #define TEXEL_AL44 0x35000000
742 #define TEXEL_AL26 0x37000000
743 #define TEXEL_AL88 0x38000000
744
745 #define TEXEL_A1 0x40000000
746 #define TEXEL_A2 0x41000000
747 #define TEXEL_A4 0x42000000
748 #define TEXEL_A8 0x43000000
749
750 #define TEXEL_RGB_332_8 0x50000000
751 #define TEXEL_RGB_233_8 0x51000000
752 #define TEXEL_RGB_232_8 0x52000000
753 #define TEXEL_ARGB_1232_8 0x53000000
754 #define TEXEL_ARGB_2222_8 0x54000000
755
756 #define TEXEL_RGB_555_16 0x60000000
757 #define TEXEL_RGB_565_16 0x61000000
758 #define TEXEL_ARGB_1555_16 0x62000000
759 #define TEXEL_ARGB_4444_16 0x63000000
760
761 #define TEXEL_ARGB_1888_32 0x70000000
762 #define TEXEL_ARGB_2888_32 0x71000000
763 #define TEXEL_ARGB_4888_32 0x72000000
764 #define TEXEL_ARGB_8888_32 0x73000000
765 #define TEXEL_ARGB_0888_32 0x74000000
766
767 #define TEXEL_BGR_332_8 0xD0000000
768 #define TEXEL_BGR_233_8 0xD1000000
769 #define TEXEL_BGR_232_8 0xD2000000
770 #define TEXEL_ABGR_1232_8 0xD3000000
771 #define TEXEL_ABGR_2222_8 0xD4000000
772
773 #define TEXEL_BGR_555_16 0xE0000000
774 #define TEXEL_BGR_565_16 0xE1000000
775 #define TEXEL_ABGR_1555_16 0xE2000000
776 #define TEXEL_ABGR_4444_16 0xE3000000
777
778 #define TEXEL_ABGR_1888_32 0xF0000000
779 #define TEXEL_ABGR_2888_32 0xF1000000
780 #define TEXEL_ABGR_4888_32 0xF2000000
781 #define TEXEL_ABGR_8888_32 0xF3000000
782 #define TEXEL_ABGR_0888_32 0xF4000000
783
784 #define TEXEL_VU88 0x00000000
785 #define TEXEL_LVU655 0x00800000
786 #define TEXEL_LVU888 0x01000000
787 #define TEXEL_UV88 0x02000000
788 #define TEXEL_LUV655 0x02800000
789 #define TEXEL_LUV888 0x03000000
790
791 /*
792 * REG_3D_TextureMip (0x8A80 - 0x8A83)
793 * REG_3D_Texture1Mip (0x8AE0 - 0x8AE3)
794 */
795 #define MASK_TextureAnisotropyRatio 0x0000000F
796 #define MASK_TextureMipmapLodBias 0x00003FF0
797 #define MASK_TextureFilterMin 0x0001C000
798 #define MASK_TextureFilterMag 0x00020000
799 #define MASK_TextureFilter 0x0003C000
800 #define MASK_TextureLevelInSystem 0x3FFC0000
801 #define MASK_TextureLevel0InSystem 0x00040000
802 #define MASK_TextureBlockLength 0xF0000000
803
804 #define TEXTURE_FILTER_NEAREST 0x00000000
805 #define TEXTURE_FILTER_LINEAR 0x00004000
806 #define TEXTURE_FILTER_NEAREST_MIP_NEAREST 0x00008000
807 #define TEXTURE_FILTER_NEAREST_MIP_LINEAR 0x00010000
808 #define TEXTURE_FILTER_LINEAR_MIP_NEAREST 0x0000c000
809 #define TEXTURE_FILTER_LINEAR_MIP_LINEAR 0x00014000
810
811 /*
812 * REG_3D_TextureTransparencyColorHigh (0x8A84 - 0x8A87)
813 * REG_3D_Texture1TransparencyColorHigh (0x8AE4 - 0x8AE7)
814 */
815 #define MASK_TextureTransparencyColorHighB 0x000000FF
816 #define MASK_TextureTransparencyColorHighG 0x0000FF00
817 #define MASK_TextureTransparencyColorHighR 0x00FF0000
818 #define MASK_TextureAlphaTransparencyMode 0x08000000
819
820 /*
821 * REG_3D_TextureTransparencyColorLow (0x8A88 - 0x8A8B)
822 * REG_3D_Texture1TransparencyColorLow (0x8AE8 - 0x8AEB)
823 */
824 #define MASK_TextureTransparencyColorLowB 0x000000FF
825 #define MASK_TextureTransparencyColorLowG 0x0000FF00
826 #define MASK_TextureTransparencyColorLowR 0x00FF0000
827 #define MASK_TextureBlockHeight 0x07000000
828 #define MASK_TextureBlockWidth 0x70000000
829
830 /*
831 * REG_3D_TextureTransparencyColorLow (0x8A8C - 0x8A8F)
832 * REG_3D_Texture1TransparencyColorLow (0x8AEC - 0x8AEF)
833 */
834 #define MASK_TextureBorderColorB 0x000000FF
835 #define MASK_TextureBorderColorG 0x0000FF00
836 #define MASK_TextureBorderColorR 0x00FF0000
837 #define MASK_TextureBorderColorA 0xFF000000
838
839 /*
840 * REG_3D_TexturePitch0-10 (0x8AC0 - 0x8AD7)
841 * REG_3D_Texture1Pitch0-10 (0x8B20 - 0x8B37)
842 */
843 #define MASK_TexturePitchOdd 0x000003FF
844 #define MASK_TexturePitchEven 0x03FF0000
845 #define SHIFT_TexturePitchEven 16
846
847 /*
848 * REG_3D_TextureColorBlendSet0 (0x8B40 - 0x8B43)
849 * REG_3D_TextureColorBlendSet1 (0x8B44 - 0x8B46)
850 * REG_3D_TextureAlphaBlendSet0 (0x8B40 - 0x8B43)
851 * REG_3D_TextureAlphaBlendSet1 (0x8B44 - 0x8B46)
852 */
853 #define STAGE0_C_CF 0xa1485000
854 #define STAGE0_C_CS 0xc1485000
855 #define STAGE0_C_CFCS 0xa1705000
856 #define STAGE0_C_CFOMAS_CSAS 0xc534c001
857 #define STAGE0_C_CFOMCS_CCCS 0x4530c001
858
859 #define STAGE0_A_AF 0x63230000
860 #define STAGE0_A_AS 0xc3230000
861 #define STAGE0_A_AFAS 0x63c30000
862 #define STAGE0_A_AFOMAS_ACAS 0x46c60001
863
864 #define STAGE1_C_CF 0xa1485000
865 #define STAGE1_C_CS 0xe1485000
866 #define STAGE1_C_CFCS 0xa1785000
867 #define STAGE1_C_CFOMAS_CSAS 0xe5394001
868 #define STAGE1_C_CFOMCS_CCCS 0x45394001
869
870 #define STAGE1_A_AF 0xa3230000
871 #define STAGE1_A_AS 0xe3230000
872 #define STAGE1_A_AFAS 0xa3e30000
873 #define STAGE1_A_AFOMAS_ACAS 0x4aea0001
874
875 /* What registers are these associated with? */
876 #define MASK_BMMemoryInSystem 0x00000080
877 #define MASK_BMHeight 0x00000F00
878 #define MASK_BMWidth 0x0000F000
879 #define MASK_BMFilter 0x00010000
880 #define MASK_BMMappingMode 0x007E0000
881 #define MASK_BMFormat 0x07800000
882 #define MASK_BMTxBumpmap 0x08000000
883
884 #define MASK_BMAddress 0xFFFFFFFC
885
886 #define MASK_BMOffset 0xFF800000
887 #define MASK_BMScale 0x007FE000
888 #define MASK_BMPitch 0x00001FFF
889
890 #define MASK_BMMatrix00 0x000007FF
891 #define MASK_BMMatrix01 0x07FF0000
892 #define MASK_BMMatrix10 0x000007FF
893 #define MASK_BMMatrix11 0x07FF0000
894
895 #define MASK_TextureRealInSystem 0x00000001
896 #define MASK_TextureDowngrade 0x00000002
897
898 #define ALPHA_BUFFER_FORMAT_1 0x00000000
899 #define ALPHA_BUFFER_FORMAT_2 0x10000000
900 #define ALPHA_BUFFER_FORMAT_4 0x20000000
901 #define ALPHA_BUFFER_FORMAT_8 0x30000000
902
903 #endif