src/mesa/drivers/dri/unichrome/server/via_regs.h

   1 /*
   2  * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
   3  * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the
  13  * next paragraph) shall be included in all copies or substantial portions
  14  * of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /*************************************************************************
  26  *
  27  *  File:       via_regs.c
  28  *  Content:    The defines of Via registers
  29  *
  30  ************************************************************************/
  31
  32 #ifndef _VIA_REGS_H
  33 #define _VIA_REGS_H
  34
  35 #include "via_driver.h"
  36
  37 /*#define VIA_SERIES(chip)  (chip == VIA_CLE266)*/
  38
  39 #define PCI_VIA_VENDOR_ID       0x1106
  40
  41 #define PCI_CHIP_CLE3122        0x3122
  42 #define PCI_CHIP_CLE3022        0x3022
  43 #define PCI_CHIP_VT3205         0x3205
  44 #define PCI_CHIP_VT7205         0x7205
  45 #define PCI_CHIP_VT3204         0x3108
  46 #define PCI_CHIP_VT3259         0x3118
  47 #define PCI_CHIP_VT3344         0x3344
  48
  49
  50 #define BIOS_BSIZE              1024
  51 #define BIOS_BASE               0xc0000
  52
  53
  54 #define VIA_MMIO_REGSIZE        0x9000
  55 #define VIA_MMIO_REGBASE        0x0
  56 #define VIA_MMIO_VGABASE        0x8000
  57 #define VIA_MMIO_BLTBASE        0x200000
  58 #define VIA_MMIO_BLTSIZE        0x10000
  59
  60
  61 /* defines for VIA 2D registers */
  62 #define VIA_REG_GECMD           0x000
  63 #define VIA_REG_GEMODE          0x004
  64 #define VIA_REG_GESTATUS        0x004       /* as same as VIA_REG_GEMODE */
  65 #define VIA_REG_SRCPOS          0x008
  66 #define VIA_REG_DSTPOS          0x00C
  67 #define VIA_REG_LINE_K1K2       0x008
  68 #define VIA_REG_LINE_XY         0x00C
  69 #define VIA_REG_DIMENSION       0x010       /* width and height */
  70 #define VIA_REG_PATADDR         0x014
  71 #define VIA_REG_FGCOLOR         0x018
  72 #define VIA_REG_DSTCOLORKEY     0x018       /* as same as VIA_REG_FG */
  73 #define VIA_REG_BGCOLOR         0x01C
  74 #define VIA_REG_SRCCOLORKEY     0x01C       /* as same as VIA_REG_BG */
  75 #define VIA_REG_CLIPTL          0x020       /* top and left of clipping */
  76 #define VIA_REG_CLIPBR          0x024       /* bottom and right of clipping */
  77 #define VIA_REG_OFFSET          0x028
  78 #define VIA_REG_LINE_ERROR      0x028
  79 #define VIA_REG_KEYCONTROL      0x02C       /* color key control */
  80 #define VIA_REG_SRCBASE         0x030
  81 #define VIA_REG_DSTBASE         0x034
  82 #define VIA_REG_PITCH           0x038       /* pitch of src and dst */
  83 #define VIA_REG_MONOPAT0        0x03C
  84 #define VIA_REG_MONOPAT1        0x040
  85 #define VIA_REG_COLORPAT        0x100       /* from 0x100 to 0x1ff */
  86
  87
  88
  89 /* defines for VIA video registers */
  90 #define VIA_REG_INTERRUPT       0x200
  91 #define VIA_REG_CRTCSTART       0x214
  92
  93
  94 /* defines for VIA HW cursor registers */
  95 #define VIA_REG_CURSOR_MODE     0x2D0
  96 #define VIA_REG_CURSOR_POS      0x2D4
  97 #define VIA_REG_CURSOR_ORG      0x2D8
  98 #define VIA_REG_CURSOR_BG       0x2DC
  99 #define VIA_REG_CURSOR_FG       0x2E0
 100
 101
 102 /* defines for VIA 3D registers */
 103 #define VIA_REG_STATUS          0x400
 104 #define VIA_REG_TRANSET         0x43C
 105 #define VIA_REG_TRANSPACE       0x440
 106
 107 /* VIA_REG_STATUS(0x400): Engine Status */
 108 #define VIA_CMD_RGTR_BUSY       0x00000080  /* Command Regulator is busy */
 109 #define VIA_2D_ENG_BUSY         0x00000001  /* 2D Engine is busy */
 110 #define VIA_3D_ENG_BUSY         0x00000002  /* 3D Engine is busy */
 111 #define VIA_VR_QUEUE_BUSY       0x00020000 /* Virtual Queue is busy */
 112
 113
 114 /* VIA_REG_GECMD(0x00): 2D Engine Command  */
 115 #define VIA_GEC_NOOP            0x00000000
 116 #define VIA_GEC_BLT             0x00000001
 117 #define VIA_GEC_LINE            0x00000005
 118
 119 #define VIA_GEC_SRC_XY          0x00000000
 120 #define VIA_GEC_SRC_LINEAR      0x00000010
 121 #define VIA_GEC_DST_XY          0x00000000
 122 #define VIA_GEC_DST_LINRAT      0x00000020
 123
 124 #define VIA_GEC_SRC_FB          0x00000000
 125 #define VIA_GEC_SRC_SYS         0x00000040
 126 #define VIA_GEC_DST_FB          0x00000000
 127 #define VIA_GEC_DST_SYS         0x00000080
 128
 129 #define VIA_GEC_SRC_MONO        0x00000100  /* source is mono */
 130 #define VIA_GEC_PAT_MONO        0x00000200  /* pattern is mono */
 131
 132 #define VIA_GEC_MSRC_OPAQUE     0x00000000  /* mono src is opaque */
 133 #define VIA_GEC_MSRC_TRANS      0x00000400  /* mono src is transparent */
 134
 135 #define VIA_GEC_PAT_FB          0x00000000  /* pattern is in frame buffer */
 136 #define VIA_GEC_PAT_REG         0x00000800  /* pattern is from reg setting */
 137
 138 #define VIA_GEC_CLIP_DISABLE    0x00000000
 139 #define VIA_GEC_CLIP_ENABLE     0x00001000
 140
 141 #define VIA_GEC_FIXCOLOR_PAT    0x00002000
 142
 143 #define VIA_GEC_INCX            0x00000000
 144 #define VIA_GEC_DECY            0x00004000
 145 #define VIA_GEC_INCY            0x00000000
 146 #define VIA_GEC_DECX            0x00008000
 147
 148 #define VIA_GEC_MPAT_OPAQUE     0x00000000  /* mono pattern is opaque */
 149 #define VIA_GEC_MPAT_TRANS      0x00010000  /* mono pattern is transparent */
 150
 151 #define VIA_GEC_MONO_UNPACK     0x00000000
 152 #define VIA_GEC_MONO_PACK       0x00020000
 153 #define VIA_GEC_MONO_DWORD      0x00000000
 154 #define VIA_GEC_MONO_WORD       0x00040000
 155 #define VIA_GEC_MONO_BYTE       0x00080000
 156
 157 #define VIA_GEC_LASTPIXEL_ON    0x00000000
 158 #define VIA_GEC_LASTPIXEL_OFF   0x00100000
 159 #define VIA_GEC_X_MAJOR         0x00000000
 160 #define VIA_GEC_Y_MAJOR         0x00200000
 161 #define VIA_GEC_QUICK_START     0x00800000
 162
 163
 164 /* VIA_REG_GEMODE(0x04): GE mode */
 165 #define VIA_GEM_8bpp            0x00000000
 166 #define VIA_GEM_16bpp           0x00000100
 167 #define VIA_GEM_32bpp           0x00000300
 168
 169 #define VIA_GEM_640             0x00000000   /* 640*480 */
 170 #define VIA_GEM_800             0x00000400   /* 800*600 */
 171 #define VIA_GEM_1024            0x00000800   /* 1024*768 */
 172 #define VIA_GEM_1280            0x00000C00   /* 1280*1024 */
 173 #define VIA_GEM_1600            0x00001000   /* 1600*1200 */
 174 #define VIA_GEM_2048            0x00001400   /* 2048*1536 */
 175
 176 /* VIA_REG_PITCH(0x38): Pitch Setting */
 177 #define VIA_PITCH_ENABLE        0x80000000
 178
 179
 180 #define MAXLOOP                 0xffffff
 181
 182
 183 #define VerticalRetraceWait() \
 184 { \
 185     VGAOUT8(vgaCRIndex, 0x17); \
 186     if (VGAIN8(vgaCRReg) & 0x80) { \
 187         while ((VGAIN8(vgaIOBase + 0x0a) & 0x08) == 0x00) ; \
 188         while ((VGAIN8(vgaIOBase + 0x0a) & 0x08) == 0x08) ; \
 189         while ((VGAIN8(vgaIOBase + 0x0a) & 0x08) == 0x00) ; \
 190     } \
 191 }
 192
 193
 194 #define VIASETREG(addr, data)   *(volatile unsigned int *)(pVia->MapBase + (addr)) = (data)
 195 #define VIAGETREG(addr)         *(volatile unsigned int *)(pVia->MapBase + (addr))
 196
 197
 198 #endif /* _VIA_REGS_H */