2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
27 /* WARNING: These defines must be the same as what the Xserver uses.
28 * if you change them, you must change the defines in the Xserver.
34 #define VIA_DMA_BUF_ORDER 12
35 #define VIA_DMA_BUF_SZ (1 << VIA_DMA_BUF_ORDER)
36 #define VIA_DMA_BUF_NR 256
37 #define VIA_NR_SAREA_CLIPRECTS 8
38 #define VIA_NR_XVMC_PORTS 10
39 #define VIA_NR_XVMC_LOCKS 5
40 #define VIA_MAX_CACHELINE_SIZE 64
41 #define XVMCLOCKPTR(saPriv,lockNo) \
42 ((volatile int *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
43 (VIA_MAX_CACHELINE_SIZE - 1)) & \
44 ~(VIA_MAX_CACHELINE_SIZE - 1)) + \
45 VIA_MAX_CACHELINE_SIZE*(lockNo)))
47 /* Each region is a minimum of 64k, and there are at most 64 of them.
49 #define VIA_NR_TEX_REGIONS 64
50 #define VIA_LOG_MIN_TEX_REGION_SIZE 16
53 #define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
54 #define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
55 #define VIA_UPLOAD_CTX 0x4
56 #define VIA_UPLOAD_BUFFERS 0x8
57 #define VIA_UPLOAD_TEX0 0x10
58 #define VIA_UPLOAD_TEX1 0x20
59 #define VIA_UPLOAD_CLIPRECTS 0x40
60 #define VIA_UPLOAD_ALL 0xff
62 /* VIA specific ioctls */
63 #define DRM_VIA_ALLOCMEM 0x00
64 #define DRM_VIA_FREEMEM 0x01
65 #define DRM_VIA_AGP_INIT 0x02
66 #define DRM_VIA_FB_INIT 0x03
67 #define DRM_VIA_MAP_INIT 0x04
68 #define DRM_VIA_DEC_FUTEX 0x05
70 #define DRM_VIA_DMA_INIT 0x07
71 #define DRM_VIA_CMDBUFFER 0x08
72 #define DRM_VIA_FLUSH 0x09
73 #define DRM_VIA_PCICMD 0x0a
74 #define DRM_VIA_CMDBUF_SIZE 0x0b
76 #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
77 #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
78 #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
79 #define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
80 #define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
81 #define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
82 #define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
83 #define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
84 #define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
85 #define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
86 #define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
87 drm_via_cmdbuf_size_t)
89 /* Indices into buf.Setup where various bits of state are mirrored per
90 * context and per buffer. These can be fired at the card as a unit,
91 * or in a piecewise fashion as required.
94 #define VIA_TEX_SETUP_SIZE 8
96 /* Flags for clear ioctl
100 #define VIA_DEPTH 0x4
101 #define VIA_STENCIL 0x8
103 #define VIA_MEM_VIDEO 0 /* matches drm constant */
104 #define VIA_MEM_AGP 1 /* matches drm constant */
105 #define VIA_MEM_SYSTEM 2
106 #define VIA_MEM_MIXED 3
107 #define VIA_MEM_UNKNOWN 4
124 unsigned long offset
;
127 typedef struct _drm_via_init
{
130 VIA_CLEANUP_MAP
= 0x02
133 unsigned long sarea_priv_offset
;
134 unsigned long fb_offset
;
135 unsigned long mmio_offset
;
136 unsigned long agpAddr
;
139 typedef struct _drm_via_futex
{
141 VIA_FUTEX_WAIT
= 0x00,
142 VIA_FUTEX_WAKE
= 0X01
149 typedef struct _drm_via_dma_init
{
152 VIA_CLEANUP_DMA
= 0x02,
153 VIA_DMA_INITIALIZED
= 0x03
156 unsigned long offset
;
158 unsigned long reg_pause_addr
;
159 } drm_via_dma_init_t
;
161 typedef struct _drm_via_cmdbuffer
{
164 } drm_via_cmdbuffer_t
;
166 /* Warning: If you change the SAREA structure you must change the Xserver
167 * structure as well */
169 typedef struct _drm_via_tex_region
{
170 unsigned char next
, prev
; /* indices to form a circular LRU */
171 unsigned char inUse
; /* owned by a client, or free? */
172 int age
; /* tracked by clients to update local LRU's */
173 } drm_via_tex_region_t
;
175 typedef struct _drm_via_sarea
{
178 drm_clip_rect_t boxes
[VIA_NR_SAREA_CLIPRECTS
];
179 drm_via_tex_region_t texList
[VIA_NR_TEX_REGIONS
+ 1];
180 int ctxOwner
; /* last context to upload state */
185 * We want the lock integers alone on, and aligned to, a cache line.
186 * Therefore this somewhat strange construct.
189 char XvMCLockArea
[VIA_MAX_CACHELINE_SIZE
* (VIA_NR_XVMC_LOCKS
+ 1)];
191 unsigned int XvMCDisplaying
[VIA_NR_XVMC_PORTS
];
192 unsigned int XvMCSubPicOn
[VIA_NR_XVMC_PORTS
];
193 unsigned int XvMCCtxNoGrabbed
; /* Last context to hold decoder */
195 /* Used by the 3d driver only at this point, for pageflipping:
197 unsigned int pfCurrentOffset
;
201 typedef struct _drm_via_cmdbuf_size
{
203 VIA_CMDBUF_SPACE
= 0x01,
204 VIA_CMDBUF_LAG
= 0x02
208 } drm_via_cmdbuf_size_t
;
213 int via_fb_init(DRM_IOCTL_ARGS
);
214 int via_mem_alloc(DRM_IOCTL_ARGS
);
215 int via_mem_free(DRM_IOCTL_ARGS
);
216 int via_agp_init(DRM_IOCTL_ARGS
);
217 int via_map_init(DRM_IOCTL_ARGS
);
218 int via_decoder_futex(DRM_IOCTL_ARGS
);
219 int via_dma_init(DRM_IOCTL_ARGS
);
220 int via_cmdbuffer(DRM_IOCTL_ARGS
);
221 int via_flush_ioctl(DRM_IOCTL_ARGS
);
222 int via_pci_cmdbuffer(DRM_IOCTL_ARGS
);
223 int via_cmdbuf_size(DRM_IOCTL_ARGS
);
226 #endif /* _VIA_DRM_H_ */