36372898ce6b67a931246fb1a3d2ec4c455cf118
[mesa.git] / src / mesa / pipe / i915simple / i915_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 //#include "main/imports.h" /* CALLOC */
29 #include "i915_context.h"
30 #include "i915_winsys.h"
31 #include "i915_state.h"
32 #include "i915_batch.h"
33 #include "i915_tex_layout.h"
34 #include "i915_reg.h"
35
36 #include "pipe/draw/draw_context.h"
37 #include "pipe/p_defines.h"
38 #include "pipe/p_winsys.h"
39 #include "pipe/p_util.h"
40
41
42 /**
43 * Return list of supported surface/texture formats.
44 * If we find texture and drawable support differs, add a selector
45 * parameter or another function.
46 */
47 static const unsigned *
48 i915_supported_formats(struct pipe_context *pipe,
49 // unsigned type,
50 unsigned *numFormats)
51 {
52 #if 0
53 static const unsigned tex_supported[] = {
54 PIPE_FORMAT_U_R8_G8_B8_A8,
55 PIPE_FORMAT_U_A8_R8_G8_B8,
56 PIPE_FORMAT_U_R5_G6_B5,
57 PIPE_FORMAT_U_L8,
58 PIPE_FORMAT_U_A8,
59 PIPE_FORMAT_U_I8,
60 PIPE_FORMAT_U_L8_A8,
61 PIPE_FORMAT_YCBCR,
62 PIPE_FORMAT_YCBCR_REV,
63 PIPE_FORMAT_S8_Z24,
64 };
65
66
67 /* Actually a lot more than this - add later:
68 */
69 static const unsigned render_supported[] = {
70 PIPE_FORMAT_U_A8_R8_G8_B8,
71 PIPE_FORMAT_U_R5_G6_B5,
72 };
73
74 /*
75 */
76 static const unsigned z_stencil_supported[] = {
77 PIPE_FORMAT_U_Z16,
78 PIPE_FORMAT_U_Z32,
79 PIPE_FORMAT_S8_Z24,
80 };
81
82 switch (type) {
83 case PIPE_RENDER_FORMAT:
84 *numFormats = Elements(render_supported);
85 return render_supported;
86
87 case PIPE_TEX_FORMAT:
88 *numFormats = Elements(tex_supported);
89 return render_supported;
90
91 case PIPE_Z_STENCIL_FORMAT:
92 *numFormats = Elements(render_supported);
93 return render_supported;
94
95 default:
96 *numFormats = 0;
97 return NULL;
98 }
99 #else
100 static const unsigned render_supported[] = {
101 PIPE_FORMAT_U_A8_R8_G8_B8,
102 PIPE_FORMAT_U_R5_G6_B5,
103 PIPE_FORMAT_S8_Z24,
104 };
105 *numFormats = 3;
106 return render_supported;
107 #endif
108 }
109
110
111 /**
112 * We might want to return max texture levels instead...
113 */
114 static void
115 i915_max_texture_size(struct pipe_context *pipe, unsigned textureType,
116 unsigned *maxWidth, unsigned *maxHeight, unsigned *maxDepth)
117 {
118 switch (textureType) {
119 case PIPE_TEXTURE_1D:
120 *maxWidth = 2048;
121 break;
122 case PIPE_TEXTURE_2D:
123 *maxWidth =
124 *maxHeight = 2048;
125 break;
126 case PIPE_TEXTURE_3D:
127 *maxWidth =
128 *maxHeight =
129 *maxDepth = 256;
130 break;
131 case PIPE_TEXTURE_CUBE:
132 *maxWidth =
133 *maxHeight = 2048;
134 break;
135 default:
136 assert(0);
137 }
138 }
139
140
141 static void i915_destroy( struct pipe_context *pipe )
142 {
143 struct i915_context *i915 = i915_context( pipe );
144
145 draw_destroy( i915->draw );
146
147 free( i915 );
148 }
149
150
151
152 static void
153 i915_begin_query(struct pipe_context *pipe, struct pipe_query_object *q)
154 {
155 /* should never be called */
156 assert(0);
157 }
158
159
160 static void
161 i915_end_query(struct pipe_context *pipe, struct pipe_query_object *q)
162 {
163 /* should never be called */
164 assert(0);
165 }
166
167
168 static boolean i915_draw_elements( struct pipe_context *pipe,
169 struct pipe_buffer_handle *indexBuffer,
170 unsigned indexSize,
171 unsigned prim, unsigned start, unsigned count)
172 {
173 struct i915_context *i915 = i915_context( pipe );
174 struct draw_context *draw = i915->draw;
175 unsigned i;
176
177 if (i915->dirty)
178 i915_update_derived( i915 );
179
180
181 /*
182 * Map vertex buffers
183 */
184 for (i = 0; i < PIPE_ATTRIB_MAX; i++) {
185 if (i915->vertex_buffer[i].buffer) {
186 void *buf
187 = pipe->winsys->buffer_map(pipe->winsys,
188 i915->vertex_buffer[i].buffer,
189 PIPE_BUFFER_FLAG_READ);
190 draw_set_mapped_vertex_buffer(draw, i, buf);
191 }
192 }
193 /* Map index buffer, if present */
194 if (indexBuffer) {
195 void *mapped_indexes
196 = pipe->winsys->buffer_map(pipe->winsys, indexBuffer,
197 PIPE_BUFFER_FLAG_READ);
198 draw_set_mapped_element_buffer(draw, indexSize, mapped_indexes);
199 }
200 else {
201 /* no index/element buffer */
202 draw_set_mapped_element_buffer(draw, 0, NULL);
203 }
204
205 draw_set_mapped_constant_buffer(draw,
206 i915->current.constants[PIPE_SHADER_VERTEX]);
207
208 /* draw! */
209 draw_arrays(i915->draw, prim, start, count);
210
211 /*
212 * unmap vertex/index buffers
213 */
214 for (i = 0; i < PIPE_ATTRIB_MAX; i++) {
215 if (i915->vertex_buffer[i].buffer) {
216 pipe->winsys->buffer_unmap(pipe->winsys, i915->vertex_buffer[i].buffer);
217 draw_set_mapped_vertex_buffer(draw, i, NULL);
218 }
219 }
220 if (indexBuffer) {
221 pipe->winsys->buffer_unmap(pipe->winsys, indexBuffer);
222 draw_set_mapped_element_buffer(draw, 0, NULL);
223 }
224
225 return TRUE;
226 }
227
228
229 static boolean i915_draw_arrays( struct pipe_context *pipe,
230 unsigned prim, unsigned start, unsigned count)
231 {
232 return i915_draw_elements(pipe, NULL, 0, prim, start, count);
233 }
234
235
236
237 struct pipe_context *i915_create( struct pipe_winsys *pipe_winsys,
238 struct i915_winsys *i915_winsys,
239 unsigned pci_id )
240 {
241 struct i915_context *i915;
242 unsigned is_i945 = 0;
243
244 switch (pci_id) {
245 case PCI_CHIP_I915_G:
246 case PCI_CHIP_I915_GM:
247 break;
248
249 case PCI_CHIP_I945_G:
250 case PCI_CHIP_I945_GM:
251 case PCI_CHIP_I945_GME:
252 case PCI_CHIP_G33_G:
253 case PCI_CHIP_Q33_G:
254 case PCI_CHIP_Q35_G:
255 is_i945 = 1;
256 break;
257
258 default:
259 pipe_winsys->printf(pipe_winsys,
260 "%s: unknown pci id 0x%x, cannot create context\n",
261 __FUNCTION__, pci_id);
262 return NULL;
263 }
264
265 i915 = CALLOC_STRUCT(i915_context);
266 if (i915 == NULL)
267 return NULL;
268
269 i915->winsys = i915_winsys;
270 i915->pipe.winsys = pipe_winsys;
271
272 i915->pipe.destroy = i915_destroy;
273 i915->pipe.supported_formats = i915_supported_formats;
274 i915->pipe.max_texture_size = i915_max_texture_size;
275 i915->pipe.clear = i915_clear;
276
277 i915->pipe.begin_query = i915_begin_query;
278 i915->pipe.end_query = i915_end_query;
279
280 i915->pipe.draw_arrays = i915_draw_arrays;
281 i915->pipe.draw_elements = i915_draw_elements;
282
283 /*
284 * Create drawing context and plug our rendering stage into it.
285 */
286 i915->draw = draw_create();
287 assert(i915->draw);
288 draw_set_rasterize_stage(i915->draw, i915_draw_render_stage(i915));
289
290 i915_init_region_functions(i915);
291 i915_init_surface_functions(i915);
292 i915_init_state_functions(i915);
293 i915_init_flush_functions(i915);
294 i915_init_string_functions(i915);
295
296 i915->pci_id = pci_id;
297 i915->flags.is_i945 = is_i945;
298
299 if (i915->flags.is_i945)
300 i915->pipe.mipmap_tree_layout = i945_miptree_layout;
301 else
302 i915->pipe.mipmap_tree_layout = i945_miptree_layout;
303
304
305 i915->dirty = ~0;
306 i915->hardware_dirty = ~0;
307
308 /* Batch stream debugging is a bit hacked up at the moment:
309 */
310 i915->batch_start = BEGIN_BATCH(0, 0);
311
312 /*
313 * XXX we could plug GL selection/feedback into the drawing pipeline
314 * by specifying a different setup/render stage.
315 */
316
317 return &i915->pipe;
318 }
319