1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "i915_batch.h"
29 #include "i915_state_inlines.h"
30 #include "i915_context.h"
32 #include "i915_state.h"
33 #include "pipe/p_util.h"
35 #define FILE_DEBUG_FLAG DEBUG_STATE
37 /* State that we have chosen to store in the DYNAMIC segment of the
38 * i915 indirect state mechanism.
40 * Can't cache these in the way we do the static state, as there is no
41 * start/size in the command packet, instead an 'end' value that gets
44 * Additionally, there seems to be a requirement to re-issue the full
45 * (active) state every time a 4kb boundary is crossed.
48 static inline void set_dynamic_indirect( struct i915_context
*i915
,
55 for (i
= 0; i
< dwords
; i
++)
56 i915
->current
.dynamic
[offset
+ i
] = src
[i
];
58 i915
->hardware_dirty
|= I915_HW_DYNAMIC
;
62 /***********************************************************************
63 * Modes4: stencil masks and logicop
65 static void upload_MODES4( struct i915_context
*i915
)
69 /* I915_NEW_STENCIL */
71 int testmask
= i915
->stencil
.value_mask
[0] & 0xff;
72 int writemask
= i915
->stencil
.write_mask
[0] & 0xff;
74 modes4
|= (_3DSTATE_MODES_4_CMD
|
75 ENABLE_STENCIL_TEST_MASK
|
76 STENCIL_TEST_MASK(testmask
) |
77 ENABLE_STENCIL_WRITE_MASK
|
78 STENCIL_WRITE_MASK(writemask
));
83 modes4
|= (_3DSTATE_MODES_4_CMD
|
84 ENABLE_LOGIC_OP_FUNC
|
85 LOGIC_OP_FUNC(i915_translate_logic_op(i915
->blend
.logicop_func
)));
88 /* Always, so that we know when state is in-active:
90 set_dynamic_indirect( i915
,
96 const struct i915_tracked_state i915_upload_MODES4
= {
97 .dirty
= I915_NEW_BLEND
| I915_NEW_STENCIL
,
98 .update
= upload_MODES4
104 /***********************************************************************
107 static void upload_BFO( struct i915_context
*i915
)
111 memset( bf
, 0, sizeof(bf
) );
115 if (i915
->stencil
.back_enabled
) {
116 int test
= i915_translate_compare_func(i915
->stencil
.back_func
);
117 int fop
= i915_translate_stencil_op(i915
->stencil
.back_fail_op
);
118 int dfop
= i915_translate_stencil_op(i915
->stencil
.back_zfail_op
);
119 int dpop
= i915_translate_stencil_op(i915
->stencil
.back_zpass_op
);
120 int ref
= i915
->stencil
.ref_value
[1] & 0xff;
121 int tmask
= i915
->stencil
.value_mask
[1] & 0xff;
122 int wmask
= i915
->stencil
.write_mask
[1] & 0xff;
124 bf
[0] = (_3DSTATE_BACKFACE_STENCIL_OPS
|
125 BFO_ENABLE_STENCIL_FUNCS
|
126 BFO_ENABLE_STENCIL_TWO_SIDE
|
127 BFO_ENABLE_STENCIL_REF
|
128 BFO_STENCIL_TWO_SIDE
|
129 (ref
<< BFO_STENCIL_REF_SHIFT
) |
130 (test
<< BFO_STENCIL_TEST_SHIFT
) |
131 (fop
<< BFO_STENCIL_FAIL_SHIFT
) |
132 (dfop
<< BFO_STENCIL_PASS_Z_FAIL_SHIFT
) |
133 (dpop
<< BFO_STENCIL_PASS_Z_PASS_SHIFT
));
135 bf
[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS
|
136 BFM_ENABLE_STENCIL_TEST_MASK
|
137 BFM_ENABLE_STENCIL_WRITE_MASK
|
138 (tmask
<< BFM_STENCIL_TEST_MASK_SHIFT
) |
139 (wmask
<< BFM_STENCIL_WRITE_MASK_SHIFT
));
142 /* This actually disables two-side stencil: The bit set is a
143 * modify-enable bit to indicate we are changing the two-side
144 * setting. Then there is a symbolic zero to show that we are
145 * setting the flag to zero/off.
147 bf
[0] = (_3DSTATE_BACKFACE_STENCIL_OPS
|
148 BFO_ENABLE_STENCIL_TWO_SIDE
|
153 set_dynamic_indirect( i915
,
159 const struct i915_tracked_state i915_upload_BFO
= {
160 .dirty
= I915_NEW_STENCIL
,
165 /***********************************************************************
169 static void upload_BLENDCOLOR( struct i915_context
*i915
)
173 memset( bc
, 0, sizeof(bc
) );
175 /* I915_NEW_BLEND {_COLOR}
178 const float *color
= i915
->blend_color
.color
;
180 bc
[0] = _3DSTATE_CONST_BLEND_COLOR_CMD
;
181 bc
[1] = pack_ui32_float4( color
[0],
187 set_dynamic_indirect( i915
,
193 const struct i915_tracked_state i915_upload_BLENDCOLOR
= {
194 .dirty
= I915_NEW_BLEND
,
195 .update
= upload_BLENDCOLOR
198 /***********************************************************************
202 static void upload_IAB( struct i915_context
*i915
)
207 unsigned eqRGB
= i915
->blend
.rgb_func
;
208 unsigned srcRGB
= i915
->blend
.rgb_src_factor
;
209 unsigned dstRGB
= i915
->blend
.rgb_dst_factor
;
211 unsigned eqA
= i915
->blend
.alpha_func
;
212 unsigned srcA
= i915
->blend
.alpha_src_factor
;
213 unsigned dstA
= i915
->blend
.alpha_dst_factor
;
215 /* Special handling for MIN/MAX filter modes handled at
216 * state_tracker level.
219 if (srcA
!= srcRGB
||
223 iab
= (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD
|
227 IAB_MODIFY_SRC_FACTOR
|
228 IAB_MODIFY_DST_FACTOR
|
229 SRC_ABLND_FACT(i915_translate_blend_factor(srcA
)) |
230 DST_ABLND_FACT(i915_translate_blend_factor(dstA
)) |
231 (i915_translate_blend_func(eqA
) << IAB_FUNC_SHIFT
));
234 iab
= (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD
|
241 set_dynamic_indirect( i915
,
247 const struct i915_tracked_state i915_upload_IAB
= {
248 .dirty
= I915_NEW_BLEND
,
253 /***********************************************************************
258 static void upload_DEPTHSCALE( struct i915_context
*i915
)
260 union { float f
; unsigned u
; } ds
[2];
262 memset( ds
, 0, sizeof(ds
) );
266 ds
[0].u
= _3DSTATE_DEPTH_OFFSET_SCALE
;
267 ds
[1].f
= i915
->setup
.offset_scale
;
269 set_dynamic_indirect( i915
,
270 I915_DYNAMIC_DEPTHSCALE_0
,
275 const struct i915_tracked_state i915_upload_DEPTHSCALE
= {
276 .dirty
= I915_NEW_SETUP
,
277 .update
= upload_DEPTHSCALE
282 /***********************************************************************
285 * The i915 supports a 4x4 stipple natively, GL wants 32x32.
286 * Fortunately stipple is usually a repeating pattern.
288 * XXX: does stipple pattern need to be adjusted according to
289 * the window position?
291 * XXX: possibly need workaround for conform paths test.
294 static void upload_STIPPLE( struct i915_context
*i915
)
298 st
[0] = _3DSTATE_STIPPLE
;
303 if (i915
->setup
.poly_stipple_enable
) {
311 const ubyte
*mask
= (const ubyte
*)i915
->poly_stipple
.stipple
;
314 p
[0] = mask
[12] & 0xf;
315 p
[1] = mask
[8] & 0xf;
316 p
[2] = mask
[4] & 0xf;
317 p
[3] = mask
[0] & 0xf;
319 /* Not sure what to do about fallbacks, so for now just dont:
321 st
[1] |= ((p
[0] << 0) |
328 set_dynamic_indirect( i915
,
335 const struct i915_tracked_state i915_upload_STIPPLE
= {
336 .dirty
= I915_NEW_SETUP
| I915_NEW_STIPPLE
,
337 .update
= upload_STIPPLE
342 /***********************************************************************
345 static void upload_SCISSOR_ENABLE( struct i915_context
*i915
)
349 if (i915
->setup
.scissor
)
350 sc
[0] = _3DSTATE_SCISSOR_ENABLE_CMD
| ENABLE_SCISSOR_RECT
;
352 sc
[0] = _3DSTATE_SCISSOR_ENABLE_CMD
| DISABLE_SCISSOR_RECT
;
354 set_dynamic_indirect( i915
,
355 I915_DYNAMIC_SC_ENA_0
,
360 const struct i915_tracked_state i915_upload_SCISSOR_ENABLE
= {
361 .dirty
= I915_NEW_SETUP
,
362 .update
= upload_SCISSOR_ENABLE
367 static void upload_SCISSOR_RECT( struct i915_context
*i915
)
369 unsigned x1
= i915
->scissor
.minx
;
370 unsigned y1
= i915
->scissor
.miny
;
371 unsigned x2
= i915
->scissor
.maxx
;
372 unsigned y2
= i915
->scissor
.maxy
;
375 sc
[0] = _3DSTATE_SCISSOR_RECT_0_CMD
;
376 sc
[1] = (y1
<< 16) | (x1
& 0xffff);
377 sc
[2] = (y2
<< 16) | (x2
& 0xffff);
379 set_dynamic_indirect( i915
,
380 I915_DYNAMIC_SC_RECT_0
,
386 const struct i915_tracked_state i915_upload_SCISSOR_RECT
= {
387 .dirty
= I915_NEW_SCISSOR
,
388 .update
= upload_SCISSOR_RECT
396 static const struct i915_tracked_state
*atoms
[] = {
399 &i915_upload_BLENDCOLOR
,
401 &i915_upload_DEPTHSCALE
,
402 &i915_upload_STIPPLE
,
403 &i915_upload_SCISSOR_ENABLE
,
404 &i915_upload_SCISSOR_RECT
407 /* These will be dynamic indirect state commands, but for now just end
408 * up on the batch buffer with everything else.
410 void i915_update_dynamic( struct i915_context
*i915
)
414 for (i
= 0; i
< Elements(atoms
); i
++)
415 if (i915
->dirty
& atoms
[i
]->dirty
)
416 atoms
[i
]->update( i915
);