Merge branch 'upstream-gallium-0.1' into nouveau-gallium-0.1
[mesa.git] / src / mesa / pipe / nv40 / nv40_context.c
1 #include "pipe/draw/draw_context.h"
2 #include "pipe/p_defines.h"
3 #include "pipe/p_winsys.h"
4 #include "pipe/p_util.h"
5
6 #include "nv40_context.h"
7
8 #define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
9 #define NV4X_GRCLASS4497_CHIPSETS 0x00005450
10 #define NV6X_GRCLASS4497_CHIPSETS 0x00000088
11
12 static const char *
13 nv40_get_name(struct pipe_context *pipe)
14 {
15 struct nv40_context *nv40 = nv40_context(pipe);
16 static char buffer[128];
17
18 snprintf(buffer, sizeof(buffer), "NV%02X", nv40->chipset);
19 return buffer;
20 }
21
22 static const char *
23 nv40_get_vendor(struct pipe_context *pipe)
24 {
25 return "nouveau";
26 }
27
28 static int
29 nv40_get_param(struct pipe_context *pipe, int param)
30 {
31 switch (param) {
32 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
33 return 16;
34 case PIPE_CAP_NPOT_TEXTURES:
35 return 1;
36 case PIPE_CAP_TWO_SIDED_STENCIL:
37 return 1;
38 case PIPE_CAP_GLSL:
39 return 0;
40 case PIPE_CAP_S3TC:
41 return 0;
42 case PIPE_CAP_ANISOTROPIC_FILTER:
43 return 1;
44 case PIPE_CAP_POINT_SPRITE:
45 return 1;
46 case PIPE_CAP_MAX_RENDER_TARGETS:
47 return 4;
48 case PIPE_CAP_OCCLUSION_QUERY:
49 return 1;
50 case PIPE_CAP_TEXTURE_SHADOW_MAP:
51 return 1;
52 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
53 return 13;
54 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
55 return 10;
56 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
57 return 13;
58 default:
59 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
60 return 0;
61 }
62 }
63
64 static float
65 nv40_get_paramf(struct pipe_context *pipe, int param)
66 {
67 switch (param) {
68 case PIPE_CAP_MAX_LINE_WIDTH:
69 case PIPE_CAP_MAX_LINE_WIDTH_AA:
70 return 10.0;
71 case PIPE_CAP_MAX_POINT_WIDTH:
72 case PIPE_CAP_MAX_POINT_WIDTH_AA:
73 return 64.0;
74 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
75 return 16.0;
76 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
77 return 16.0;
78 case PIPE_CAP_BITMAP_TEXCOORD_BIAS:
79 return 0.0;
80 default:
81 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
82 return 0.0;
83 }
84 }
85
86 static void
87 nv40_flush(struct pipe_context *pipe, unsigned flags)
88 {
89 struct nv40_context *nv40 = nv40_context(pipe);
90 struct nouveau_winsys *nvws = nv40->nvws;
91
92 if (flags & PIPE_FLUSH_TEXTURE_CACHE) {
93 BEGIN_RING(curie, 0x1fd8, 1);
94 OUT_RING (2);
95 BEGIN_RING(curie, 0x1fd8, 1);
96 OUT_RING (1);
97 }
98
99 if (flags & PIPE_FLUSH_WAIT) {
100 nvws->notifier_reset(nv40->hw->sync, 0);
101 BEGIN_RING(curie, 0x104, 1);
102 OUT_RING (0);
103 BEGIN_RING(curie, 0x100, 1);
104 OUT_RING (0);
105 }
106
107 FIRE_RING();
108
109 if (flags & PIPE_FLUSH_WAIT)
110 nvws->notifier_wait(nv40->hw->sync, 0, 0, 2000);
111 }
112
113 static void
114 nv40_channel_takedown(struct nv40_channel_context *cnv40)
115 {
116 struct nouveau_winsys *nvws = cnv40->nvws;
117
118 nvws->res_free(&cnv40->vp_exec_heap);
119 nvws->res_free(&cnv40->vp_data_heap);
120 nvws->res_free(&cnv40->query_heap);
121 nvws->notifier_free(&cnv40->query);
122 nvws->notifier_free(&cnv40->sync);
123 nvws->grobj_free(&cnv40->curie);
124 free(cnv40);
125 }
126
127 static struct nv40_channel_context *
128 nv40_channel_init(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
129 unsigned chipset)
130 {
131 struct nv40_channel_context *cnv40 = NULL;
132 struct nouveau_stateobj *so;
133 unsigned curie_class = 0;
134 int ret;
135
136 switch (chipset & 0xf0) {
137 case 0x40:
138 if (NV4X_GRCLASS4097_CHIPSETS & (1 << (chipset & 0x0f)))
139 curie_class = NV40TCL;
140 else
141 if (NV4X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
142 curie_class = NV44TCL;
143 break;
144 case 0x60:
145 if (NV6X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
146 curie_class = NV44TCL;
147 break;
148 default:
149 break;
150 }
151
152 if (!curie_class) {
153 NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", chipset);
154 return NULL;
155 }
156
157 cnv40 = CALLOC(1, sizeof(struct nv40_channel_context));
158 if (!cnv40)
159 return NULL;
160 cnv40->chipset = chipset;
161 cnv40->nvws = nvws;
162
163 /* Notifier for sync purposes */
164 ret = nvws->notifier_alloc(nvws, 1, &cnv40->sync);
165 if (ret) {
166 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
167 nv40_channel_takedown(cnv40);
168 return NULL;
169 }
170
171 /* Query objects */
172 ret = nvws->notifier_alloc(nvws, 32, &cnv40->query);
173 if (ret) {
174 NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
175 nv40_channel_takedown(cnv40);
176 return NULL;
177 }
178
179 ret = nvws->res_init(&cnv40->query_heap, 0, 32);
180 if (ret) {
181 NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
182 nv40_channel_takedown(cnv40);
183 return NULL;
184 }
185
186 /* Vtxprog resources */
187 if (nvws->res_init(&cnv40->vp_exec_heap, 0, 512) ||
188 nvws->res_init(&cnv40->vp_data_heap, 0, 256)) {
189 nv40_channel_takedown(cnv40);
190 return NULL;
191 }
192
193 /* 3D object */
194 ret = nvws->grobj_alloc(nvws, curie_class, &cnv40->curie);
195 if (ret) {
196 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
197 return FALSE;
198 }
199
200 /* Static curie initialisation */
201 so = so_new(128, 0);
202 so_method(so, cnv40->curie, NV40TCL_DMA_NOTIFY, 1);
203 so_data (so, cnv40->sync->handle);
204 so_method(so, cnv40->curie, NV40TCL_DMA_TEXTURE0, 2);
205 so_data (so, nvws->channel->vram->handle);
206 so_data (so, nvws->channel->gart->handle);
207 so_method(so, cnv40->curie, NV40TCL_DMA_COLOR1, 1);
208 so_data (so, nvws->channel->vram->handle);
209 so_method(so, cnv40->curie, NV40TCL_DMA_COLOR0, 2);
210 so_data (so, nvws->channel->vram->handle);
211 so_data (so, nvws->channel->vram->handle);
212 so_method(so, cnv40->curie, NV40TCL_DMA_VTXBUF0, 2);
213 so_data (so, nvws->channel->vram->handle);
214 so_data (so, nvws->channel->gart->handle);
215 so_method(so, cnv40->curie, NV40TCL_DMA_FENCE, 2);
216 so_data (so, 0);
217 so_data (so, cnv40->query->handle);
218 so_method(so, cnv40->curie, NV40TCL_DMA_UNK01AC, 2);
219 so_data (so, nvws->channel->vram->handle);
220 so_data (so, nvws->channel->vram->handle);
221 so_method(so, cnv40->curie, NV40TCL_DMA_COLOR2, 2);
222 so_data (so, nvws->channel->vram->handle);
223 so_data (so, nvws->channel->vram->handle);
224
225 so_method(so, cnv40->curie, 0x1ea4, 3);
226 so_data (so, 0x00000010);
227 so_data (so, 0x01000100);
228 so_data (so, 0xff800006);
229
230 /* vtxprog output routing */
231 so_method(so, cnv40->curie, 0x1fc4, 1);
232 so_data (so, 0x06144321);
233 so_method(so, cnv40->curie, 0x1fc8, 2);
234 so_data (so, 0xedcba987);
235 so_data (so, 0x00000021);
236 so_method(so, cnv40->curie, 0x1fd0, 1);
237 so_data (so, 0x00171615);
238 so_method(so, cnv40->curie, 0x1fd4, 1);
239 so_data (so, 0x001b1a19);
240
241 so_method(so, cnv40->curie, 0x1ef8, 1);
242 so_data (so, 0x0020ffff);
243 so_method(so, cnv40->curie, 0x1d64, 1);
244 so_data (so, 0x00d30000);
245 so_method(so, cnv40->curie, 0x1e94, 1);
246 so_data (so, 0x00000001);
247
248 so_emit(nvws, so);
249 so_ref(NULL, &so);
250 nvws->push_flush(nvws->channel, 0);
251
252 return cnv40;
253 }
254
255 static void
256 nv40_destroy(struct pipe_context *pipe)
257 {
258 struct nv40_context *nv40 = nv40_context(pipe);
259
260 if (nv40->draw)
261 draw_destroy(nv40->draw);
262
263 if (nv40->hw) {
264 if (--nv40->hw->refcount == 0)
265 nv40_channel_takedown(nv40->hw);
266 }
267
268 free(nv40);
269 }
270
271 struct pipe_context *
272 nv40_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
273 unsigned chipset)
274 {
275 struct nv40_context *nv40;
276
277 nv40 = CALLOC(1, sizeof(struct nv40_context));
278 if (!nv40)
279 return NULL;
280
281 nv40->hw = nv40_channel_init(ws, nvws, chipset);
282 if (!nv40->hw) {
283 nv40_destroy(&nv40->pipe);
284 return NULL;
285 }
286
287 nv40->chipset = chipset;
288 nv40->nvws = nvws;
289
290 nv40->pipe.winsys = ws;
291 nv40->pipe.destroy = nv40_destroy;
292 nv40->pipe.get_name = nv40_get_name;
293 nv40->pipe.get_vendor = nv40_get_vendor;
294 nv40->pipe.get_param = nv40_get_param;
295 nv40->pipe.get_paramf = nv40_get_paramf;
296 nv40->pipe.draw_arrays = nv40_draw_arrays;
297 nv40->pipe.draw_elements = nv40_draw_elements;
298 nv40->pipe.clear = nv40_clear;
299 nv40->pipe.flush = nv40_flush;
300
301 nv40_init_query_functions(nv40);
302 nv40_init_surface_functions(nv40);
303 nv40_init_state_functions(nv40);
304 nv40_init_miptree_functions(nv40);
305
306 nv40->draw = draw_create();
307 assert(nv40->draw);
308 draw_set_rasterize_stage(nv40->draw, nv40_draw_render_stage(nv40));
309
310 return &nv40->pipe;
311 }
312