Merge branch 'nouveau-gallium-0.1' into darktama-gallium-0.1
[mesa.git] / src / mesa / pipe / p_shader_tokens.h
1 #if !defined TGSI_TOKEN_H
2 #define TGSI_TOKEN_H
3
4 #if defined __cplusplus
5 extern "C" {
6 #endif // defined __cplusplus
7
8 struct tgsi_version
9 {
10 unsigned MajorVersion : 8;
11 unsigned MinorVersion : 8;
12 unsigned Padding : 16;
13 };
14
15 struct tgsi_header
16 {
17 unsigned HeaderSize : 8;
18 unsigned BodySize : 24;
19 };
20
21 #define TGSI_PROCESSOR_FRAGMENT 0
22 #define TGSI_PROCESSOR_VERTEX 1
23 #define TGSI_PROCESSOR_GEOMETRY 2
24
25 struct tgsi_processor
26 {
27 unsigned Processor : 4; /* TGSI_PROCESSOR_ */
28 unsigned Padding : 28;
29 };
30
31 #define TGSI_TOKEN_TYPE_DECLARATION 0
32 #define TGSI_TOKEN_TYPE_IMMEDIATE 1
33 #define TGSI_TOKEN_TYPE_INSTRUCTION 2
34
35 struct tgsi_token
36 {
37 unsigned Type : 4; /* TGSI_TOKEN_TYPE_ */
38 unsigned Size : 8; /* UINT */
39 unsigned Padding : 19;
40 unsigned Extended : 1; /* BOOL */
41 };
42
43 #define TGSI_FILE_NULL 0
44 #define TGSI_FILE_CONSTANT 1
45 #define TGSI_FILE_INPUT 2
46 #define TGSI_FILE_OUTPUT 3
47 #define TGSI_FILE_TEMPORARY 4
48 #define TGSI_FILE_SAMPLER 5
49 #define TGSI_FILE_ADDRESS 6
50 #define TGSI_FILE_IMMEDIATE 7
51
52 #define TGSI_DECLARE_RANGE 0
53 #define TGSI_DECLARE_MASK 1
54
55 #define TGSI_WRITEMASK_NONE 0x00
56 #define TGSI_WRITEMASK_X 0x01
57 #define TGSI_WRITEMASK_Y 0x02
58 #define TGSI_WRITEMASK_XY 0x03
59 #define TGSI_WRITEMASK_Z 0x04
60 #define TGSI_WRITEMASK_XZ 0x05
61 #define TGSI_WRITEMASK_YZ 0x06
62 #define TGSI_WRITEMASK_XYZ 0x07
63 #define TGSI_WRITEMASK_W 0x08
64 #define TGSI_WRITEMASK_XW 0x09
65 #define TGSI_WRITEMASK_YW 0x0A
66 #define TGSI_WRITEMASK_XYW 0x0B
67 #define TGSI_WRITEMASK_ZW 0x0C
68 #define TGSI_WRITEMASK_XZW 0x0D
69 #define TGSI_WRITEMASK_YZW 0x0E
70 #define TGSI_WRITEMASK_XYZW 0x0F
71
72 struct tgsi_declaration
73 {
74 unsigned Type : 4; /* TGSI_TOKEN_TYPE_DECLARATION */
75 unsigned Size : 8; /* UINT */
76 unsigned File : 4; /* one of TGSI_FILE_x */
77 unsigned Declare : 4; /* one of TGSI_DECLARE_x */
78 unsigned UsageMask : 4; /* bitmask of TGSI_WRITEMASK_x flags */
79 unsigned Interpolate : 1; /* BOOL, any interpolation info? */
80 unsigned Semantic : 1; /* BOOL, any semantic info? */
81 unsigned Padding : 5;
82 unsigned Extended : 1; /* BOOL */
83 };
84
85 struct tgsi_declaration_range
86 {
87 unsigned First : 16; /* UINT */
88 unsigned Last : 16; /* UINT */
89 };
90
91 struct tgsi_declaration_mask
92 {
93 unsigned Mask : 32; /* UINT */
94 };
95
96 #define TGSI_INTERPOLATE_CONSTANT 0
97 #define TGSI_INTERPOLATE_LINEAR 1
98 #define TGSI_INTERPOLATE_PERSPECTIVE 2
99
100 struct tgsi_declaration_interpolation
101 {
102 unsigned Interpolate : 4; /* TGSI_INTERPOLATE_ */
103 unsigned Padding : 28;
104 };
105
106 #define TGSI_SEMANTIC_POSITION 0
107 #define TGSI_SEMANTIC_COLOR 1
108 #define TGSI_SEMANTIC_BCOLOR 2 /**< back-face color */
109 #define TGSI_SEMANTIC_FOG 3
110 #define TGSI_SEMANTIC_PSIZE 4
111 #define TGSI_SEMANTIC_GENERIC 5
112 #define TGSI_SEMANTIC_COUNT 6 /**< number of semantic values */
113
114 struct tgsi_declaration_semantic
115 {
116 unsigned SemanticName : 8; /* one of TGSI_SEMANTIC_ */
117 unsigned SemanticIndex : 16; /* UINT */
118 unsigned Padding : 8;
119 };
120
121 #define TGSI_IMM_FLOAT32 0
122
123 struct tgsi_immediate
124 {
125 unsigned Type : 4; /* TGSI_TOKEN_TYPE_IMMEDIATE */
126 unsigned Size : 8; /* UINT */
127 unsigned DataType : 4; /* TGSI_IMM_ */
128 unsigned Padding : 15;
129 unsigned Extended : 1; /* BOOL */
130 };
131
132 struct tgsi_immediate_float32
133 {
134 float Float;
135 };
136
137 /*
138 * GL_NV_vertex_program
139 */
140 #define TGSI_OPCODE_ARL 0
141 #define TGSI_OPCODE_MOV 1
142 #define TGSI_OPCODE_LIT 2
143 #define TGSI_OPCODE_RCP 3
144 #define TGSI_OPCODE_RSQ 4
145 #define TGSI_OPCODE_EXP 5
146 #define TGSI_OPCODE_LOG 6
147 #define TGSI_OPCODE_MUL 7
148 #define TGSI_OPCODE_ADD 8
149 #define TGSI_OPCODE_DP3 9
150 #define TGSI_OPCODE_DP4 10
151 #define TGSI_OPCODE_DST 11
152 #define TGSI_OPCODE_MIN 12
153 #define TGSI_OPCODE_MAX 13
154 #define TGSI_OPCODE_SLT 14
155 #define TGSI_OPCODE_SGE 15
156 #define TGSI_OPCODE_MAD 16
157
158 /*
159 * GL_ATI_fragment_shader
160 */
161 #define TGSI_OPCODE_SUB 17
162 #define TGSI_OPCODE_DOT3 TGSI_OPCODE_DP3
163 #define TGSI_OPCODE_DOT4 TGSI_OPCODE_DP4
164 #define TGSI_OPCODE_LERP 18
165 #define TGSI_OPCODE_CND 19
166 #define TGSI_OPCODE_CND0 20
167 #define TGSI_OPCODE_DOT2ADD 21
168
169 /*
170 * GL_EXT_vertex_shader
171 */
172 #define TGSI_OPCODE_INDEX 22
173 #define TGSI_OPCODE_NEGATE 23
174 #define TGSI_OPCODE_MADD TGSI_OPCODE_MAD
175 #define TGSI_OPCODE_FRAC 24
176 #define TGSI_OPCODE_SETGE TGSI_OPCODE_SGE
177 #define TGSI_OPCODE_SETLT TGSI_OPCODE_SLT
178 #define TGSI_OPCODE_CLAMP 25
179 #define TGSI_OPCODE_FLOOR 26
180 #define TGSI_OPCODE_ROUND 27
181 #define TGSI_OPCODE_EXPBASE2 28
182 #define TGSI_OPCODE_LOGBASE2 29
183 #define TGSI_OPCODE_POWER 30
184 #define TGSI_OPCODE_RECIP TGSI_OPCODE_RCP
185 #define TGSI_OPCODE_RECIPSQRT TGSI_OPCODE_RSQ
186 #define TGSI_OPCODE_CROSSPRODUCT 31
187 #define TGSI_OPCODE_MULTIPLYMATRIX 32
188
189 /*
190 * GL_NV_vertex_program1_1
191 */
192 #define TGSI_OPCODE_ABS 33
193 #define TGSI_OPCODE_RCC 34
194 #define TGSI_OPCODE_DPH 35
195
196 /*
197 * GL_NV_fragment_program
198 */
199 #define TGSI_OPCODE_COS 36
200 #define TGSI_OPCODE_DDX 37
201 #define TGSI_OPCODE_DDY 38
202 #define TGSI_OPCODE_EX2 TGSI_OPCODE_EXPBASE2
203 #define TGSI_OPCODE_FLR TGSI_OPCODE_FLOOR
204 #define TGSI_OPCODE_FRC TGSI_OPCODE_FRAC
205 #define TGSI_OPCODE_KILP 39 /* predicated kill */
206 #define TGSI_OPCODE_LG2 TGSI_OPCODE_LOGBASE2
207 #define TGSI_OPCODE_LRP TGSI_OPCODE_LERP
208 #define TGSI_OPCODE_PK2H 40
209 #define TGSI_OPCODE_PK2US 41
210 #define TGSI_OPCODE_PK4B 42
211 #define TGSI_OPCODE_PK4UB 43
212 #define TGSI_OPCODE_POW TGSI_OPCODE_POWER
213 #define TGSI_OPCODE_RFL 44
214 #define TGSI_OPCODE_SEQ 45
215 #define TGSI_OPCODE_SFL 46
216 #define TGSI_OPCODE_SGT 47
217 #define TGSI_OPCODE_SIN 48
218 #define TGSI_OPCODE_SLE 49
219 #define TGSI_OPCODE_SNE 50
220 #define TGSI_OPCODE_STR 51
221 #define TGSI_OPCODE_TEX 52
222 #define TGSI_OPCODE_TXD 53
223 #define TGSI_OPCODE_UP2H 54
224 #define TGSI_OPCODE_UP2US 55
225 #define TGSI_OPCODE_UP4B 56
226 #define TGSI_OPCODE_UP4UB 57
227 #define TGSI_OPCODE_X2D 58
228
229 /*
230 * GL_NV_vertex_program2
231 */
232 #define TGSI_OPCODE_ARA 59
233 #define TGSI_OPCODE_ARR 60
234 #define TGSI_OPCODE_BRA 61
235 #define TGSI_OPCODE_CAL 62
236 #define TGSI_OPCODE_RET 63
237 #define TGSI_OPCODE_SSG 64
238
239 /*
240 * GL_ARB_vertex_program
241 */
242 #define TGSI_OPCODE_SWZ TGSI_OPCODE_MOV
243 #define TGSI_OPCODE_XPD TGSI_OPCODE_CROSSPRODUCT
244
245 /*
246 * GL_ARB_fragment_program
247 */
248 #define TGSI_OPCODE_CMP 65
249 #define TGSI_OPCODE_SCS 66
250 #define TGSI_OPCODE_TXB 67
251
252 /*
253 * GL_NV_fragment_program_option
254 */
255 /* No new opcode */
256
257 /*
258 * GL_NV_fragment_program2
259 */
260 #define TGSI_OPCODE_NRM 68
261 #define TGSI_OPCODE_DIV 69
262 #define TGSI_OPCODE_DP2 70
263 #define TGSI_OPCODE_DP2A TGSI_OPCODE_DOT2ADD
264 #define TGSI_OPCODE_TXL 71
265 #define TGSI_OPCODE_BRK 72
266 #define TGSI_OPCODE_IF 73
267 #define TGSI_OPCODE_LOOP 74
268 #define TGSI_OPCODE_REP 75
269 #define TGSI_OPCODE_ELSE 76
270 #define TGSI_OPCODE_ENDIF 77
271 #define TGSI_OPCODE_ENDLOOP 78
272 #define TGSI_OPCODE_ENDREP 79
273
274 /*
275 * GL_NV_vertex_program2_option
276 */
277
278 /*
279 * GL_NV_vertex_program3
280 */
281 #define TGSI_OPCODE_PUSHA 80
282 #define TGSI_OPCODE_POPA 81
283
284 /*
285 * GL_NV_gpu_program4
286 */
287 #define TGSI_OPCODE_CEIL 82
288 #define TGSI_OPCODE_I2F 83
289 #define TGSI_OPCODE_NOT 84
290 #define TGSI_OPCODE_TRUNC 85
291 #define TGSI_OPCODE_SHL 86
292 #define TGSI_OPCODE_SHR 87
293 #define TGSI_OPCODE_AND 88
294 #define TGSI_OPCODE_OR 89
295 #define TGSI_OPCODE_MOD 90
296 #define TGSI_OPCODE_XOR 91
297 #define TGSI_OPCODE_SAD 92
298 #define TGSI_OPCODE_TXF 93
299 #define TGSI_OPCODE_TXQ 94
300 #define TGSI_OPCODE_CONT 95
301
302 /*
303 * GL_NV_vertex_program4
304 */
305 /* Same as GL_NV_gpu_program4 */
306
307 /*
308 * GL_NV_fragment_program4
309 */
310 /* Same as GL_NV_gpu_program4 */
311
312 /*
313 * GL_NV_geometry_program4
314 */
315 /* Same as GL_NV_gpu_program4 */
316 #define TGSI_OPCODE_EMIT 96
317 #define TGSI_OPCODE_ENDPRIM 97
318
319 /*
320 * GLSL
321 */
322 #define TGSI_OPCODE_BGNLOOP2 98
323 #define TGSI_OPCODE_BGNSUB 99
324 #define TGSI_OPCODE_ENDLOOP2 100
325 #define TGSI_OPCODE_ENDSUB 101
326 #define TGSI_OPCODE_INT TGSI_OPCODE_TRUNC
327 #define TGSI_OPCODE_NOISE1 102
328 #define TGSI_OPCODE_NOISE2 103
329 #define TGSI_OPCODE_NOISE3 104
330 #define TGSI_OPCODE_NOISE4 105
331 #define TGSI_OPCODE_NOP 106
332
333 /*
334 * ps_1_1
335 */
336 #define TGSI_OPCODE_TEXCOORD TGSI_OPCODE_NOP
337 #define TGSI_OPCODE_TEXKILL TGSI_OPCODE_KIL
338 #define TGSI_OPCODE_TEXBEM 107
339 #define TGSI_OPCODE_TEXBEML 108
340 #define TGSI_OPCODE_TEXREG2AR 109
341 #define TGSI_OPCODE_TEXM3X2PAD 110
342 #define TGSI_OPCODE_TEXM3X2TEX 111
343 #define TGSI_OPCODE_TEXM3X3PAD 112
344 #define TGSI_OPCODE_TEXM3X3TEX 113
345 #define TGSI_OPCODE_TEXM3X3SPEC 114
346 #define TGSI_OPCODE_TEXM3X3VSPEC 115
347
348 /*
349 * ps_1_2
350 */
351 #define TGSI_OPCODE_TEXREG2GB 116
352 #define TGSI_OPCODE_TEXREG2RGB 117
353 #define TGSI_OPCODE_TEXDP3TEX 118
354 #define TGSI_OPCODE_TEXDP3 119
355 #define TGSI_OPCODE_TEXM3X3 120
356 /* CMP - use TGSI_OPCODE_CND0 */
357
358 /*
359 * ps_1_3
360 */
361 #define TGSI_OPCODE_TEXM3X2DEPTH 121
362 /* CMP - use TGSI_OPCODE_CND0 */
363
364 /*
365 * ps_1_4
366 */
367 #define TGSI_OPCODE_TEXCRD TGSI_OPCODE_TEXCOORD
368 #define TGSI_OPCODE_TEXLD TGSI_OPCODE_TEX
369 #define TGSI_OPCODE_TEXDEPTH 122
370 #define TGSI_OPCODE_BEM 123
371
372 /*
373 * ps_2_0
374 */
375 #define TGSI_OPCODE_M4X4 TGSI_OPCODE_MULTIPLYMATRIX
376 #define TGSI_OPCODE_M4X3 124
377 #define TGSI_OPCODE_M3X4 125
378 #define TGSI_OPCODE_M3X3 126
379 #define TGSI_OPCODE_M3X2 127
380 #define TGSI_OPCODE_CRS TGSI_OPCODE_XPD
381 #define TGSI_OPCODE_NRM4 128
382 #define TGSI_OPCODE_SINCOS TGSI_OPCODE_SCS
383 #define TGSI_OPCODE_TEXLDB TGSI_OPCODE_TXB
384 #define TGSI_OPCODE_DP2ADD TGSI_OPCODE_DP2A
385
386 /*
387 * ps_2_x
388 */
389 #define TGSI_OPCODE_CALL TGSI_OPCODE_CAL
390 #define TGSI_OPCODE_CALLNZ 129
391 #define TGSI_OPCODE_IFC 130
392 #define TGSI_OPCODE_BREAK TGSI_OPCODE_BRK
393 #define TGSI_OPCODE_BREAKC 131
394 #define TGSI_OPCODE_DSX TGSI_OPCODE_DDX
395 #define TGSI_OPCODE_DSY TGSI_OPCODE_DDY
396 #define TGSI_OPCODE_TEXLDD TGSI_OPCODE_TXD
397
398 /*
399 * vs_1_1
400 */
401 #define TGSI_OPCODE_EXPP TGSI_OPCODE_EXP
402 #define TGSI_OPCODE_LOGP TGSI_OPCODE_LG2
403
404 /*
405 * vs_2_0
406 */
407 #define TGSI_OPCODE_SGN TGSI_OPCODE_SSG
408 #define TGSI_OPCODE_MOVA TGSI_OPCODE_ARR
409
410 /*
411 * vs_2_x
412 */
413
414 #define TGSI_OPCODE_KIL 132 /* unpredicated kill */
415 #define TGSI_OPCODE_END 133 /* aka HALT */
416
417 #define TGSI_OPCODE_LAST 134
418
419 #define TGSI_SAT_NONE 0 /* do not saturate */
420 #define TGSI_SAT_ZERO_ONE 1 /* clamp to [0,1] */
421 #define TGSI_SAT_MINUS_PLUS_ONE 2 /* clamp to [-1,1] */
422
423 /*
424 * Opcode is the operation code to execute. A given operation defines the
425 * semantics how the source registers (if any) are interpreted and what is
426 * written to the destination registers (if any) as a result of execution.
427 *
428 * NumDstRegs and NumSrcRegs is the number of destination and source registers,
429 * respectively. For a given operation code, those numbers are fixed and are
430 * present here only for convenience.
431 *
432 * If Extended is TRUE, it is now executed.
433 *
434 * Saturate controls how are final results in destination registers modified.
435 */
436
437 struct tgsi_instruction
438 {
439 unsigned Type : 4; /* TGSI_TOKEN_TYPE_INSTRUCTION */
440 unsigned Size : 8; /* UINT */
441 unsigned Opcode : 8; /* TGSI_OPCODE_ */
442 unsigned Saturate : 2; /* TGSI_SAT_ */
443 unsigned NumDstRegs : 2; /* UINT */
444 unsigned NumSrcRegs : 4; /* UINT */
445 unsigned Padding : 3;
446 unsigned Extended : 1; /* BOOL */
447 };
448
449 /*
450 * If tgsi_instruction::Extended is TRUE, tgsi_instruction_ext follows.
451 *
452 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
453 *
454 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
455 *
456 * tgsi_instruction::Size contains the total number of words that make the
457 * instruction, including the instruction word.
458 */
459
460 #define TGSI_INSTRUCTION_EXT_TYPE_NV 0
461 #define TGSI_INSTRUCTION_EXT_TYPE_LABEL 1
462 #define TGSI_INSTRUCTION_EXT_TYPE_TEXTURE 2
463 #define TGSI_INSTRUCTION_EXT_TYPE_PREDICATE 3
464
465 struct tgsi_instruction_ext
466 {
467 unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_ */
468 unsigned Padding : 27;
469 unsigned Extended : 1; /* BOOL */
470 };
471
472 /*
473 * If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_NV, it should
474 * be cast to tgsi_instruction_ext_nv.
475 *
476 * If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_LABEL, it
477 * should be cast to tgsi_instruction_ext_label.
478 *
479 * If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_TEXTURE, it
480 * should be cast to tgsi_instruction_ext_texture.
481 *
482 * If tgsi_instruction_ext::Type is TGSI_INSTRUCTION_EXT_TYPE_PREDICATE, it
483 * should be cast to tgsi_instruction_ext_predicate.
484 *
485 * If tgsi_instruction_ext::Extended is TRUE, another tgsi_instruction_ext
486 * follows.
487 */
488
489 #define TGSI_PRECISION_DEFAULT 0
490 #define TGSI_PRECISION_FLOAT32 1
491 #define TGSI_PRECISION_FLOAT16 2
492 #define TGSI_PRECISION_FIXED12 3
493
494 #define TGSI_CC_GT 0
495 #define TGSI_CC_EQ 1
496 #define TGSI_CC_LT 2
497 #define TGSI_CC_UN 3
498 #define TGSI_CC_GE 4
499 #define TGSI_CC_LE 5
500 #define TGSI_CC_NE 6
501 #define TGSI_CC_TR 7
502 #define TGSI_CC_FL 8
503
504 #define TGSI_SWIZZLE_X 0
505 #define TGSI_SWIZZLE_Y 1
506 #define TGSI_SWIZZLE_Z 2
507 #define TGSI_SWIZZLE_W 3
508
509 /*
510 * Precision controls the precision at which the operation should be executed.
511 *
512 * CondDstUpdate enables condition code register writes. When this field is
513 * TRUE, CondDstIndex specifies the index of the condition code register to
514 * update.
515 *
516 * CondFlowEnable enables conditional execution of the operation. When this
517 * field is TRUE, CondFlowIndex specifies the index of the condition code
518 * register to test against CondMask with component swizzle controled by
519 * CondSwizzleX, CondSwizzleY, CondSwizzleZ and CondSwizzleW. If the test fails,
520 * the operation is not executed.
521 */
522
523 struct tgsi_instruction_ext_nv
524 {
525 unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_NV */
526 unsigned Precision : 4; /* TGSI_PRECISION_ */
527 unsigned CondDstIndex : 4; /* UINT */
528 unsigned CondFlowIndex : 4; /* UINT */
529 unsigned CondMask : 4; /* TGSI_CC_ */
530 unsigned CondSwizzleX : 2; /* TGSI_SWIZZLE_ */
531 unsigned CondSwizzleY : 2; /* TGSI_SWIZZLE_ */
532 unsigned CondSwizzleZ : 2; /* TGSI_SWIZZLE_ */
533 unsigned CondSwizzleW : 2; /* TGSI_SWIZZLE_ */
534 unsigned CondDstUpdate : 1; /* BOOL */
535 unsigned CondFlowEnable : 1; /* BOOL */
536 unsigned Padding : 1;
537 unsigned Extended : 1; /* BOOL */
538 };
539
540 struct tgsi_instruction_ext_label
541 {
542 unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_LABEL */
543 unsigned Label : 24; /* UINT */
544 unsigned Padding : 3;
545 unsigned Extended : 1; /* BOOL */
546 };
547
548 #define TGSI_TEXTURE_UNKNOWN 0
549 #define TGSI_TEXTURE_1D 1
550 #define TGSI_TEXTURE_2D 2
551 #define TGSI_TEXTURE_3D 3
552 #define TGSI_TEXTURE_CUBE 4
553 #define TGSI_TEXTURE_RECT 5
554 #define TGSI_TEXTURE_SHADOW1D 6
555 #define TGSI_TEXTURE_SHADOW2D 7
556 #define TGSI_TEXTURE_SHADOWRECT 8
557
558 struct tgsi_instruction_ext_texture
559 {
560 unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_TEXTURE */
561 unsigned Texture : 8; /* TGSI_TEXTURE_ */
562 unsigned Padding : 19;
563 unsigned Extended : 1; /* BOOL */
564 };
565
566 struct tgsi_instruction_ext_predicate
567 {
568 unsigned Type : 4; /* TGSI_INSTRUCTION_EXT_TYPE_PREDICATE */
569 unsigned PredDstIndex : 4; /* UINT */
570 unsigned PredWriteMask : 4; /* TGSI_WRITEMASK_ */
571 unsigned Padding : 19;
572 unsigned Extended : 1; /* BOOL */
573 };
574
575 /*
576 * File specifies the register array to access.
577 *
578 * Index specifies the element number of a register in the register file.
579 *
580 * If Indirect is TRUE, Index should be offset by the X component of a source
581 * register that follows. The register can be now fetched into local storage
582 * for further processing.
583 *
584 * If Negate is TRUE, all components of the fetched register are negated.
585 *
586 * The fetched register components are swizzled according to SwizzleX, SwizzleY,
587 * SwizzleZ and SwizzleW.
588 *
589 * If Extended is TRUE, any further modifications to the source register are
590 * made to this temporary storage.
591 */
592
593 struct tgsi_src_register
594 {
595 unsigned File : 4; /* TGSI_FILE_ */
596 unsigned SwizzleX : 2; /* TGSI_SWIZZLE_ */
597 unsigned SwizzleY : 2; /* TGSI_SWIZZLE_ */
598 unsigned SwizzleZ : 2; /* TGSI_SWIZZLE_ */
599 unsigned SwizzleW : 2; /* TGSI_SWIZZLE_ */
600 unsigned Negate : 1; /* BOOL */
601 unsigned Indirect : 1; /* BOOL */
602 unsigned Dimension : 1; /* BOOL */
603 int Index : 16; /* SINT */
604 unsigned Extended : 1; /* BOOL */
605 };
606
607 /*
608 * If tgsi_src_register::Extended is TRUE, tgsi_src_register_ext follows.
609 *
610 * Then, if tgsi_src_register::Indirect is TRUE, another tgsi_src_register
611 * follows.
612 *
613 * Then, if tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
614 */
615
616 #define TGSI_SRC_REGISTER_EXT_TYPE_SWZ 0
617 #define TGSI_SRC_REGISTER_EXT_TYPE_MOD 1
618
619 struct tgsi_src_register_ext
620 {
621 unsigned Type : 4; /* TGSI_SRC_REGISTER_EXT_TYPE_ */
622 unsigned Padding : 27;
623 unsigned Extended : 1; /* BOOL */
624 };
625
626 /*
627 * If tgsi_src_register_ext::Type is TGSI_SRC_REGISTER_EXT_TYPE_SWZ,
628 * it should be cast to tgsi_src_register_ext_extswz.
629 *
630 * If tgsi_src_register_ext::Type is TGSI_SRC_REGISTER_EXT_TYPE_MOD,
631 * it should be cast to tgsi_src_register_ext_mod.
632 *
633 * If tgsi_dst_register_ext::Extended is TRUE, another tgsi_dst_register_ext
634 * follows.
635 */
636
637 #define TGSI_EXTSWIZZLE_X TGSI_SWIZZLE_X
638 #define TGSI_EXTSWIZZLE_Y TGSI_SWIZZLE_Y
639 #define TGSI_EXTSWIZZLE_Z TGSI_SWIZZLE_Z
640 #define TGSI_EXTSWIZZLE_W TGSI_SWIZZLE_W
641 #define TGSI_EXTSWIZZLE_ZERO 4
642 #define TGSI_EXTSWIZZLE_ONE 5
643
644 /*
645 * ExtSwizzleX, ExtSwizzleY, ExtSwizzleZ and ExtSwizzleW swizzle the source
646 * register in an extended manner.
647 *
648 * NegateX, NegateY, NegateZ and NegateW negate individual components of the
649 * source register.
650 *
651 * ExtDivide specifies which component is used to divide all components of the
652 * source register.
653 */
654
655 struct tgsi_src_register_ext_swz
656 {
657 unsigned Type : 4; /* TGSI_SRC_REGISTER_EXT_TYPE_SWZ */
658 unsigned ExtSwizzleX : 4; /* TGSI_EXTSWIZZLE_ */
659 unsigned ExtSwizzleY : 4; /* TGSI_EXTSWIZZLE_ */
660 unsigned ExtSwizzleZ : 4; /* TGSI_EXTSWIZZLE_ */
661 unsigned ExtSwizzleW : 4; /* TGSI_EXTSWIZZLE_ */
662 unsigned NegateX : 1; /* BOOL */
663 unsigned NegateY : 1; /* BOOL */
664 unsigned NegateZ : 1; /* BOOL */
665 unsigned NegateW : 1; /* BOOL */
666 unsigned ExtDivide : 4; /* TGSI_EXTSWIZZLE_ */
667 unsigned Padding : 3;
668 unsigned Extended : 1; /* BOOL */
669 };
670
671 /**
672 * Extra src register modifiers
673 *
674 * If Complement is TRUE, the source register is modified by subtracting it
675 * from 1.0.
676 *
677 * If Bias is TRUE, the source register is modified by subtracting 0.5 from it.
678 *
679 * If Scale2X is TRUE, the source register is modified by multiplying it by 2.0.
680 *
681 * If Absolute is TRUE, the source register is modified by removing the sign.
682 *
683 * If Negate is TRUE, the source register is modified by negating it.
684 */
685
686 struct tgsi_src_register_ext_mod
687 {
688 unsigned Type : 4; /* TGSI_SRC_REGISTER_EXT_TYPE_MOD */
689 unsigned Complement : 1; /* BOOL */
690 unsigned Bias : 1; /* BOOL */
691 unsigned Scale2X : 1; /* BOOL */
692 unsigned Absolute : 1; /* BOOL */
693 unsigned Negate : 1; /* BOOL */
694 unsigned Padding : 22;
695 unsigned Extended : 1; /* BOOL */
696 };
697
698 struct tgsi_dimension
699 {
700 unsigned Indirect : 1; /* BOOL */
701 unsigned Dimension : 1; /* BOOL */
702 unsigned Padding : 13;
703 int Index : 16; /* SINT */
704 unsigned Extended : 1; /* BOOL */
705 };
706
707 struct tgsi_dst_register
708 {
709 unsigned File : 4; /* TGSI_FILE_ */
710 unsigned WriteMask : 4; /* TGSI_WRITEMASK_ */
711 unsigned Indirect : 1; /* BOOL */
712 unsigned Dimension : 1; /* BOOL */
713 int Index : 16; /* SINT */
714 unsigned Padding : 5;
715 unsigned Extended : 1; /* BOOL */
716 };
717
718 /*
719 * If tgsi_dst_register::Extended is TRUE, tgsi_dst_register_ext follows.
720 *
721 * Then, if tgsi_dst_register::Indirect is TRUE, tgsi_src_register follows.
722 */
723
724 #define TGSI_DST_REGISTER_EXT_TYPE_CONDCODE 0
725 #define TGSI_DST_REGISTER_EXT_TYPE_MODULATE 1
726 #define TGSI_DST_REGISTER_EXT_TYPE_PREDICATE 2
727
728 struct tgsi_dst_register_ext
729 {
730 unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_ */
731 unsigned Padding : 27;
732 unsigned Extended : 1; /* BOOL */
733 };
734
735 /**
736 * Extra destination register modifiers
737 *
738 * If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_CONDCODE,
739 * it should be cast to tgsi_dst_register_ext_condcode.
740 *
741 * If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_MODULATE,
742 * it should be cast to tgsi_dst_register_ext_modulate.
743 *
744 * If tgsi_dst_register_ext::Type is TGSI_DST_REGISTER_EXT_TYPE_PREDICATE,
745 * it should be cast to tgsi_dst_register_ext_predicate.
746 *
747 * If tgsi_dst_register_ext::Extended is TRUE, another tgsi_dst_register_ext
748 * follows.
749 */
750 struct tgsi_dst_register_ext_concode
751 {
752 unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_CONDCODE */
753 unsigned CondMask : 4; /* TGSI_CC_ */
754 unsigned CondSwizzleX : 2; /* TGSI_SWIZZLE_ */
755 unsigned CondSwizzleY : 2; /* TGSI_SWIZZLE_ */
756 unsigned CondSwizzleZ : 2; /* TGSI_SWIZZLE_ */
757 unsigned CondSwizzleW : 2; /* TGSI_SWIZZLE_ */
758 unsigned CondSrcIndex : 4; /* UINT */
759 unsigned Padding : 11;
760 unsigned Extended : 1; /* BOOL */
761 };
762
763 #define TGSI_MODULATE_1X 0
764 #define TGSI_MODULATE_2X 1
765 #define TGSI_MODULATE_4X 2
766 #define TGSI_MODULATE_8X 3
767 #define TGSI_MODULATE_HALF 4
768 #define TGSI_MODULATE_QUARTER 5
769 #define TGSI_MODULATE_EIGHTH 6
770
771 struct tgsi_dst_register_ext_modulate
772 {
773 unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_MODULATE */
774 unsigned Modulate : 4; /* TGSI_MODULATE_ */
775 unsigned Padding : 23;
776 unsigned Extended : 1; /* BOOL */
777 };
778
779 /*
780 * Currently, the following constraints apply.
781 *
782 * - PredSwizzleXYZW is either set to identity or replicate.
783 * - PredSrcIndex is 0.
784 */
785
786 struct tgsi_dst_register_ext_predicate
787 {
788 unsigned Type : 4; /* TGSI_DST_REGISTER_EXT_TYPE_PREDICATE */
789 unsigned PredSwizzleX : 2; /* TGSI_SWIZZLE_ */
790 unsigned PredSwizzleY : 2; /* TGSI_SWIZZLE_ */
791 unsigned PredSwizzleZ : 2; /* TGSI_SWIZZLE_ */
792 unsigned PredSwizzleW : 2; /* TGSI_SWIZZLE_ */
793 unsigned PredSrcIndex : 4; /* UINT */
794 unsigned Negate : 1; /* BOOL */
795 unsigned Padding : 14;
796 unsigned Extended : 1; /* BOOL */
797 };
798
799
800 #if defined __cplusplus
801 } // extern "C"
802 #endif // defined __cplusplus
803
804 #endif // !defined TGSI_TOKEN_H
805