40ca1c96f378cd691bdcda5177c33ae38ec9dd72
1 #if !defined DECO_CAPS_H
4 #if defined __cplusplus
6 #endif // defined __cplusplus
11 * Predicates (D3D9-specific).
14 * 1. Token tgsi_dst_register_ext_predicate must not be used.
15 * 2. Token tgsi_instruction_ext_predicate must not be used.
17 unsigned Predicates
: 1;
20 * Destination register post-modulate.
23 * 1. Field tgsi_dst_register_ext_modulate::Modulate
24 * must be set to TGSI_MODULATE_1X.
26 unsigned DstModulate
: 1;
29 * Condition codes (NVIDIA-specific).
32 * 1. Token tgsi_dst_register_ext_concode must not be used.
33 * 2. Field tgsi_instruction_ext_nv::CondDstUpdate must be set to FALSE.
34 * 3. Field tgsi_instruction_ext_nv::CondFlowEnable must be set to FALSE.
36 unsigned ConCodes
: 1;
39 * Source register invert.
42 * 1. Field tgsi_src_register_ext_mod::Complement must be set to FALSE.
44 unsigned SrcInvert
: 1;
47 * Source register bias.
50 * 1. Field tgsi_src_register_ext_mod::Bias must be set to FALSE.
55 * Source register scale by 2.
58 * 1. Field tgsi_src_register_ext_mod::Scale2X must be set to FALSE.
60 unsigned SrcScale
: 1;
63 * Source register absolute.
66 * 1. Field tgsi_src_register_ext_mod::Absolute must be set to FALSE.
68 unsigned SrcAbsolute
: 1;
71 * Source register force sign.
74 * 1. Fields tgsi_src_register_ext_mod::Absolute and
75 * tgsi_src_register_ext_mod::Negate must not be both set to TRUE
78 unsigned SrcForceSign
: 1;
81 * Source register divide.
84 * 1. Field tgsi_src_register_ext_swz::ExtDivide
85 * must be set to TGSI_EXTSWIZZLE_ONE.
87 unsigned SrcDivide
: 1;
90 * Source register extended swizzle.
93 * 1. Field tgsi_src_register_ext_swz::ExtSwizzleX/Y/Z/W
94 * must be set to TGSI_EXTSWIZZLE_X/Y/Z/W.
95 * 2. Fields tgsi_src_register_ext_swz::NegateX/Y/Z/W
96 * must all be set to the same value.
98 unsigned SrcExtSwizzle
: 1;
100 unsigned Padding
: 22;
105 struct tgsi_deco_caps
*caps
);
107 #if defined __cplusplus
109 #endif // defined __cplusplus
111 #endif // !defined DECO_CAPS_H