033ef38b7c242f3656487bbe66f12b910f2d8a2e
[mesa.git] / src / mesa / program / ir_to_mesa.cpp
1 /*
2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 */
25
26 /**
27 * \file ir_to_mesa.cpp
28 *
29 * Translate GLSL IR to Mesa's gl_program representation.
30 */
31
32 #include <stdio.h>
33 #include "main/compiler.h"
34 #include "ir.h"
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
42 #include "ast.h"
43
44 extern "C" {
45 #include "main/mtypes.h"
46 #include "main/shaderapi.h"
47 #include "main/shaderobj.h"
48 #include "main/uniforms.h"
49 #include "program/hash_table.h"
50 #include "program/prog_instruction.h"
51 #include "program/prog_optimize.h"
52 #include "program/prog_print.h"
53 #include "program/program.h"
54 #include "program/prog_uniform.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
57 }
58
59 class src_reg;
60 class dst_reg;
61
62 static int swizzle_for_size(int size);
63
64 /**
65 * This struct is a corresponding struct to Mesa prog_src_register, with
66 * wider fields.
67 */
68 class src_reg {
69 public:
70 src_reg(gl_register_file file, int index, const glsl_type *type)
71 {
72 this->file = file;
73 this->index = index;
74 if (type && (type->is_scalar() || type->is_vector() || type->is_matrix()))
75 this->swizzle = swizzle_for_size(type->vector_elements);
76 else
77 this->swizzle = SWIZZLE_XYZW;
78 this->negate = 0;
79 this->reladdr = NULL;
80 }
81
82 src_reg()
83 {
84 this->file = PROGRAM_UNDEFINED;
85 this->index = 0;
86 this->swizzle = 0;
87 this->negate = 0;
88 this->reladdr = NULL;
89 }
90
91 explicit src_reg(dst_reg reg);
92
93 gl_register_file file; /**< PROGRAM_* from Mesa */
94 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
95 GLuint swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
96 int negate; /**< NEGATE_XYZW mask from mesa */
97 /** Register index should be offset by the integer in this reg. */
98 src_reg *reladdr;
99 };
100
101 class dst_reg {
102 public:
103 dst_reg(gl_register_file file, int writemask)
104 {
105 this->file = file;
106 this->index = 0;
107 this->writemask = writemask;
108 this->cond_mask = COND_TR;
109 this->reladdr = NULL;
110 }
111
112 dst_reg()
113 {
114 this->file = PROGRAM_UNDEFINED;
115 this->index = 0;
116 this->writemask = 0;
117 this->cond_mask = COND_TR;
118 this->reladdr = NULL;
119 }
120
121 explicit dst_reg(src_reg reg);
122
123 gl_register_file file; /**< PROGRAM_* from Mesa */
124 int index; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
125 int writemask; /**< Bitfield of WRITEMASK_[XYZW] */
126 GLuint cond_mask:4;
127 /** Register index should be offset by the integer in this reg. */
128 src_reg *reladdr;
129 };
130
131 src_reg::src_reg(dst_reg reg)
132 {
133 this->file = reg.file;
134 this->index = reg.index;
135 this->swizzle = SWIZZLE_XYZW;
136 this->negate = 0;
137 this->reladdr = reg.reladdr;
138 }
139
140 dst_reg::dst_reg(src_reg reg)
141 {
142 this->file = reg.file;
143 this->index = reg.index;
144 this->writemask = WRITEMASK_XYZW;
145 this->cond_mask = COND_TR;
146 this->reladdr = reg.reladdr;
147 }
148
149 class ir_to_mesa_instruction : public exec_node {
150 public:
151 /* Callers of this ralloc-based new need not call delete. It's
152 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
153 static void* operator new(size_t size, void *ctx)
154 {
155 void *node;
156
157 node = rzalloc_size(ctx, size);
158 assert(node != NULL);
159
160 return node;
161 }
162
163 enum prog_opcode op;
164 dst_reg dst;
165 src_reg src[3];
166 /** Pointer to the ir source this tree came from for debugging */
167 ir_instruction *ir;
168 GLboolean cond_update;
169 bool saturate;
170 int sampler; /**< sampler index */
171 int tex_target; /**< One of TEXTURE_*_INDEX */
172 GLboolean tex_shadow;
173
174 class function_entry *function; /* Set on OPCODE_CAL or OPCODE_BGNSUB */
175 };
176
177 class variable_storage : public exec_node {
178 public:
179 variable_storage(ir_variable *var, gl_register_file file, int index)
180 : file(file), index(index), var(var)
181 {
182 /* empty */
183 }
184
185 gl_register_file file;
186 int index;
187 ir_variable *var; /* variable that maps to this, if any */
188 };
189
190 class function_entry : public exec_node {
191 public:
192 ir_function_signature *sig;
193
194 /**
195 * identifier of this function signature used by the program.
196 *
197 * At the point that Mesa instructions for function calls are
198 * generated, we don't know the address of the first instruction of
199 * the function body. So we make the BranchTarget that is called a
200 * small integer and rewrite them during set_branchtargets().
201 */
202 int sig_id;
203
204 /**
205 * Pointer to first instruction of the function body.
206 *
207 * Set during function body emits after main() is processed.
208 */
209 ir_to_mesa_instruction *bgn_inst;
210
211 /**
212 * Index of the first instruction of the function body in actual
213 * Mesa IR.
214 *
215 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
216 */
217 int inst;
218
219 /** Storage for the return value. */
220 src_reg return_reg;
221 };
222
223 class ir_to_mesa_visitor : public ir_visitor {
224 public:
225 ir_to_mesa_visitor();
226 ~ir_to_mesa_visitor();
227
228 function_entry *current_function;
229
230 struct gl_context *ctx;
231 struct gl_program *prog;
232 struct gl_shader_program *shader_program;
233 struct gl_shader_compiler_options *options;
234
235 int next_temp;
236
237 variable_storage *find_variable_storage(ir_variable *var);
238
239 function_entry *get_function_signature(ir_function_signature *sig);
240
241 src_reg get_temp(const glsl_type *type);
242 void reladdr_to_temp(ir_instruction *ir, src_reg *reg, int *num_reladdr);
243
244 src_reg src_reg_for_float(float val);
245
246 /**
247 * \name Visit methods
248 *
249 * As typical for the visitor pattern, there must be one \c visit method for
250 * each concrete subclass of \c ir_instruction. Virtual base classes within
251 * the hierarchy should not have \c visit methods.
252 */
253 /*@{*/
254 virtual void visit(ir_variable *);
255 virtual void visit(ir_loop *);
256 virtual void visit(ir_loop_jump *);
257 virtual void visit(ir_function_signature *);
258 virtual void visit(ir_function *);
259 virtual void visit(ir_expression *);
260 virtual void visit(ir_swizzle *);
261 virtual void visit(ir_dereference_variable *);
262 virtual void visit(ir_dereference_array *);
263 virtual void visit(ir_dereference_record *);
264 virtual void visit(ir_assignment *);
265 virtual void visit(ir_constant *);
266 virtual void visit(ir_call *);
267 virtual void visit(ir_return *);
268 virtual void visit(ir_discard *);
269 virtual void visit(ir_texture *);
270 virtual void visit(ir_if *);
271 /*@}*/
272
273 src_reg result;
274
275 /** List of variable_storage */
276 exec_list variables;
277
278 /** List of function_entry */
279 exec_list function_signatures;
280 int next_signature_id;
281
282 /** List of ir_to_mesa_instruction */
283 exec_list instructions;
284
285 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op);
286
287 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
288 dst_reg dst, src_reg src0);
289
290 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
291 dst_reg dst, src_reg src0, src_reg src1);
292
293 ir_to_mesa_instruction *emit(ir_instruction *ir, enum prog_opcode op,
294 dst_reg dst,
295 src_reg src0, src_reg src1, src_reg src2);
296
297 /**
298 * Emit the correct dot-product instruction for the type of arguments
299 */
300 ir_to_mesa_instruction * emit_dp(ir_instruction *ir,
301 dst_reg dst,
302 src_reg src0,
303 src_reg src1,
304 unsigned elements);
305
306 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
307 dst_reg dst, src_reg src0);
308
309 void emit_scalar(ir_instruction *ir, enum prog_opcode op,
310 dst_reg dst, src_reg src0, src_reg src1);
311
312 void emit_scs(ir_instruction *ir, enum prog_opcode op,
313 dst_reg dst, const src_reg &src);
314
315 bool try_emit_mad(ir_expression *ir,
316 int mul_operand);
317 bool try_emit_mad_for_and_not(ir_expression *ir,
318 int mul_operand);
319 bool try_emit_sat(ir_expression *ir);
320
321 void emit_swz(ir_expression *ir);
322
323 bool process_move_condition(ir_rvalue *ir);
324
325 void copy_propagate(void);
326
327 void *mem_ctx;
328 };
329
330 src_reg undef_src = src_reg(PROGRAM_UNDEFINED, 0, NULL);
331
332 dst_reg undef_dst = dst_reg(PROGRAM_UNDEFINED, SWIZZLE_NOOP);
333
334 dst_reg address_reg = dst_reg(PROGRAM_ADDRESS, WRITEMASK_X);
335
336 static int
337 swizzle_for_size(int size)
338 {
339 int size_swizzles[4] = {
340 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
341 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
342 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
343 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
344 };
345
346 assert((size >= 1) && (size <= 4));
347 return size_swizzles[size - 1];
348 }
349
350 ir_to_mesa_instruction *
351 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
352 dst_reg dst,
353 src_reg src0, src_reg src1, src_reg src2)
354 {
355 ir_to_mesa_instruction *inst = new(mem_ctx) ir_to_mesa_instruction();
356 int num_reladdr = 0;
357
358 /* If we have to do relative addressing, we want to load the ARL
359 * reg directly for one of the regs, and preload the other reladdr
360 * sources into temps.
361 */
362 num_reladdr += dst.reladdr != NULL;
363 num_reladdr += src0.reladdr != NULL;
364 num_reladdr += src1.reladdr != NULL;
365 num_reladdr += src2.reladdr != NULL;
366
367 reladdr_to_temp(ir, &src2, &num_reladdr);
368 reladdr_to_temp(ir, &src1, &num_reladdr);
369 reladdr_to_temp(ir, &src0, &num_reladdr);
370
371 if (dst.reladdr) {
372 emit(ir, OPCODE_ARL, address_reg, *dst.reladdr);
373 num_reladdr--;
374 }
375 assert(num_reladdr == 0);
376
377 inst->op = op;
378 inst->dst = dst;
379 inst->src[0] = src0;
380 inst->src[1] = src1;
381 inst->src[2] = src2;
382 inst->ir = ir;
383
384 inst->function = NULL;
385
386 this->instructions.push_tail(inst);
387
388 return inst;
389 }
390
391
392 ir_to_mesa_instruction *
393 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
394 dst_reg dst, src_reg src0, src_reg src1)
395 {
396 return emit(ir, op, dst, src0, src1, undef_src);
397 }
398
399 ir_to_mesa_instruction *
400 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op,
401 dst_reg dst, src_reg src0)
402 {
403 assert(dst.writemask != 0);
404 return emit(ir, op, dst, src0, undef_src, undef_src);
405 }
406
407 ir_to_mesa_instruction *
408 ir_to_mesa_visitor::emit(ir_instruction *ir, enum prog_opcode op)
409 {
410 return emit(ir, op, undef_dst, undef_src, undef_src, undef_src);
411 }
412
413 ir_to_mesa_instruction *
414 ir_to_mesa_visitor::emit_dp(ir_instruction *ir,
415 dst_reg dst, src_reg src0, src_reg src1,
416 unsigned elements)
417 {
418 static const gl_inst_opcode dot_opcodes[] = {
419 OPCODE_DP2, OPCODE_DP3, OPCODE_DP4
420 };
421
422 return emit(ir, dot_opcodes[elements - 2], dst, src0, src1);
423 }
424
425 /**
426 * Emits Mesa scalar opcodes to produce unique answers across channels.
427 *
428 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
429 * channel determines the result across all channels. So to do a vec4
430 * of this operation, we want to emit a scalar per source channel used
431 * to produce dest channels.
432 */
433 void
434 ir_to_mesa_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
435 dst_reg dst,
436 src_reg orig_src0, src_reg orig_src1)
437 {
438 int i, j;
439 int done_mask = ~dst.writemask;
440
441 /* Mesa RCP is a scalar operation splatting results to all channels,
442 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
443 * dst channels.
444 */
445 for (i = 0; i < 4; i++) {
446 GLuint this_mask = (1 << i);
447 ir_to_mesa_instruction *inst;
448 src_reg src0 = orig_src0;
449 src_reg src1 = orig_src1;
450
451 if (done_mask & this_mask)
452 continue;
453
454 GLuint src0_swiz = GET_SWZ(src0.swizzle, i);
455 GLuint src1_swiz = GET_SWZ(src1.swizzle, i);
456 for (j = i + 1; j < 4; j++) {
457 /* If there is another enabled component in the destination that is
458 * derived from the same inputs, generate its value on this pass as
459 * well.
460 */
461 if (!(done_mask & (1 << j)) &&
462 GET_SWZ(src0.swizzle, j) == src0_swiz &&
463 GET_SWZ(src1.swizzle, j) == src1_swiz) {
464 this_mask |= (1 << j);
465 }
466 }
467 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
468 src0_swiz, src0_swiz);
469 src1.swizzle = MAKE_SWIZZLE4(src1_swiz, src1_swiz,
470 src1_swiz, src1_swiz);
471
472 inst = emit(ir, op, dst, src0, src1);
473 inst->dst.writemask = this_mask;
474 done_mask |= this_mask;
475 }
476 }
477
478 void
479 ir_to_mesa_visitor::emit_scalar(ir_instruction *ir, enum prog_opcode op,
480 dst_reg dst, src_reg src0)
481 {
482 src_reg undef = undef_src;
483
484 undef.swizzle = SWIZZLE_XXXX;
485
486 emit_scalar(ir, op, dst, src0, undef);
487 }
488
489 /**
490 * Emit an OPCODE_SCS instruction
491 *
492 * The \c SCS opcode functions a bit differently than the other Mesa (or
493 * ARB_fragment_program) opcodes. Instead of splatting its result across all
494 * four components of the destination, it writes one value to the \c x
495 * component and another value to the \c y component.
496 *
497 * \param ir IR instruction being processed
498 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
499 * value is desired.
500 * \param dst Destination register
501 * \param src Source register
502 */
503 void
504 ir_to_mesa_visitor::emit_scs(ir_instruction *ir, enum prog_opcode op,
505 dst_reg dst,
506 const src_reg &src)
507 {
508 /* Vertex programs cannot use the SCS opcode.
509 */
510 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB) {
511 emit_scalar(ir, op, dst, src);
512 return;
513 }
514
515 const unsigned component = (op == OPCODE_SIN) ? 0 : 1;
516 const unsigned scs_mask = (1U << component);
517 int done_mask = ~dst.writemask;
518 src_reg tmp;
519
520 assert(op == OPCODE_SIN || op == OPCODE_COS);
521
522 /* If there are compnents in the destination that differ from the component
523 * that will be written by the SCS instrution, we'll need a temporary.
524 */
525 if (scs_mask != unsigned(dst.writemask)) {
526 tmp = get_temp(glsl_type::vec4_type);
527 }
528
529 for (unsigned i = 0; i < 4; i++) {
530 unsigned this_mask = (1U << i);
531 src_reg src0 = src;
532
533 if ((done_mask & this_mask) != 0)
534 continue;
535
536 /* The source swizzle specified which component of the source generates
537 * sine / cosine for the current component in the destination. The SCS
538 * instruction requires that this value be swizzle to the X component.
539 * Replace the current swizzle with a swizzle that puts the source in
540 * the X component.
541 */
542 unsigned src0_swiz = GET_SWZ(src.swizzle, i);
543
544 src0.swizzle = MAKE_SWIZZLE4(src0_swiz, src0_swiz,
545 src0_swiz, src0_swiz);
546 for (unsigned j = i + 1; j < 4; j++) {
547 /* If there is another enabled component in the destination that is
548 * derived from the same inputs, generate its value on this pass as
549 * well.
550 */
551 if (!(done_mask & (1 << j)) &&
552 GET_SWZ(src0.swizzle, j) == src0_swiz) {
553 this_mask |= (1 << j);
554 }
555 }
556
557 if (this_mask != scs_mask) {
558 ir_to_mesa_instruction *inst;
559 dst_reg tmp_dst = dst_reg(tmp);
560
561 /* Emit the SCS instruction.
562 */
563 inst = emit(ir, OPCODE_SCS, tmp_dst, src0);
564 inst->dst.writemask = scs_mask;
565
566 /* Move the result of the SCS instruction to the desired location in
567 * the destination.
568 */
569 tmp.swizzle = MAKE_SWIZZLE4(component, component,
570 component, component);
571 inst = emit(ir, OPCODE_SCS, dst, tmp);
572 inst->dst.writemask = this_mask;
573 } else {
574 /* Emit the SCS instruction to write directly to the destination.
575 */
576 ir_to_mesa_instruction *inst = emit(ir, OPCODE_SCS, dst, src0);
577 inst->dst.writemask = scs_mask;
578 }
579
580 done_mask |= this_mask;
581 }
582 }
583
584 src_reg
585 ir_to_mesa_visitor::src_reg_for_float(float val)
586 {
587 src_reg src(PROGRAM_CONSTANT, -1, NULL);
588
589 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
590 (const gl_constant_value *)&val, 1, &src.swizzle);
591
592 return src;
593 }
594
595 static int
596 type_size(const struct glsl_type *type)
597 {
598 unsigned int i;
599 int size;
600
601 switch (type->base_type) {
602 case GLSL_TYPE_UINT:
603 case GLSL_TYPE_INT:
604 case GLSL_TYPE_FLOAT:
605 case GLSL_TYPE_BOOL:
606 if (type->is_matrix()) {
607 return type->matrix_columns;
608 } else {
609 /* Regardless of size of vector, it gets a vec4. This is bad
610 * packing for things like floats, but otherwise arrays become a
611 * mess. Hopefully a later pass over the code can pack scalars
612 * down if appropriate.
613 */
614 return 1;
615 }
616 case GLSL_TYPE_ARRAY:
617 assert(type->length > 0);
618 return type_size(type->fields.array) * type->length;
619 case GLSL_TYPE_STRUCT:
620 size = 0;
621 for (i = 0; i < type->length; i++) {
622 size += type_size(type->fields.structure[i].type);
623 }
624 return size;
625 case GLSL_TYPE_SAMPLER:
626 /* Samplers take up one slot in UNIFORMS[], but they're baked in
627 * at link time.
628 */
629 return 1;
630 default:
631 assert(0);
632 return 0;
633 }
634 }
635
636 /**
637 * In the initial pass of codegen, we assign temporary numbers to
638 * intermediate results. (not SSA -- variable assignments will reuse
639 * storage). Actual register allocation for the Mesa VM occurs in a
640 * pass over the Mesa IR later.
641 */
642 src_reg
643 ir_to_mesa_visitor::get_temp(const glsl_type *type)
644 {
645 src_reg src;
646
647 src.file = PROGRAM_TEMPORARY;
648 src.index = next_temp;
649 src.reladdr = NULL;
650 next_temp += type_size(type);
651
652 if (type->is_array() || type->is_record()) {
653 src.swizzle = SWIZZLE_NOOP;
654 } else {
655 src.swizzle = swizzle_for_size(type->vector_elements);
656 }
657 src.negate = 0;
658
659 return src;
660 }
661
662 variable_storage *
663 ir_to_mesa_visitor::find_variable_storage(ir_variable *var)
664 {
665
666 variable_storage *entry;
667
668 foreach_iter(exec_list_iterator, iter, this->variables) {
669 entry = (variable_storage *)iter.get();
670
671 if (entry->var == var)
672 return entry;
673 }
674
675 return NULL;
676 }
677
678 void
679 ir_to_mesa_visitor::visit(ir_variable *ir)
680 {
681 if (strcmp(ir->name, "gl_FragCoord") == 0) {
682 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
683
684 fp->OriginUpperLeft = ir->origin_upper_left;
685 fp->PixelCenterInteger = ir->pixel_center_integer;
686
687 } else if (strcmp(ir->name, "gl_FragDepth") == 0) {
688 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
689 switch (ir->depth_layout) {
690 case ir_depth_layout_none:
691 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_NONE;
692 break;
693 case ir_depth_layout_any:
694 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_ANY;
695 break;
696 case ir_depth_layout_greater:
697 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_GREATER;
698 break;
699 case ir_depth_layout_less:
700 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_LESS;
701 break;
702 case ir_depth_layout_unchanged:
703 fp->FragDepthLayout = FRAG_DEPTH_LAYOUT_UNCHANGED;
704 break;
705 default:
706 assert(0);
707 break;
708 }
709 }
710
711 if (ir->mode == ir_var_uniform && strncmp(ir->name, "gl_", 3) == 0) {
712 unsigned int i;
713 const ir_state_slot *const slots = ir->state_slots;
714 assert(ir->state_slots != NULL);
715
716 /* Check if this statevar's setup in the STATE file exactly
717 * matches how we'll want to reference it as a
718 * struct/array/whatever. If not, then we need to move it into
719 * temporary storage and hope that it'll get copy-propagated
720 * out.
721 */
722 for (i = 0; i < ir->num_state_slots; i++) {
723 if (slots[i].swizzle != SWIZZLE_XYZW) {
724 break;
725 }
726 }
727
728 variable_storage *storage;
729 dst_reg dst;
730 if (i == ir->num_state_slots) {
731 /* We'll set the index later. */
732 storage = new(mem_ctx) variable_storage(ir, PROGRAM_STATE_VAR, -1);
733 this->variables.push_tail(storage);
734
735 dst = undef_dst;
736 } else {
737 /* The variable_storage constructor allocates slots based on the size
738 * of the type. However, this had better match the number of state
739 * elements that we're going to copy into the new temporary.
740 */
741 assert((int) ir->num_state_slots == type_size(ir->type));
742
743 storage = new(mem_ctx) variable_storage(ir, PROGRAM_TEMPORARY,
744 this->next_temp);
745 this->variables.push_tail(storage);
746 this->next_temp += type_size(ir->type);
747
748 dst = dst_reg(src_reg(PROGRAM_TEMPORARY, storage->index, NULL));
749 }
750
751
752 for (unsigned int i = 0; i < ir->num_state_slots; i++) {
753 int index = _mesa_add_state_reference(this->prog->Parameters,
754 (gl_state_index *)slots[i].tokens);
755
756 if (storage->file == PROGRAM_STATE_VAR) {
757 if (storage->index == -1) {
758 storage->index = index;
759 } else {
760 assert(index == storage->index + (int)i);
761 }
762 } else {
763 src_reg src(PROGRAM_STATE_VAR, index, NULL);
764 src.swizzle = slots[i].swizzle;
765 emit(ir, OPCODE_MOV, dst, src);
766 /* even a float takes up a whole vec4 reg in a struct/array. */
767 dst.index++;
768 }
769 }
770
771 if (storage->file == PROGRAM_TEMPORARY &&
772 dst.index != storage->index + (int) ir->num_state_slots) {
773 linker_error(this->shader_program,
774 "failed to load builtin uniform `%s' "
775 "(%d/%d regs loaded)\n",
776 ir->name, dst.index - storage->index,
777 type_size(ir->type));
778 }
779 }
780 }
781
782 void
783 ir_to_mesa_visitor::visit(ir_loop *ir)
784 {
785 ir_dereference_variable *counter = NULL;
786
787 if (ir->counter != NULL)
788 counter = new(mem_ctx) ir_dereference_variable(ir->counter);
789
790 if (ir->from != NULL) {
791 assert(ir->counter != NULL);
792
793 ir_assignment *a =
794 new(mem_ctx) ir_assignment(counter, ir->from, NULL);
795
796 a->accept(this);
797 }
798
799 emit(NULL, OPCODE_BGNLOOP);
800
801 if (ir->to) {
802 ir_expression *e =
803 new(mem_ctx) ir_expression(ir->cmp, glsl_type::bool_type,
804 counter, ir->to);
805 ir_if *if_stmt = new(mem_ctx) ir_if(e);
806
807 ir_loop_jump *brk =
808 new(mem_ctx) ir_loop_jump(ir_loop_jump::jump_break);
809
810 if_stmt->then_instructions.push_tail(brk);
811
812 if_stmt->accept(this);
813 }
814
815 visit_exec_list(&ir->body_instructions, this);
816
817 if (ir->increment) {
818 ir_expression *e =
819 new(mem_ctx) ir_expression(ir_binop_add, counter->type,
820 counter, ir->increment);
821
822 ir_assignment *a =
823 new(mem_ctx) ir_assignment(counter, e, NULL);
824
825 a->accept(this);
826 }
827
828 emit(NULL, OPCODE_ENDLOOP);
829 }
830
831 void
832 ir_to_mesa_visitor::visit(ir_loop_jump *ir)
833 {
834 switch (ir->mode) {
835 case ir_loop_jump::jump_break:
836 emit(NULL, OPCODE_BRK);
837 break;
838 case ir_loop_jump::jump_continue:
839 emit(NULL, OPCODE_CONT);
840 break;
841 }
842 }
843
844
845 void
846 ir_to_mesa_visitor::visit(ir_function_signature *ir)
847 {
848 assert(0);
849 (void)ir;
850 }
851
852 void
853 ir_to_mesa_visitor::visit(ir_function *ir)
854 {
855 /* Ignore function bodies other than main() -- we shouldn't see calls to
856 * them since they should all be inlined before we get to ir_to_mesa.
857 */
858 if (strcmp(ir->name, "main") == 0) {
859 const ir_function_signature *sig;
860 exec_list empty;
861
862 sig = ir->matching_signature(&empty);
863
864 assert(sig);
865
866 foreach_iter(exec_list_iterator, iter, sig->body) {
867 ir_instruction *ir = (ir_instruction *)iter.get();
868
869 ir->accept(this);
870 }
871 }
872 }
873
874 bool
875 ir_to_mesa_visitor::try_emit_mad(ir_expression *ir, int mul_operand)
876 {
877 int nonmul_operand = 1 - mul_operand;
878 src_reg a, b, c;
879
880 ir_expression *expr = ir->operands[mul_operand]->as_expression();
881 if (!expr || expr->operation != ir_binop_mul)
882 return false;
883
884 expr->operands[0]->accept(this);
885 a = this->result;
886 expr->operands[1]->accept(this);
887 b = this->result;
888 ir->operands[nonmul_operand]->accept(this);
889 c = this->result;
890
891 this->result = get_temp(ir->type);
892 emit(ir, OPCODE_MAD, dst_reg(this->result), a, b, c);
893
894 return true;
895 }
896
897 /**
898 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
899 *
900 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
901 * implemented using multiplication, and logical-or is implemented using
902 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
903 * As result, the logical expression (a & !b) can be rewritten as:
904 *
905 * - a * !b
906 * - a * (1 - b)
907 * - (a * 1) - (a * b)
908 * - a + -(a * b)
909 * - a + (a * -b)
910 *
911 * This final expression can be implemented as a single MAD(a, -b, a)
912 * instruction.
913 */
914 bool
915 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression *ir, int try_operand)
916 {
917 const int other_operand = 1 - try_operand;
918 src_reg a, b;
919
920 ir_expression *expr = ir->operands[try_operand]->as_expression();
921 if (!expr || expr->operation != ir_unop_logic_not)
922 return false;
923
924 ir->operands[other_operand]->accept(this);
925 a = this->result;
926 expr->operands[0]->accept(this);
927 b = this->result;
928
929 b.negate = ~b.negate;
930
931 this->result = get_temp(ir->type);
932 emit(ir, OPCODE_MAD, dst_reg(this->result), a, b, a);
933
934 return true;
935 }
936
937 bool
938 ir_to_mesa_visitor::try_emit_sat(ir_expression *ir)
939 {
940 /* Saturates were only introduced to vertex programs in
941 * NV_vertex_program3, so don't give them to drivers in the VP.
942 */
943 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB)
944 return false;
945
946 ir_rvalue *sat_src = ir->as_rvalue_to_saturate();
947 if (!sat_src)
948 return false;
949
950 sat_src->accept(this);
951 src_reg src = this->result;
952
953 /* If we generated an expression instruction into a temporary in
954 * processing the saturate's operand, apply the saturate to that
955 * instruction. Otherwise, generate a MOV to do the saturate.
956 *
957 * Note that we have to be careful to only do this optimization if
958 * the instruction in question was what generated src->result. For
959 * example, ir_dereference_array might generate a MUL instruction
960 * to create the reladdr, and return us a src reg using that
961 * reladdr. That MUL result is not the value we're trying to
962 * saturate.
963 */
964 ir_expression *sat_src_expr = sat_src->as_expression();
965 ir_to_mesa_instruction *new_inst;
966 new_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
967 if (sat_src_expr && (sat_src_expr->operation == ir_binop_mul ||
968 sat_src_expr->operation == ir_binop_add ||
969 sat_src_expr->operation == ir_binop_dot)) {
970 new_inst->saturate = true;
971 } else {
972 this->result = get_temp(ir->type);
973 ir_to_mesa_instruction *inst;
974 inst = emit(ir, OPCODE_MOV, dst_reg(this->result), src);
975 inst->saturate = true;
976 }
977
978 return true;
979 }
980
981 void
982 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction *ir,
983 src_reg *reg, int *num_reladdr)
984 {
985 if (!reg->reladdr)
986 return;
987
988 emit(ir, OPCODE_ARL, address_reg, *reg->reladdr);
989
990 if (*num_reladdr != 1) {
991 src_reg temp = get_temp(glsl_type::vec4_type);
992
993 emit(ir, OPCODE_MOV, dst_reg(temp), *reg);
994 *reg = temp;
995 }
996
997 (*num_reladdr)--;
998 }
999
1000 void
1001 ir_to_mesa_visitor::emit_swz(ir_expression *ir)
1002 {
1003 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
1004 * This means that each of the operands is either an immediate value of -1,
1005 * 0, or 1, or is a component from one source register (possibly with
1006 * negation).
1007 */
1008 uint8_t components[4] = { 0 };
1009 bool negate[4] = { false };
1010 ir_variable *var = NULL;
1011
1012 for (unsigned i = 0; i < ir->type->vector_elements; i++) {
1013 ir_rvalue *op = ir->operands[i];
1014
1015 assert(op->type->is_scalar());
1016
1017 while (op != NULL) {
1018 switch (op->ir_type) {
1019 case ir_type_constant: {
1020
1021 assert(op->type->is_scalar());
1022
1023 const ir_constant *const c = op->as_constant();
1024 if (c->is_one()) {
1025 components[i] = SWIZZLE_ONE;
1026 } else if (c->is_zero()) {
1027 components[i] = SWIZZLE_ZERO;
1028 } else if (c->is_negative_one()) {
1029 components[i] = SWIZZLE_ONE;
1030 negate[i] = true;
1031 } else {
1032 assert(!"SWZ constant must be 0.0 or 1.0.");
1033 }
1034
1035 op = NULL;
1036 break;
1037 }
1038
1039 case ir_type_dereference_variable: {
1040 ir_dereference_variable *const deref =
1041 (ir_dereference_variable *) op;
1042
1043 assert((var == NULL) || (deref->var == var));
1044 components[i] = SWIZZLE_X;
1045 var = deref->var;
1046 op = NULL;
1047 break;
1048 }
1049
1050 case ir_type_expression: {
1051 ir_expression *const expr = (ir_expression *) op;
1052
1053 assert(expr->operation == ir_unop_neg);
1054 negate[i] = true;
1055
1056 op = expr->operands[0];
1057 break;
1058 }
1059
1060 case ir_type_swizzle: {
1061 ir_swizzle *const swiz = (ir_swizzle *) op;
1062
1063 components[i] = swiz->mask.x;
1064 op = swiz->val;
1065 break;
1066 }
1067
1068 default:
1069 assert(!"Should not get here.");
1070 return;
1071 }
1072 }
1073 }
1074
1075 assert(var != NULL);
1076
1077 ir_dereference_variable *const deref =
1078 new(mem_ctx) ir_dereference_variable(var);
1079
1080 this->result.file = PROGRAM_UNDEFINED;
1081 deref->accept(this);
1082 if (this->result.file == PROGRAM_UNDEFINED) {
1083 ir_print_visitor v;
1084 printf("Failed to get tree for expression operand:\n");
1085 deref->accept(&v);
1086 exit(1);
1087 }
1088
1089 src_reg src;
1090
1091 src = this->result;
1092 src.swizzle = MAKE_SWIZZLE4(components[0],
1093 components[1],
1094 components[2],
1095 components[3]);
1096 src.negate = ((unsigned(negate[0]) << 0)
1097 | (unsigned(negate[1]) << 1)
1098 | (unsigned(negate[2]) << 2)
1099 | (unsigned(negate[3]) << 3));
1100
1101 /* Storage for our result. Ideally for an assignment we'd be using the
1102 * actual storage for the result here, instead.
1103 */
1104 const src_reg result_src = get_temp(ir->type);
1105 dst_reg result_dst = dst_reg(result_src);
1106
1107 /* Limit writes to the channels that will be used by result_src later.
1108 * This does limit this temp's use as a temporary for multi-instruction
1109 * sequences.
1110 */
1111 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1112
1113 emit(ir, OPCODE_SWZ, result_dst, src);
1114 this->result = result_src;
1115 }
1116
1117 void
1118 ir_to_mesa_visitor::visit(ir_expression *ir)
1119 {
1120 unsigned int operand;
1121 src_reg op[Elements(ir->operands)];
1122 src_reg result_src;
1123 dst_reg result_dst;
1124
1125 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1126 */
1127 if (ir->operation == ir_binop_add) {
1128 if (try_emit_mad(ir, 1))
1129 return;
1130 if (try_emit_mad(ir, 0))
1131 return;
1132 }
1133
1134 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1135 */
1136 if (ir->operation == ir_binop_logic_and) {
1137 if (try_emit_mad_for_and_not(ir, 1))
1138 return;
1139 if (try_emit_mad_for_and_not(ir, 0))
1140 return;
1141 }
1142
1143 if (try_emit_sat(ir))
1144 return;
1145
1146 if (ir->operation == ir_quadop_vector) {
1147 this->emit_swz(ir);
1148 return;
1149 }
1150
1151 for (operand = 0; operand < ir->get_num_operands(); operand++) {
1152 this->result.file = PROGRAM_UNDEFINED;
1153 ir->operands[operand]->accept(this);
1154 if (this->result.file == PROGRAM_UNDEFINED) {
1155 ir_print_visitor v;
1156 printf("Failed to get tree for expression operand:\n");
1157 ir->operands[operand]->accept(&v);
1158 exit(1);
1159 }
1160 op[operand] = this->result;
1161
1162 /* Matrix expression operands should have been broken down to vector
1163 * operations already.
1164 */
1165 assert(!ir->operands[operand]->type->is_matrix());
1166 }
1167
1168 int vector_elements = ir->operands[0]->type->vector_elements;
1169 if (ir->operands[1]) {
1170 vector_elements = MAX2(vector_elements,
1171 ir->operands[1]->type->vector_elements);
1172 }
1173
1174 this->result.file = PROGRAM_UNDEFINED;
1175
1176 /* Storage for our result. Ideally for an assignment we'd be using
1177 * the actual storage for the result here, instead.
1178 */
1179 result_src = get_temp(ir->type);
1180 /* convenience for the emit functions below. */
1181 result_dst = dst_reg(result_src);
1182 /* Limit writes to the channels that will be used by result_src later.
1183 * This does limit this temp's use as a temporary for multi-instruction
1184 * sequences.
1185 */
1186 result_dst.writemask = (1 << ir->type->vector_elements) - 1;
1187
1188 switch (ir->operation) {
1189 case ir_unop_logic_not:
1190 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1191 * older GPUs implement SEQ using multiple instructions (i915 uses two
1192 * SGE instructions and a MUL instruction). Since our logic values are
1193 * 0.0 and 1.0, 1-x also implements !x.
1194 */
1195 op[0].negate = ~op[0].negate;
1196 emit(ir, OPCODE_ADD, result_dst, op[0], src_reg_for_float(1.0));
1197 break;
1198 case ir_unop_neg:
1199 op[0].negate = ~op[0].negate;
1200 result_src = op[0];
1201 break;
1202 case ir_unop_abs:
1203 emit(ir, OPCODE_ABS, result_dst, op[0]);
1204 break;
1205 case ir_unop_sign:
1206 emit(ir, OPCODE_SSG, result_dst, op[0]);
1207 break;
1208 case ir_unop_rcp:
1209 emit_scalar(ir, OPCODE_RCP, result_dst, op[0]);
1210 break;
1211
1212 case ir_unop_exp2:
1213 emit_scalar(ir, OPCODE_EX2, result_dst, op[0]);
1214 break;
1215 case ir_unop_exp:
1216 case ir_unop_log:
1217 assert(!"not reached: should be handled by ir_explog_to_explog2");
1218 break;
1219 case ir_unop_log2:
1220 emit_scalar(ir, OPCODE_LG2, result_dst, op[0]);
1221 break;
1222 case ir_unop_sin:
1223 emit_scalar(ir, OPCODE_SIN, result_dst, op[0]);
1224 break;
1225 case ir_unop_cos:
1226 emit_scalar(ir, OPCODE_COS, result_dst, op[0]);
1227 break;
1228 case ir_unop_sin_reduced:
1229 emit_scs(ir, OPCODE_SIN, result_dst, op[0]);
1230 break;
1231 case ir_unop_cos_reduced:
1232 emit_scs(ir, OPCODE_COS, result_dst, op[0]);
1233 break;
1234
1235 case ir_unop_dFdx:
1236 emit(ir, OPCODE_DDX, result_dst, op[0]);
1237 break;
1238 case ir_unop_dFdy:
1239 emit(ir, OPCODE_DDY, result_dst, op[0]);
1240 break;
1241
1242 case ir_unop_noise: {
1243 const enum prog_opcode opcode =
1244 prog_opcode(OPCODE_NOISE1
1245 + (ir->operands[0]->type->vector_elements) - 1);
1246 assert((opcode >= OPCODE_NOISE1) && (opcode <= OPCODE_NOISE4));
1247
1248 emit(ir, opcode, result_dst, op[0]);
1249 break;
1250 }
1251
1252 case ir_binop_add:
1253 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1254 break;
1255 case ir_binop_sub:
1256 emit(ir, OPCODE_SUB, result_dst, op[0], op[1]);
1257 break;
1258
1259 case ir_binop_mul:
1260 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1261 break;
1262 case ir_binop_div:
1263 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1264 break;
1265 case ir_binop_mod:
1266 /* Floating point should be lowered by MOD_TO_FRACT in the compiler. */
1267 assert(ir->type->is_integer());
1268 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1269 break;
1270
1271 case ir_binop_less:
1272 emit(ir, OPCODE_SLT, result_dst, op[0], op[1]);
1273 break;
1274 case ir_binop_greater:
1275 emit(ir, OPCODE_SGT, result_dst, op[0], op[1]);
1276 break;
1277 case ir_binop_lequal:
1278 emit(ir, OPCODE_SLE, result_dst, op[0], op[1]);
1279 break;
1280 case ir_binop_gequal:
1281 emit(ir, OPCODE_SGE, result_dst, op[0], op[1]);
1282 break;
1283 case ir_binop_equal:
1284 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1285 break;
1286 case ir_binop_nequal:
1287 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1288 break;
1289 case ir_binop_all_equal:
1290 /* "==" operator producing a scalar boolean. */
1291 if (ir->operands[0]->type->is_vector() ||
1292 ir->operands[1]->type->is_vector()) {
1293 src_reg temp = get_temp(glsl_type::vec4_type);
1294 emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]);
1295
1296 /* After the dot-product, the value will be an integer on the
1297 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1298 */
1299 emit_dp(ir, result_dst, temp, temp, vector_elements);
1300
1301 /* Negating the result of the dot-product gives values on the range
1302 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1303 * achieved using SGE.
1304 */
1305 src_reg sge_src = result_src;
1306 sge_src.negate = ~sge_src.negate;
1307 emit(ir, OPCODE_SGE, result_dst, sge_src, src_reg_for_float(0.0));
1308 } else {
1309 emit(ir, OPCODE_SEQ, result_dst, op[0], op[1]);
1310 }
1311 break;
1312 case ir_binop_any_nequal:
1313 /* "!=" operator producing a scalar boolean. */
1314 if (ir->operands[0]->type->is_vector() ||
1315 ir->operands[1]->type->is_vector()) {
1316 src_reg temp = get_temp(glsl_type::vec4_type);
1317 emit(ir, OPCODE_SNE, dst_reg(temp), op[0], op[1]);
1318
1319 /* After the dot-product, the value will be an integer on the
1320 * range [0,4]. Zero stays zero, and positive values become 1.0.
1321 */
1322 ir_to_mesa_instruction *const dp =
1323 emit_dp(ir, result_dst, temp, temp, vector_elements);
1324 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1325 /* The clamping to [0,1] can be done for free in the fragment
1326 * shader with a saturate.
1327 */
1328 dp->saturate = true;
1329 } else {
1330 /* Negating the result of the dot-product gives values on the range
1331 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1332 * achieved using SLT.
1333 */
1334 src_reg slt_src = result_src;
1335 slt_src.negate = ~slt_src.negate;
1336 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1337 }
1338 } else {
1339 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1340 }
1341 break;
1342
1343 case ir_unop_any: {
1344 assert(ir->operands[0]->type->is_vector());
1345
1346 /* After the dot-product, the value will be an integer on the
1347 * range [0,4]. Zero stays zero, and positive values become 1.0.
1348 */
1349 ir_to_mesa_instruction *const dp =
1350 emit_dp(ir, result_dst, op[0], op[0],
1351 ir->operands[0]->type->vector_elements);
1352 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1353 /* The clamping to [0,1] can be done for free in the fragment
1354 * shader with a saturate.
1355 */
1356 dp->saturate = true;
1357 } else {
1358 /* Negating the result of the dot-product gives values on the range
1359 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1360 * is achieved using SLT.
1361 */
1362 src_reg slt_src = result_src;
1363 slt_src.negate = ~slt_src.negate;
1364 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1365 }
1366 break;
1367 }
1368
1369 case ir_binop_logic_xor:
1370 emit(ir, OPCODE_SNE, result_dst, op[0], op[1]);
1371 break;
1372
1373 case ir_binop_logic_or: {
1374 /* After the addition, the value will be an integer on the
1375 * range [0,2]. Zero stays zero, and positive values become 1.0.
1376 */
1377 ir_to_mesa_instruction *add =
1378 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1379 if (this->prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
1380 /* The clamping to [0,1] can be done for free in the fragment
1381 * shader with a saturate.
1382 */
1383 add->saturate = true;
1384 } else {
1385 /* Negating the result of the addition gives values on the range
1386 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1387 * is achieved using SLT.
1388 */
1389 src_reg slt_src = result_src;
1390 slt_src.negate = ~slt_src.negate;
1391 emit(ir, OPCODE_SLT, result_dst, slt_src, src_reg_for_float(0.0));
1392 }
1393 break;
1394 }
1395
1396 case ir_binop_logic_and:
1397 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1398 emit(ir, OPCODE_MUL, result_dst, op[0], op[1]);
1399 break;
1400
1401 case ir_binop_dot:
1402 assert(ir->operands[0]->type->is_vector());
1403 assert(ir->operands[0]->type == ir->operands[1]->type);
1404 emit_dp(ir, result_dst, op[0], op[1],
1405 ir->operands[0]->type->vector_elements);
1406 break;
1407
1408 case ir_unop_sqrt:
1409 /* sqrt(x) = x * rsq(x). */
1410 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1411 emit(ir, OPCODE_MUL, result_dst, result_src, op[0]);
1412 /* For incoming channels <= 0, set the result to 0. */
1413 op[0].negate = ~op[0].negate;
1414 emit(ir, OPCODE_CMP, result_dst,
1415 op[0], result_src, src_reg_for_float(0.0));
1416 break;
1417 case ir_unop_rsq:
1418 emit_scalar(ir, OPCODE_RSQ, result_dst, op[0]);
1419 break;
1420 case ir_unop_i2f:
1421 case ir_unop_u2f:
1422 case ir_unop_b2f:
1423 case ir_unop_b2i:
1424 case ir_unop_i2u:
1425 case ir_unop_u2i:
1426 /* Mesa IR lacks types, ints are stored as truncated floats. */
1427 result_src = op[0];
1428 break;
1429 case ir_unop_f2i:
1430 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1431 break;
1432 case ir_unop_f2b:
1433 case ir_unop_i2b:
1434 emit(ir, OPCODE_SNE, result_dst,
1435 op[0], src_reg_for_float(0.0));
1436 break;
1437 case ir_unop_trunc:
1438 emit(ir, OPCODE_TRUNC, result_dst, op[0]);
1439 break;
1440 case ir_unop_ceil:
1441 op[0].negate = ~op[0].negate;
1442 emit(ir, OPCODE_FLR, result_dst, op[0]);
1443 result_src.negate = ~result_src.negate;
1444 break;
1445 case ir_unop_floor:
1446 emit(ir, OPCODE_FLR, result_dst, op[0]);
1447 break;
1448 case ir_unop_fract:
1449 emit(ir, OPCODE_FRC, result_dst, op[0]);
1450 break;
1451
1452 case ir_binop_min:
1453 emit(ir, OPCODE_MIN, result_dst, op[0], op[1]);
1454 break;
1455 case ir_binop_max:
1456 emit(ir, OPCODE_MAX, result_dst, op[0], op[1]);
1457 break;
1458 case ir_binop_pow:
1459 emit_scalar(ir, OPCODE_POW, result_dst, op[0], op[1]);
1460 break;
1461
1462 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1463 * hardware backends have no way to avoid Mesa IR generation
1464 * even if they don't use it, we need to emit "something" and
1465 * continue.
1466 */
1467 case ir_binop_lshift:
1468 case ir_binop_rshift:
1469 case ir_binop_bit_and:
1470 case ir_binop_bit_xor:
1471 case ir_binop_bit_or:
1472 emit(ir, OPCODE_ADD, result_dst, op[0], op[1]);
1473 break;
1474
1475 case ir_unop_bit_not:
1476 case ir_unop_round_even:
1477 emit(ir, OPCODE_MOV, result_dst, op[0]);
1478 break;
1479
1480 case ir_quadop_vector:
1481 /* This operation should have already been handled.
1482 */
1483 assert(!"Should not get here.");
1484 break;
1485 }
1486
1487 this->result = result_src;
1488 }
1489
1490
1491 void
1492 ir_to_mesa_visitor::visit(ir_swizzle *ir)
1493 {
1494 src_reg src;
1495 int i;
1496 int swizzle[4];
1497
1498 /* Note that this is only swizzles in expressions, not those on the left
1499 * hand side of an assignment, which do write masking. See ir_assignment
1500 * for that.
1501 */
1502
1503 ir->val->accept(this);
1504 src = this->result;
1505 assert(src.file != PROGRAM_UNDEFINED);
1506
1507 for (i = 0; i < 4; i++) {
1508 if (i < ir->type->vector_elements) {
1509 switch (i) {
1510 case 0:
1511 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.x);
1512 break;
1513 case 1:
1514 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.y);
1515 break;
1516 case 2:
1517 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.z);
1518 break;
1519 case 3:
1520 swizzle[i] = GET_SWZ(src.swizzle, ir->mask.w);
1521 break;
1522 }
1523 } else {
1524 /* If the type is smaller than a vec4, replicate the last
1525 * channel out.
1526 */
1527 swizzle[i] = swizzle[ir->type->vector_elements - 1];
1528 }
1529 }
1530
1531 src.swizzle = MAKE_SWIZZLE4(swizzle[0], swizzle[1], swizzle[2], swizzle[3]);
1532
1533 this->result = src;
1534 }
1535
1536 void
1537 ir_to_mesa_visitor::visit(ir_dereference_variable *ir)
1538 {
1539 variable_storage *entry = find_variable_storage(ir->var);
1540 ir_variable *var = ir->var;
1541
1542 if (!entry) {
1543 switch (var->mode) {
1544 case ir_var_uniform:
1545 entry = new(mem_ctx) variable_storage(var, PROGRAM_UNIFORM,
1546 var->location);
1547 this->variables.push_tail(entry);
1548 break;
1549 case ir_var_in:
1550 case ir_var_inout:
1551 /* The linker assigns locations for varyings and attributes,
1552 * including deprecated builtins (like gl_Color),
1553 * user-assigned generic attributes (glBindVertexLocation),
1554 * and user-defined varyings.
1555 *
1556 * FINISHME: We would hit this path for function arguments. Fix!
1557 */
1558 assert(var->location != -1);
1559 entry = new(mem_ctx) variable_storage(var,
1560 PROGRAM_INPUT,
1561 var->location);
1562 if (this->prog->Target == GL_VERTEX_PROGRAM_ARB &&
1563 var->location >= VERT_ATTRIB_GENERIC0) {
1564 _mesa_add_attribute(this->prog->Attributes,
1565 var->name,
1566 _mesa_sizeof_glsl_type(var->type->gl_type),
1567 var->type->gl_type,
1568 var->location - VERT_ATTRIB_GENERIC0);
1569 }
1570 break;
1571 case ir_var_out:
1572 assert(var->location != -1);
1573 entry = new(mem_ctx) variable_storage(var,
1574 PROGRAM_OUTPUT,
1575 var->location);
1576 break;
1577 case ir_var_system_value:
1578 entry = new(mem_ctx) variable_storage(var,
1579 PROGRAM_SYSTEM_VALUE,
1580 var->location);
1581 break;
1582 case ir_var_auto:
1583 case ir_var_temporary:
1584 entry = new(mem_ctx) variable_storage(var, PROGRAM_TEMPORARY,
1585 this->next_temp);
1586 this->variables.push_tail(entry);
1587
1588 next_temp += type_size(var->type);
1589 break;
1590 }
1591
1592 if (!entry) {
1593 printf("Failed to make storage for %s\n", var->name);
1594 exit(1);
1595 }
1596 }
1597
1598 this->result = src_reg(entry->file, entry->index, var->type);
1599 }
1600
1601 void
1602 ir_to_mesa_visitor::visit(ir_dereference_array *ir)
1603 {
1604 ir_constant *index;
1605 src_reg src;
1606 int element_size = type_size(ir->type);
1607
1608 index = ir->array_index->constant_expression_value();
1609
1610 ir->array->accept(this);
1611 src = this->result;
1612
1613 if (index) {
1614 src.index += index->value.i[0] * element_size;
1615 } else {
1616 /* Variable index array dereference. It eats the "vec4" of the
1617 * base of the array and an index that offsets the Mesa register
1618 * index.
1619 */
1620 ir->array_index->accept(this);
1621
1622 src_reg index_reg;
1623
1624 if (element_size == 1) {
1625 index_reg = this->result;
1626 } else {
1627 index_reg = get_temp(glsl_type::float_type);
1628
1629 emit(ir, OPCODE_MUL, dst_reg(index_reg),
1630 this->result, src_reg_for_float(element_size));
1631 }
1632
1633 /* If there was already a relative address register involved, add the
1634 * new and the old together to get the new offset.
1635 */
1636 if (src.reladdr != NULL) {
1637 src_reg accum_reg = get_temp(glsl_type::float_type);
1638
1639 emit(ir, OPCODE_ADD, dst_reg(accum_reg),
1640 index_reg, *src.reladdr);
1641
1642 index_reg = accum_reg;
1643 }
1644
1645 src.reladdr = ralloc(mem_ctx, src_reg);
1646 memcpy(src.reladdr, &index_reg, sizeof(index_reg));
1647 }
1648
1649 /* If the type is smaller than a vec4, replicate the last channel out. */
1650 if (ir->type->is_scalar() || ir->type->is_vector())
1651 src.swizzle = swizzle_for_size(ir->type->vector_elements);
1652 else
1653 src.swizzle = SWIZZLE_NOOP;
1654
1655 this->result = src;
1656 }
1657
1658 void
1659 ir_to_mesa_visitor::visit(ir_dereference_record *ir)
1660 {
1661 unsigned int i;
1662 const glsl_type *struct_type = ir->record->type;
1663 int offset = 0;
1664
1665 ir->record->accept(this);
1666
1667 for (i = 0; i < struct_type->length; i++) {
1668 if (strcmp(struct_type->fields.structure[i].name, ir->field) == 0)
1669 break;
1670 offset += type_size(struct_type->fields.structure[i].type);
1671 }
1672
1673 /* If the type is smaller than a vec4, replicate the last channel out. */
1674 if (ir->type->is_scalar() || ir->type->is_vector())
1675 this->result.swizzle = swizzle_for_size(ir->type->vector_elements);
1676 else
1677 this->result.swizzle = SWIZZLE_NOOP;
1678
1679 this->result.index += offset;
1680 }
1681
1682 /**
1683 * We want to be careful in assignment setup to hit the actual storage
1684 * instead of potentially using a temporary like we might with the
1685 * ir_dereference handler.
1686 */
1687 static dst_reg
1688 get_assignment_lhs(ir_dereference *ir, ir_to_mesa_visitor *v)
1689 {
1690 /* The LHS must be a dereference. If the LHS is a variable indexed array
1691 * access of a vector, it must be separated into a series conditional moves
1692 * before reaching this point (see ir_vec_index_to_cond_assign).
1693 */
1694 assert(ir->as_dereference());
1695 ir_dereference_array *deref_array = ir->as_dereference_array();
1696 if (deref_array) {
1697 assert(!deref_array->array->type->is_vector());
1698 }
1699
1700 /* Use the rvalue deref handler for the most part. We'll ignore
1701 * swizzles in it and write swizzles using writemask, though.
1702 */
1703 ir->accept(v);
1704 return dst_reg(v->result);
1705 }
1706
1707 /**
1708 * Process the condition of a conditional assignment
1709 *
1710 * Examines the condition of a conditional assignment to generate the optimal
1711 * first operand of a \c CMP instruction. If the condition is a relational
1712 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1713 * used as the source for the \c CMP instruction. Otherwise the comparison
1714 * is processed to a boolean result, and the boolean result is used as the
1715 * operand to the CMP instruction.
1716 */
1717 bool
1718 ir_to_mesa_visitor::process_move_condition(ir_rvalue *ir)
1719 {
1720 ir_rvalue *src_ir = ir;
1721 bool negate = true;
1722 bool switch_order = false;
1723
1724 ir_expression *const expr = ir->as_expression();
1725 if ((expr != NULL) && (expr->get_num_operands() == 2)) {
1726 bool zero_on_left = false;
1727
1728 if (expr->operands[0]->is_zero()) {
1729 src_ir = expr->operands[1];
1730 zero_on_left = true;
1731 } else if (expr->operands[1]->is_zero()) {
1732 src_ir = expr->operands[0];
1733 zero_on_left = false;
1734 }
1735
1736 /* a is - 0 + - 0 +
1737 * (a < 0) T F F ( a < 0) T F F
1738 * (0 < a) F F T (-a < 0) F F T
1739 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1740 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1741 * (a > 0) F F T (-a < 0) F F T
1742 * (0 > a) T F F ( a < 0) T F F
1743 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1744 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1745 *
1746 * Note that exchanging the order of 0 and 'a' in the comparison simply
1747 * means that the value of 'a' should be negated.
1748 */
1749 if (src_ir != ir) {
1750 switch (expr->operation) {
1751 case ir_binop_less:
1752 switch_order = false;
1753 negate = zero_on_left;
1754 break;
1755
1756 case ir_binop_greater:
1757 switch_order = false;
1758 negate = !zero_on_left;
1759 break;
1760
1761 case ir_binop_lequal:
1762 switch_order = true;
1763 negate = !zero_on_left;
1764 break;
1765
1766 case ir_binop_gequal:
1767 switch_order = true;
1768 negate = zero_on_left;
1769 break;
1770
1771 default:
1772 /* This isn't the right kind of comparison afterall, so make sure
1773 * the whole condition is visited.
1774 */
1775 src_ir = ir;
1776 break;
1777 }
1778 }
1779 }
1780
1781 src_ir->accept(this);
1782
1783 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1784 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1785 * choose which value OPCODE_CMP produces without an extra instruction
1786 * computing the condition.
1787 */
1788 if (negate)
1789 this->result.negate = ~this->result.negate;
1790
1791 return switch_order;
1792 }
1793
1794 void
1795 ir_to_mesa_visitor::visit(ir_assignment *ir)
1796 {
1797 dst_reg l;
1798 src_reg r;
1799 int i;
1800
1801 ir->rhs->accept(this);
1802 r = this->result;
1803
1804 l = get_assignment_lhs(ir->lhs, this);
1805
1806 /* FINISHME: This should really set to the correct maximal writemask for each
1807 * FINISHME: component written (in the loops below). This case can only
1808 * FINISHME: occur for matrices, arrays, and structures.
1809 */
1810 if (ir->write_mask == 0) {
1811 assert(!ir->lhs->type->is_scalar() && !ir->lhs->type->is_vector());
1812 l.writemask = WRITEMASK_XYZW;
1813 } else if (ir->lhs->type->is_scalar()) {
1814 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1815 * FINISHME: W component of fragment shader output zero, work correctly.
1816 */
1817 l.writemask = WRITEMASK_XYZW;
1818 } else {
1819 int swizzles[4];
1820 int first_enabled_chan = 0;
1821 int rhs_chan = 0;
1822
1823 assert(ir->lhs->type->is_vector());
1824 l.writemask = ir->write_mask;
1825
1826 for (int i = 0; i < 4; i++) {
1827 if (l.writemask & (1 << i)) {
1828 first_enabled_chan = GET_SWZ(r.swizzle, i);
1829 break;
1830 }
1831 }
1832
1833 /* Swizzle a small RHS vector into the channels being written.
1834 *
1835 * glsl ir treats write_mask as dictating how many channels are
1836 * present on the RHS while Mesa IR treats write_mask as just
1837 * showing which channels of the vec4 RHS get written.
1838 */
1839 for (int i = 0; i < 4; i++) {
1840 if (l.writemask & (1 << i))
1841 swizzles[i] = GET_SWZ(r.swizzle, rhs_chan++);
1842 else
1843 swizzles[i] = first_enabled_chan;
1844 }
1845 r.swizzle = MAKE_SWIZZLE4(swizzles[0], swizzles[1],
1846 swizzles[2], swizzles[3]);
1847 }
1848
1849 assert(l.file != PROGRAM_UNDEFINED);
1850 assert(r.file != PROGRAM_UNDEFINED);
1851
1852 if (ir->condition) {
1853 const bool switch_order = this->process_move_condition(ir->condition);
1854 src_reg condition = this->result;
1855
1856 for (i = 0; i < type_size(ir->lhs->type); i++) {
1857 if (switch_order) {
1858 emit(ir, OPCODE_CMP, l, condition, src_reg(l), r);
1859 } else {
1860 emit(ir, OPCODE_CMP, l, condition, r, src_reg(l));
1861 }
1862
1863 l.index++;
1864 r.index++;
1865 }
1866 } else {
1867 for (i = 0; i < type_size(ir->lhs->type); i++) {
1868 emit(ir, OPCODE_MOV, l, r);
1869 l.index++;
1870 r.index++;
1871 }
1872 }
1873 }
1874
1875
1876 void
1877 ir_to_mesa_visitor::visit(ir_constant *ir)
1878 {
1879 src_reg src;
1880 GLfloat stack_vals[4] = { 0 };
1881 GLfloat *values = stack_vals;
1882 unsigned int i;
1883
1884 /* Unfortunately, 4 floats is all we can get into
1885 * _mesa_add_unnamed_constant. So, make a temp to store an
1886 * aggregate constant and move each constant value into it. If we
1887 * get lucky, copy propagation will eliminate the extra moves.
1888 */
1889
1890 if (ir->type->base_type == GLSL_TYPE_STRUCT) {
1891 src_reg temp_base = get_temp(ir->type);
1892 dst_reg temp = dst_reg(temp_base);
1893
1894 foreach_iter(exec_list_iterator, iter, ir->components) {
1895 ir_constant *field_value = (ir_constant *)iter.get();
1896 int size = type_size(field_value->type);
1897
1898 assert(size > 0);
1899
1900 field_value->accept(this);
1901 src = this->result;
1902
1903 for (i = 0; i < (unsigned int)size; i++) {
1904 emit(ir, OPCODE_MOV, temp, src);
1905
1906 src.index++;
1907 temp.index++;
1908 }
1909 }
1910 this->result = temp_base;
1911 return;
1912 }
1913
1914 if (ir->type->is_array()) {
1915 src_reg temp_base = get_temp(ir->type);
1916 dst_reg temp = dst_reg(temp_base);
1917 int size = type_size(ir->type->fields.array);
1918
1919 assert(size > 0);
1920
1921 for (i = 0; i < ir->type->length; i++) {
1922 ir->array_elements[i]->accept(this);
1923 src = this->result;
1924 for (int j = 0; j < size; j++) {
1925 emit(ir, OPCODE_MOV, temp, src);
1926
1927 src.index++;
1928 temp.index++;
1929 }
1930 }
1931 this->result = temp_base;
1932 return;
1933 }
1934
1935 if (ir->type->is_matrix()) {
1936 src_reg mat = get_temp(ir->type);
1937 dst_reg mat_column = dst_reg(mat);
1938
1939 for (i = 0; i < ir->type->matrix_columns; i++) {
1940 assert(ir->type->base_type == GLSL_TYPE_FLOAT);
1941 values = &ir->value.f[i * ir->type->vector_elements];
1942
1943 src = src_reg(PROGRAM_CONSTANT, -1, NULL);
1944 src.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1945 (gl_constant_value *) values,
1946 ir->type->vector_elements,
1947 &src.swizzle);
1948 emit(ir, OPCODE_MOV, mat_column, src);
1949
1950 mat_column.index++;
1951 }
1952
1953 this->result = mat;
1954 return;
1955 }
1956
1957 src.file = PROGRAM_CONSTANT;
1958 switch (ir->type->base_type) {
1959 case GLSL_TYPE_FLOAT:
1960 values = &ir->value.f[0];
1961 break;
1962 case GLSL_TYPE_UINT:
1963 for (i = 0; i < ir->type->vector_elements; i++) {
1964 values[i] = ir->value.u[i];
1965 }
1966 break;
1967 case GLSL_TYPE_INT:
1968 for (i = 0; i < ir->type->vector_elements; i++) {
1969 values[i] = ir->value.i[i];
1970 }
1971 break;
1972 case GLSL_TYPE_BOOL:
1973 for (i = 0; i < ir->type->vector_elements; i++) {
1974 values[i] = ir->value.b[i];
1975 }
1976 break;
1977 default:
1978 assert(!"Non-float/uint/int/bool constant");
1979 }
1980
1981 this->result = src_reg(PROGRAM_CONSTANT, -1, ir->type);
1982 this->result.index = _mesa_add_unnamed_constant(this->prog->Parameters,
1983 (gl_constant_value *) values,
1984 ir->type->vector_elements,
1985 &this->result.swizzle);
1986 }
1987
1988 function_entry *
1989 ir_to_mesa_visitor::get_function_signature(ir_function_signature *sig)
1990 {
1991 function_entry *entry;
1992
1993 foreach_iter(exec_list_iterator, iter, this->function_signatures) {
1994 entry = (function_entry *)iter.get();
1995
1996 if (entry->sig == sig)
1997 return entry;
1998 }
1999
2000 entry = ralloc(mem_ctx, function_entry);
2001 entry->sig = sig;
2002 entry->sig_id = this->next_signature_id++;
2003 entry->bgn_inst = NULL;
2004
2005 /* Allocate storage for all the parameters. */
2006 foreach_iter(exec_list_iterator, iter, sig->parameters) {
2007 ir_variable *param = (ir_variable *)iter.get();
2008 variable_storage *storage;
2009
2010 storage = find_variable_storage(param);
2011 assert(!storage);
2012
2013 storage = new(mem_ctx) variable_storage(param, PROGRAM_TEMPORARY,
2014 this->next_temp);
2015 this->variables.push_tail(storage);
2016
2017 this->next_temp += type_size(param->type);
2018 }
2019
2020 if (!sig->return_type->is_void()) {
2021 entry->return_reg = get_temp(sig->return_type);
2022 } else {
2023 entry->return_reg = undef_src;
2024 }
2025
2026 this->function_signatures.push_tail(entry);
2027 return entry;
2028 }
2029
2030 void
2031 ir_to_mesa_visitor::visit(ir_call *ir)
2032 {
2033 ir_to_mesa_instruction *call_inst;
2034 ir_function_signature *sig = ir->get_callee();
2035 function_entry *entry = get_function_signature(sig);
2036 int i;
2037
2038 /* Process in parameters. */
2039 exec_list_iterator sig_iter = sig->parameters.iterator();
2040 foreach_iter(exec_list_iterator, iter, *ir) {
2041 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2042 ir_variable *param = (ir_variable *)sig_iter.get();
2043
2044 if (param->mode == ir_var_in ||
2045 param->mode == ir_var_inout) {
2046 variable_storage *storage = find_variable_storage(param);
2047 assert(storage);
2048
2049 param_rval->accept(this);
2050 src_reg r = this->result;
2051
2052 dst_reg l;
2053 l.file = storage->file;
2054 l.index = storage->index;
2055 l.reladdr = NULL;
2056 l.writemask = WRITEMASK_XYZW;
2057 l.cond_mask = COND_TR;
2058
2059 for (i = 0; i < type_size(param->type); i++) {
2060 emit(ir, OPCODE_MOV, l, r);
2061 l.index++;
2062 r.index++;
2063 }
2064 }
2065
2066 sig_iter.next();
2067 }
2068 assert(!sig_iter.has_next());
2069
2070 /* Emit call instruction */
2071 call_inst = emit(ir, OPCODE_CAL);
2072 call_inst->function = entry;
2073
2074 /* Process out parameters. */
2075 sig_iter = sig->parameters.iterator();
2076 foreach_iter(exec_list_iterator, iter, *ir) {
2077 ir_rvalue *param_rval = (ir_rvalue *)iter.get();
2078 ir_variable *param = (ir_variable *)sig_iter.get();
2079
2080 if (param->mode == ir_var_out ||
2081 param->mode == ir_var_inout) {
2082 variable_storage *storage = find_variable_storage(param);
2083 assert(storage);
2084
2085 src_reg r;
2086 r.file = storage->file;
2087 r.index = storage->index;
2088 r.reladdr = NULL;
2089 r.swizzle = SWIZZLE_NOOP;
2090 r.negate = 0;
2091
2092 param_rval->accept(this);
2093 dst_reg l = dst_reg(this->result);
2094
2095 for (i = 0; i < type_size(param->type); i++) {
2096 emit(ir, OPCODE_MOV, l, r);
2097 l.index++;
2098 r.index++;
2099 }
2100 }
2101
2102 sig_iter.next();
2103 }
2104 assert(!sig_iter.has_next());
2105
2106 /* Process return value. */
2107 this->result = entry->return_reg;
2108 }
2109
2110 void
2111 ir_to_mesa_visitor::visit(ir_texture *ir)
2112 {
2113 src_reg result_src, coord, lod_info, projector, dx, dy;
2114 dst_reg result_dst, coord_dst;
2115 ir_to_mesa_instruction *inst = NULL;
2116 prog_opcode opcode = OPCODE_NOP;
2117
2118 if (ir->op == ir_txs)
2119 this->result = src_reg_for_float(0.0);
2120 else
2121 ir->coordinate->accept(this);
2122
2123 /* Put our coords in a temp. We'll need to modify them for shadow,
2124 * projection, or LOD, so the only case we'd use it as is is if
2125 * we're doing plain old texturing. Mesa IR optimization should
2126 * handle cleaning up our mess in that case.
2127 */
2128 coord = get_temp(glsl_type::vec4_type);
2129 coord_dst = dst_reg(coord);
2130 emit(ir, OPCODE_MOV, coord_dst, this->result);
2131
2132 if (ir->projector) {
2133 ir->projector->accept(this);
2134 projector = this->result;
2135 }
2136
2137 /* Storage for our result. Ideally for an assignment we'd be using
2138 * the actual storage for the result here, instead.
2139 */
2140 result_src = get_temp(glsl_type::vec4_type);
2141 result_dst = dst_reg(result_src);
2142
2143 switch (ir->op) {
2144 case ir_tex:
2145 case ir_txs:
2146 opcode = OPCODE_TEX;
2147 break;
2148 case ir_txb:
2149 opcode = OPCODE_TXB;
2150 ir->lod_info.bias->accept(this);
2151 lod_info = this->result;
2152 break;
2153 case ir_txf:
2154 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2155 case ir_txl:
2156 opcode = OPCODE_TXL;
2157 ir->lod_info.lod->accept(this);
2158 lod_info = this->result;
2159 break;
2160 case ir_txd:
2161 opcode = OPCODE_TXD;
2162 ir->lod_info.grad.dPdx->accept(this);
2163 dx = this->result;
2164 ir->lod_info.grad.dPdy->accept(this);
2165 dy = this->result;
2166 break;
2167 }
2168
2169 const glsl_type *sampler_type = ir->sampler->type;
2170
2171 if (ir->projector) {
2172 if (opcode == OPCODE_TEX) {
2173 /* Slot the projector in as the last component of the coord. */
2174 coord_dst.writemask = WRITEMASK_W;
2175 emit(ir, OPCODE_MOV, coord_dst, projector);
2176 coord_dst.writemask = WRITEMASK_XYZW;
2177 opcode = OPCODE_TXP;
2178 } else {
2179 src_reg coord_w = coord;
2180 coord_w.swizzle = SWIZZLE_WWWW;
2181
2182 /* For the other TEX opcodes there's no projective version
2183 * since the last slot is taken up by lod info. Do the
2184 * projective divide now.
2185 */
2186 coord_dst.writemask = WRITEMASK_W;
2187 emit(ir, OPCODE_RCP, coord_dst, projector);
2188
2189 /* In the case where we have to project the coordinates "by hand,"
2190 * the shadow comparitor value must also be projected.
2191 */
2192 src_reg tmp_src = coord;
2193 if (ir->shadow_comparitor) {
2194 /* Slot the shadow value in as the second to last component of the
2195 * coord.
2196 */
2197 ir->shadow_comparitor->accept(this);
2198
2199 tmp_src = get_temp(glsl_type::vec4_type);
2200 dst_reg tmp_dst = dst_reg(tmp_src);
2201
2202 /* Projective division not allowed for array samplers. */
2203 assert(!sampler_type->sampler_array);
2204
2205 tmp_dst.writemask = WRITEMASK_Z;
2206 emit(ir, OPCODE_MOV, tmp_dst, this->result);
2207
2208 tmp_dst.writemask = WRITEMASK_XY;
2209 emit(ir, OPCODE_MOV, tmp_dst, coord);
2210 }
2211
2212 coord_dst.writemask = WRITEMASK_XYZ;
2213 emit(ir, OPCODE_MUL, coord_dst, tmp_src, coord_w);
2214
2215 coord_dst.writemask = WRITEMASK_XYZW;
2216 coord.swizzle = SWIZZLE_XYZW;
2217 }
2218 }
2219
2220 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2221 * comparitor was put in the correct place (and projected) by the code,
2222 * above, that handles by-hand projection.
2223 */
2224 if (ir->shadow_comparitor && (!ir->projector || opcode == OPCODE_TXP)) {
2225 /* Slot the shadow value in as the second to last component of the
2226 * coord.
2227 */
2228 ir->shadow_comparitor->accept(this);
2229
2230 /* XXX This will need to be updated for cubemap array samplers. */
2231 if (sampler_type->sampler_dimensionality == GLSL_SAMPLER_DIM_2D &&
2232 sampler_type->sampler_array) {
2233 coord_dst.writemask = WRITEMASK_W;
2234 } else {
2235 coord_dst.writemask = WRITEMASK_Z;
2236 }
2237
2238 emit(ir, OPCODE_MOV, coord_dst, this->result);
2239 coord_dst.writemask = WRITEMASK_XYZW;
2240 }
2241
2242 if (opcode == OPCODE_TXL || opcode == OPCODE_TXB) {
2243 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2244 coord_dst.writemask = WRITEMASK_W;
2245 emit(ir, OPCODE_MOV, coord_dst, lod_info);
2246 coord_dst.writemask = WRITEMASK_XYZW;
2247 }
2248
2249 if (opcode == OPCODE_TXD)
2250 inst = emit(ir, opcode, result_dst, coord, dx, dy);
2251 else
2252 inst = emit(ir, opcode, result_dst, coord);
2253
2254 if (ir->shadow_comparitor)
2255 inst->tex_shadow = GL_TRUE;
2256
2257 inst->sampler = _mesa_get_sampler_uniform_value(ir->sampler,
2258 this->shader_program,
2259 this->prog);
2260
2261 switch (sampler_type->sampler_dimensionality) {
2262 case GLSL_SAMPLER_DIM_1D:
2263 inst->tex_target = (sampler_type->sampler_array)
2264 ? TEXTURE_1D_ARRAY_INDEX : TEXTURE_1D_INDEX;
2265 break;
2266 case GLSL_SAMPLER_DIM_2D:
2267 inst->tex_target = (sampler_type->sampler_array)
2268 ? TEXTURE_2D_ARRAY_INDEX : TEXTURE_2D_INDEX;
2269 break;
2270 case GLSL_SAMPLER_DIM_3D:
2271 inst->tex_target = TEXTURE_3D_INDEX;
2272 break;
2273 case GLSL_SAMPLER_DIM_CUBE:
2274 inst->tex_target = TEXTURE_CUBE_INDEX;
2275 break;
2276 case GLSL_SAMPLER_DIM_RECT:
2277 inst->tex_target = TEXTURE_RECT_INDEX;
2278 break;
2279 case GLSL_SAMPLER_DIM_BUF:
2280 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2281 break;
2282 default:
2283 assert(!"Should not get here.");
2284 }
2285
2286 this->result = result_src;
2287 }
2288
2289 void
2290 ir_to_mesa_visitor::visit(ir_return *ir)
2291 {
2292 if (ir->get_value()) {
2293 dst_reg l;
2294 int i;
2295
2296 assert(current_function);
2297
2298 ir->get_value()->accept(this);
2299 src_reg r = this->result;
2300
2301 l = dst_reg(current_function->return_reg);
2302
2303 for (i = 0; i < type_size(current_function->sig->return_type); i++) {
2304 emit(ir, OPCODE_MOV, l, r);
2305 l.index++;
2306 r.index++;
2307 }
2308 }
2309
2310 emit(ir, OPCODE_RET);
2311 }
2312
2313 void
2314 ir_to_mesa_visitor::visit(ir_discard *ir)
2315 {
2316 struct gl_fragment_program *fp = (struct gl_fragment_program *)this->prog;
2317
2318 if (ir->condition) {
2319 ir->condition->accept(this);
2320 this->result.negate = ~this->result.negate;
2321 emit(ir, OPCODE_KIL, undef_dst, this->result);
2322 } else {
2323 emit(ir, OPCODE_KIL_NV);
2324 }
2325
2326 fp->UsesKill = GL_TRUE;
2327 }
2328
2329 void
2330 ir_to_mesa_visitor::visit(ir_if *ir)
2331 {
2332 ir_to_mesa_instruction *cond_inst, *if_inst;
2333 ir_to_mesa_instruction *prev_inst;
2334
2335 prev_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
2336
2337 ir->condition->accept(this);
2338 assert(this->result.file != PROGRAM_UNDEFINED);
2339
2340 if (this->options->EmitCondCodes) {
2341 cond_inst = (ir_to_mesa_instruction *)this->instructions.get_tail();
2342
2343 /* See if we actually generated any instruction for generating
2344 * the condition. If not, then cook up a move to a temp so we
2345 * have something to set cond_update on.
2346 */
2347 if (cond_inst == prev_inst) {
2348 src_reg temp = get_temp(glsl_type::bool_type);
2349 cond_inst = emit(ir->condition, OPCODE_MOV, dst_reg(temp), result);
2350 }
2351 cond_inst->cond_update = GL_TRUE;
2352
2353 if_inst = emit(ir->condition, OPCODE_IF);
2354 if_inst->dst.cond_mask = COND_NE;
2355 } else {
2356 if_inst = emit(ir->condition, OPCODE_IF, undef_dst, this->result);
2357 }
2358
2359 this->instructions.push_tail(if_inst);
2360
2361 visit_exec_list(&ir->then_instructions, this);
2362
2363 if (!ir->else_instructions.is_empty()) {
2364 emit(ir->condition, OPCODE_ELSE);
2365 visit_exec_list(&ir->else_instructions, this);
2366 }
2367
2368 if_inst = emit(ir->condition, OPCODE_ENDIF);
2369 }
2370
2371 ir_to_mesa_visitor::ir_to_mesa_visitor()
2372 {
2373 result.file = PROGRAM_UNDEFINED;
2374 next_temp = 1;
2375 next_signature_id = 1;
2376 current_function = NULL;
2377 mem_ctx = ralloc_context(NULL);
2378 }
2379
2380 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2381 {
2382 ralloc_free(mem_ctx);
2383 }
2384
2385 static struct prog_src_register
2386 mesa_src_reg_from_ir_src_reg(src_reg reg)
2387 {
2388 struct prog_src_register mesa_reg;
2389
2390 mesa_reg.File = reg.file;
2391 assert(reg.index < (1 << INST_INDEX_BITS));
2392 mesa_reg.Index = reg.index;
2393 mesa_reg.Swizzle = reg.swizzle;
2394 mesa_reg.RelAddr = reg.reladdr != NULL;
2395 mesa_reg.Negate = reg.negate;
2396 mesa_reg.Abs = 0;
2397 mesa_reg.HasIndex2 = GL_FALSE;
2398 mesa_reg.RelAddr2 = 0;
2399 mesa_reg.Index2 = 0;
2400
2401 return mesa_reg;
2402 }
2403
2404 static void
2405 set_branchtargets(ir_to_mesa_visitor *v,
2406 struct prog_instruction *mesa_instructions,
2407 int num_instructions)
2408 {
2409 int if_count = 0, loop_count = 0;
2410 int *if_stack, *loop_stack;
2411 int if_stack_pos = 0, loop_stack_pos = 0;
2412 int i, j;
2413
2414 for (i = 0; i < num_instructions; i++) {
2415 switch (mesa_instructions[i].Opcode) {
2416 case OPCODE_IF:
2417 if_count++;
2418 break;
2419 case OPCODE_BGNLOOP:
2420 loop_count++;
2421 break;
2422 case OPCODE_BRK:
2423 case OPCODE_CONT:
2424 mesa_instructions[i].BranchTarget = -1;
2425 break;
2426 default:
2427 break;
2428 }
2429 }
2430
2431 if_stack = rzalloc_array(v->mem_ctx, int, if_count);
2432 loop_stack = rzalloc_array(v->mem_ctx, int, loop_count);
2433
2434 for (i = 0; i < num_instructions; i++) {
2435 switch (mesa_instructions[i].Opcode) {
2436 case OPCODE_IF:
2437 if_stack[if_stack_pos] = i;
2438 if_stack_pos++;
2439 break;
2440 case OPCODE_ELSE:
2441 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2442 if_stack[if_stack_pos - 1] = i;
2443 break;
2444 case OPCODE_ENDIF:
2445 mesa_instructions[if_stack[if_stack_pos - 1]].BranchTarget = i;
2446 if_stack_pos--;
2447 break;
2448 case OPCODE_BGNLOOP:
2449 loop_stack[loop_stack_pos] = i;
2450 loop_stack_pos++;
2451 break;
2452 case OPCODE_ENDLOOP:
2453 loop_stack_pos--;
2454 /* Rewrite any breaks/conts at this nesting level (haven't
2455 * already had a BranchTarget assigned) to point to the end
2456 * of the loop.
2457 */
2458 for (j = loop_stack[loop_stack_pos]; j < i; j++) {
2459 if (mesa_instructions[j].Opcode == OPCODE_BRK ||
2460 mesa_instructions[j].Opcode == OPCODE_CONT) {
2461 if (mesa_instructions[j].BranchTarget == -1) {
2462 mesa_instructions[j].BranchTarget = i;
2463 }
2464 }
2465 }
2466 /* The loop ends point at each other. */
2467 mesa_instructions[i].BranchTarget = loop_stack[loop_stack_pos];
2468 mesa_instructions[loop_stack[loop_stack_pos]].BranchTarget = i;
2469 break;
2470 case OPCODE_CAL:
2471 foreach_iter(exec_list_iterator, iter, v->function_signatures) {
2472 function_entry *entry = (function_entry *)iter.get();
2473
2474 if (entry->sig_id == mesa_instructions[i].BranchTarget) {
2475 mesa_instructions[i].BranchTarget = entry->inst;
2476 break;
2477 }
2478 }
2479 break;
2480 default:
2481 break;
2482 }
2483 }
2484 }
2485
2486 static void
2487 print_program(struct prog_instruction *mesa_instructions,
2488 ir_instruction **mesa_instruction_annotation,
2489 int num_instructions)
2490 {
2491 ir_instruction *last_ir = NULL;
2492 int i;
2493 int indent = 0;
2494
2495 for (i = 0; i < num_instructions; i++) {
2496 struct prog_instruction *mesa_inst = mesa_instructions + i;
2497 ir_instruction *ir = mesa_instruction_annotation[i];
2498
2499 fprintf(stdout, "%3d: ", i);
2500
2501 if (last_ir != ir && ir) {
2502 int j;
2503
2504 for (j = 0; j < indent; j++) {
2505 fprintf(stdout, " ");
2506 }
2507 ir->print();
2508 printf("\n");
2509 last_ir = ir;
2510
2511 fprintf(stdout, " "); /* line number spacing. */
2512 }
2513
2514 indent = _mesa_fprint_instruction_opt(stdout, mesa_inst, indent,
2515 PROG_PRINT_DEBUG, NULL);
2516 }
2517 }
2518
2519
2520 /**
2521 * Count resources used by the given gpu program (number of texture
2522 * samplers, etc).
2523 */
2524 static void
2525 count_resources(struct gl_program *prog)
2526 {
2527 unsigned int i;
2528
2529 prog->SamplersUsed = 0;
2530
2531 for (i = 0; i < prog->NumInstructions; i++) {
2532 struct prog_instruction *inst = &prog->Instructions[i];
2533
2534 if (_mesa_is_tex_instruction(inst->Opcode)) {
2535 prog->SamplerTargets[inst->TexSrcUnit] =
2536 (gl_texture_index)inst->TexSrcTarget;
2537 prog->SamplersUsed |= 1 << inst->TexSrcUnit;
2538 if (inst->TexShadow) {
2539 prog->ShadowSamplers |= 1 << inst->TexSrcUnit;
2540 }
2541 }
2542 }
2543
2544 _mesa_update_shader_textures_used(prog);
2545 }
2546
2547
2548 /**
2549 * Check if the given vertex/fragment/shader program is within the
2550 * resource limits of the context (number of texture units, etc).
2551 * If any of those checks fail, record a linker error.
2552 *
2553 * XXX more checks are needed...
2554 */
2555 static void
2556 check_resources(const struct gl_context *ctx,
2557 struct gl_shader_program *shader_program,
2558 struct gl_program *prog)
2559 {
2560 switch (prog->Target) {
2561 case GL_VERTEX_PROGRAM_ARB:
2562 if (_mesa_bitcount(prog->SamplersUsed) >
2563 ctx->Const.MaxVertexTextureImageUnits) {
2564 linker_error(shader_program,
2565 "Too many vertex shader texture samplers");
2566 }
2567 if (prog->Parameters->NumParameters > MAX_UNIFORMS) {
2568 linker_error(shader_program, "Too many vertex shader constants");
2569 }
2570 break;
2571 case MESA_GEOMETRY_PROGRAM:
2572 if (_mesa_bitcount(prog->SamplersUsed) >
2573 ctx->Const.MaxGeometryTextureImageUnits) {
2574 linker_error(shader_program,
2575 "Too many geometry shader texture samplers");
2576 }
2577 if (prog->Parameters->NumParameters >
2578 MAX_GEOMETRY_UNIFORM_COMPONENTS / 4) {
2579 linker_error(shader_program, "Too many geometry shader constants");
2580 }
2581 break;
2582 case GL_FRAGMENT_PROGRAM_ARB:
2583 if (_mesa_bitcount(prog->SamplersUsed) >
2584 ctx->Const.MaxTextureImageUnits) {
2585 linker_error(shader_program,
2586 "Too many fragment shader texture samplers");
2587 }
2588 if (prog->Parameters->NumParameters > MAX_UNIFORMS) {
2589 linker_error(shader_program, "Too many fragment shader constants");
2590 }
2591 break;
2592 default:
2593 _mesa_problem(ctx, "unexpected program type in check_resources()");
2594 }
2595 }
2596
2597
2598
2599 struct uniform_sort {
2600 struct gl_uniform *u;
2601 int pos;
2602 };
2603
2604 /* The shader_program->Uniforms list is almost sorted in increasing
2605 * uniform->{Frag,Vert}Pos locations, but not quite when there are
2606 * uniforms shared between targets. We need to add parameters in
2607 * increasing order for the targets.
2608 */
2609 static int
2610 sort_uniforms(const void *a, const void *b)
2611 {
2612 struct uniform_sort *u1 = (struct uniform_sort *)a;
2613 struct uniform_sort *u2 = (struct uniform_sort *)b;
2614
2615 return u1->pos - u2->pos;
2616 }
2617
2618 /* Add the uniforms to the parameters. The linker chose locations
2619 * in our parameters lists (which weren't created yet), which the
2620 * uniforms code will use to poke values into our parameters list
2621 * when uniforms are updated.
2622 */
2623 static void
2624 add_uniforms_to_parameters_list(struct gl_shader_program *shader_program,
2625 struct gl_shader *shader,
2626 struct gl_program *prog)
2627 {
2628 unsigned int i;
2629 unsigned int next_sampler = 0, num_uniforms = 0;
2630 struct uniform_sort *sorted_uniforms;
2631
2632 sorted_uniforms = ralloc_array(NULL, struct uniform_sort,
2633 shader_program->Uniforms->NumUniforms);
2634
2635 for (i = 0; i < shader_program->Uniforms->NumUniforms; i++) {
2636 struct gl_uniform *uniform = shader_program->Uniforms->Uniforms + i;
2637 int parameter_index = -1;
2638
2639 switch (shader->Type) {
2640 case GL_VERTEX_SHADER:
2641 parameter_index = uniform->VertPos;
2642 break;
2643 case GL_FRAGMENT_SHADER:
2644 parameter_index = uniform->FragPos;
2645 break;
2646 case GL_GEOMETRY_SHADER:
2647 parameter_index = uniform->GeomPos;
2648 break;
2649 }
2650
2651 /* Only add uniforms used in our target. */
2652 if (parameter_index != -1) {
2653 sorted_uniforms[num_uniforms].pos = parameter_index;
2654 sorted_uniforms[num_uniforms].u = uniform;
2655 num_uniforms++;
2656 }
2657 }
2658
2659 qsort(sorted_uniforms, num_uniforms, sizeof(struct uniform_sort),
2660 sort_uniforms);
2661
2662 for (i = 0; i < num_uniforms; i++) {
2663 struct gl_uniform *uniform = sorted_uniforms[i].u;
2664 int parameter_index = sorted_uniforms[i].pos;
2665 const glsl_type *type = uniform->Type;
2666 unsigned int size;
2667
2668 if (type->is_vector() ||
2669 type->is_scalar()) {
2670 size = type->vector_elements;
2671 } else {
2672 size = type_size(type) * 4;
2673 }
2674
2675 gl_register_file file;
2676 if (type->is_sampler() ||
2677 (type->is_array() && type->fields.array->is_sampler())) {
2678 file = PROGRAM_SAMPLER;
2679 } else {
2680 file = PROGRAM_UNIFORM;
2681 }
2682
2683 GLint index = _mesa_lookup_parameter_index(prog->Parameters, -1,
2684 uniform->Name);
2685
2686 if (index < 0) {
2687 index = _mesa_add_parameter(prog->Parameters, file,
2688 uniform->Name, size, type->gl_type,
2689 NULL, NULL, 0x0);
2690
2691 /* Sampler uniform values are stored in prog->SamplerUnits,
2692 * and the entry in that array is selected by this index we
2693 * store in ParameterValues[].
2694 */
2695 if (file == PROGRAM_SAMPLER) {
2696 for (unsigned int j = 0; j < size / 4; j++)
2697 prog->Parameters->ParameterValues[index + j][0].f = next_sampler++;
2698 }
2699
2700 /* The location chosen in the Parameters list here (returned
2701 * from _mesa_add_uniform) has to match what the linker chose.
2702 */
2703 if (index != parameter_index) {
2704 linker_error(shader_program,
2705 "Allocation of uniform `%s' to target failed "
2706 "(%d vs %d)\n",
2707 uniform->Name, index, parameter_index);
2708 }
2709 }
2710 }
2711
2712 ralloc_free(sorted_uniforms);
2713 }
2714
2715 static void
2716 set_uniform_initializer(struct gl_context *ctx, void *mem_ctx,
2717 struct gl_shader_program *shader_program,
2718 const char *name, const glsl_type *type,
2719 ir_constant *val)
2720 {
2721 if (type->is_record()) {
2722 ir_constant *field_constant;
2723
2724 field_constant = (ir_constant *)val->components.get_head();
2725
2726 for (unsigned int i = 0; i < type->length; i++) {
2727 const glsl_type *field_type = type->fields.structure[i].type;
2728 const char *field_name = ralloc_asprintf(mem_ctx, "%s.%s", name,
2729 type->fields.structure[i].name);
2730 set_uniform_initializer(ctx, mem_ctx, shader_program, field_name,
2731 field_type, field_constant);
2732 field_constant = (ir_constant *)field_constant->next;
2733 }
2734 return;
2735 }
2736
2737 int loc = _mesa_get_uniform_location(ctx, shader_program, name);
2738
2739 if (loc == -1) {
2740 linker_error(shader_program,
2741 "Couldn't find uniform for initializer %s\n", name);
2742 return;
2743 }
2744
2745 for (unsigned int i = 0; i < (type->is_array() ? type->length : 1); i++) {
2746 ir_constant *element;
2747 const glsl_type *element_type;
2748 if (type->is_array()) {
2749 element = val->array_elements[i];
2750 element_type = type->fields.array;
2751 } else {
2752 element = val;
2753 element_type = type;
2754 }
2755
2756 void *values;
2757
2758 if (element_type->base_type == GLSL_TYPE_BOOL) {
2759 int *conv = ralloc_array(mem_ctx, int, element_type->components());
2760 for (unsigned int j = 0; j < element_type->components(); j++) {
2761 conv[j] = element->value.b[j];
2762 }
2763 values = (void *)conv;
2764 element_type = glsl_type::get_instance(GLSL_TYPE_INT,
2765 element_type->vector_elements,
2766 1);
2767 } else {
2768 values = &element->value;
2769 }
2770
2771 if (element_type->is_matrix()) {
2772 _mesa_uniform_matrix(ctx, shader_program,
2773 element_type->matrix_columns,
2774 element_type->vector_elements,
2775 loc, 1, GL_FALSE, (GLfloat *)values);
2776 loc += element_type->matrix_columns;
2777 } else {
2778 _mesa_uniform(ctx, shader_program, loc, element_type->matrix_columns,
2779 values, element_type->gl_type);
2780 loc += type_size(element_type);
2781 }
2782 }
2783 }
2784
2785 static void
2786 set_uniform_initializers(struct gl_context *ctx,
2787 struct gl_shader_program *shader_program)
2788 {
2789 void *mem_ctx = NULL;
2790
2791 for (unsigned int i = 0; i < MESA_SHADER_TYPES; i++) {
2792 struct gl_shader *shader = shader_program->_LinkedShaders[i];
2793
2794 if (shader == NULL)
2795 continue;
2796
2797 foreach_iter(exec_list_iterator, iter, *shader->ir) {
2798 ir_instruction *ir = (ir_instruction *)iter.get();
2799 ir_variable *var = ir->as_variable();
2800
2801 if (!var || var->mode != ir_var_uniform || !var->constant_value)
2802 continue;
2803
2804 if (!mem_ctx)
2805 mem_ctx = ralloc_context(NULL);
2806
2807 set_uniform_initializer(ctx, mem_ctx, shader_program, var->name,
2808 var->type, var->constant_value);
2809 }
2810 }
2811
2812 ralloc_free(mem_ctx);
2813 }
2814
2815 /*
2816 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2817 * channels for copy propagation and updates following instructions to
2818 * use the original versions.
2819 *
2820 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2821 * will occur. As an example, a TXP production before this pass:
2822 *
2823 * 0: MOV TEMP[1], INPUT[4].xyyy;
2824 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2825 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2826 *
2827 * and after:
2828 *
2829 * 0: MOV TEMP[1], INPUT[4].xyyy;
2830 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2831 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2832 *
2833 * which allows for dead code elimination on TEMP[1]'s writes.
2834 */
2835 void
2836 ir_to_mesa_visitor::copy_propagate(void)
2837 {
2838 ir_to_mesa_instruction **acp = rzalloc_array(mem_ctx,
2839 ir_to_mesa_instruction *,
2840 this->next_temp * 4);
2841 int *acp_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
2842 int level = 0;
2843
2844 foreach_iter(exec_list_iterator, iter, this->instructions) {
2845 ir_to_mesa_instruction *inst = (ir_to_mesa_instruction *)iter.get();
2846
2847 assert(inst->dst.file != PROGRAM_TEMPORARY
2848 || inst->dst.index < this->next_temp);
2849
2850 /* First, do any copy propagation possible into the src regs. */
2851 for (int r = 0; r < 3; r++) {
2852 ir_to_mesa_instruction *first = NULL;
2853 bool good = true;
2854 int acp_base = inst->src[r].index * 4;
2855
2856 if (inst->src[r].file != PROGRAM_TEMPORARY ||
2857 inst->src[r].reladdr)
2858 continue;
2859
2860 /* See if we can find entries in the ACP consisting of MOVs
2861 * from the same src register for all the swizzled channels
2862 * of this src register reference.
2863 */
2864 for (int i = 0; i < 4; i++) {
2865 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2866 ir_to_mesa_instruction *copy_chan = acp[acp_base + src_chan];
2867
2868 if (!copy_chan) {
2869 good = false;
2870 break;
2871 }
2872
2873 assert(acp_level[acp_base + src_chan] <= level);
2874
2875 if (!first) {
2876 first = copy_chan;
2877 } else {
2878 if (first->src[0].file != copy_chan->src[0].file ||
2879 first->src[0].index != copy_chan->src[0].index) {
2880 good = false;
2881 break;
2882 }
2883 }
2884 }
2885
2886 if (good) {
2887 /* We've now validated that we can copy-propagate to
2888 * replace this src register reference. Do it.
2889 */
2890 inst->src[r].file = first->src[0].file;
2891 inst->src[r].index = first->src[0].index;
2892
2893 int swizzle = 0;
2894 for (int i = 0; i < 4; i++) {
2895 int src_chan = GET_SWZ(inst->src[r].swizzle, i);
2896 ir_to_mesa_instruction *copy_inst = acp[acp_base + src_chan];
2897 swizzle |= (GET_SWZ(copy_inst->src[0].swizzle, src_chan) <<
2898 (3 * i));
2899 }
2900 inst->src[r].swizzle = swizzle;
2901 }
2902 }
2903
2904 switch (inst->op) {
2905 case OPCODE_BGNLOOP:
2906 case OPCODE_ENDLOOP:
2907 /* End of a basic block, clear the ACP entirely. */
2908 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2909 break;
2910
2911 case OPCODE_IF:
2912 ++level;
2913 break;
2914
2915 case OPCODE_ENDIF:
2916 case OPCODE_ELSE:
2917 /* Clear all channels written inside the block from the ACP, but
2918 * leaving those that were not touched.
2919 */
2920 for (int r = 0; r < this->next_temp; r++) {
2921 for (int c = 0; c < 4; c++) {
2922 if (!acp[4 * r + c])
2923 continue;
2924
2925 if (acp_level[4 * r + c] >= level)
2926 acp[4 * r + c] = NULL;
2927 }
2928 }
2929 if (inst->op == OPCODE_ENDIF)
2930 --level;
2931 break;
2932
2933 default:
2934 /* Continuing the block, clear any written channels from
2935 * the ACP.
2936 */
2937 if (inst->dst.file == PROGRAM_TEMPORARY && inst->dst.reladdr) {
2938 /* Any temporary might be written, so no copy propagation
2939 * across this instruction.
2940 */
2941 memset(acp, 0, sizeof(*acp) * this->next_temp * 4);
2942 } else if (inst->dst.file == PROGRAM_OUTPUT &&
2943 inst->dst.reladdr) {
2944 /* Any output might be written, so no copy propagation
2945 * from outputs across this instruction.
2946 */
2947 for (int r = 0; r < this->next_temp; r++) {
2948 for (int c = 0; c < 4; c++) {
2949 if (!acp[4 * r + c])
2950 continue;
2951
2952 if (acp[4 * r + c]->src[0].file == PROGRAM_OUTPUT)
2953 acp[4 * r + c] = NULL;
2954 }
2955 }
2956 } else if (inst->dst.file == PROGRAM_TEMPORARY ||
2957 inst->dst.file == PROGRAM_OUTPUT) {
2958 /* Clear where it's used as dst. */
2959 if (inst->dst.file == PROGRAM_TEMPORARY) {
2960 for (int c = 0; c < 4; c++) {
2961 if (inst->dst.writemask & (1 << c)) {
2962 acp[4 * inst->dst.index + c] = NULL;
2963 }
2964 }
2965 }
2966
2967 /* Clear where it's used as src. */
2968 for (int r = 0; r < this->next_temp; r++) {
2969 for (int c = 0; c < 4; c++) {
2970 if (!acp[4 * r + c])
2971 continue;
2972
2973 int src_chan = GET_SWZ(acp[4 * r + c]->src[0].swizzle, c);
2974
2975 if (acp[4 * r + c]->src[0].file == inst->dst.file &&
2976 acp[4 * r + c]->src[0].index == inst->dst.index &&
2977 inst->dst.writemask & (1 << src_chan))
2978 {
2979 acp[4 * r + c] = NULL;
2980 }
2981 }
2982 }
2983 }
2984 break;
2985 }
2986
2987 /* If this is a copy, add it to the ACP. */
2988 if (inst->op == OPCODE_MOV &&
2989 inst->dst.file == PROGRAM_TEMPORARY &&
2990 !inst->dst.reladdr &&
2991 !inst->saturate &&
2992 !inst->src[0].reladdr &&
2993 !inst->src[0].negate) {
2994 for (int i = 0; i < 4; i++) {
2995 if (inst->dst.writemask & (1 << i)) {
2996 acp[4 * inst->dst.index + i] = inst;
2997 acp_level[4 * inst->dst.index + i] = level;
2998 }
2999 }
3000 }
3001 }
3002
3003 ralloc_free(acp_level);
3004 ralloc_free(acp);
3005 }
3006
3007
3008 /**
3009 * Convert a shader's GLSL IR into a Mesa gl_program.
3010 */
3011 static struct gl_program *
3012 get_mesa_program(struct gl_context *ctx,
3013 struct gl_shader_program *shader_program,
3014 struct gl_shader *shader)
3015 {
3016 ir_to_mesa_visitor v;
3017 struct prog_instruction *mesa_instructions, *mesa_inst;
3018 ir_instruction **mesa_instruction_annotation;
3019 int i;
3020 struct gl_program *prog;
3021 GLenum target;
3022 const char *target_string;
3023 GLboolean progress;
3024 struct gl_shader_compiler_options *options =
3025 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(shader->Type)];
3026
3027 switch (shader->Type) {
3028 case GL_VERTEX_SHADER:
3029 target = GL_VERTEX_PROGRAM_ARB;
3030 target_string = "vertex";
3031 break;
3032 case GL_FRAGMENT_SHADER:
3033 target = GL_FRAGMENT_PROGRAM_ARB;
3034 target_string = "fragment";
3035 break;
3036 case GL_GEOMETRY_SHADER:
3037 target = GL_GEOMETRY_PROGRAM_NV;
3038 target_string = "geometry";
3039 break;
3040 default:
3041 assert(!"should not be reached");
3042 return NULL;
3043 }
3044
3045 validate_ir_tree(shader->ir);
3046
3047 prog = ctx->Driver.NewProgram(ctx, target, shader_program->Name);
3048 if (!prog)
3049 return NULL;
3050 prog->Parameters = _mesa_new_parameter_list();
3051 prog->Attributes = _mesa_new_parameter_list();
3052 v.ctx = ctx;
3053 v.prog = prog;
3054 v.shader_program = shader_program;
3055 v.options = options;
3056
3057 add_uniforms_to_parameters_list(shader_program, shader, prog);
3058
3059 /* Emit Mesa IR for main(). */
3060 visit_exec_list(shader->ir, &v);
3061 v.emit(NULL, OPCODE_END);
3062
3063 /* Now emit bodies for any functions that were used. */
3064 do {
3065 progress = GL_FALSE;
3066
3067 foreach_iter(exec_list_iterator, iter, v.function_signatures) {
3068 function_entry *entry = (function_entry *)iter.get();
3069
3070 if (!entry->bgn_inst) {
3071 v.current_function = entry;
3072
3073 entry->bgn_inst = v.emit(NULL, OPCODE_BGNSUB);
3074 entry->bgn_inst->function = entry;
3075
3076 visit_exec_list(&entry->sig->body, &v);
3077
3078 ir_to_mesa_instruction *last;
3079 last = (ir_to_mesa_instruction *)v.instructions.get_tail();
3080 if (last->op != OPCODE_RET)
3081 v.emit(NULL, OPCODE_RET);
3082
3083 ir_to_mesa_instruction *end;
3084 end = v.emit(NULL, OPCODE_ENDSUB);
3085 end->function = entry;
3086
3087 progress = GL_TRUE;
3088 }
3089 }
3090 } while (progress);
3091
3092 prog->NumTemporaries = v.next_temp;
3093
3094 int num_instructions = 0;
3095 foreach_iter(exec_list_iterator, iter, v.instructions) {
3096 num_instructions++;
3097 }
3098
3099 mesa_instructions =
3100 (struct prog_instruction *)calloc(num_instructions,
3101 sizeof(*mesa_instructions));
3102 mesa_instruction_annotation = ralloc_array(v.mem_ctx, ir_instruction *,
3103 num_instructions);
3104
3105 v.copy_propagate();
3106
3107 /* Convert ir_mesa_instructions into prog_instructions.
3108 */
3109 mesa_inst = mesa_instructions;
3110 i = 0;
3111 foreach_iter(exec_list_iterator, iter, v.instructions) {
3112 const ir_to_mesa_instruction *inst = (ir_to_mesa_instruction *)iter.get();
3113
3114 mesa_inst->Opcode = inst->op;
3115 mesa_inst->CondUpdate = inst->cond_update;
3116 if (inst->saturate)
3117 mesa_inst->SaturateMode = SATURATE_ZERO_ONE;
3118 mesa_inst->DstReg.File = inst->dst.file;
3119 mesa_inst->DstReg.Index = inst->dst.index;
3120 mesa_inst->DstReg.CondMask = inst->dst.cond_mask;
3121 mesa_inst->DstReg.WriteMask = inst->dst.writemask;
3122 mesa_inst->DstReg.RelAddr = inst->dst.reladdr != NULL;
3123 mesa_inst->SrcReg[0] = mesa_src_reg_from_ir_src_reg(inst->src[0]);
3124 mesa_inst->SrcReg[1] = mesa_src_reg_from_ir_src_reg(inst->src[1]);
3125 mesa_inst->SrcReg[2] = mesa_src_reg_from_ir_src_reg(inst->src[2]);
3126 mesa_inst->TexSrcUnit = inst->sampler;
3127 mesa_inst->TexSrcTarget = inst->tex_target;
3128 mesa_inst->TexShadow = inst->tex_shadow;
3129 mesa_instruction_annotation[i] = inst->ir;
3130
3131 /* Set IndirectRegisterFiles. */
3132 if (mesa_inst->DstReg.RelAddr)
3133 prog->IndirectRegisterFiles |= 1 << mesa_inst->DstReg.File;
3134
3135 /* Update program's bitmask of indirectly accessed register files */
3136 for (unsigned src = 0; src < 3; src++)
3137 if (mesa_inst->SrcReg[src].RelAddr)
3138 prog->IndirectRegisterFiles |= 1 << mesa_inst->SrcReg[src].File;
3139
3140 switch (mesa_inst->Opcode) {
3141 case OPCODE_IF:
3142 if (options->MaxIfDepth == 0) {
3143 linker_warning(shader_program,
3144 "Couldn't flatten if-statement. "
3145 "This will likely result in software "
3146 "rasterization.\n");
3147 }
3148 break;
3149 case OPCODE_BGNLOOP:
3150 if (options->EmitNoLoops) {
3151 linker_warning(shader_program,
3152 "Couldn't unroll loop. "
3153 "This will likely result in software "
3154 "rasterization.\n");
3155 }
3156 break;
3157 case OPCODE_CONT:
3158 if (options->EmitNoCont) {
3159 linker_warning(shader_program,
3160 "Couldn't lower continue-statement. "
3161 "This will likely result in software "
3162 "rasterization.\n");
3163 }
3164 break;
3165 case OPCODE_BGNSUB:
3166 inst->function->inst = i;
3167 mesa_inst->Comment = strdup(inst->function->sig->function_name());
3168 break;
3169 case OPCODE_ENDSUB:
3170 mesa_inst->Comment = strdup(inst->function->sig->function_name());
3171 break;
3172 case OPCODE_CAL:
3173 mesa_inst->BranchTarget = inst->function->sig_id; /* rewritten later */
3174 break;
3175 case OPCODE_ARL:
3176 prog->NumAddressRegs = 1;
3177 break;
3178 default:
3179 break;
3180 }
3181
3182 mesa_inst++;
3183 i++;
3184
3185 if (!shader_program->LinkStatus)
3186 break;
3187 }
3188
3189 if (!shader_program->LinkStatus) {
3190 free(mesa_instructions);
3191 _mesa_reference_program(ctx, &shader->Program, NULL);
3192 return NULL;
3193 }
3194
3195 set_branchtargets(&v, mesa_instructions, num_instructions);
3196
3197 if (ctx->Shader.Flags & GLSL_DUMP) {
3198 printf("\n");
3199 printf("GLSL IR for linked %s program %d:\n", target_string,
3200 shader_program->Name);
3201 _mesa_print_ir(shader->ir, NULL);
3202 printf("\n");
3203 printf("\n");
3204 printf("Mesa IR for linked %s program %d:\n", target_string,
3205 shader_program->Name);
3206 print_program(mesa_instructions, mesa_instruction_annotation,
3207 num_instructions);
3208 }
3209
3210 prog->Instructions = mesa_instructions;
3211 prog->NumInstructions = num_instructions;
3212
3213 do_set_program_inouts(shader->ir, prog);
3214 count_resources(prog);
3215
3216 check_resources(ctx, shader_program, prog);
3217
3218 _mesa_reference_program(ctx, &shader->Program, prog);
3219
3220 if ((ctx->Shader.Flags & GLSL_NO_OPT) == 0) {
3221 _mesa_optimize_program(ctx, prog);
3222 }
3223
3224 return prog;
3225 }
3226
3227 extern "C" {
3228
3229 /**
3230 * Link a shader.
3231 * Called via ctx->Driver.LinkShader()
3232 * This actually involves converting GLSL IR into Mesa gl_programs with
3233 * code lowering and other optimizations.
3234 */
3235 GLboolean
3236 _mesa_ir_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
3237 {
3238 assert(prog->LinkStatus);
3239
3240 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
3241 if (prog->_LinkedShaders[i] == NULL)
3242 continue;
3243
3244 bool progress;
3245 exec_list *ir = prog->_LinkedShaders[i]->ir;
3246 const struct gl_shader_compiler_options *options =
3247 &ctx->ShaderCompilerOptions[_mesa_shader_type_to_index(prog->_LinkedShaders[i]->Type)];
3248
3249 do {
3250 progress = false;
3251
3252 /* Lowering */
3253 do_mat_op_to_vec(ir);
3254 lower_instructions(ir, (MOD_TO_FRACT | DIV_TO_MUL_RCP | EXP_TO_EXP2
3255 | LOG_TO_LOG2 | INT_DIV_TO_MUL_RCP
3256 | ((options->EmitNoPow) ? POW_TO_EXP2 : 0)));
3257
3258 progress = do_lower_jumps(ir, true, true, options->EmitNoMainReturn, options->EmitNoCont, options->EmitNoLoops) || progress;
3259
3260 progress = do_common_optimization(ir, true, options->MaxUnrollIterations) || progress;
3261
3262 progress = lower_quadop_vector(ir, true) || progress;
3263
3264 if (options->MaxIfDepth == 0)
3265 progress = lower_discard(ir) || progress;
3266
3267 progress = lower_if_to_cond_assign(ir, options->MaxIfDepth) || progress;
3268
3269 if (options->EmitNoNoise)
3270 progress = lower_noise(ir) || progress;
3271
3272 /* If there are forms of indirect addressing that the driver
3273 * cannot handle, perform the lowering pass.
3274 */
3275 if (options->EmitNoIndirectInput || options->EmitNoIndirectOutput
3276 || options->EmitNoIndirectTemp || options->EmitNoIndirectUniform)
3277 progress =
3278 lower_variable_index_to_cond_assign(ir,
3279 options->EmitNoIndirectInput,
3280 options->EmitNoIndirectOutput,
3281 options->EmitNoIndirectTemp,
3282 options->EmitNoIndirectUniform)
3283 || progress;
3284
3285 progress = do_vec_index_to_cond_assign(ir) || progress;
3286 } while (progress);
3287
3288 validate_ir_tree(ir);
3289 }
3290
3291 for (unsigned i = 0; i < MESA_SHADER_TYPES; i++) {
3292 struct gl_program *linked_prog;
3293
3294 if (prog->_LinkedShaders[i] == NULL)
3295 continue;
3296
3297 linked_prog = get_mesa_program(ctx, prog, prog->_LinkedShaders[i]);
3298
3299 if (linked_prog) {
3300 bool ok = true;
3301
3302 switch (prog->_LinkedShaders[i]->Type) {
3303 case GL_VERTEX_SHADER:
3304 ((struct gl_vertex_program *)linked_prog)->UsesClipDistance
3305 = prog->Vert.UsesClipDistance;
3306 _mesa_reference_vertprog(ctx, &prog->VertexProgram,
3307 (struct gl_vertex_program *)linked_prog);
3308 ok = ctx->Driver.ProgramStringNotify(ctx, GL_VERTEX_PROGRAM_ARB,
3309 linked_prog);
3310 break;
3311 case GL_FRAGMENT_SHADER:
3312 _mesa_reference_fragprog(ctx, &prog->FragmentProgram,
3313 (struct gl_fragment_program *)linked_prog);
3314 ok = ctx->Driver.ProgramStringNotify(ctx, GL_FRAGMENT_PROGRAM_ARB,
3315 linked_prog);
3316 break;
3317 case GL_GEOMETRY_SHADER:
3318 _mesa_reference_geomprog(ctx, &prog->GeometryProgram,
3319 (struct gl_geometry_program *)linked_prog);
3320 ok = ctx->Driver.ProgramStringNotify(ctx, GL_GEOMETRY_PROGRAM_NV,
3321 linked_prog);
3322 break;
3323 }
3324 if (!ok) {
3325 return GL_FALSE;
3326 }
3327 }
3328
3329 _mesa_reference_program(ctx, &linked_prog, NULL);
3330 }
3331
3332 return GL_TRUE;
3333 }
3334
3335
3336 /**
3337 * Compile a GLSL shader. Called via glCompileShader().
3338 */
3339 void
3340 _mesa_glsl_compile_shader(struct gl_context *ctx, struct gl_shader *shader)
3341 {
3342 struct _mesa_glsl_parse_state *state =
3343 new(shader) _mesa_glsl_parse_state(ctx, shader->Type, shader);
3344
3345 const char *source = shader->Source;
3346 /* Check if the user called glCompileShader without first calling
3347 * glShaderSource. This should fail to compile, but not raise a GL_ERROR.
3348 */
3349 if (source == NULL) {
3350 shader->CompileStatus = GL_FALSE;
3351 return;
3352 }
3353
3354 state->error = preprocess(state, &source, &state->info_log,
3355 &ctx->Extensions, ctx->API);
3356
3357 if (ctx->Shader.Flags & GLSL_DUMP) {
3358 printf("GLSL source for %s shader %d:\n",
3359 _mesa_glsl_shader_target_name(state->target), shader->Name);
3360 printf("%s\n", shader->Source);
3361 }
3362
3363 if (!state->error) {
3364 _mesa_glsl_lexer_ctor(state, source);
3365 _mesa_glsl_parse(state);
3366 _mesa_glsl_lexer_dtor(state);
3367 }
3368
3369 ralloc_free(shader->ir);
3370 shader->ir = new(shader) exec_list;
3371 if (!state->error && !state->translation_unit.is_empty())
3372 _mesa_ast_to_hir(shader->ir, state);
3373
3374 if (!state->error && !shader->ir->is_empty()) {
3375 validate_ir_tree(shader->ir);
3376
3377 /* Do some optimization at compile time to reduce shader IR size
3378 * and reduce later work if the same shader is linked multiple times
3379 */
3380 while (do_common_optimization(shader->ir, false, 32))
3381 ;
3382
3383 validate_ir_tree(shader->ir);
3384 }
3385
3386 shader->symbols = state->symbols;
3387
3388 shader->CompileStatus = !state->error;
3389 shader->InfoLog = state->info_log;
3390 shader->Version = state->language_version;
3391 memcpy(shader->builtins_to_link, state->builtins_to_link,
3392 sizeof(shader->builtins_to_link[0]) * state->num_builtins_to_link);
3393 shader->num_builtins_to_link = state->num_builtins_to_link;
3394
3395 if (ctx->Shader.Flags & GLSL_LOG) {
3396 _mesa_write_shader_to_file(shader);
3397 }
3398
3399 if (ctx->Shader.Flags & GLSL_DUMP) {
3400 if (shader->CompileStatus) {
3401 printf("GLSL IR for shader %d:\n", shader->Name);
3402 _mesa_print_ir(shader->ir, NULL);
3403 printf("\n\n");
3404 } else {
3405 printf("GLSL shader %d failed to compile.\n", shader->Name);
3406 }
3407 if (shader->InfoLog && shader->InfoLog[0] != 0) {
3408 printf("GLSL shader %d info log:\n", shader->Name);
3409 printf("%s\n", shader->InfoLog);
3410 }
3411 }
3412
3413 /* Retain any live IR, but trash the rest. */
3414 reparent_ir(shader->ir, shader->ir);
3415
3416 ralloc_free(state);
3417 }
3418
3419
3420 /**
3421 * Link a GLSL shader program. Called via glLinkProgram().
3422 */
3423 void
3424 _mesa_glsl_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
3425 {
3426 unsigned int i;
3427
3428 _mesa_clear_shader_program_data(ctx, prog);
3429
3430 prog->LinkStatus = GL_TRUE;
3431
3432 for (i = 0; i < prog->NumShaders; i++) {
3433 if (!prog->Shaders[i]->CompileStatus) {
3434 linker_error(prog, "linking with uncompiled shader");
3435 prog->LinkStatus = GL_FALSE;
3436 }
3437 }
3438
3439 _mesa_reference_vertprog(ctx, &prog->VertexProgram, NULL);
3440 _mesa_reference_fragprog(ctx, &prog->FragmentProgram, NULL);
3441 _mesa_reference_geomprog(ctx, &prog->GeometryProgram, NULL);
3442
3443 if (prog->LinkStatus) {
3444 link_shaders(ctx, prog);
3445 }
3446
3447 if (prog->LinkStatus) {
3448 if (!ctx->Driver.LinkShader(ctx, prog)) {
3449 prog->LinkStatus = GL_FALSE;
3450 }
3451 }
3452
3453 set_uniform_initializers(ctx, prog);
3454
3455 if (ctx->Shader.Flags & GLSL_DUMP) {
3456 if (!prog->LinkStatus) {
3457 printf("GLSL shader program %d failed to link\n", prog->Name);
3458 }
3459
3460 if (prog->InfoLog && prog->InfoLog[0] != 0) {
3461 printf("GLSL shader program %d info log:\n", prog->Name);
3462 printf("%s\n", prog->InfoLog);
3463 }
3464 }
3465 }
3466
3467 } /* extern "C" */