2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
34 #include "main/macros.h"
35 #include "main/mtypes.h"
36 #include "main/shaderapi.h"
37 #include "main/shaderobj.h"
38 #include "main/uniforms.h"
39 #include "compiler/glsl/ast.h"
40 #include "compiler/glsl/ir.h"
41 #include "compiler/glsl/ir_expression_flattening.h"
42 #include "compiler/glsl/ir_visitor.h"
43 #include "compiler/glsl/ir_optimization.h"
44 #include "compiler/glsl/ir_uniform.h"
45 #include "compiler/glsl/glsl_parser_extras.h"
46 #include "compiler/glsl_types.h"
47 #include "compiler/glsl/linker.h"
48 #include "compiler/glsl/program.h"
49 #include "program/prog_instruction.h"
50 #include "program/prog_optimize.h"
51 #include "program/prog_print.h"
52 #include "program/program.h"
53 #include "program/prog_parameter.h"
54 #include "util/string_to_uint_map.h"
57 static int swizzle_for_size(int size
);
65 * This struct is a corresponding struct to Mesa prog_src_register, with
70 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
74 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
75 this->swizzle
= swizzle_for_size(type
->vector_elements
);
77 this->swizzle
= SWIZZLE_XYZW
;
84 this->file
= PROGRAM_UNDEFINED
;
91 explicit src_reg(dst_reg reg
);
93 gl_register_file file
; /**< PROGRAM_* from Mesa */
94 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
95 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
96 int negate
; /**< NEGATE_XYZW mask from mesa */
97 /** Register index should be offset by the integer in this reg. */
103 dst_reg(gl_register_file file
, int writemask
)
107 this->writemask
= writemask
;
108 this->reladdr
= NULL
;
113 this->file
= PROGRAM_UNDEFINED
;
116 this->reladdr
= NULL
;
119 explicit dst_reg(src_reg reg
);
121 gl_register_file file
; /**< PROGRAM_* from Mesa */
122 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
123 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
124 /** Register index should be offset by the integer in this reg. */
128 } /* anonymous namespace */
130 src_reg::src_reg(dst_reg reg
)
132 this->file
= reg
.file
;
133 this->index
= reg
.index
;
134 this->swizzle
= SWIZZLE_XYZW
;
136 this->reladdr
= reg
.reladdr
;
139 dst_reg::dst_reg(src_reg reg
)
141 this->file
= reg
.file
;
142 this->index
= reg
.index
;
143 this->writemask
= WRITEMASK_XYZW
;
144 this->reladdr
= reg
.reladdr
;
149 class ir_to_mesa_instruction
: public exec_node
{
151 DECLARE_RALLOC_CXX_OPERATORS(ir_to_mesa_instruction
)
156 /** Pointer to the ir source this tree came from for debugging */
159 int sampler
; /**< sampler index */
160 int tex_target
; /**< One of TEXTURE_*_INDEX */
161 GLboolean tex_shadow
;
164 class variable_storage
: public exec_node
{
166 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
167 : file(file
), index(index
), var(var
)
172 gl_register_file file
;
174 ir_variable
*var
; /* variable that maps to this, if any */
177 class function_entry
: public exec_node
{
179 ir_function_signature
*sig
;
182 * identifier of this function signature used by the program.
184 * At the point that Mesa instructions for function calls are
185 * generated, we don't know the address of the first instruction of
186 * the function body. So we make the BranchTarget that is called a
187 * small integer and rewrite them during set_branchtargets().
192 * Pointer to first instruction of the function body.
194 * Set during function body emits after main() is processed.
196 ir_to_mesa_instruction
*bgn_inst
;
199 * Index of the first instruction of the function body in actual
202 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
206 /** Storage for the return value. */
210 class ir_to_mesa_visitor
: public ir_visitor
{
212 ir_to_mesa_visitor();
213 ~ir_to_mesa_visitor();
215 function_entry
*current_function
;
217 struct gl_context
*ctx
;
218 struct gl_program
*prog
;
219 struct gl_shader_program
*shader_program
;
220 struct gl_shader_compiler_options
*options
;
224 variable_storage
*find_variable_storage(const ir_variable
*var
);
226 src_reg
get_temp(const glsl_type
*type
);
227 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
229 src_reg
src_reg_for_float(float val
);
232 * \name Visit methods
234 * As typical for the visitor pattern, there must be one \c visit method for
235 * each concrete subclass of \c ir_instruction. Virtual base classes within
236 * the hierarchy should not have \c visit methods.
239 virtual void visit(ir_variable
*);
240 virtual void visit(ir_loop
*);
241 virtual void visit(ir_loop_jump
*);
242 virtual void visit(ir_function_signature
*);
243 virtual void visit(ir_function
*);
244 virtual void visit(ir_expression
*);
245 virtual void visit(ir_swizzle
*);
246 virtual void visit(ir_dereference_variable
*);
247 virtual void visit(ir_dereference_array
*);
248 virtual void visit(ir_dereference_record
*);
249 virtual void visit(ir_assignment
*);
250 virtual void visit(ir_constant
*);
251 virtual void visit(ir_call
*);
252 virtual void visit(ir_return
*);
253 virtual void visit(ir_discard
*);
254 virtual void visit(ir_texture
*);
255 virtual void visit(ir_if
*);
256 virtual void visit(ir_emit_vertex
*);
257 virtual void visit(ir_end_primitive
*);
258 virtual void visit(ir_barrier
*);
263 /** List of variable_storage */
266 /** List of function_entry */
267 exec_list function_signatures
;
268 int next_signature_id
;
270 /** List of ir_to_mesa_instruction */
271 exec_list instructions
;
273 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
275 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
276 dst_reg dst
, src_reg src0
);
278 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
279 dst_reg dst
, src_reg src0
, src_reg src1
);
281 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
283 src_reg src0
, src_reg src1
, src_reg src2
);
286 * Emit the correct dot-product instruction for the type of arguments
288 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
294 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
295 dst_reg dst
, src_reg src0
);
297 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
298 dst_reg dst
, src_reg src0
, src_reg src1
);
300 bool try_emit_mad(ir_expression
*ir
,
302 bool try_emit_mad_for_and_not(ir_expression
*ir
,
305 void emit_swz(ir_expression
*ir
);
307 void emit_equality_comparison(ir_expression
*ir
, enum prog_opcode op
,
309 const src_reg
&src0
, const src_reg
&src1
);
311 inline void emit_sne(ir_expression
*ir
, dst_reg dst
,
312 const src_reg
&src0
, const src_reg
&src1
)
314 emit_equality_comparison(ir
, OPCODE_SLT
, dst
, src0
, src1
);
317 inline void emit_seq(ir_expression
*ir
, dst_reg dst
,
318 const src_reg
&src0
, const src_reg
&src1
)
320 emit_equality_comparison(ir
, OPCODE_SGE
, dst
, src0
, src1
);
323 bool process_move_condition(ir_rvalue
*ir
);
325 void copy_propagate(void);
330 } /* anonymous namespace */
332 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
334 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
336 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
339 swizzle_for_size(int size
)
341 static const int size_swizzles
[4] = {
342 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
343 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
344 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
345 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
348 assert((size
>= 1) && (size
<= 4));
349 return size_swizzles
[size
- 1];
352 ir_to_mesa_instruction
*
353 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
355 src_reg src0
, src_reg src1
, src_reg src2
)
357 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
360 /* If we have to do relative addressing, we want to load the ARL
361 * reg directly for one of the regs, and preload the other reladdr
362 * sources into temps.
364 num_reladdr
+= dst
.reladdr
!= NULL
;
365 num_reladdr
+= src0
.reladdr
!= NULL
;
366 num_reladdr
+= src1
.reladdr
!= NULL
;
367 num_reladdr
+= src2
.reladdr
!= NULL
;
369 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
370 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
371 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
374 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
377 assert(num_reladdr
== 0);
386 this->instructions
.push_tail(inst
);
392 ir_to_mesa_instruction
*
393 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
394 dst_reg dst
, src_reg src0
, src_reg src1
)
396 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
399 ir_to_mesa_instruction
*
400 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
401 dst_reg dst
, src_reg src0
)
403 assert(dst
.writemask
!= 0);
404 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
407 ir_to_mesa_instruction
*
408 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
410 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
413 ir_to_mesa_instruction
*
414 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
415 dst_reg dst
, src_reg src0
, src_reg src1
,
418 static const enum prog_opcode dot_opcodes
[] = {
419 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
422 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
426 * Emits Mesa scalar opcodes to produce unique answers across channels.
428 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
429 * channel determines the result across all channels. So to do a vec4
430 * of this operation, we want to emit a scalar per source channel used
431 * to produce dest channels.
434 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
436 src_reg orig_src0
, src_reg orig_src1
)
439 int done_mask
= ~dst
.writemask
;
441 /* Mesa RCP is a scalar operation splatting results to all channels,
442 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
445 for (i
= 0; i
< 4; i
++) {
446 GLuint this_mask
= (1 << i
);
447 ir_to_mesa_instruction
*inst
;
448 src_reg src0
= orig_src0
;
449 src_reg src1
= orig_src1
;
451 if (done_mask
& this_mask
)
454 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
455 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
456 for (j
= i
+ 1; j
< 4; j
++) {
457 /* If there is another enabled component in the destination that is
458 * derived from the same inputs, generate its value on this pass as
461 if (!(done_mask
& (1 << j
)) &&
462 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
463 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
464 this_mask
|= (1 << j
);
467 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
468 src0_swiz
, src0_swiz
);
469 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
470 src1_swiz
, src1_swiz
);
472 inst
= emit(ir
, op
, dst
, src0
, src1
);
473 inst
->dst
.writemask
= this_mask
;
474 done_mask
|= this_mask
;
479 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
480 dst_reg dst
, src_reg src0
)
482 src_reg undef
= undef_src
;
484 undef
.swizzle
= SWIZZLE_XXXX
;
486 emit_scalar(ir
, op
, dst
, src0
, undef
);
490 ir_to_mesa_visitor::src_reg_for_float(float val
)
492 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
494 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
495 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
501 type_size(const struct glsl_type
*type
)
506 switch (type
->base_type
) {
509 case GLSL_TYPE_FLOAT
:
511 if (type
->is_matrix()) {
512 return type
->matrix_columns
;
514 /* Regardless of size of vector, it gets a vec4. This is bad
515 * packing for things like floats, but otherwise arrays become a
516 * mess. Hopefully a later pass over the code can pack scalars
517 * down if appropriate.
522 case GLSL_TYPE_DOUBLE
:
523 if (type
->is_matrix()) {
524 if (type
->vector_elements
> 2)
525 return type
->matrix_columns
* 2;
527 return type
->matrix_columns
;
529 if (type
->vector_elements
> 2)
535 case GLSL_TYPE_UINT64
:
536 case GLSL_TYPE_INT64
:
537 if (type
->vector_elements
> 2)
541 case GLSL_TYPE_ARRAY
:
542 assert(type
->length
> 0);
543 return type_size(type
->fields
.array
) * type
->length
;
544 case GLSL_TYPE_STRUCT
:
546 for (i
= 0; i
< type
->length
; i
++) {
547 size
+= type_size(type
->fields
.structure
[i
].type
);
550 case GLSL_TYPE_SAMPLER
:
551 case GLSL_TYPE_IMAGE
:
552 case GLSL_TYPE_SUBROUTINE
:
553 /* Samplers take up one slot in UNIFORMS[], but they're baked in
557 case GLSL_TYPE_ATOMIC_UINT
:
559 case GLSL_TYPE_ERROR
:
560 case GLSL_TYPE_INTERFACE
:
561 case GLSL_TYPE_FUNCTION
:
562 assert(!"Invalid type in type_size");
570 * In the initial pass of codegen, we assign temporary numbers to
571 * intermediate results. (not SSA -- variable assignments will reuse
572 * storage). Actual register allocation for the Mesa VM occurs in a
573 * pass over the Mesa IR later.
576 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
580 src
.file
= PROGRAM_TEMPORARY
;
581 src
.index
= next_temp
;
583 next_temp
+= type_size(type
);
585 if (type
->is_array() || type
->is_record()) {
586 src
.swizzle
= SWIZZLE_NOOP
;
588 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
596 ir_to_mesa_visitor::find_variable_storage(const ir_variable
*var
)
598 foreach_in_list(variable_storage
, entry
, &this->variables
) {
599 if (entry
->var
== var
)
607 ir_to_mesa_visitor::visit(ir_variable
*ir
)
609 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
610 this->prog
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
611 this->prog
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
614 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
616 const ir_state_slot
*const slots
= ir
->get_state_slots();
617 assert(slots
!= NULL
);
619 /* Check if this statevar's setup in the STATE file exactly
620 * matches how we'll want to reference it as a
621 * struct/array/whatever. If not, then we need to move it into
622 * temporary storage and hope that it'll get copy-propagated
625 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
626 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
631 variable_storage
*storage
;
633 if (i
== ir
->get_num_state_slots()) {
634 /* We'll set the index later. */
635 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
636 this->variables
.push_tail(storage
);
640 /* The variable_storage constructor allocates slots based on the size
641 * of the type. However, this had better match the number of state
642 * elements that we're going to copy into the new temporary.
644 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
646 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
648 this->variables
.push_tail(storage
);
649 this->next_temp
+= type_size(ir
->type
);
651 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
655 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
656 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
657 (gl_state_index
*)slots
[i
].tokens
);
659 if (storage
->file
== PROGRAM_STATE_VAR
) {
660 if (storage
->index
== -1) {
661 storage
->index
= index
;
663 assert(index
== storage
->index
+ (int)i
);
666 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
667 src
.swizzle
= slots
[i
].swizzle
;
668 emit(ir
, OPCODE_MOV
, dst
, src
);
669 /* even a float takes up a whole vec4 reg in a struct/array. */
674 if (storage
->file
== PROGRAM_TEMPORARY
&&
675 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
676 linker_error(this->shader_program
,
677 "failed to load builtin uniform `%s' "
678 "(%d/%d regs loaded)\n",
679 ir
->name
, dst
.index
- storage
->index
,
680 type_size(ir
->type
));
686 ir_to_mesa_visitor::visit(ir_loop
*ir
)
688 emit(NULL
, OPCODE_BGNLOOP
);
690 visit_exec_list(&ir
->body_instructions
, this);
692 emit(NULL
, OPCODE_ENDLOOP
);
696 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
699 case ir_loop_jump::jump_break
:
700 emit(NULL
, OPCODE_BRK
);
702 case ir_loop_jump::jump_continue
:
703 emit(NULL
, OPCODE_CONT
);
710 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
717 ir_to_mesa_visitor::visit(ir_function
*ir
)
719 /* Ignore function bodies other than main() -- we shouldn't see calls to
720 * them since they should all be inlined before we get to ir_to_mesa.
722 if (strcmp(ir
->name
, "main") == 0) {
723 const ir_function_signature
*sig
;
726 sig
= ir
->matching_signature(NULL
, &empty
, false);
730 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
737 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
739 int nonmul_operand
= 1 - mul_operand
;
742 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
743 if (!expr
|| expr
->operation
!= ir_binop_mul
)
746 expr
->operands
[0]->accept(this);
748 expr
->operands
[1]->accept(this);
750 ir
->operands
[nonmul_operand
]->accept(this);
753 this->result
= get_temp(ir
->type
);
754 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
760 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
762 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
763 * implemented using multiplication, and logical-or is implemented using
764 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
765 * As result, the logical expression (a & !b) can be rewritten as:
769 * - (a * 1) - (a * b)
773 * This final expression can be implemented as a single MAD(a, -b, a)
777 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
779 const int other_operand
= 1 - try_operand
;
782 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
783 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
786 ir
->operands
[other_operand
]->accept(this);
788 expr
->operands
[0]->accept(this);
791 b
.negate
= ~b
.negate
;
793 this->result
= get_temp(ir
->type
);
794 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
800 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
801 src_reg
*reg
, int *num_reladdr
)
806 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
808 if (*num_reladdr
!= 1) {
809 src_reg temp
= get_temp(glsl_type::vec4_type
);
811 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
819 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
821 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
822 * This means that each of the operands is either an immediate value of -1,
823 * 0, or 1, or is a component from one source register (possibly with
826 uint8_t components
[4] = { 0 };
827 bool negate
[4] = { false };
828 ir_variable
*var
= NULL
;
830 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
831 ir_rvalue
*op
= ir
->operands
[i
];
833 assert(op
->type
->is_scalar());
836 switch (op
->ir_type
) {
837 case ir_type_constant
: {
839 assert(op
->type
->is_scalar());
841 const ir_constant
*const c
= op
->as_constant();
843 components
[i
] = SWIZZLE_ONE
;
844 } else if (c
->is_zero()) {
845 components
[i
] = SWIZZLE_ZERO
;
846 } else if (c
->is_negative_one()) {
847 components
[i
] = SWIZZLE_ONE
;
850 assert(!"SWZ constant must be 0.0 or 1.0.");
857 case ir_type_dereference_variable
: {
858 ir_dereference_variable
*const deref
=
859 (ir_dereference_variable
*) op
;
861 assert((var
== NULL
) || (deref
->var
== var
));
862 components
[i
] = SWIZZLE_X
;
868 case ir_type_expression
: {
869 ir_expression
*const expr
= (ir_expression
*) op
;
871 assert(expr
->operation
== ir_unop_neg
);
874 op
= expr
->operands
[0];
878 case ir_type_swizzle
: {
879 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
881 components
[i
] = swiz
->mask
.x
;
887 assert(!"Should not get here.");
895 ir_dereference_variable
*const deref
=
896 new(mem_ctx
) ir_dereference_variable(var
);
898 this->result
.file
= PROGRAM_UNDEFINED
;
900 if (this->result
.file
== PROGRAM_UNDEFINED
) {
901 printf("Failed to get tree for expression operand:\n");
910 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
914 src
.negate
= ((unsigned(negate
[0]) << 0)
915 | (unsigned(negate
[1]) << 1)
916 | (unsigned(negate
[2]) << 2)
917 | (unsigned(negate
[3]) << 3));
919 /* Storage for our result. Ideally for an assignment we'd be using the
920 * actual storage for the result here, instead.
922 const src_reg result_src
= get_temp(ir
->type
);
923 dst_reg result_dst
= dst_reg(result_src
);
925 /* Limit writes to the channels that will be used by result_src later.
926 * This does limit this temp's use as a temporary for multi-instruction
929 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
931 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
932 this->result
= result_src
;
936 ir_to_mesa_visitor::emit_equality_comparison(ir_expression
*ir
,
943 src_reg abs_difference
= get_temp(glsl_type::vec4_type
);
944 const src_reg zero
= src_reg_for_float(0.0);
946 /* x == y is equivalent to -abs(x-y) >= 0. Since all of the code that
947 * consumes the generated IR is pretty dumb, take special care when one
948 * of the operands is zero.
950 * Similarly, x != y is equivalent to -abs(x-y) < 0.
952 if (src0
.file
== zero
.file
&&
953 src0
.index
== zero
.index
&&
954 src0
.swizzle
== zero
.swizzle
) {
956 } else if (src1
.file
== zero
.file
&&
957 src1
.index
== zero
.index
&&
958 src1
.swizzle
== zero
.swizzle
) {
961 difference
= get_temp(glsl_type::vec4_type
);
963 src_reg tmp_src
= src0
;
964 tmp_src
.negate
= ~tmp_src
.negate
;
966 emit(ir
, OPCODE_ADD
, dst_reg(difference
), tmp_src
, src1
);
969 emit(ir
, OPCODE_ABS
, dst_reg(abs_difference
), difference
);
971 abs_difference
.negate
= ~abs_difference
.negate
;
972 emit(ir
, op
, dst
, abs_difference
, zero
);
976 ir_to_mesa_visitor::visit(ir_expression
*ir
)
978 unsigned int operand
;
979 src_reg op
[ARRAY_SIZE(ir
->operands
)];
983 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
985 if (ir
->operation
== ir_binop_add
) {
986 if (try_emit_mad(ir
, 1))
988 if (try_emit_mad(ir
, 0))
992 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
994 if (ir
->operation
== ir_binop_logic_and
) {
995 if (try_emit_mad_for_and_not(ir
, 1))
997 if (try_emit_mad_for_and_not(ir
, 0))
1001 if (ir
->operation
== ir_quadop_vector
) {
1006 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1007 this->result
.file
= PROGRAM_UNDEFINED
;
1008 ir
->operands
[operand
]->accept(this);
1009 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1010 printf("Failed to get tree for expression operand:\n");
1011 ir
->operands
[operand
]->print();
1015 op
[operand
] = this->result
;
1017 /* Matrix expression operands should have been broken down to vector
1018 * operations already.
1020 assert(!ir
->operands
[operand
]->type
->is_matrix());
1023 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1024 if (ir
->operands
[1]) {
1025 vector_elements
= MAX2(vector_elements
,
1026 ir
->operands
[1]->type
->vector_elements
);
1029 this->result
.file
= PROGRAM_UNDEFINED
;
1031 /* Storage for our result. Ideally for an assignment we'd be using
1032 * the actual storage for the result here, instead.
1034 result_src
= get_temp(ir
->type
);
1035 /* convenience for the emit functions below. */
1036 result_dst
= dst_reg(result_src
);
1037 /* Limit writes to the channels that will be used by result_src later.
1038 * This does limit this temp's use as a temporary for multi-instruction
1041 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1043 switch (ir
->operation
) {
1044 case ir_unop_logic_not
:
1045 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1046 * older GPUs implement SEQ using multiple instructions (i915 uses two
1047 * SGE instructions and a MUL instruction). Since our logic values are
1048 * 0.0 and 1.0, 1-x also implements !x.
1050 op
[0].negate
= ~op
[0].negate
;
1051 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1054 op
[0].negate
= ~op
[0].negate
;
1058 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1061 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1064 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1068 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1072 assert(!"not reached: should be handled by ir_explog_to_explog2");
1075 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1078 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1081 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1085 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1088 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1091 case ir_unop_saturate
: {
1092 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_MOV
,
1094 inst
->saturate
= true;
1097 case ir_unop_noise
: {
1098 const enum prog_opcode opcode
=
1099 prog_opcode(OPCODE_NOISE1
1100 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1101 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1103 emit(ir
, opcode
, result_dst
, op
[0]);
1108 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1111 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1115 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1118 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1121 /* Floating point should be lowered by MOD_TO_FLOOR in the compiler. */
1122 assert(ir
->type
->is_integer());
1123 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1127 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1129 case ir_binop_greater
:
1130 /* Negating the operands (as opposed to switching the order of the
1131 * operands) produces the correct result when both are +/-Inf.
1133 op
[0].negate
= ~op
[0].negate
;
1134 op
[1].negate
= ~op
[1].negate
;
1135 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1137 case ir_binop_lequal
:
1138 /* Negating the operands (as opposed to switching the order of the
1139 * operands) produces the correct result when both are +/-Inf.
1141 op
[0].negate
= ~op
[0].negate
;
1142 op
[1].negate
= ~op
[1].negate
;
1143 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1145 case ir_binop_gequal
:
1146 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1148 case ir_binop_equal
:
1149 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1151 case ir_binop_nequal
:
1152 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1154 case ir_binop_all_equal
:
1155 /* "==" operator producing a scalar boolean. */
1156 if (ir
->operands
[0]->type
->is_vector() ||
1157 ir
->operands
[1]->type
->is_vector()) {
1158 src_reg temp
= get_temp(glsl_type::vec4_type
);
1159 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1161 /* After the dot-product, the value will be an integer on the
1162 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1164 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1166 /* Negating the result of the dot-product gives values on the range
1167 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1168 * achieved using SGE.
1170 src_reg sge_src
= result_src
;
1171 sge_src
.negate
= ~sge_src
.negate
;
1172 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1174 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1177 case ir_binop_any_nequal
:
1178 /* "!=" operator producing a scalar boolean. */
1179 if (ir
->operands
[0]->type
->is_vector() ||
1180 ir
->operands
[1]->type
->is_vector()) {
1181 src_reg temp
= get_temp(glsl_type::vec4_type
);
1182 if (ir
->operands
[0]->type
->is_boolean() &&
1183 ir
->operands
[1]->as_constant() &&
1184 ir
->operands
[1]->as_constant()->is_zero()) {
1187 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1190 /* After the dot-product, the value will be an integer on the
1191 * range [0,4]. Zero stays zero, and positive values become 1.0.
1193 ir_to_mesa_instruction
*const dp
=
1194 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1195 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1196 /* The clamping to [0,1] can be done for free in the fragment
1197 * shader with a saturate.
1199 dp
->saturate
= true;
1201 /* Negating the result of the dot-product gives values on the range
1202 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1203 * achieved using SLT.
1205 src_reg slt_src
= result_src
;
1206 slt_src
.negate
= ~slt_src
.negate
;
1207 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1210 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1214 case ir_binop_logic_xor
:
1215 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1218 case ir_binop_logic_or
: {
1219 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1220 /* After the addition, the value will be an integer on the
1221 * range [0,2]. Zero stays zero, and positive values become 1.0.
1223 ir_to_mesa_instruction
*add
=
1224 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1225 add
->saturate
= true;
1227 /* The Boolean arguments are stored as float 0.0 and 1.0. If either
1228 * value is 1.0, the result of the logcal-or should be 1.0. If both
1229 * values are 0.0, the result should be 0.0. This is exactly what
1232 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1237 case ir_binop_logic_and
:
1238 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1239 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1243 assert(ir
->operands
[0]->type
->is_vector());
1244 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1245 emit_dp(ir
, result_dst
, op
[0], op
[1],
1246 ir
->operands
[0]->type
->vector_elements
);
1250 /* sqrt(x) = x * rsq(x). */
1251 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1252 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1253 /* For incoming channels <= 0, set the result to 0. */
1254 op
[0].negate
= ~op
[0].negate
;
1255 emit(ir
, OPCODE_CMP
, result_dst
,
1256 op
[0], result_src
, src_reg_for_float(0.0));
1259 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1267 /* Mesa IR lacks types, ints are stored as truncated floats. */
1272 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1276 emit_sne(ir
, result_dst
, op
[0], src_reg_for_float(0.0));
1278 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1279 case ir_unop_bitcast_f2u
:
1280 case ir_unop_bitcast_i2f
:
1281 case ir_unop_bitcast_u2f
:
1284 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1287 op
[0].negate
= ~op
[0].negate
;
1288 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1289 result_src
.negate
= ~result_src
.negate
;
1292 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1295 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1297 case ir_unop_pack_snorm_2x16
:
1298 case ir_unop_pack_snorm_4x8
:
1299 case ir_unop_pack_unorm_2x16
:
1300 case ir_unop_pack_unorm_4x8
:
1301 case ir_unop_pack_half_2x16
:
1302 case ir_unop_pack_double_2x32
:
1303 case ir_unop_unpack_snorm_2x16
:
1304 case ir_unop_unpack_snorm_4x8
:
1305 case ir_unop_unpack_unorm_2x16
:
1306 case ir_unop_unpack_unorm_4x8
:
1307 case ir_unop_unpack_half_2x16
:
1308 case ir_unop_unpack_double_2x32
:
1309 case ir_unop_bitfield_reverse
:
1310 case ir_unop_bit_count
:
1311 case ir_unop_find_msb
:
1312 case ir_unop_find_lsb
:
1320 case ir_unop_frexp_sig
:
1321 case ir_unop_frexp_exp
:
1322 assert(!"not supported");
1325 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1328 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1331 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1334 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1335 * hardware backends have no way to avoid Mesa IR generation
1336 * even if they don't use it, we need to emit "something" and
1339 case ir_binop_lshift
:
1340 case ir_binop_rshift
:
1341 case ir_binop_bit_and
:
1342 case ir_binop_bit_xor
:
1343 case ir_binop_bit_or
:
1344 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1347 case ir_unop_bit_not
:
1348 case ir_unop_round_even
:
1349 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1352 case ir_binop_ubo_load
:
1353 assert(!"not supported");
1357 /* ir_triop_lrp operands are (x, y, a) while
1358 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1360 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1363 case ir_binop_vector_extract
:
1365 case ir_triop_bitfield_extract
:
1366 case ir_triop_vector_insert
:
1367 case ir_quadop_bitfield_insert
:
1368 case ir_binop_ldexp
:
1370 case ir_binop_carry
:
1371 case ir_binop_borrow
:
1372 case ir_binop_imul_high
:
1373 case ir_unop_interpolate_at_centroid
:
1374 case ir_binop_interpolate_at_offset
:
1375 case ir_binop_interpolate_at_sample
:
1376 case ir_unop_dFdx_coarse
:
1377 case ir_unop_dFdx_fine
:
1378 case ir_unop_dFdy_coarse
:
1379 case ir_unop_dFdy_fine
:
1380 case ir_unop_subroutine_to_int
:
1381 case ir_unop_get_buffer_size
:
1382 case ir_unop_vote_any
:
1383 case ir_unop_vote_all
:
1384 case ir_unop_vote_eq
:
1385 case ir_unop_bitcast_u642d
:
1386 case ir_unop_bitcast_i642d
:
1387 case ir_unop_bitcast_d2u64
:
1388 case ir_unop_bitcast_d2i64
:
1407 case ir_unop_u642i64
:
1408 case ir_unop_i642u64
:
1409 case ir_unop_pack_int_2x32
:
1410 case ir_unop_unpack_int_2x32
:
1411 case ir_unop_pack_uint_2x32
:
1412 case ir_unop_unpack_uint_2x32
:
1413 assert(!"not supported");
1416 case ir_unop_ssbo_unsized_array_length
:
1417 case ir_quadop_vector
:
1418 /* This operation should have already been handled.
1420 assert(!"Should not get here.");
1424 this->result
= result_src
;
1429 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1435 /* Note that this is only swizzles in expressions, not those on the left
1436 * hand side of an assignment, which do write masking. See ir_assignment
1440 ir
->val
->accept(this);
1442 assert(src
.file
!= PROGRAM_UNDEFINED
);
1443 assert(ir
->type
->vector_elements
> 0);
1445 for (i
= 0; i
< 4; i
++) {
1446 if (i
< ir
->type
->vector_elements
) {
1449 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1452 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1455 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1458 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1462 /* If the type is smaller than a vec4, replicate the last
1465 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1469 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1475 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1477 variable_storage
*entry
= find_variable_storage(ir
->var
);
1478 ir_variable
*var
= ir
->var
;
1481 switch (var
->data
.mode
) {
1482 case ir_var_uniform
:
1483 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1484 var
->data
.param_index
);
1485 this->variables
.push_tail(entry
);
1487 case ir_var_shader_in
:
1488 /* The linker assigns locations for varyings and attributes,
1489 * including deprecated builtins (like gl_Color),
1490 * user-assigned generic attributes (glBindVertexLocation),
1491 * and user-defined varyings.
1493 assert(var
->data
.location
!= -1);
1494 entry
= new(mem_ctx
) variable_storage(var
,
1496 var
->data
.location
);
1498 case ir_var_shader_out
:
1499 assert(var
->data
.location
!= -1);
1500 entry
= new(mem_ctx
) variable_storage(var
,
1502 var
->data
.location
);
1504 case ir_var_system_value
:
1505 entry
= new(mem_ctx
) variable_storage(var
,
1506 PROGRAM_SYSTEM_VALUE
,
1507 var
->data
.location
);
1510 case ir_var_temporary
:
1511 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1513 this->variables
.push_tail(entry
);
1515 next_temp
+= type_size(var
->type
);
1520 printf("Failed to make storage for %s\n", var
->name
);
1525 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1529 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1533 int element_size
= type_size(ir
->type
);
1535 index
= ir
->array_index
->constant_expression_value();
1537 ir
->array
->accept(this);
1541 src
.index
+= index
->value
.i
[0] * element_size
;
1543 /* Variable index array dereference. It eats the "vec4" of the
1544 * base of the array and an index that offsets the Mesa register
1547 ir
->array_index
->accept(this);
1551 if (element_size
== 1) {
1552 index_reg
= this->result
;
1554 index_reg
= get_temp(glsl_type::float_type
);
1556 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1557 this->result
, src_reg_for_float(element_size
));
1560 /* If there was already a relative address register involved, add the
1561 * new and the old together to get the new offset.
1563 if (src
.reladdr
!= NULL
) {
1564 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1566 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1567 index_reg
, *src
.reladdr
);
1569 index_reg
= accum_reg
;
1572 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1573 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1576 /* If the type is smaller than a vec4, replicate the last channel out. */
1577 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1578 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1580 src
.swizzle
= SWIZZLE_NOOP
;
1586 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1589 const glsl_type
*struct_type
= ir
->record
->type
;
1592 ir
->record
->accept(this);
1594 for (i
= 0; i
< struct_type
->length
; i
++) {
1595 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1597 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1600 /* If the type is smaller than a vec4, replicate the last channel out. */
1601 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1602 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1604 this->result
.swizzle
= SWIZZLE_NOOP
;
1606 this->result
.index
+= offset
;
1610 * We want to be careful in assignment setup to hit the actual storage
1611 * instead of potentially using a temporary like we might with the
1612 * ir_dereference handler.
1615 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1617 /* The LHS must be a dereference. If the LHS is a variable indexed array
1618 * access of a vector, it must be separated into a series conditional moves
1619 * before reaching this point (see ir_vec_index_to_cond_assign).
1621 assert(ir
->as_dereference());
1622 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1624 assert(!deref_array
->array
->type
->is_vector());
1627 /* Use the rvalue deref handler for the most part. We'll ignore
1628 * swizzles in it and write swizzles using writemask, though.
1631 return dst_reg(v
->result
);
1634 /* Calculate the sampler index and also calculate the base uniform location
1635 * for struct members.
1638 calc_sampler_offsets(struct gl_shader_program
*prog
, ir_dereference
*deref
,
1639 unsigned *offset
, unsigned *array_elements
,
1642 if (deref
->ir_type
== ir_type_dereference_variable
)
1645 switch (deref
->ir_type
) {
1646 case ir_type_dereference_array
: {
1647 ir_dereference_array
*deref_arr
= deref
->as_dereference_array();
1648 ir_constant
*array_index
=
1649 deref_arr
->array_index
->constant_expression_value();
1652 /* GLSL 1.10 and 1.20 allowed variable sampler array indices,
1653 * while GLSL 1.30 requires that the array indices be
1654 * constant integer expressions. We don't expect any driver
1655 * to actually work with a really variable array index, so
1656 * all that would work would be an unrolled loop counter that ends
1657 * up being constant above.
1659 ralloc_strcat(&prog
->data
->InfoLog
,
1660 "warning: Variable sampler array index unsupported.\n"
1661 "This feature of the language was removed in GLSL 1.20 "
1662 "and is unlikely to be supported for 1.10 in Mesa.\n");
1664 *offset
+= array_index
->value
.u
[0] * *array_elements
;
1667 *array_elements
*= deref_arr
->array
->type
->length
;
1669 calc_sampler_offsets(prog
, deref_arr
->array
->as_dereference(),
1670 offset
, array_elements
, location
);
1674 case ir_type_dereference_record
: {
1675 ir_dereference_record
*deref_record
= deref
->as_dereference_record();
1676 unsigned field_index
=
1677 deref_record
->record
->type
->field_index(deref_record
->field
);
1679 deref_record
->record
->type
->record_location_offset(field_index
);
1680 calc_sampler_offsets(prog
, deref_record
->record
->as_dereference(),
1681 offset
, array_elements
, location
);
1686 unreachable("Invalid deref type");
1692 get_sampler_uniform_value(class ir_dereference
*sampler
,
1693 struct gl_shader_program
*shader_program
,
1694 const struct gl_program
*prog
)
1696 GLuint shader
= _mesa_program_enum_to_shader_stage(prog
->Target
);
1697 ir_variable
*var
= sampler
->variable_referenced();
1698 unsigned location
= var
->data
.location
;
1699 unsigned array_elements
= 1;
1700 unsigned offset
= 0;
1702 calc_sampler_offsets(shader_program
, sampler
, &offset
, &array_elements
,
1705 assert(shader_program
->data
->UniformStorage
[location
].opaque
[shader
].active
);
1706 return shader_program
->data
->UniformStorage
[location
].opaque
[shader
].index
+
1711 * Process the condition of a conditional assignment
1713 * Examines the condition of a conditional assignment to generate the optimal
1714 * first operand of a \c CMP instruction. If the condition is a relational
1715 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1716 * used as the source for the \c CMP instruction. Otherwise the comparison
1717 * is processed to a boolean result, and the boolean result is used as the
1718 * operand to the CMP instruction.
1721 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1723 ir_rvalue
*src_ir
= ir
;
1725 bool switch_order
= false;
1727 ir_expression
*const expr
= ir
->as_expression();
1728 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
1729 bool zero_on_left
= false;
1731 if (expr
->operands
[0]->is_zero()) {
1732 src_ir
= expr
->operands
[1];
1733 zero_on_left
= true;
1734 } else if (expr
->operands
[1]->is_zero()) {
1735 src_ir
= expr
->operands
[0];
1736 zero_on_left
= false;
1740 * (a < 0) T F F ( a < 0) T F F
1741 * (0 < a) F F T (-a < 0) F F T
1742 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1743 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1744 * (a > 0) F F T (-a < 0) F F T
1745 * (0 > a) T F F ( a < 0) T F F
1746 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1747 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1749 * Note that exchanging the order of 0 and 'a' in the comparison simply
1750 * means that the value of 'a' should be negated.
1753 switch (expr
->operation
) {
1755 switch_order
= false;
1756 negate
= zero_on_left
;
1759 case ir_binop_greater
:
1760 switch_order
= false;
1761 negate
= !zero_on_left
;
1764 case ir_binop_lequal
:
1765 switch_order
= true;
1766 negate
= !zero_on_left
;
1769 case ir_binop_gequal
:
1770 switch_order
= true;
1771 negate
= zero_on_left
;
1775 /* This isn't the right kind of comparison afterall, so make sure
1776 * the whole condition is visited.
1784 src_ir
->accept(this);
1786 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1787 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1788 * choose which value OPCODE_CMP produces without an extra instruction
1789 * computing the condition.
1792 this->result
.negate
= ~this->result
.negate
;
1794 return switch_order
;
1798 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1804 ir
->rhs
->accept(this);
1807 l
= get_assignment_lhs(ir
->lhs
, this);
1809 /* FINISHME: This should really set to the correct maximal writemask for each
1810 * FINISHME: component written (in the loops below). This case can only
1811 * FINISHME: occur for matrices, arrays, and structures.
1813 if (ir
->write_mask
== 0) {
1814 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1815 l
.writemask
= WRITEMASK_XYZW
;
1816 } else if (ir
->lhs
->type
->is_scalar()) {
1817 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1818 * FINISHME: W component of fragment shader output zero, work correctly.
1820 l
.writemask
= WRITEMASK_XYZW
;
1823 int first_enabled_chan
= 0;
1826 assert(ir
->lhs
->type
->is_vector());
1827 l
.writemask
= ir
->write_mask
;
1829 for (int i
= 0; i
< 4; i
++) {
1830 if (l
.writemask
& (1 << i
)) {
1831 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1836 /* Swizzle a small RHS vector into the channels being written.
1838 * glsl ir treats write_mask as dictating how many channels are
1839 * present on the RHS while Mesa IR treats write_mask as just
1840 * showing which channels of the vec4 RHS get written.
1842 for (int i
= 0; i
< 4; i
++) {
1843 if (l
.writemask
& (1 << i
))
1844 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1846 swizzles
[i
] = first_enabled_chan
;
1848 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1849 swizzles
[2], swizzles
[3]);
1852 assert(l
.file
!= PROGRAM_UNDEFINED
);
1853 assert(r
.file
!= PROGRAM_UNDEFINED
);
1855 if (ir
->condition
) {
1856 const bool switch_order
= this->process_move_condition(ir
->condition
);
1857 src_reg condition
= this->result
;
1859 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1861 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1863 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1870 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1871 emit(ir
, OPCODE_MOV
, l
, r
);
1880 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1883 GLfloat stack_vals
[4] = { 0 };
1884 GLfloat
*values
= stack_vals
;
1887 /* Unfortunately, 4 floats is all we can get into
1888 * _mesa_add_unnamed_constant. So, make a temp to store an
1889 * aggregate constant and move each constant value into it. If we
1890 * get lucky, copy propagation will eliminate the extra moves.
1893 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
1894 src_reg temp_base
= get_temp(ir
->type
);
1895 dst_reg temp
= dst_reg(temp_base
);
1897 foreach_in_list(ir_constant
, field_value
, &ir
->components
) {
1898 int size
= type_size(field_value
->type
);
1902 field_value
->accept(this);
1905 for (i
= 0; i
< (unsigned int)size
; i
++) {
1906 emit(ir
, OPCODE_MOV
, temp
, src
);
1912 this->result
= temp_base
;
1916 if (ir
->type
->is_array()) {
1917 src_reg temp_base
= get_temp(ir
->type
);
1918 dst_reg temp
= dst_reg(temp_base
);
1919 int size
= type_size(ir
->type
->fields
.array
);
1923 for (i
= 0; i
< ir
->type
->length
; i
++) {
1924 ir
->array_elements
[i
]->accept(this);
1926 for (int j
= 0; j
< size
; j
++) {
1927 emit(ir
, OPCODE_MOV
, temp
, src
);
1933 this->result
= temp_base
;
1937 if (ir
->type
->is_matrix()) {
1938 src_reg mat
= get_temp(ir
->type
);
1939 dst_reg mat_column
= dst_reg(mat
);
1941 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1942 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1943 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1945 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1946 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1947 (gl_constant_value
*) values
,
1948 ir
->type
->vector_elements
,
1950 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1959 src
.file
= PROGRAM_CONSTANT
;
1960 switch (ir
->type
->base_type
) {
1961 case GLSL_TYPE_FLOAT
:
1962 values
= &ir
->value
.f
[0];
1964 case GLSL_TYPE_UINT
:
1965 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1966 values
[i
] = ir
->value
.u
[i
];
1970 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1971 values
[i
] = ir
->value
.i
[i
];
1974 case GLSL_TYPE_BOOL
:
1975 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1976 values
[i
] = ir
->value
.b
[i
];
1980 assert(!"Non-float/uint/int/bool constant");
1983 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1984 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1985 (gl_constant_value
*) values
,
1986 ir
->type
->vector_elements
,
1987 &this->result
.swizzle
);
1991 ir_to_mesa_visitor::visit(ir_call
*)
1993 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
1997 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1999 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
2000 dst_reg result_dst
, coord_dst
;
2001 ir_to_mesa_instruction
*inst
= NULL
;
2002 prog_opcode opcode
= OPCODE_NOP
;
2004 if (ir
->op
== ir_txs
)
2005 this->result
= src_reg_for_float(0.0);
2007 ir
->coordinate
->accept(this);
2009 /* Put our coords in a temp. We'll need to modify them for shadow,
2010 * projection, or LOD, so the only case we'd use it as-is is if
2011 * we're doing plain old texturing. Mesa IR optimization should
2012 * handle cleaning up our mess in that case.
2014 coord
= get_temp(glsl_type::vec4_type
);
2015 coord_dst
= dst_reg(coord
);
2016 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2018 if (ir
->projector
) {
2019 ir
->projector
->accept(this);
2020 projector
= this->result
;
2023 /* Storage for our result. Ideally for an assignment we'd be using
2024 * the actual storage for the result here, instead.
2026 result_src
= get_temp(glsl_type::vec4_type
);
2027 result_dst
= dst_reg(result_src
);
2032 opcode
= OPCODE_TEX
;
2035 opcode
= OPCODE_TXB
;
2036 ir
->lod_info
.bias
->accept(this);
2037 lod_info
= this->result
;
2040 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2042 opcode
= OPCODE_TXL
;
2043 ir
->lod_info
.lod
->accept(this);
2044 lod_info
= this->result
;
2047 opcode
= OPCODE_TXD
;
2048 ir
->lod_info
.grad
.dPdx
->accept(this);
2050 ir
->lod_info
.grad
.dPdy
->accept(this);
2054 assert(!"Unexpected ir_txf_ms opcode");
2057 assert(!"Unexpected ir_lod opcode");
2060 assert(!"Unexpected ir_tg4 opcode");
2062 case ir_query_levels
:
2063 assert(!"Unexpected ir_query_levels opcode");
2065 case ir_samples_identical
:
2066 unreachable("Unexpected ir_samples_identical opcode");
2067 case ir_texture_samples
:
2068 unreachable("Unexpected ir_texture_samples opcode");
2071 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2073 if (ir
->projector
) {
2074 if (opcode
== OPCODE_TEX
) {
2075 /* Slot the projector in as the last component of the coord. */
2076 coord_dst
.writemask
= WRITEMASK_W
;
2077 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2078 coord_dst
.writemask
= WRITEMASK_XYZW
;
2079 opcode
= OPCODE_TXP
;
2081 src_reg coord_w
= coord
;
2082 coord_w
.swizzle
= SWIZZLE_WWWW
;
2084 /* For the other TEX opcodes there's no projective version
2085 * since the last slot is taken up by lod info. Do the
2086 * projective divide now.
2088 coord_dst
.writemask
= WRITEMASK_W
;
2089 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2091 /* In the case where we have to project the coordinates "by hand,"
2092 * the shadow comparator value must also be projected.
2094 src_reg tmp_src
= coord
;
2095 if (ir
->shadow_comparator
) {
2096 /* Slot the shadow value in as the second to last component of the
2099 ir
->shadow_comparator
->accept(this);
2101 tmp_src
= get_temp(glsl_type::vec4_type
);
2102 dst_reg tmp_dst
= dst_reg(tmp_src
);
2104 /* Projective division not allowed for array samplers. */
2105 assert(!sampler_type
->sampler_array
);
2107 tmp_dst
.writemask
= WRITEMASK_Z
;
2108 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2110 tmp_dst
.writemask
= WRITEMASK_XY
;
2111 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2114 coord_dst
.writemask
= WRITEMASK_XYZ
;
2115 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2117 coord_dst
.writemask
= WRITEMASK_XYZW
;
2118 coord
.swizzle
= SWIZZLE_XYZW
;
2122 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2123 * comparator was put in the correct place (and projected) by the code,
2124 * above, that handles by-hand projection.
2126 if (ir
->shadow_comparator
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2127 /* Slot the shadow value in as the second to last component of the
2130 ir
->shadow_comparator
->accept(this);
2132 /* XXX This will need to be updated for cubemap array samplers. */
2133 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2134 sampler_type
->sampler_array
) {
2135 coord_dst
.writemask
= WRITEMASK_W
;
2137 coord_dst
.writemask
= WRITEMASK_Z
;
2140 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2141 coord_dst
.writemask
= WRITEMASK_XYZW
;
2144 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2145 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2146 coord_dst
.writemask
= WRITEMASK_W
;
2147 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2148 coord_dst
.writemask
= WRITEMASK_XYZW
;
2151 if (opcode
== OPCODE_TXD
)
2152 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2154 inst
= emit(ir
, opcode
, result_dst
, coord
);
2156 if (ir
->shadow_comparator
)
2157 inst
->tex_shadow
= GL_TRUE
;
2159 inst
->sampler
= get_sampler_uniform_value(ir
->sampler
, shader_program
,
2162 switch (sampler_type
->sampler_dimensionality
) {
2163 case GLSL_SAMPLER_DIM_1D
:
2164 inst
->tex_target
= (sampler_type
->sampler_array
)
2165 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2167 case GLSL_SAMPLER_DIM_2D
:
2168 inst
->tex_target
= (sampler_type
->sampler_array
)
2169 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2171 case GLSL_SAMPLER_DIM_3D
:
2172 inst
->tex_target
= TEXTURE_3D_INDEX
;
2174 case GLSL_SAMPLER_DIM_CUBE
:
2175 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2177 case GLSL_SAMPLER_DIM_RECT
:
2178 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2180 case GLSL_SAMPLER_DIM_BUF
:
2181 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2183 case GLSL_SAMPLER_DIM_EXTERNAL
:
2184 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2187 assert(!"Should not get here.");
2190 this->result
= result_src
;
2194 ir_to_mesa_visitor::visit(ir_return
*ir
)
2196 /* Non-void functions should have been inlined. We may still emit RETs
2197 * from main() unless the EmitNoMainReturn option is set.
2199 assert(!ir
->get_value());
2200 emit(ir
, OPCODE_RET
);
2204 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2207 ir
->condition
= new(mem_ctx
) ir_constant(true);
2209 ir
->condition
->accept(this);
2210 this->result
.negate
= ~this->result
.negate
;
2211 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2215 ir_to_mesa_visitor::visit(ir_if
*ir
)
2217 ir_to_mesa_instruction
*if_inst
;
2219 ir
->condition
->accept(this);
2220 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2222 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2224 this->instructions
.push_tail(if_inst
);
2226 visit_exec_list(&ir
->then_instructions
, this);
2228 if (!ir
->else_instructions
.is_empty()) {
2229 emit(ir
->condition
, OPCODE_ELSE
);
2230 visit_exec_list(&ir
->else_instructions
, this);
2233 emit(ir
->condition
, OPCODE_ENDIF
);
2237 ir_to_mesa_visitor::visit(ir_emit_vertex
*)
2239 assert(!"Geometry shaders not supported.");
2243 ir_to_mesa_visitor::visit(ir_end_primitive
*)
2245 assert(!"Geometry shaders not supported.");
2249 ir_to_mesa_visitor::visit(ir_barrier
*)
2251 unreachable("GLSL barrier() not supported.");
2254 ir_to_mesa_visitor::ir_to_mesa_visitor()
2256 result
.file
= PROGRAM_UNDEFINED
;
2258 next_signature_id
= 1;
2259 current_function
= NULL
;
2260 mem_ctx
= ralloc_context(NULL
);
2263 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2265 ralloc_free(mem_ctx
);
2268 static struct prog_src_register
2269 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2271 struct prog_src_register mesa_reg
;
2273 mesa_reg
.File
= reg
.file
;
2274 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2275 mesa_reg
.Index
= reg
.index
;
2276 mesa_reg
.Swizzle
= reg
.swizzle
;
2277 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2278 mesa_reg
.Negate
= reg
.negate
;
2284 set_branchtargets(ir_to_mesa_visitor
*v
,
2285 struct prog_instruction
*mesa_instructions
,
2286 int num_instructions
)
2288 int if_count
= 0, loop_count
= 0;
2289 int *if_stack
, *loop_stack
;
2290 int if_stack_pos
= 0, loop_stack_pos
= 0;
2293 for (i
= 0; i
< num_instructions
; i
++) {
2294 switch (mesa_instructions
[i
].Opcode
) {
2298 case OPCODE_BGNLOOP
:
2303 mesa_instructions
[i
].BranchTarget
= -1;
2310 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2311 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2313 for (i
= 0; i
< num_instructions
; i
++) {
2314 switch (mesa_instructions
[i
].Opcode
) {
2316 if_stack
[if_stack_pos
] = i
;
2320 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2321 if_stack
[if_stack_pos
- 1] = i
;
2324 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2327 case OPCODE_BGNLOOP
:
2328 loop_stack
[loop_stack_pos
] = i
;
2331 case OPCODE_ENDLOOP
:
2333 /* Rewrite any breaks/conts at this nesting level (haven't
2334 * already had a BranchTarget assigned) to point to the end
2337 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2338 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2339 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2340 if (mesa_instructions
[j
].BranchTarget
== -1) {
2341 mesa_instructions
[j
].BranchTarget
= i
;
2345 /* The loop ends point at each other. */
2346 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2347 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2350 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
2351 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2352 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2364 print_program(struct prog_instruction
*mesa_instructions
,
2365 ir_instruction
**mesa_instruction_annotation
,
2366 int num_instructions
)
2368 ir_instruction
*last_ir
= NULL
;
2372 for (i
= 0; i
< num_instructions
; i
++) {
2373 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2374 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2376 fprintf(stdout
, "%3d: ", i
);
2378 if (last_ir
!= ir
&& ir
) {
2381 for (j
= 0; j
< indent
; j
++) {
2382 fprintf(stdout
, " ");
2388 fprintf(stdout
, " "); /* line number spacing. */
2391 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2392 PROG_PRINT_DEBUG
, NULL
);
2398 class add_uniform_to_shader
: public program_resource_visitor
{
2400 add_uniform_to_shader(struct gl_shader_program
*shader_program
,
2401 struct gl_program_parameter_list
*params
,
2402 gl_shader_stage shader_type
)
2403 : shader_program(shader_program
), params(params
), idx(-1),
2404 shader_type(shader_type
)
2409 void process(ir_variable
*var
)
2412 this->program_resource_visitor::process(var
);
2413 var
->data
.param_index
= this->idx
;
2417 virtual void visit_field(const glsl_type
*type
, const char *name
,
2418 bool row_major
, const glsl_type
*record_type
,
2419 const enum glsl_interface_packing packing
,
2422 struct gl_shader_program
*shader_program
;
2423 struct gl_program_parameter_list
*params
;
2425 gl_shader_stage shader_type
;
2428 } /* anonymous namespace */
2431 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2432 bool /* row_major */,
2433 const glsl_type
* /* record_type */,
2434 const enum glsl_interface_packing
,
2435 bool /* last_field */)
2439 /* atomics don't get real storage */
2440 if (type
->contains_atomic())
2443 if (type
->is_vector() || type
->is_scalar()) {
2444 size
= type
->vector_elements
;
2445 if (type
->is_64bit())
2448 size
= type_size(type
) * 4;
2451 gl_register_file file
;
2452 if (type
->without_array()->is_sampler()) {
2453 file
= PROGRAM_SAMPLER
;
2455 file
= PROGRAM_UNIFORM
;
2458 int index
= _mesa_lookup_parameter_index(params
, name
);
2460 index
= _mesa_add_parameter(params
, file
, name
, size
, type
->gl_type
,
2463 /* Sampler uniform values are stored in prog->SamplerUnits,
2464 * and the entry in that array is selected by this index we
2465 * store in ParameterValues[].
2467 if (file
== PROGRAM_SAMPLER
) {
2470 this->shader_program
->UniformHash
->get(location
,
2471 params
->Parameters
[index
].Name
);
2477 struct gl_uniform_storage
*storage
=
2478 &this->shader_program
->data
->UniformStorage
[location
];
2480 assert(storage
->type
->is_sampler() &&
2481 storage
->opaque
[shader_type
].active
);
2483 for (unsigned int j
= 0; j
< size
/ 4; j
++)
2484 params
->ParameterValues
[index
+ j
][0].f
=
2485 storage
->opaque
[shader_type
].index
+ j
;
2489 /* The first part of the uniform that's processed determines the base
2490 * location of the whole uniform (for structures).
2497 * Generate the program parameters list for the user uniforms in a shader
2499 * \param shader_program Linked shader program. This is only used to
2500 * emit possible link errors to the info log.
2501 * \param sh Shader whose uniforms are to be processed.
2502 * \param params Parameter list to be filled in.
2505 _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program
2507 struct gl_linked_shader
*sh
,
2508 struct gl_program_parameter_list
2511 add_uniform_to_shader
add(shader_program
, params
, sh
->Stage
);
2513 foreach_in_list(ir_instruction
, node
, sh
->ir
) {
2514 ir_variable
*var
= node
->as_variable();
2516 if ((var
== NULL
) || (var
->data
.mode
!= ir_var_uniform
)
2517 || var
->is_in_buffer_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2525 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2526 struct gl_shader_program
*shader_program
,
2527 struct gl_program_parameter_list
*params
)
2529 /* After adding each uniform to the parameter list, connect the storage for
2530 * the parameter with the tracking structure used by the API for the
2533 unsigned last_location
= unsigned(~0);
2534 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2535 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2540 shader_program
->UniformHash
->get(location
, params
->Parameters
[i
].Name
);
2546 struct gl_uniform_storage
*storage
=
2547 &shader_program
->data
->UniformStorage
[location
];
2549 /* Do not associate any uniform storage to built-in uniforms */
2550 if (storage
->builtin
)
2553 if (location
!= last_location
) {
2554 enum gl_uniform_driver_format format
= uniform_native
;
2556 unsigned columns
= 0;
2557 int dmul
= 4 * sizeof(float);
2558 switch (storage
->type
->base_type
) {
2559 case GLSL_TYPE_UINT64
:
2560 if (storage
->type
->vector_elements
> 2)
2563 case GLSL_TYPE_UINT
:
2564 assert(ctx
->Const
.NativeIntegers
);
2565 format
= uniform_native
;
2568 case GLSL_TYPE_INT64
:
2569 if (storage
->type
->vector_elements
> 2)
2574 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2578 case GLSL_TYPE_DOUBLE
:
2579 if (storage
->type
->vector_elements
> 2)
2582 case GLSL_TYPE_FLOAT
:
2583 format
= uniform_native
;
2584 columns
= storage
->type
->matrix_columns
;
2586 case GLSL_TYPE_BOOL
:
2587 format
= uniform_native
;
2590 case GLSL_TYPE_SAMPLER
:
2591 case GLSL_TYPE_IMAGE
:
2592 case GLSL_TYPE_SUBROUTINE
:
2593 format
= uniform_native
;
2596 case GLSL_TYPE_ATOMIC_UINT
:
2597 case GLSL_TYPE_ARRAY
:
2598 case GLSL_TYPE_VOID
:
2599 case GLSL_TYPE_STRUCT
:
2600 case GLSL_TYPE_ERROR
:
2601 case GLSL_TYPE_INTERFACE
:
2602 case GLSL_TYPE_FUNCTION
:
2603 assert(!"Should not get here.");
2607 _mesa_uniform_attach_driver_storage(storage
,
2611 ¶ms
->ParameterValues
[i
]);
2613 /* After attaching the driver's storage to the uniform, propagate any
2614 * data from the linker's backing store. This will cause values from
2615 * initializers in the source code to be copied over.
2617 _mesa_propagate_uniforms_to_driver_storage(storage
,
2619 MAX2(1, storage
->array_elements
));
2621 last_location
= location
;
2627 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2628 * channels for copy propagation and updates following instructions to
2629 * use the original versions.
2631 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2632 * will occur. As an example, a TXP production before this pass:
2634 * 0: MOV TEMP[1], INPUT[4].xyyy;
2635 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2636 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2640 * 0: MOV TEMP[1], INPUT[4].xyyy;
2641 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2642 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2644 * which allows for dead code elimination on TEMP[1]'s writes.
2647 ir_to_mesa_visitor::copy_propagate(void)
2649 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2650 ir_to_mesa_instruction
*,
2651 this->next_temp
* 4);
2652 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2655 foreach_in_list(ir_to_mesa_instruction
, inst
, &this->instructions
) {
2656 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2657 || inst
->dst
.index
< this->next_temp
);
2659 /* First, do any copy propagation possible into the src regs. */
2660 for (int r
= 0; r
< 3; r
++) {
2661 ir_to_mesa_instruction
*first
= NULL
;
2663 int acp_base
= inst
->src
[r
].index
* 4;
2665 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2666 inst
->src
[r
].reladdr
)
2669 /* See if we can find entries in the ACP consisting of MOVs
2670 * from the same src register for all the swizzled channels
2671 * of this src register reference.
2673 for (int i
= 0; i
< 4; i
++) {
2674 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2675 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2682 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2687 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2688 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2696 /* We've now validated that we can copy-propagate to
2697 * replace this src register reference. Do it.
2699 inst
->src
[r
].file
= first
->src
[0].file
;
2700 inst
->src
[r
].index
= first
->src
[0].index
;
2703 for (int i
= 0; i
< 4; i
++) {
2704 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2705 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2706 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2709 inst
->src
[r
].swizzle
= swizzle
;
2714 case OPCODE_BGNLOOP
:
2715 case OPCODE_ENDLOOP
:
2716 /* End of a basic block, clear the ACP entirely. */
2717 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2726 /* Clear all channels written inside the block from the ACP, but
2727 * leaving those that were not touched.
2729 for (int r
= 0; r
< this->next_temp
; r
++) {
2730 for (int c
= 0; c
< 4; c
++) {
2731 if (!acp
[4 * r
+ c
])
2734 if (acp_level
[4 * r
+ c
] >= level
)
2735 acp
[4 * r
+ c
] = NULL
;
2738 if (inst
->op
== OPCODE_ENDIF
)
2743 /* Continuing the block, clear any written channels from
2746 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2747 /* Any temporary might be written, so no copy propagation
2748 * across this instruction.
2750 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2751 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2752 inst
->dst
.reladdr
) {
2753 /* Any output might be written, so no copy propagation
2754 * from outputs across this instruction.
2756 for (int r
= 0; r
< this->next_temp
; r
++) {
2757 for (int c
= 0; c
< 4; c
++) {
2758 if (!acp
[4 * r
+ c
])
2761 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2762 acp
[4 * r
+ c
] = NULL
;
2765 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2766 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2767 /* Clear where it's used as dst. */
2768 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2769 for (int c
= 0; c
< 4; c
++) {
2770 if (inst
->dst
.writemask
& (1 << c
)) {
2771 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2776 /* Clear where it's used as src. */
2777 for (int r
= 0; r
< this->next_temp
; r
++) {
2778 for (int c
= 0; c
< 4; c
++) {
2779 if (!acp
[4 * r
+ c
])
2782 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2784 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2785 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2786 inst
->dst
.writemask
& (1 << src_chan
))
2788 acp
[4 * r
+ c
] = NULL
;
2796 /* If this is a copy, add it to the ACP. */
2797 if (inst
->op
== OPCODE_MOV
&&
2798 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2799 !(inst
->dst
.file
== inst
->src
[0].file
&&
2800 inst
->dst
.index
== inst
->src
[0].index
) &&
2801 !inst
->dst
.reladdr
&&
2803 !inst
->src
[0].reladdr
&&
2804 !inst
->src
[0].negate
) {
2805 for (int i
= 0; i
< 4; i
++) {
2806 if (inst
->dst
.writemask
& (1 << i
)) {
2807 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2808 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2814 ralloc_free(acp_level
);
2820 * Convert a shader's GLSL IR into a Mesa gl_program.
2822 static struct gl_program
*
2823 get_mesa_program(struct gl_context
*ctx
,
2824 struct gl_shader_program
*shader_program
,
2825 struct gl_linked_shader
*shader
)
2827 ir_to_mesa_visitor v
;
2828 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2829 ir_instruction
**mesa_instruction_annotation
;
2831 struct gl_program
*prog
;
2832 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
2833 const char *target_string
= _mesa_shader_stage_to_string(shader
->Stage
);
2834 struct gl_shader_compiler_options
*options
=
2835 &ctx
->Const
.ShaderCompilerOptions
[shader
->Stage
];
2837 validate_ir_tree(shader
->ir
);
2839 prog
= shader
->Program
;
2840 prog
->Parameters
= _mesa_new_parameter_list();
2843 v
.shader_program
= shader_program
;
2844 v
.options
= options
;
2846 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
2849 /* Emit Mesa IR for main(). */
2850 visit_exec_list(shader
->ir
, &v
);
2851 v
.emit(NULL
, OPCODE_END
);
2853 prog
->arb
.NumTemporaries
= v
.next_temp
;
2855 unsigned num_instructions
= v
.instructions
.length();
2857 mesa_instructions
= rzalloc_array(prog
, struct prog_instruction
,
2859 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2864 /* Convert ir_mesa_instructions into prog_instructions.
2866 mesa_inst
= mesa_instructions
;
2868 foreach_in_list(const ir_to_mesa_instruction
, inst
, &v
.instructions
) {
2869 mesa_inst
->Opcode
= inst
->op
;
2871 mesa_inst
->Saturate
= GL_TRUE
;
2872 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2873 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2874 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2875 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2876 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2877 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2878 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2879 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2880 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2881 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2882 mesa_instruction_annotation
[i
] = inst
->ir
;
2884 /* Set IndirectRegisterFiles. */
2885 if (mesa_inst
->DstReg
.RelAddr
)
2886 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2888 /* Update program's bitmask of indirectly accessed register files */
2889 for (unsigned src
= 0; src
< 3; src
++)
2890 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2891 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2893 switch (mesa_inst
->Opcode
) {
2895 if (options
->MaxIfDepth
== 0) {
2896 linker_warning(shader_program
,
2897 "Couldn't flatten if-statement. "
2898 "This will likely result in software "
2899 "rasterization.\n");
2902 case OPCODE_BGNLOOP
:
2903 if (options
->EmitNoLoops
) {
2904 linker_warning(shader_program
,
2905 "Couldn't unroll loop. "
2906 "This will likely result in software "
2907 "rasterization.\n");
2911 if (options
->EmitNoCont
) {
2912 linker_warning(shader_program
,
2913 "Couldn't lower continue-statement. "
2914 "This will likely result in software "
2915 "rasterization.\n");
2919 prog
->arb
.NumAddressRegs
= 1;
2928 if (!shader_program
->data
->LinkStatus
)
2932 if (!shader_program
->data
->LinkStatus
) {
2936 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2938 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
2939 fprintf(stderr
, "\n");
2940 fprintf(stderr
, "GLSL IR for linked %s program %d:\n", target_string
,
2941 shader_program
->Name
);
2942 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
2943 fprintf(stderr
, "\n");
2944 fprintf(stderr
, "\n");
2945 fprintf(stderr
, "Mesa IR for linked %s program %d:\n", target_string
,
2946 shader_program
->Name
);
2947 print_program(mesa_instructions
, mesa_instruction_annotation
,
2952 prog
->arb
.Instructions
= mesa_instructions
;
2953 prog
->arb
.NumInstructions
= num_instructions
;
2955 /* Setting this to NULL prevents a possible double free in the fail_exit
2958 mesa_instructions
= NULL
;
2960 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
2962 prog
->ShadowSamplers
= shader
->shadow_samplers
;
2963 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
2964 _mesa_update_shader_textures_used(shader_program
, prog
);
2966 /* Set the gl_FragDepth layout. */
2967 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
2968 prog
->info
.fs
.depth_layout
= shader_program
->FragDepthLayout
;
2971 if ((ctx
->_Shader
->Flags
& GLSL_NO_OPT
) == 0) {
2972 _mesa_optimize_program(ctx
, prog
, prog
);
2975 /* This has to be done last. Any operation that can cause
2976 * prog->ParameterValues to get reallocated (e.g., anything that adds a
2977 * program constant) has to happen before creating this linkage.
2979 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
2980 if (!shader_program
->data
->LinkStatus
) {
2987 ralloc_free(mesa_instructions
);
2988 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
2996 * Called via ctx->Driver.LinkShader()
2997 * This actually involves converting GLSL IR into Mesa gl_programs with
2998 * code lowering and other optimizations.
3001 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3003 assert(prog
->data
->LinkStatus
);
3005 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3006 if (prog
->_LinkedShaders
[i
] == NULL
)
3010 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3011 const struct gl_shader_compiler_options
*options
=
3012 &ctx
->Const
.ShaderCompilerOptions
[prog
->_LinkedShaders
[i
]->Stage
];
3018 do_mat_op_to_vec(ir
);
3019 lower_instructions(ir
, (MOD_TO_FLOOR
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3020 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3021 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3023 progress
= do_common_optimization(ir
, true, true,
3024 options
, ctx
->Const
.NativeIntegers
)
3027 progress
= lower_quadop_vector(ir
, true) || progress
;
3029 if (options
->MaxIfDepth
== 0)
3030 progress
= lower_discard(ir
) || progress
;
3032 progress
= lower_if_to_cond_assign((gl_shader_stage
)i
, ir
,
3033 options
->MaxIfDepth
) || progress
;
3035 progress
= lower_noise(ir
) || progress
;
3037 /* If there are forms of indirect addressing that the driver
3038 * cannot handle, perform the lowering pass.
3040 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3041 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3043 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
3044 options
->EmitNoIndirectInput
,
3045 options
->EmitNoIndirectOutput
,
3046 options
->EmitNoIndirectTemp
,
3047 options
->EmitNoIndirectUniform
)
3050 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3051 progress
= lower_vector_insert(ir
, true) || progress
;
3054 validate_ir_tree(ir
);
3057 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3058 struct gl_program
*linked_prog
;
3060 if (prog
->_LinkedShaders
[i
] == NULL
)
3063 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3066 _mesa_copy_linked_program_data(prog
, prog
->_LinkedShaders
[i
]);
3068 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
3069 _mesa_shader_stage_to_program(i
),
3071 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3078 build_program_resource_list(ctx
, prog
);
3079 return prog
->data
->LinkStatus
;
3083 * Link a GLSL shader program. Called via glLinkProgram().
3086 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3090 _mesa_clear_shader_program_data(ctx
, prog
);
3092 prog
->data
->LinkStatus
= GL_TRUE
;
3094 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3095 if (!prog
->Shaders
[i
]->CompileStatus
) {
3096 linker_error(prog
, "linking with uncompiled shader");
3100 if (prog
->data
->LinkStatus
) {
3101 link_shaders(ctx
, prog
);
3104 if (prog
->data
->LinkStatus
) {
3105 if (!ctx
->Driver
.LinkShader(ctx
, prog
)) {
3106 prog
->data
->LinkStatus
= GL_FALSE
;
3110 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
3111 if (!prog
->data
->LinkStatus
) {
3112 fprintf(stderr
, "GLSL shader program %d failed to link\n", prog
->Name
);
3115 if (prog
->data
->InfoLog
&& prog
->data
->InfoLog
[0] != 0) {
3116 fprintf(stderr
, "GLSL shader program %d info log:\n", prog
->Name
);
3117 fprintf(stderr
, "%s\n", prog
->data
->InfoLog
);