2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/macros.h"
34 #include "main/mtypes.h"
35 #include "main/shaderapi.h"
36 #include "main/shaderobj.h"
37 #include "main/uniforms.h"
38 #include "compiler/glsl/ast.h"
39 #include "compiler/glsl/ir.h"
40 #include "compiler/glsl/ir_expression_flattening.h"
41 #include "compiler/glsl/ir_visitor.h"
42 #include "compiler/glsl/ir_optimization.h"
43 #include "compiler/glsl/ir_uniform.h"
44 #include "compiler/glsl/glsl_parser_extras.h"
45 #include "compiler/glsl_types.h"
46 #include "compiler/glsl/linker.h"
47 #include "compiler/glsl/program.h"
48 #include "compiler/glsl/shader_cache.h"
49 #include "compiler/glsl/string_to_uint_map.h"
50 #include "program/prog_instruction.h"
51 #include "program/prog_optimize.h"
52 #include "program/prog_print.h"
53 #include "program/program.h"
54 #include "program/prog_parameter.h"
57 static int swizzle_for_size(int size
);
65 * This struct is a corresponding struct to Mesa prog_src_register, with
70 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
74 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
75 this->swizzle
= swizzle_for_size(type
->vector_elements
);
77 this->swizzle
= SWIZZLE_XYZW
;
84 this->file
= PROGRAM_UNDEFINED
;
91 explicit src_reg(dst_reg reg
);
93 gl_register_file file
; /**< PROGRAM_* from Mesa */
94 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
95 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
96 int negate
; /**< NEGATE_XYZW mask from mesa */
97 /** Register index should be offset by the integer in this reg. */
103 dst_reg(gl_register_file file
, int writemask
)
107 this->writemask
= writemask
;
108 this->reladdr
= NULL
;
113 this->file
= PROGRAM_UNDEFINED
;
116 this->reladdr
= NULL
;
119 explicit dst_reg(src_reg reg
);
121 gl_register_file file
; /**< PROGRAM_* from Mesa */
122 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
123 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
124 /** Register index should be offset by the integer in this reg. */
128 } /* anonymous namespace */
130 src_reg::src_reg(dst_reg reg
)
132 this->file
= reg
.file
;
133 this->index
= reg
.index
;
134 this->swizzle
= SWIZZLE_XYZW
;
136 this->reladdr
= reg
.reladdr
;
139 dst_reg::dst_reg(src_reg reg
)
141 this->file
= reg
.file
;
142 this->index
= reg
.index
;
143 this->writemask
= WRITEMASK_XYZW
;
144 this->reladdr
= reg
.reladdr
;
149 class ir_to_mesa_instruction
: public exec_node
{
151 DECLARE_RALLOC_CXX_OPERATORS(ir_to_mesa_instruction
)
156 /** Pointer to the ir source this tree came from for debugging */
159 int sampler
; /**< sampler index */
160 int tex_target
; /**< One of TEXTURE_*_INDEX */
161 GLboolean tex_shadow
;
164 class variable_storage
: public exec_node
{
166 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
167 : file(file
), index(index
), var(var
)
172 gl_register_file file
;
174 ir_variable
*var
; /* variable that maps to this, if any */
177 class function_entry
: public exec_node
{
179 ir_function_signature
*sig
;
182 * identifier of this function signature used by the program.
184 * At the point that Mesa instructions for function calls are
185 * generated, we don't know the address of the first instruction of
186 * the function body. So we make the BranchTarget that is called a
187 * small integer and rewrite them during set_branchtargets().
192 * Pointer to first instruction of the function body.
194 * Set during function body emits after main() is processed.
196 ir_to_mesa_instruction
*bgn_inst
;
199 * Index of the first instruction of the function body in actual
202 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
206 /** Storage for the return value. */
210 class ir_to_mesa_visitor
: public ir_visitor
{
212 ir_to_mesa_visitor();
213 ~ir_to_mesa_visitor();
215 function_entry
*current_function
;
217 struct gl_context
*ctx
;
218 struct gl_program
*prog
;
219 struct gl_shader_program
*shader_program
;
220 struct gl_shader_compiler_options
*options
;
224 variable_storage
*find_variable_storage(const ir_variable
*var
);
226 src_reg
get_temp(const glsl_type
*type
);
227 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
229 src_reg
src_reg_for_float(float val
);
232 * \name Visit methods
234 * As typical for the visitor pattern, there must be one \c visit method for
235 * each concrete subclass of \c ir_instruction. Virtual base classes within
236 * the hierarchy should not have \c visit methods.
239 virtual void visit(ir_variable
*);
240 virtual void visit(ir_loop
*);
241 virtual void visit(ir_loop_jump
*);
242 virtual void visit(ir_function_signature
*);
243 virtual void visit(ir_function
*);
244 virtual void visit(ir_expression
*);
245 virtual void visit(ir_swizzle
*);
246 virtual void visit(ir_dereference_variable
*);
247 virtual void visit(ir_dereference_array
*);
248 virtual void visit(ir_dereference_record
*);
249 virtual void visit(ir_assignment
*);
250 virtual void visit(ir_constant
*);
251 virtual void visit(ir_call
*);
252 virtual void visit(ir_return
*);
253 virtual void visit(ir_discard
*);
254 virtual void visit(ir_texture
*);
255 virtual void visit(ir_if
*);
256 virtual void visit(ir_emit_vertex
*);
257 virtual void visit(ir_end_primitive
*);
258 virtual void visit(ir_barrier
*);
263 /** List of variable_storage */
266 /** List of function_entry */
267 exec_list function_signatures
;
268 int next_signature_id
;
270 /** List of ir_to_mesa_instruction */
271 exec_list instructions
;
273 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
275 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
276 dst_reg dst
, src_reg src0
);
278 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
279 dst_reg dst
, src_reg src0
, src_reg src1
);
281 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
283 src_reg src0
, src_reg src1
, src_reg src2
);
286 * Emit the correct dot-product instruction for the type of arguments
288 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
294 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
295 dst_reg dst
, src_reg src0
);
297 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
298 dst_reg dst
, src_reg src0
, src_reg src1
);
300 bool try_emit_mad(ir_expression
*ir
,
302 bool try_emit_mad_for_and_not(ir_expression
*ir
,
305 void emit_swz(ir_expression
*ir
);
307 void emit_equality_comparison(ir_expression
*ir
, enum prog_opcode op
,
309 const src_reg
&src0
, const src_reg
&src1
);
311 inline void emit_sne(ir_expression
*ir
, dst_reg dst
,
312 const src_reg
&src0
, const src_reg
&src1
)
314 emit_equality_comparison(ir
, OPCODE_SLT
, dst
, src0
, src1
);
317 inline void emit_seq(ir_expression
*ir
, dst_reg dst
,
318 const src_reg
&src0
, const src_reg
&src1
)
320 emit_equality_comparison(ir
, OPCODE_SGE
, dst
, src0
, src1
);
323 bool process_move_condition(ir_rvalue
*ir
);
325 void copy_propagate(void);
330 } /* anonymous namespace */
332 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
334 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
336 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
339 swizzle_for_size(int size
)
341 static const int size_swizzles
[4] = {
342 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
343 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
344 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
345 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
348 assert((size
>= 1) && (size
<= 4));
349 return size_swizzles
[size
- 1];
352 ir_to_mesa_instruction
*
353 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
355 src_reg src0
, src_reg src1
, src_reg src2
)
357 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
360 /* If we have to do relative addressing, we want to load the ARL
361 * reg directly for one of the regs, and preload the other reladdr
362 * sources into temps.
364 num_reladdr
+= dst
.reladdr
!= NULL
;
365 num_reladdr
+= src0
.reladdr
!= NULL
;
366 num_reladdr
+= src1
.reladdr
!= NULL
;
367 num_reladdr
+= src2
.reladdr
!= NULL
;
369 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
370 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
371 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
374 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
377 assert(num_reladdr
== 0);
386 this->instructions
.push_tail(inst
);
392 ir_to_mesa_instruction
*
393 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
394 dst_reg dst
, src_reg src0
, src_reg src1
)
396 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
399 ir_to_mesa_instruction
*
400 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
401 dst_reg dst
, src_reg src0
)
403 assert(dst
.writemask
!= 0);
404 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
407 ir_to_mesa_instruction
*
408 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
410 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
413 ir_to_mesa_instruction
*
414 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
415 dst_reg dst
, src_reg src0
, src_reg src1
,
418 static const enum prog_opcode dot_opcodes
[] = {
419 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
422 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
426 * Emits Mesa scalar opcodes to produce unique answers across channels.
428 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
429 * channel determines the result across all channels. So to do a vec4
430 * of this operation, we want to emit a scalar per source channel used
431 * to produce dest channels.
434 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
436 src_reg orig_src0
, src_reg orig_src1
)
439 int done_mask
= ~dst
.writemask
;
441 /* Mesa RCP is a scalar operation splatting results to all channels,
442 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
445 for (i
= 0; i
< 4; i
++) {
446 GLuint this_mask
= (1 << i
);
447 ir_to_mesa_instruction
*inst
;
448 src_reg src0
= orig_src0
;
449 src_reg src1
= orig_src1
;
451 if (done_mask
& this_mask
)
454 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
455 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
456 for (j
= i
+ 1; j
< 4; j
++) {
457 /* If there is another enabled component in the destination that is
458 * derived from the same inputs, generate its value on this pass as
461 if (!(done_mask
& (1 << j
)) &&
462 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
463 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
464 this_mask
|= (1 << j
);
467 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
468 src0_swiz
, src0_swiz
);
469 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
470 src1_swiz
, src1_swiz
);
472 inst
= emit(ir
, op
, dst
, src0
, src1
);
473 inst
->dst
.writemask
= this_mask
;
474 done_mask
|= this_mask
;
479 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
480 dst_reg dst
, src_reg src0
)
482 src_reg undef
= undef_src
;
484 undef
.swizzle
= SWIZZLE_XXXX
;
486 emit_scalar(ir
, op
, dst
, src0
, undef
);
490 ir_to_mesa_visitor::src_reg_for_float(float val
)
492 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
494 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
495 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
501 storage_type_size(const struct glsl_type
*type
, bool bindless
)
506 switch (type
->base_type
) {
509 case GLSL_TYPE_UINT8
:
511 case GLSL_TYPE_UINT16
:
512 case GLSL_TYPE_INT16
:
513 case GLSL_TYPE_FLOAT
:
514 case GLSL_TYPE_FLOAT16
:
516 if (type
->is_matrix()) {
517 return type
->matrix_columns
;
519 /* Regardless of size of vector, it gets a vec4. This is bad
520 * packing for things like floats, but otherwise arrays become a
521 * mess. Hopefully a later pass over the code can pack scalars
522 * down if appropriate.
527 case GLSL_TYPE_DOUBLE
:
528 if (type
->is_matrix()) {
529 if (type
->vector_elements
> 2)
530 return type
->matrix_columns
* 2;
532 return type
->matrix_columns
;
534 if (type
->vector_elements
> 2)
540 case GLSL_TYPE_UINT64
:
541 case GLSL_TYPE_INT64
:
542 if (type
->vector_elements
> 2)
546 case GLSL_TYPE_ARRAY
:
547 assert(type
->length
> 0);
548 return storage_type_size(type
->fields
.array
, bindless
) * type
->length
;
549 case GLSL_TYPE_STRUCT
:
551 for (i
= 0; i
< type
->length
; i
++) {
552 size
+= storage_type_size(type
->fields
.structure
[i
].type
, bindless
);
555 case GLSL_TYPE_SAMPLER
:
556 case GLSL_TYPE_IMAGE
:
560 case GLSL_TYPE_SUBROUTINE
:
562 case GLSL_TYPE_ATOMIC_UINT
:
564 case GLSL_TYPE_ERROR
:
565 case GLSL_TYPE_INTERFACE
:
566 case GLSL_TYPE_FUNCTION
:
567 assert(!"Invalid type in type_size");
575 type_size(const struct glsl_type
*type
)
577 return storage_type_size(type
, false);
581 * In the initial pass of codegen, we assign temporary numbers to
582 * intermediate results. (not SSA -- variable assignments will reuse
583 * storage). Actual register allocation for the Mesa VM occurs in a
584 * pass over the Mesa IR later.
587 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
591 src
.file
= PROGRAM_TEMPORARY
;
592 src
.index
= next_temp
;
594 next_temp
+= type_size(type
);
596 if (type
->is_array() || type
->is_record()) {
597 src
.swizzle
= SWIZZLE_NOOP
;
599 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
607 ir_to_mesa_visitor::find_variable_storage(const ir_variable
*var
)
609 foreach_in_list(variable_storage
, entry
, &this->variables
) {
610 if (entry
->var
== var
)
618 ir_to_mesa_visitor::visit(ir_variable
*ir
)
620 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
621 this->prog
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
622 this->prog
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
625 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
627 const ir_state_slot
*const slots
= ir
->get_state_slots();
628 assert(slots
!= NULL
);
630 /* Check if this statevar's setup in the STATE file exactly
631 * matches how we'll want to reference it as a
632 * struct/array/whatever. If not, then we need to move it into
633 * temporary storage and hope that it'll get copy-propagated
636 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
637 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
642 variable_storage
*storage
;
644 if (i
== ir
->get_num_state_slots()) {
645 /* We'll set the index later. */
646 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
647 this->variables
.push_tail(storage
);
651 /* The variable_storage constructor allocates slots based on the size
652 * of the type. However, this had better match the number of state
653 * elements that we're going to copy into the new temporary.
655 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
657 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
659 this->variables
.push_tail(storage
);
660 this->next_temp
+= type_size(ir
->type
);
662 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
666 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
667 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
670 if (storage
->file
== PROGRAM_STATE_VAR
) {
671 if (storage
->index
== -1) {
672 storage
->index
= index
;
674 assert(index
== storage
->index
+ (int)i
);
677 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
678 src
.swizzle
= slots
[i
].swizzle
;
679 emit(ir
, OPCODE_MOV
, dst
, src
);
680 /* even a float takes up a whole vec4 reg in a struct/array. */
685 if (storage
->file
== PROGRAM_TEMPORARY
&&
686 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
687 linker_error(this->shader_program
,
688 "failed to load builtin uniform `%s' "
689 "(%d/%d regs loaded)\n",
690 ir
->name
, dst
.index
- storage
->index
,
691 type_size(ir
->type
));
697 ir_to_mesa_visitor::visit(ir_loop
*ir
)
699 emit(NULL
, OPCODE_BGNLOOP
);
701 visit_exec_list(&ir
->body_instructions
, this);
703 emit(NULL
, OPCODE_ENDLOOP
);
707 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
710 case ir_loop_jump::jump_break
:
711 emit(NULL
, OPCODE_BRK
);
713 case ir_loop_jump::jump_continue
:
714 emit(NULL
, OPCODE_CONT
);
721 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
728 ir_to_mesa_visitor::visit(ir_function
*ir
)
730 /* Ignore function bodies other than main() -- we shouldn't see calls to
731 * them since they should all be inlined before we get to ir_to_mesa.
733 if (strcmp(ir
->name
, "main") == 0) {
734 const ir_function_signature
*sig
;
737 sig
= ir
->matching_signature(NULL
, &empty
, false);
741 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
748 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
750 int nonmul_operand
= 1 - mul_operand
;
753 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
754 if (!expr
|| expr
->operation
!= ir_binop_mul
)
757 expr
->operands
[0]->accept(this);
759 expr
->operands
[1]->accept(this);
761 ir
->operands
[nonmul_operand
]->accept(this);
764 this->result
= get_temp(ir
->type
);
765 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
771 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
773 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
774 * implemented using multiplication, and logical-or is implemented using
775 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
776 * As result, the logical expression (a & !b) can be rewritten as:
780 * - (a * 1) - (a * b)
784 * This final expression can be implemented as a single MAD(a, -b, a)
788 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
790 const int other_operand
= 1 - try_operand
;
793 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
794 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
797 ir
->operands
[other_operand
]->accept(this);
799 expr
->operands
[0]->accept(this);
802 b
.negate
= ~b
.negate
;
804 this->result
= get_temp(ir
->type
);
805 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
811 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
812 src_reg
*reg
, int *num_reladdr
)
817 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
819 if (*num_reladdr
!= 1) {
820 src_reg temp
= get_temp(glsl_type::vec4_type
);
822 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
830 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
832 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
833 * This means that each of the operands is either an immediate value of -1,
834 * 0, or 1, or is a component from one source register (possibly with
837 uint8_t components
[4] = { 0 };
838 bool negate
[4] = { false };
839 ir_variable
*var
= NULL
;
841 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
842 ir_rvalue
*op
= ir
->operands
[i
];
844 assert(op
->type
->is_scalar());
847 switch (op
->ir_type
) {
848 case ir_type_constant
: {
850 assert(op
->type
->is_scalar());
852 const ir_constant
*const c
= op
->as_constant();
854 components
[i
] = SWIZZLE_ONE
;
855 } else if (c
->is_zero()) {
856 components
[i
] = SWIZZLE_ZERO
;
857 } else if (c
->is_negative_one()) {
858 components
[i
] = SWIZZLE_ONE
;
861 assert(!"SWZ constant must be 0.0 or 1.0.");
868 case ir_type_dereference_variable
: {
869 ir_dereference_variable
*const deref
=
870 (ir_dereference_variable
*) op
;
872 assert((var
== NULL
) || (deref
->var
== var
));
873 components
[i
] = SWIZZLE_X
;
879 case ir_type_expression
: {
880 ir_expression
*const expr
= (ir_expression
*) op
;
882 assert(expr
->operation
== ir_unop_neg
);
885 op
= expr
->operands
[0];
889 case ir_type_swizzle
: {
890 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
892 components
[i
] = swiz
->mask
.x
;
898 assert(!"Should not get here.");
906 ir_dereference_variable
*const deref
=
907 new(mem_ctx
) ir_dereference_variable(var
);
909 this->result
.file
= PROGRAM_UNDEFINED
;
911 if (this->result
.file
== PROGRAM_UNDEFINED
) {
912 printf("Failed to get tree for expression operand:\n");
921 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
925 src
.negate
= ((unsigned(negate
[0]) << 0)
926 | (unsigned(negate
[1]) << 1)
927 | (unsigned(negate
[2]) << 2)
928 | (unsigned(negate
[3]) << 3));
930 /* Storage for our result. Ideally for an assignment we'd be using the
931 * actual storage for the result here, instead.
933 const src_reg result_src
= get_temp(ir
->type
);
934 dst_reg result_dst
= dst_reg(result_src
);
936 /* Limit writes to the channels that will be used by result_src later.
937 * This does limit this temp's use as a temporary for multi-instruction
940 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
942 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
943 this->result
= result_src
;
947 ir_to_mesa_visitor::emit_equality_comparison(ir_expression
*ir
,
954 src_reg abs_difference
= get_temp(glsl_type::vec4_type
);
955 const src_reg zero
= src_reg_for_float(0.0);
957 /* x == y is equivalent to -abs(x-y) >= 0. Since all of the code that
958 * consumes the generated IR is pretty dumb, take special care when one
959 * of the operands is zero.
961 * Similarly, x != y is equivalent to -abs(x-y) < 0.
963 if (src0
.file
== zero
.file
&&
964 src0
.index
== zero
.index
&&
965 src0
.swizzle
== zero
.swizzle
) {
967 } else if (src1
.file
== zero
.file
&&
968 src1
.index
== zero
.index
&&
969 src1
.swizzle
== zero
.swizzle
) {
972 difference
= get_temp(glsl_type::vec4_type
);
974 src_reg tmp_src
= src0
;
975 tmp_src
.negate
= ~tmp_src
.negate
;
977 emit(ir
, OPCODE_ADD
, dst_reg(difference
), tmp_src
, src1
);
980 emit(ir
, OPCODE_ABS
, dst_reg(abs_difference
), difference
);
982 abs_difference
.negate
= ~abs_difference
.negate
;
983 emit(ir
, op
, dst
, abs_difference
, zero
);
987 ir_to_mesa_visitor::visit(ir_expression
*ir
)
989 unsigned int operand
;
990 src_reg op
[ARRAY_SIZE(ir
->operands
)];
994 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
996 if (ir
->operation
== ir_binop_add
) {
997 if (try_emit_mad(ir
, 1))
999 if (try_emit_mad(ir
, 0))
1003 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1005 if (ir
->operation
== ir_binop_logic_and
) {
1006 if (try_emit_mad_for_and_not(ir
, 1))
1008 if (try_emit_mad_for_and_not(ir
, 0))
1012 if (ir
->operation
== ir_quadop_vector
) {
1017 for (operand
= 0; operand
< ir
->num_operands
; operand
++) {
1018 this->result
.file
= PROGRAM_UNDEFINED
;
1019 ir
->operands
[operand
]->accept(this);
1020 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1021 printf("Failed to get tree for expression operand:\n");
1022 ir
->operands
[operand
]->print();
1026 op
[operand
] = this->result
;
1028 /* Matrix expression operands should have been broken down to vector
1029 * operations already.
1031 assert(!ir
->operands
[operand
]->type
->is_matrix());
1034 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1035 if (ir
->operands
[1]) {
1036 vector_elements
= MAX2(vector_elements
,
1037 ir
->operands
[1]->type
->vector_elements
);
1040 this->result
.file
= PROGRAM_UNDEFINED
;
1042 /* Storage for our result. Ideally for an assignment we'd be using
1043 * the actual storage for the result here, instead.
1045 result_src
= get_temp(ir
->type
);
1046 /* convenience for the emit functions below. */
1047 result_dst
= dst_reg(result_src
);
1048 /* Limit writes to the channels that will be used by result_src later.
1049 * This does limit this temp's use as a temporary for multi-instruction
1052 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1054 switch (ir
->operation
) {
1055 case ir_unop_logic_not
:
1056 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1057 * older GPUs implement SEQ using multiple instructions (i915 uses two
1058 * SGE instructions and a MUL instruction). Since our logic values are
1059 * 0.0 and 1.0, 1-x also implements !x.
1061 op
[0].negate
= ~op
[0].negate
;
1062 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1065 op
[0].negate
= ~op
[0].negate
;
1069 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1072 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1075 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1079 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1082 assert(!"not reached: should be handled by exp_to_exp2");
1085 assert(!"not reached: should be handled by log_to_log2");
1088 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1091 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1094 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1098 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1101 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1104 case ir_unop_saturate
: {
1105 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_MOV
,
1107 inst
->saturate
= true;
1110 case ir_unop_noise
: {
1111 const enum prog_opcode opcode
=
1112 prog_opcode(OPCODE_NOISE1
1113 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1114 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1116 emit(ir
, opcode
, result_dst
, op
[0]);
1121 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1124 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1128 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1131 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1134 /* Floating point should be lowered by MOD_TO_FLOOR in the compiler. */
1135 assert(ir
->type
->is_integer());
1136 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1140 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1142 case ir_binop_gequal
:
1143 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1145 case ir_binop_equal
:
1146 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1148 case ir_binop_nequal
:
1149 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1151 case ir_binop_all_equal
:
1152 /* "==" operator producing a scalar boolean. */
1153 if (ir
->operands
[0]->type
->is_vector() ||
1154 ir
->operands
[1]->type
->is_vector()) {
1155 src_reg temp
= get_temp(glsl_type::vec4_type
);
1156 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1158 /* After the dot-product, the value will be an integer on the
1159 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1161 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1163 /* Negating the result of the dot-product gives values on the range
1164 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1165 * achieved using SGE.
1167 src_reg sge_src
= result_src
;
1168 sge_src
.negate
= ~sge_src
.negate
;
1169 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1171 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1174 case ir_binop_any_nequal
:
1175 /* "!=" operator producing a scalar boolean. */
1176 if (ir
->operands
[0]->type
->is_vector() ||
1177 ir
->operands
[1]->type
->is_vector()) {
1178 src_reg temp
= get_temp(glsl_type::vec4_type
);
1179 if (ir
->operands
[0]->type
->is_boolean() &&
1180 ir
->operands
[1]->as_constant() &&
1181 ir
->operands
[1]->as_constant()->is_zero()) {
1184 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1187 /* After the dot-product, the value will be an integer on the
1188 * range [0,4]. Zero stays zero, and positive values become 1.0.
1190 ir_to_mesa_instruction
*const dp
=
1191 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1192 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1193 /* The clamping to [0,1] can be done for free in the fragment
1194 * shader with a saturate.
1196 dp
->saturate
= true;
1198 /* Negating the result of the dot-product gives values on the range
1199 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1200 * achieved using SLT.
1202 src_reg slt_src
= result_src
;
1203 slt_src
.negate
= ~slt_src
.negate
;
1204 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1207 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1211 case ir_binop_logic_xor
:
1212 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1215 case ir_binop_logic_or
: {
1216 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1217 /* After the addition, the value will be an integer on the
1218 * range [0,2]. Zero stays zero, and positive values become 1.0.
1220 ir_to_mesa_instruction
*add
=
1221 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1222 add
->saturate
= true;
1224 /* The Boolean arguments are stored as float 0.0 and 1.0. If either
1225 * value is 1.0, the result of the logcal-or should be 1.0. If both
1226 * values are 0.0, the result should be 0.0. This is exactly what
1229 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1234 case ir_binop_logic_and
:
1235 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1236 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1240 assert(ir
->operands
[0]->type
->is_vector());
1241 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1242 emit_dp(ir
, result_dst
, op
[0], op
[1],
1243 ir
->operands
[0]->type
->vector_elements
);
1247 /* sqrt(x) = x * rsq(x). */
1248 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1249 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1250 /* For incoming channels <= 0, set the result to 0. */
1251 op
[0].negate
= ~op
[0].negate
;
1252 emit(ir
, OPCODE_CMP
, result_dst
,
1253 op
[0], result_src
, src_reg_for_float(0.0));
1256 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1264 /* Mesa IR lacks types, ints are stored as truncated floats. */
1269 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1273 emit_sne(ir
, result_dst
, op
[0], src_reg_for_float(0.0));
1275 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1276 case ir_unop_bitcast_f2u
:
1277 case ir_unop_bitcast_i2f
:
1278 case ir_unop_bitcast_u2f
:
1281 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1284 op
[0].negate
= ~op
[0].negate
;
1285 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1286 result_src
.negate
= ~result_src
.negate
;
1289 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1292 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1294 case ir_unop_pack_snorm_2x16
:
1295 case ir_unop_pack_snorm_4x8
:
1296 case ir_unop_pack_unorm_2x16
:
1297 case ir_unop_pack_unorm_4x8
:
1298 case ir_unop_pack_half_2x16
:
1299 case ir_unop_pack_double_2x32
:
1300 case ir_unop_unpack_snorm_2x16
:
1301 case ir_unop_unpack_snorm_4x8
:
1302 case ir_unop_unpack_unorm_2x16
:
1303 case ir_unop_unpack_unorm_4x8
:
1304 case ir_unop_unpack_half_2x16
:
1305 case ir_unop_unpack_double_2x32
:
1306 case ir_unop_bitfield_reverse
:
1307 case ir_unop_bit_count
:
1308 case ir_unop_find_msb
:
1309 case ir_unop_find_lsb
:
1317 case ir_unop_frexp_sig
:
1318 case ir_unop_frexp_exp
:
1319 assert(!"not supported");
1322 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1325 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1328 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1331 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1332 * hardware backends have no way to avoid Mesa IR generation
1333 * even if they don't use it, we need to emit "something" and
1336 case ir_binop_lshift
:
1337 case ir_binop_rshift
:
1338 case ir_binop_bit_and
:
1339 case ir_binop_bit_xor
:
1340 case ir_binop_bit_or
:
1341 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1344 case ir_unop_bit_not
:
1345 case ir_unop_round_even
:
1346 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1349 case ir_binop_ubo_load
:
1350 assert(!"not supported");
1354 /* ir_triop_lrp operands are (x, y, a) while
1355 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1357 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1361 /* We assume that boolean true and false are 1.0 and 0.0. OPCODE_CMP
1362 * selects src1 if src0 is < 0, src2 otherwise.
1364 op
[0].negate
= ~op
[0].negate
;
1365 emit(ir
, OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1368 case ir_binop_vector_extract
:
1370 case ir_triop_bitfield_extract
:
1371 case ir_triop_vector_insert
:
1372 case ir_quadop_bitfield_insert
:
1373 case ir_binop_ldexp
:
1374 case ir_binop_carry
:
1375 case ir_binop_borrow
:
1376 case ir_binop_imul_high
:
1377 case ir_unop_interpolate_at_centroid
:
1378 case ir_binop_interpolate_at_offset
:
1379 case ir_binop_interpolate_at_sample
:
1380 case ir_unop_dFdx_coarse
:
1381 case ir_unop_dFdx_fine
:
1382 case ir_unop_dFdy_coarse
:
1383 case ir_unop_dFdy_fine
:
1384 case ir_unop_subroutine_to_int
:
1385 case ir_unop_get_buffer_size
:
1386 case ir_unop_bitcast_u642d
:
1387 case ir_unop_bitcast_i642d
:
1388 case ir_unop_bitcast_d2u64
:
1389 case ir_unop_bitcast_d2i64
:
1408 case ir_unop_u642i64
:
1409 case ir_unop_i642u64
:
1410 case ir_unop_pack_int_2x32
:
1411 case ir_unop_unpack_int_2x32
:
1412 case ir_unop_pack_uint_2x32
:
1413 case ir_unop_unpack_uint_2x32
:
1414 case ir_unop_pack_sampler_2x32
:
1415 case ir_unop_unpack_sampler_2x32
:
1416 case ir_unop_pack_image_2x32
:
1417 case ir_unop_unpack_image_2x32
:
1418 assert(!"not supported");
1421 case ir_unop_ssbo_unsized_array_length
:
1422 case ir_quadop_vector
:
1423 /* This operation should have already been handled.
1425 assert(!"Should not get here.");
1429 this->result
= result_src
;
1434 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1440 /* Note that this is only swizzles in expressions, not those on the left
1441 * hand side of an assignment, which do write masking. See ir_assignment
1445 ir
->val
->accept(this);
1447 assert(src
.file
!= PROGRAM_UNDEFINED
);
1448 assert(ir
->type
->vector_elements
> 0);
1450 for (i
= 0; i
< 4; i
++) {
1451 if (i
< ir
->type
->vector_elements
) {
1454 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1457 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1460 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1463 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1467 /* If the type is smaller than a vec4, replicate the last
1470 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1474 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1480 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1482 variable_storage
*entry
= find_variable_storage(ir
->var
);
1483 ir_variable
*var
= ir
->var
;
1486 switch (var
->data
.mode
) {
1487 case ir_var_uniform
:
1488 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1489 var
->data
.param_index
);
1490 this->variables
.push_tail(entry
);
1492 case ir_var_shader_in
:
1493 /* The linker assigns locations for varyings and attributes,
1494 * including deprecated builtins (like gl_Color),
1495 * user-assigned generic attributes (glBindVertexLocation),
1496 * and user-defined varyings.
1498 assert(var
->data
.location
!= -1);
1499 entry
= new(mem_ctx
) variable_storage(var
,
1501 var
->data
.location
);
1503 case ir_var_shader_out
:
1504 assert(var
->data
.location
!= -1);
1505 entry
= new(mem_ctx
) variable_storage(var
,
1507 var
->data
.location
);
1509 case ir_var_system_value
:
1510 entry
= new(mem_ctx
) variable_storage(var
,
1511 PROGRAM_SYSTEM_VALUE
,
1512 var
->data
.location
);
1515 case ir_var_temporary
:
1516 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1518 this->variables
.push_tail(entry
);
1520 next_temp
+= type_size(var
->type
);
1525 printf("Failed to make storage for %s\n", var
->name
);
1530 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1534 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1538 int element_size
= type_size(ir
->type
);
1540 index
= ir
->array_index
->constant_expression_value(ralloc_parent(ir
));
1542 ir
->array
->accept(this);
1546 src
.index
+= index
->value
.i
[0] * element_size
;
1548 /* Variable index array dereference. It eats the "vec4" of the
1549 * base of the array and an index that offsets the Mesa register
1552 ir
->array_index
->accept(this);
1556 if (element_size
== 1) {
1557 index_reg
= this->result
;
1559 index_reg
= get_temp(glsl_type::float_type
);
1561 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1562 this->result
, src_reg_for_float(element_size
));
1565 /* If there was already a relative address register involved, add the
1566 * new and the old together to get the new offset.
1568 if (src
.reladdr
!= NULL
) {
1569 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1571 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1572 index_reg
, *src
.reladdr
);
1574 index_reg
= accum_reg
;
1577 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1578 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1581 /* If the type is smaller than a vec4, replicate the last channel out. */
1582 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1583 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1585 src
.swizzle
= SWIZZLE_NOOP
;
1591 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1594 const glsl_type
*struct_type
= ir
->record
->type
;
1597 ir
->record
->accept(this);
1599 assert(ir
->field_idx
>= 0);
1600 for (i
= 0; i
< struct_type
->length
; i
++) {
1601 if (i
== (unsigned) ir
->field_idx
)
1603 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1606 /* If the type is smaller than a vec4, replicate the last channel out. */
1607 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1608 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1610 this->result
.swizzle
= SWIZZLE_NOOP
;
1612 this->result
.index
+= offset
;
1616 * We want to be careful in assignment setup to hit the actual storage
1617 * instead of potentially using a temporary like we might with the
1618 * ir_dereference handler.
1621 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1623 /* The LHS must be a dereference. If the LHS is a variable indexed array
1624 * access of a vector, it must be separated into a series conditional moves
1625 * before reaching this point (see ir_vec_index_to_cond_assign).
1627 assert(ir
->as_dereference());
1628 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1630 assert(!deref_array
->array
->type
->is_vector());
1633 /* Use the rvalue deref handler for the most part. We'll ignore
1634 * swizzles in it and write swizzles using writemask, though.
1637 return dst_reg(v
->result
);
1640 /* Calculate the sampler index and also calculate the base uniform location
1641 * for struct members.
1644 calc_sampler_offsets(struct gl_shader_program
*prog
, ir_dereference
*deref
,
1645 unsigned *offset
, unsigned *array_elements
,
1648 if (deref
->ir_type
== ir_type_dereference_variable
)
1651 switch (deref
->ir_type
) {
1652 case ir_type_dereference_array
: {
1653 ir_dereference_array
*deref_arr
= deref
->as_dereference_array();
1655 void *mem_ctx
= ralloc_parent(deref_arr
);
1656 ir_constant
*array_index
=
1657 deref_arr
->array_index
->constant_expression_value(mem_ctx
);
1660 /* GLSL 1.10 and 1.20 allowed variable sampler array indices,
1661 * while GLSL 1.30 requires that the array indices be
1662 * constant integer expressions. We don't expect any driver
1663 * to actually work with a really variable array index, so
1664 * all that would work would be an unrolled loop counter that ends
1665 * up being constant above.
1667 ralloc_strcat(&prog
->data
->InfoLog
,
1668 "warning: Variable sampler array index unsupported.\n"
1669 "This feature of the language was removed in GLSL 1.20 "
1670 "and is unlikely to be supported for 1.10 in Mesa.\n");
1672 *offset
+= array_index
->value
.u
[0] * *array_elements
;
1675 *array_elements
*= deref_arr
->array
->type
->length
;
1677 calc_sampler_offsets(prog
, deref_arr
->array
->as_dereference(),
1678 offset
, array_elements
, location
);
1682 case ir_type_dereference_record
: {
1683 ir_dereference_record
*deref_record
= deref
->as_dereference_record();
1684 unsigned field_index
= deref_record
->field_idx
;
1686 deref_record
->record
->type
->record_location_offset(field_index
);
1687 calc_sampler_offsets(prog
, deref_record
->record
->as_dereference(),
1688 offset
, array_elements
, location
);
1693 unreachable("Invalid deref type");
1699 get_sampler_uniform_value(class ir_dereference
*sampler
,
1700 struct gl_shader_program
*shader_program
,
1701 const struct gl_program
*prog
)
1703 GLuint shader
= _mesa_program_enum_to_shader_stage(prog
->Target
);
1704 ir_variable
*var
= sampler
->variable_referenced();
1705 unsigned location
= var
->data
.location
;
1706 unsigned array_elements
= 1;
1707 unsigned offset
= 0;
1709 calc_sampler_offsets(shader_program
, sampler
, &offset
, &array_elements
,
1712 assert(shader_program
->data
->UniformStorage
[location
].opaque
[shader
].active
);
1713 return shader_program
->data
->UniformStorage
[location
].opaque
[shader
].index
+
1718 * Process the condition of a conditional assignment
1720 * Examines the condition of a conditional assignment to generate the optimal
1721 * first operand of a \c CMP instruction. If the condition is a relational
1722 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1723 * used as the source for the \c CMP instruction. Otherwise the comparison
1724 * is processed to a boolean result, and the boolean result is used as the
1725 * operand to the CMP instruction.
1728 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1730 ir_rvalue
*src_ir
= ir
;
1732 bool switch_order
= false;
1734 ir_expression
*const expr
= ir
->as_expression();
1735 if ((expr
!= NULL
) && (expr
->num_operands
== 2)) {
1736 bool zero_on_left
= false;
1738 if (expr
->operands
[0]->is_zero()) {
1739 src_ir
= expr
->operands
[1];
1740 zero_on_left
= true;
1741 } else if (expr
->operands
[1]->is_zero()) {
1742 src_ir
= expr
->operands
[0];
1743 zero_on_left
= false;
1747 * (a < 0) T F F ( a < 0) T F F
1748 * (0 < a) F F T (-a < 0) F F T
1749 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1750 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1752 * Note that exchanging the order of 0 and 'a' in the comparison simply
1753 * means that the value of 'a' should be negated.
1756 switch (expr
->operation
) {
1758 switch_order
= false;
1759 negate
= zero_on_left
;
1762 case ir_binop_gequal
:
1763 switch_order
= true;
1764 negate
= zero_on_left
;
1768 /* This isn't the right kind of comparison afterall, so make sure
1769 * the whole condition is visited.
1777 src_ir
->accept(this);
1779 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1780 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1781 * choose which value OPCODE_CMP produces without an extra instruction
1782 * computing the condition.
1785 this->result
.negate
= ~this->result
.negate
;
1787 return switch_order
;
1791 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1797 ir
->rhs
->accept(this);
1800 l
= get_assignment_lhs(ir
->lhs
, this);
1802 /* FINISHME: This should really set to the correct maximal writemask for each
1803 * FINISHME: component written (in the loops below). This case can only
1804 * FINISHME: occur for matrices, arrays, and structures.
1806 if (ir
->write_mask
== 0) {
1807 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1808 l
.writemask
= WRITEMASK_XYZW
;
1809 } else if (ir
->lhs
->type
->is_scalar()) {
1810 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1811 * FINISHME: W component of fragment shader output zero, work correctly.
1813 l
.writemask
= WRITEMASK_XYZW
;
1816 int first_enabled_chan
= 0;
1819 assert(ir
->lhs
->type
->is_vector());
1820 l
.writemask
= ir
->write_mask
;
1822 for (int i
= 0; i
< 4; i
++) {
1823 if (l
.writemask
& (1 << i
)) {
1824 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1829 /* Swizzle a small RHS vector into the channels being written.
1831 * glsl ir treats write_mask as dictating how many channels are
1832 * present on the RHS while Mesa IR treats write_mask as just
1833 * showing which channels of the vec4 RHS get written.
1835 for (int i
= 0; i
< 4; i
++) {
1836 if (l
.writemask
& (1 << i
))
1837 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1839 swizzles
[i
] = first_enabled_chan
;
1841 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1842 swizzles
[2], swizzles
[3]);
1845 assert(l
.file
!= PROGRAM_UNDEFINED
);
1846 assert(r
.file
!= PROGRAM_UNDEFINED
);
1848 if (ir
->condition
) {
1849 const bool switch_order
= this->process_move_condition(ir
->condition
);
1850 src_reg condition
= this->result
;
1852 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1854 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1856 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1863 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1864 emit(ir
, OPCODE_MOV
, l
, r
);
1873 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1876 GLfloat stack_vals
[4] = { 0 };
1877 GLfloat
*values
= stack_vals
;
1880 /* Unfortunately, 4 floats is all we can get into
1881 * _mesa_add_unnamed_constant. So, make a temp to store an
1882 * aggregate constant and move each constant value into it. If we
1883 * get lucky, copy propagation will eliminate the extra moves.
1886 if (ir
->type
->is_record()) {
1887 src_reg temp_base
= get_temp(ir
->type
);
1888 dst_reg temp
= dst_reg(temp_base
);
1890 for (i
= 0; i
< ir
->type
->length
; i
++) {
1891 ir_constant
*const field_value
= ir
->get_record_field(i
);
1892 int size
= type_size(field_value
->type
);
1896 field_value
->accept(this);
1899 for (unsigned j
= 0; j
< (unsigned int)size
; j
++) {
1900 emit(ir
, OPCODE_MOV
, temp
, src
);
1906 this->result
= temp_base
;
1910 if (ir
->type
->is_array()) {
1911 src_reg temp_base
= get_temp(ir
->type
);
1912 dst_reg temp
= dst_reg(temp_base
);
1913 int size
= type_size(ir
->type
->fields
.array
);
1917 for (i
= 0; i
< ir
->type
->length
; i
++) {
1918 ir
->const_elements
[i
]->accept(this);
1920 for (int j
= 0; j
< size
; j
++) {
1921 emit(ir
, OPCODE_MOV
, temp
, src
);
1927 this->result
= temp_base
;
1931 if (ir
->type
->is_matrix()) {
1932 src_reg mat
= get_temp(ir
->type
);
1933 dst_reg mat_column
= dst_reg(mat
);
1935 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1936 assert(ir
->type
->is_float());
1937 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1939 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1940 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1941 (gl_constant_value
*) values
,
1942 ir
->type
->vector_elements
,
1944 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1953 src
.file
= PROGRAM_CONSTANT
;
1954 switch (ir
->type
->base_type
) {
1955 case GLSL_TYPE_FLOAT
:
1956 values
= &ir
->value
.f
[0];
1958 case GLSL_TYPE_UINT
:
1959 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1960 values
[i
] = ir
->value
.u
[i
];
1964 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1965 values
[i
] = ir
->value
.i
[i
];
1968 case GLSL_TYPE_BOOL
:
1969 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1970 values
[i
] = ir
->value
.b
[i
];
1974 assert(!"Non-float/uint/int/bool constant");
1977 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1978 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1979 (gl_constant_value
*) values
,
1980 ir
->type
->vector_elements
,
1981 &this->result
.swizzle
);
1985 ir_to_mesa_visitor::visit(ir_call
*)
1987 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
1991 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1993 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
1994 dst_reg result_dst
, coord_dst
;
1995 ir_to_mesa_instruction
*inst
= NULL
;
1996 prog_opcode opcode
= OPCODE_NOP
;
1998 if (ir
->op
== ir_txs
)
1999 this->result
= src_reg_for_float(0.0);
2001 ir
->coordinate
->accept(this);
2003 /* Put our coords in a temp. We'll need to modify them for shadow,
2004 * projection, or LOD, so the only case we'd use it as-is is if
2005 * we're doing plain old texturing. Mesa IR optimization should
2006 * handle cleaning up our mess in that case.
2008 coord
= get_temp(glsl_type::vec4_type
);
2009 coord_dst
= dst_reg(coord
);
2010 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2012 if (ir
->projector
) {
2013 ir
->projector
->accept(this);
2014 projector
= this->result
;
2017 /* Storage for our result. Ideally for an assignment we'd be using
2018 * the actual storage for the result here, instead.
2020 result_src
= get_temp(glsl_type::vec4_type
);
2021 result_dst
= dst_reg(result_src
);
2026 opcode
= OPCODE_TEX
;
2029 opcode
= OPCODE_TXB
;
2030 ir
->lod_info
.bias
->accept(this);
2031 lod_info
= this->result
;
2034 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2036 opcode
= OPCODE_TXL
;
2037 ir
->lod_info
.lod
->accept(this);
2038 lod_info
= this->result
;
2041 opcode
= OPCODE_TXD
;
2042 ir
->lod_info
.grad
.dPdx
->accept(this);
2044 ir
->lod_info
.grad
.dPdy
->accept(this);
2048 assert(!"Unexpected ir_txf_ms opcode");
2051 assert(!"Unexpected ir_lod opcode");
2054 assert(!"Unexpected ir_tg4 opcode");
2056 case ir_query_levels
:
2057 assert(!"Unexpected ir_query_levels opcode");
2059 case ir_samples_identical
:
2060 unreachable("Unexpected ir_samples_identical opcode");
2061 case ir_texture_samples
:
2062 unreachable("Unexpected ir_texture_samples opcode");
2065 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2067 if (ir
->projector
) {
2068 if (opcode
== OPCODE_TEX
) {
2069 /* Slot the projector in as the last component of the coord. */
2070 coord_dst
.writemask
= WRITEMASK_W
;
2071 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2072 coord_dst
.writemask
= WRITEMASK_XYZW
;
2073 opcode
= OPCODE_TXP
;
2075 src_reg coord_w
= coord
;
2076 coord_w
.swizzle
= SWIZZLE_WWWW
;
2078 /* For the other TEX opcodes there's no projective version
2079 * since the last slot is taken up by lod info. Do the
2080 * projective divide now.
2082 coord_dst
.writemask
= WRITEMASK_W
;
2083 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2085 /* In the case where we have to project the coordinates "by hand,"
2086 * the shadow comparator value must also be projected.
2088 src_reg tmp_src
= coord
;
2089 if (ir
->shadow_comparator
) {
2090 /* Slot the shadow value in as the second to last component of the
2093 ir
->shadow_comparator
->accept(this);
2095 tmp_src
= get_temp(glsl_type::vec4_type
);
2096 dst_reg tmp_dst
= dst_reg(tmp_src
);
2098 /* Projective division not allowed for array samplers. */
2099 assert(!sampler_type
->sampler_array
);
2101 tmp_dst
.writemask
= WRITEMASK_Z
;
2102 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2104 tmp_dst
.writemask
= WRITEMASK_XY
;
2105 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2108 coord_dst
.writemask
= WRITEMASK_XYZ
;
2109 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2111 coord_dst
.writemask
= WRITEMASK_XYZW
;
2112 coord
.swizzle
= SWIZZLE_XYZW
;
2116 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2117 * comparator was put in the correct place (and projected) by the code,
2118 * above, that handles by-hand projection.
2120 if (ir
->shadow_comparator
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2121 /* Slot the shadow value in as the second to last component of the
2124 ir
->shadow_comparator
->accept(this);
2126 /* XXX This will need to be updated for cubemap array samplers. */
2127 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2128 sampler_type
->sampler_array
) {
2129 coord_dst
.writemask
= WRITEMASK_W
;
2131 coord_dst
.writemask
= WRITEMASK_Z
;
2134 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2135 coord_dst
.writemask
= WRITEMASK_XYZW
;
2138 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2139 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2140 coord_dst
.writemask
= WRITEMASK_W
;
2141 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2142 coord_dst
.writemask
= WRITEMASK_XYZW
;
2145 if (opcode
== OPCODE_TXD
)
2146 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2148 inst
= emit(ir
, opcode
, result_dst
, coord
);
2150 if (ir
->shadow_comparator
)
2151 inst
->tex_shadow
= GL_TRUE
;
2153 inst
->sampler
= get_sampler_uniform_value(ir
->sampler
, shader_program
,
2156 switch (sampler_type
->sampler_dimensionality
) {
2157 case GLSL_SAMPLER_DIM_1D
:
2158 inst
->tex_target
= (sampler_type
->sampler_array
)
2159 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2161 case GLSL_SAMPLER_DIM_2D
:
2162 inst
->tex_target
= (sampler_type
->sampler_array
)
2163 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2165 case GLSL_SAMPLER_DIM_3D
:
2166 inst
->tex_target
= TEXTURE_3D_INDEX
;
2168 case GLSL_SAMPLER_DIM_CUBE
:
2169 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2171 case GLSL_SAMPLER_DIM_RECT
:
2172 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2174 case GLSL_SAMPLER_DIM_BUF
:
2175 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2177 case GLSL_SAMPLER_DIM_EXTERNAL
:
2178 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2181 assert(!"Should not get here.");
2184 this->result
= result_src
;
2188 ir_to_mesa_visitor::visit(ir_return
*ir
)
2190 /* Non-void functions should have been inlined. We may still emit RETs
2191 * from main() unless the EmitNoMainReturn option is set.
2193 assert(!ir
->get_value());
2194 emit(ir
, OPCODE_RET
);
2198 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2201 ir
->condition
= new(mem_ctx
) ir_constant(true);
2203 ir
->condition
->accept(this);
2204 this->result
.negate
= ~this->result
.negate
;
2205 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2209 ir_to_mesa_visitor::visit(ir_if
*ir
)
2211 ir_to_mesa_instruction
*if_inst
;
2213 ir
->condition
->accept(this);
2214 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2216 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2218 this->instructions
.push_tail(if_inst
);
2220 visit_exec_list(&ir
->then_instructions
, this);
2222 if (!ir
->else_instructions
.is_empty()) {
2223 emit(ir
->condition
, OPCODE_ELSE
);
2224 visit_exec_list(&ir
->else_instructions
, this);
2227 emit(ir
->condition
, OPCODE_ENDIF
);
2231 ir_to_mesa_visitor::visit(ir_emit_vertex
*)
2233 assert(!"Geometry shaders not supported.");
2237 ir_to_mesa_visitor::visit(ir_end_primitive
*)
2239 assert(!"Geometry shaders not supported.");
2243 ir_to_mesa_visitor::visit(ir_barrier
*)
2245 unreachable("GLSL barrier() not supported.");
2248 ir_to_mesa_visitor::ir_to_mesa_visitor()
2250 result
.file
= PROGRAM_UNDEFINED
;
2252 next_signature_id
= 1;
2253 current_function
= NULL
;
2254 mem_ctx
= ralloc_context(NULL
);
2257 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2259 ralloc_free(mem_ctx
);
2262 static struct prog_src_register
2263 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2265 struct prog_src_register mesa_reg
;
2267 mesa_reg
.File
= reg
.file
;
2268 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2269 mesa_reg
.Index
= reg
.index
;
2270 mesa_reg
.Swizzle
= reg
.swizzle
;
2271 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2272 mesa_reg
.Negate
= reg
.negate
;
2278 set_branchtargets(ir_to_mesa_visitor
*v
,
2279 struct prog_instruction
*mesa_instructions
,
2280 int num_instructions
)
2282 int if_count
= 0, loop_count
= 0;
2283 int *if_stack
, *loop_stack
;
2284 int if_stack_pos
= 0, loop_stack_pos
= 0;
2287 for (i
= 0; i
< num_instructions
; i
++) {
2288 switch (mesa_instructions
[i
].Opcode
) {
2292 case OPCODE_BGNLOOP
:
2297 mesa_instructions
[i
].BranchTarget
= -1;
2304 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2305 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2307 for (i
= 0; i
< num_instructions
; i
++) {
2308 switch (mesa_instructions
[i
].Opcode
) {
2310 if_stack
[if_stack_pos
] = i
;
2314 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2315 if_stack
[if_stack_pos
- 1] = i
;
2318 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2321 case OPCODE_BGNLOOP
:
2322 loop_stack
[loop_stack_pos
] = i
;
2325 case OPCODE_ENDLOOP
:
2327 /* Rewrite any breaks/conts at this nesting level (haven't
2328 * already had a BranchTarget assigned) to point to the end
2331 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2332 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2333 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2334 if (mesa_instructions
[j
].BranchTarget
== -1) {
2335 mesa_instructions
[j
].BranchTarget
= i
;
2339 /* The loop ends point at each other. */
2340 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2341 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2344 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
2345 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2346 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2358 print_program(struct prog_instruction
*mesa_instructions
,
2359 ir_instruction
**mesa_instruction_annotation
,
2360 int num_instructions
)
2362 ir_instruction
*last_ir
= NULL
;
2366 for (i
= 0; i
< num_instructions
; i
++) {
2367 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2368 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2370 fprintf(stdout
, "%3d: ", i
);
2372 if (last_ir
!= ir
&& ir
) {
2375 for (j
= 0; j
< indent
; j
++) {
2376 fprintf(stdout
, " ");
2382 fprintf(stdout
, " "); /* line number spacing. */
2385 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2386 PROG_PRINT_DEBUG
, NULL
);
2392 class add_uniform_to_shader
: public program_resource_visitor
{
2394 add_uniform_to_shader(struct gl_context
*ctx
,
2395 struct gl_shader_program
*shader_program
,
2396 struct gl_program_parameter_list
*params
)
2397 : ctx(ctx
), params(params
), idx(-1)
2402 void process(ir_variable
*var
)
2406 this->program_resource_visitor::process(var
,
2407 ctx
->Const
.UseSTD430AsDefaultPacking
);
2408 var
->data
.param_index
= this->idx
;
2412 virtual void visit_field(const glsl_type
*type
, const char *name
,
2413 bool row_major
, const glsl_type
*record_type
,
2414 const enum glsl_interface_packing packing
,
2417 struct gl_context
*ctx
;
2418 struct gl_program_parameter_list
*params
;
2423 } /* anonymous namespace */
2426 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2427 bool /* row_major */,
2428 const glsl_type
* /* record_type */,
2429 const enum glsl_interface_packing
,
2430 bool /* last_field */)
2432 /* opaque types don't use storage in the param list unless they are
2433 * bindless samplers or images.
2435 if (type
->contains_opaque() && !var
->data
.bindless
)
2438 /* Add the uniform to the param list */
2439 assert(_mesa_lookup_parameter_index(params
, name
) < 0);
2440 int index
= _mesa_lookup_parameter_index(params
, name
);
2442 unsigned num_params
= type
->arrays_of_arrays_size();
2443 num_params
= MAX2(num_params
, 1);
2444 num_params
*= type
->without_array()->matrix_columns
;
2446 bool is_dual_slot
= type
->without_array()->is_dual_slot();
2450 _mesa_reserve_parameter_storage(params
, num_params
);
2451 index
= params
->NumParameters
;
2452 for (unsigned i
= 0; i
< num_params
; i
++) {
2454 _mesa_add_parameter(params
, PROGRAM_UNIFORM
, name
, comps
,
2455 type
->gl_type
, NULL
, NULL
);
2458 /* The first part of the uniform that's processed determines the base
2459 * location of the whole uniform (for structures).
2466 * Generate the program parameters list for the user uniforms in a shader
2468 * \param shader_program Linked shader program. This is only used to
2469 * emit possible link errors to the info log.
2470 * \param sh Shader whose uniforms are to be processed.
2471 * \param params Parameter list to be filled in.
2474 _mesa_generate_parameters_list_for_uniforms(struct gl_context
*ctx
,
2475 struct gl_shader_program
2477 struct gl_linked_shader
*sh
,
2478 struct gl_program_parameter_list
2481 add_uniform_to_shader
add(ctx
, shader_program
, params
);
2483 foreach_in_list(ir_instruction
, node
, sh
->ir
) {
2484 ir_variable
*var
= node
->as_variable();
2486 if ((var
== NULL
) || (var
->data
.mode
!= ir_var_uniform
)
2487 || var
->is_in_buffer_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2495 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2496 struct gl_shader_program
*shader_program
,
2497 struct gl_program
*prog
,
2498 bool propagate_to_storage
)
2500 struct gl_program_parameter_list
*params
= prog
->Parameters
;
2501 gl_shader_stage shader_type
= prog
->info
.stage
;
2503 /* After adding each uniform to the parameter list, connect the storage for
2504 * the parameter with the tracking structure used by the API for the
2507 unsigned last_location
= unsigned(~0);
2508 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2509 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2514 shader_program
->UniformHash
->get(location
, params
->Parameters
[i
].Name
);
2520 struct gl_uniform_storage
*storage
=
2521 &shader_program
->data
->UniformStorage
[location
];
2523 /* Do not associate any uniform storage to built-in uniforms */
2524 if (storage
->builtin
)
2527 if (location
!= last_location
) {
2528 enum gl_uniform_driver_format format
= uniform_native
;
2529 unsigned columns
= 0;
2530 int dmul
= 4 * sizeof(float);
2532 switch (storage
->type
->base_type
) {
2533 case GLSL_TYPE_UINT64
:
2534 if (storage
->type
->vector_elements
> 2)
2537 case GLSL_TYPE_UINT
:
2538 case GLSL_TYPE_UINT16
:
2539 case GLSL_TYPE_UINT8
:
2540 assert(ctx
->Const
.NativeIntegers
);
2541 format
= uniform_native
;
2544 case GLSL_TYPE_INT64
:
2545 if (storage
->type
->vector_elements
> 2)
2549 case GLSL_TYPE_INT16
:
2550 case GLSL_TYPE_INT8
:
2552 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2555 case GLSL_TYPE_DOUBLE
:
2556 if (storage
->type
->vector_elements
> 2)
2559 case GLSL_TYPE_FLOAT
:
2560 case GLSL_TYPE_FLOAT16
:
2561 format
= uniform_native
;
2562 columns
= storage
->type
->matrix_columns
;
2564 case GLSL_TYPE_BOOL
:
2565 format
= uniform_native
;
2568 case GLSL_TYPE_SAMPLER
:
2569 case GLSL_TYPE_IMAGE
:
2570 case GLSL_TYPE_SUBROUTINE
:
2571 format
= uniform_native
;
2574 case GLSL_TYPE_ATOMIC_UINT
:
2575 case GLSL_TYPE_ARRAY
:
2576 case GLSL_TYPE_VOID
:
2577 case GLSL_TYPE_STRUCT
:
2578 case GLSL_TYPE_ERROR
:
2579 case GLSL_TYPE_INTERFACE
:
2580 case GLSL_TYPE_FUNCTION
:
2581 assert(!"Should not get here.");
2585 _mesa_uniform_attach_driver_storage(storage
, dmul
* columns
, dmul
,
2587 ¶ms
->ParameterValues
[i
]);
2589 /* When a bindless sampler/image is bound to a texture/image unit, we
2590 * have to overwrite the constant value by the resident handle
2591 * directly in the constant buffer before the next draw. One solution
2592 * is to keep track a pointer to the base of the data.
2594 if (storage
->is_bindless
&& (prog
->sh
.NumBindlessSamplers
||
2595 prog
->sh
.NumBindlessImages
)) {
2596 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2598 for (unsigned j
= 0; j
< array_elements
; ++j
) {
2599 unsigned unit
= storage
->opaque
[shader_type
].index
+ j
;
2601 if (storage
->type
->without_array()->is_sampler()) {
2602 assert(unit
>= 0 && unit
< prog
->sh
.NumBindlessSamplers
);
2603 prog
->sh
.BindlessSamplers
[unit
].data
=
2604 ¶ms
->ParameterValues
[i
] + j
;
2605 } else if (storage
->type
->without_array()->is_image()) {
2606 assert(unit
>= 0 && unit
< prog
->sh
.NumBindlessImages
);
2607 prog
->sh
.BindlessImages
[unit
].data
=
2608 ¶ms
->ParameterValues
[i
] + j
;
2613 /* After attaching the driver's storage to the uniform, propagate any
2614 * data from the linker's backing store. This will cause values from
2615 * initializers in the source code to be copied over.
2617 if (propagate_to_storage
) {
2618 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2619 _mesa_propagate_uniforms_to_driver_storage(storage
, 0,
2623 last_location
= location
;
2629 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2630 * channels for copy propagation and updates following instructions to
2631 * use the original versions.
2633 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2634 * will occur. As an example, a TXP production before this pass:
2636 * 0: MOV TEMP[1], INPUT[4].xyyy;
2637 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2638 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2642 * 0: MOV TEMP[1], INPUT[4].xyyy;
2643 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2644 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2646 * which allows for dead code elimination on TEMP[1]'s writes.
2649 ir_to_mesa_visitor::copy_propagate(void)
2651 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2652 ir_to_mesa_instruction
*,
2653 this->next_temp
* 4);
2654 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2657 foreach_in_list(ir_to_mesa_instruction
, inst
, &this->instructions
) {
2658 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2659 || inst
->dst
.index
< this->next_temp
);
2661 /* First, do any copy propagation possible into the src regs. */
2662 for (int r
= 0; r
< 3; r
++) {
2663 ir_to_mesa_instruction
*first
= NULL
;
2665 int acp_base
= inst
->src
[r
].index
* 4;
2667 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2668 inst
->src
[r
].reladdr
)
2671 /* See if we can find entries in the ACP consisting of MOVs
2672 * from the same src register for all the swizzled channels
2673 * of this src register reference.
2675 for (int i
= 0; i
< 4; i
++) {
2676 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2677 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2684 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2689 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2690 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2698 /* We've now validated that we can copy-propagate to
2699 * replace this src register reference. Do it.
2701 inst
->src
[r
].file
= first
->src
[0].file
;
2702 inst
->src
[r
].index
= first
->src
[0].index
;
2705 for (int i
= 0; i
< 4; i
++) {
2706 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2707 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2708 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2711 inst
->src
[r
].swizzle
= swizzle
;
2716 case OPCODE_BGNLOOP
:
2717 case OPCODE_ENDLOOP
:
2718 /* End of a basic block, clear the ACP entirely. */
2719 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2728 /* Clear all channels written inside the block from the ACP, but
2729 * leaving those that were not touched.
2731 for (int r
= 0; r
< this->next_temp
; r
++) {
2732 for (int c
= 0; c
< 4; c
++) {
2733 if (!acp
[4 * r
+ c
])
2736 if (acp_level
[4 * r
+ c
] >= level
)
2737 acp
[4 * r
+ c
] = NULL
;
2740 if (inst
->op
== OPCODE_ENDIF
)
2745 /* Continuing the block, clear any written channels from
2748 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2749 /* Any temporary might be written, so no copy propagation
2750 * across this instruction.
2752 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2753 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2754 inst
->dst
.reladdr
) {
2755 /* Any output might be written, so no copy propagation
2756 * from outputs across this instruction.
2758 for (int r
= 0; r
< this->next_temp
; r
++) {
2759 for (int c
= 0; c
< 4; c
++) {
2760 if (!acp
[4 * r
+ c
])
2763 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2764 acp
[4 * r
+ c
] = NULL
;
2767 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2768 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2769 /* Clear where it's used as dst. */
2770 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2771 for (int c
= 0; c
< 4; c
++) {
2772 if (inst
->dst
.writemask
& (1 << c
)) {
2773 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2778 /* Clear where it's used as src. */
2779 for (int r
= 0; r
< this->next_temp
; r
++) {
2780 for (int c
= 0; c
< 4; c
++) {
2781 if (!acp
[4 * r
+ c
])
2784 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2786 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2787 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2788 inst
->dst
.writemask
& (1 << src_chan
))
2790 acp
[4 * r
+ c
] = NULL
;
2798 /* If this is a copy, add it to the ACP. */
2799 if (inst
->op
== OPCODE_MOV
&&
2800 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2801 !(inst
->dst
.file
== inst
->src
[0].file
&&
2802 inst
->dst
.index
== inst
->src
[0].index
) &&
2803 !inst
->dst
.reladdr
&&
2805 !inst
->src
[0].reladdr
&&
2806 !inst
->src
[0].negate
) {
2807 for (int i
= 0; i
< 4; i
++) {
2808 if (inst
->dst
.writemask
& (1 << i
)) {
2809 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2810 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2816 ralloc_free(acp_level
);
2822 * Convert a shader's GLSL IR into a Mesa gl_program.
2824 static struct gl_program
*
2825 get_mesa_program(struct gl_context
*ctx
,
2826 struct gl_shader_program
*shader_program
,
2827 struct gl_linked_shader
*shader
)
2829 ir_to_mesa_visitor v
;
2830 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2831 ir_instruction
**mesa_instruction_annotation
;
2833 struct gl_program
*prog
;
2834 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
2835 const char *target_string
= _mesa_shader_stage_to_string(shader
->Stage
);
2836 struct gl_shader_compiler_options
*options
=
2837 &ctx
->Const
.ShaderCompilerOptions
[shader
->Stage
];
2839 validate_ir_tree(shader
->ir
);
2841 prog
= shader
->Program
;
2842 prog
->Parameters
= _mesa_new_parameter_list();
2845 v
.shader_program
= shader_program
;
2846 v
.options
= options
;
2848 _mesa_generate_parameters_list_for_uniforms(ctx
, shader_program
, shader
,
2851 /* Emit Mesa IR for main(). */
2852 visit_exec_list(shader
->ir
, &v
);
2853 v
.emit(NULL
, OPCODE_END
);
2855 prog
->arb
.NumTemporaries
= v
.next_temp
;
2857 unsigned num_instructions
= v
.instructions
.length();
2859 mesa_instructions
= rzalloc_array(prog
, struct prog_instruction
,
2861 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2866 /* Convert ir_mesa_instructions into prog_instructions.
2868 mesa_inst
= mesa_instructions
;
2870 foreach_in_list(const ir_to_mesa_instruction
, inst
, &v
.instructions
) {
2871 mesa_inst
->Opcode
= inst
->op
;
2873 mesa_inst
->Saturate
= GL_TRUE
;
2874 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2875 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2876 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2877 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2878 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2879 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2880 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2881 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2882 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2883 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2884 mesa_instruction_annotation
[i
] = inst
->ir
;
2886 /* Set IndirectRegisterFiles. */
2887 if (mesa_inst
->DstReg
.RelAddr
)
2888 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2890 /* Update program's bitmask of indirectly accessed register files */
2891 for (unsigned src
= 0; src
< 3; src
++)
2892 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2893 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2895 switch (mesa_inst
->Opcode
) {
2897 if (options
->MaxIfDepth
== 0) {
2898 linker_warning(shader_program
,
2899 "Couldn't flatten if-statement. "
2900 "This will likely result in software "
2901 "rasterization.\n");
2904 case OPCODE_BGNLOOP
:
2905 if (options
->EmitNoLoops
) {
2906 linker_warning(shader_program
,
2907 "Couldn't unroll loop. "
2908 "This will likely result in software "
2909 "rasterization.\n");
2913 if (options
->EmitNoCont
) {
2914 linker_warning(shader_program
,
2915 "Couldn't lower continue-statement. "
2916 "This will likely result in software "
2917 "rasterization.\n");
2921 prog
->arb
.NumAddressRegs
= 1;
2930 if (!shader_program
->data
->LinkStatus
)
2934 if (!shader_program
->data
->LinkStatus
) {
2938 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2940 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
2941 fprintf(stderr
, "\n");
2942 fprintf(stderr
, "GLSL IR for linked %s program %d:\n", target_string
,
2943 shader_program
->Name
);
2944 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
2945 fprintf(stderr
, "\n");
2946 fprintf(stderr
, "\n");
2947 fprintf(stderr
, "Mesa IR for linked %s program %d:\n", target_string
,
2948 shader_program
->Name
);
2949 print_program(mesa_instructions
, mesa_instruction_annotation
,
2954 prog
->arb
.Instructions
= mesa_instructions
;
2955 prog
->arb
.NumInstructions
= num_instructions
;
2957 /* Setting this to NULL prevents a possible double free in the fail_exit
2960 mesa_instructions
= NULL
;
2962 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
2964 prog
->ShadowSamplers
= shader
->shadow_samplers
;
2965 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
2966 _mesa_update_shader_textures_used(shader_program
, prog
);
2968 /* Set the gl_FragDepth layout. */
2969 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
2970 prog
->info
.fs
.depth_layout
= shader_program
->FragDepthLayout
;
2973 _mesa_optimize_program(prog
, prog
);
2975 /* This has to be done last. Any operation that can cause
2976 * prog->ParameterValues to get reallocated (e.g., anything that adds a
2977 * program constant) has to happen before creating this linkage.
2979 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
, true);
2980 if (!shader_program
->data
->LinkStatus
) {
2987 ralloc_free(mesa_instructions
);
2988 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
2996 * Called via ctx->Driver.LinkShader()
2997 * This actually involves converting GLSL IR into Mesa gl_programs with
2998 * code lowering and other optimizations.
3001 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3003 assert(prog
->data
->LinkStatus
);
3005 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3006 if (prog
->_LinkedShaders
[i
] == NULL
)
3010 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3011 const struct gl_shader_compiler_options
*options
=
3012 &ctx
->Const
.ShaderCompilerOptions
[prog
->_LinkedShaders
[i
]->Stage
];
3018 do_mat_op_to_vec(ir
);
3019 lower_instructions(ir
, (MOD_TO_FLOOR
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3020 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3021 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3023 progress
= do_common_optimization(ir
, true, true,
3024 options
, ctx
->Const
.NativeIntegers
)
3027 progress
= lower_quadop_vector(ir
, true) || progress
;
3029 if (options
->MaxIfDepth
== 0)
3030 progress
= lower_discard(ir
) || progress
;
3032 progress
= lower_if_to_cond_assign((gl_shader_stage
)i
, ir
,
3033 options
->MaxIfDepth
) || progress
;
3035 progress
= lower_noise(ir
) || progress
;
3037 /* If there are forms of indirect addressing that the driver
3038 * cannot handle, perform the lowering pass.
3040 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3041 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3043 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
3044 options
->EmitNoIndirectInput
,
3045 options
->EmitNoIndirectOutput
,
3046 options
->EmitNoIndirectTemp
,
3047 options
->EmitNoIndirectUniform
)
3050 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3051 progress
= lower_vector_insert(ir
, true) || progress
;
3054 validate_ir_tree(ir
);
3057 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3058 struct gl_program
*linked_prog
;
3060 if (prog
->_LinkedShaders
[i
] == NULL
)
3063 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3066 _mesa_copy_linked_program_data(prog
, prog
->_LinkedShaders
[i
]);
3068 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
3069 _mesa_shader_stage_to_program(i
),
3071 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3078 build_program_resource_list(ctx
, prog
);
3079 return prog
->data
->LinkStatus
;
3083 * Link a GLSL shader program. Called via glLinkProgram().
3086 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3091 _mesa_clear_shader_program_data(ctx
, prog
);
3093 prog
->data
= _mesa_create_shader_program_data();
3095 prog
->data
->LinkStatus
= LINKING_SUCCESS
;
3097 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3098 if (!prog
->Shaders
[i
]->CompileStatus
) {
3099 linker_error(prog
, "linking with uncompiled/unspecialized shader");
3103 spirv
= (prog
->Shaders
[i
]->spirv_data
!= NULL
);
3104 } else if (spirv
&& !prog
->Shaders
[i
]->spirv_data
) {
3105 /* The GL_ARB_gl_spirv spec adds a new bullet point to the list of
3106 * reasons LinkProgram can fail:
3108 * "All the shader objects attached to <program> do not have the
3109 * same value for the SPIR_V_BINARY_ARB state."
3112 "not all attached shaders have the same "
3113 "SPIR_V_BINARY_ARB state");
3117 if (prog
->data
->LinkStatus
) {
3118 link_shaders(ctx
, prog
);
3121 /* If LinkStatus is LINKING_SUCCESS, then reset sampler validated to true.
3122 * Validation happens via the LinkShader call below. If LinkStatus is
3123 * LINKING_SKIPPED, then SamplersValidated will have been restored from the
3126 if (prog
->data
->LinkStatus
== LINKING_SUCCESS
) {
3127 prog
->SamplersValidated
= GL_TRUE
;
3130 if (prog
->data
->LinkStatus
&& !ctx
->Driver
.LinkShader(ctx
, prog
)) {
3131 prog
->data
->LinkStatus
= LINKING_FAILURE
;
3134 /* Return early if we are loading the shader from on-disk cache */
3135 if (prog
->data
->LinkStatus
== LINKING_SKIPPED
)
3138 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
3139 if (!prog
->data
->LinkStatus
) {
3140 fprintf(stderr
, "GLSL shader program %d failed to link\n", prog
->Name
);
3143 if (prog
->data
->InfoLog
&& prog
->data
->InfoLog
[0] != 0) {
3144 fprintf(stderr
, "GLSL shader program %d info log:\n", prog
->Name
);
3145 fprintf(stderr
, "%s\n", prog
->data
->InfoLog
);
3149 #ifdef ENABLE_SHADER_CACHE
3150 if (prog
->data
->LinkStatus
)
3151 shader_cache_write_program_metadata(ctx
, prog
);