2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/macros.h"
34 #include "main/mtypes.h"
35 #include "main/shaderapi.h"
36 #include "main/shaderobj.h"
37 #include "main/uniforms.h"
38 #include "main/glspirv.h"
39 #include "compiler/glsl/ast.h"
40 #include "compiler/glsl/ir.h"
41 #include "compiler/glsl/ir_expression_flattening.h"
42 #include "compiler/glsl/ir_visitor.h"
43 #include "compiler/glsl/ir_optimization.h"
44 #include "compiler/glsl/ir_uniform.h"
45 #include "compiler/glsl/glsl_parser_extras.h"
46 #include "compiler/glsl_types.h"
47 #include "compiler/glsl/linker.h"
48 #include "compiler/glsl/program.h"
49 #include "compiler/glsl/shader_cache.h"
50 #include "compiler/glsl/string_to_uint_map.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
58 static int swizzle_for_size(int size
);
66 * This struct is a corresponding struct to Mesa prog_src_register, with
71 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
75 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
76 this->swizzle
= swizzle_for_size(type
->vector_elements
);
78 this->swizzle
= SWIZZLE_XYZW
;
85 this->file
= PROGRAM_UNDEFINED
;
92 explicit src_reg(dst_reg reg
);
94 gl_register_file file
; /**< PROGRAM_* from Mesa */
95 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
96 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
97 int negate
; /**< NEGATE_XYZW mask from mesa */
98 /** Register index should be offset by the integer in this reg. */
104 dst_reg(gl_register_file file
, int writemask
)
108 this->writemask
= writemask
;
109 this->reladdr
= NULL
;
114 this->file
= PROGRAM_UNDEFINED
;
117 this->reladdr
= NULL
;
120 explicit dst_reg(src_reg reg
);
122 gl_register_file file
; /**< PROGRAM_* from Mesa */
123 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
124 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
125 /** Register index should be offset by the integer in this reg. */
129 } /* anonymous namespace */
131 src_reg::src_reg(dst_reg reg
)
133 this->file
= reg
.file
;
134 this->index
= reg
.index
;
135 this->swizzle
= SWIZZLE_XYZW
;
137 this->reladdr
= reg
.reladdr
;
140 dst_reg::dst_reg(src_reg reg
)
142 this->file
= reg
.file
;
143 this->index
= reg
.index
;
144 this->writemask
= WRITEMASK_XYZW
;
145 this->reladdr
= reg
.reladdr
;
150 class ir_to_mesa_instruction
: public exec_node
{
152 DECLARE_RALLOC_CXX_OPERATORS(ir_to_mesa_instruction
)
157 /** Pointer to the ir source this tree came from for debugging */
160 int sampler
; /**< sampler index */
161 int tex_target
; /**< One of TEXTURE_*_INDEX */
162 GLboolean tex_shadow
;
165 class variable_storage
: public exec_node
{
167 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
168 : file(file
), index(index
), var(var
)
173 gl_register_file file
;
175 ir_variable
*var
; /* variable that maps to this, if any */
178 class function_entry
: public exec_node
{
180 ir_function_signature
*sig
;
183 * identifier of this function signature used by the program.
185 * At the point that Mesa instructions for function calls are
186 * generated, we don't know the address of the first instruction of
187 * the function body. So we make the BranchTarget that is called a
188 * small integer and rewrite them during set_branchtargets().
193 * Pointer to first instruction of the function body.
195 * Set during function body emits after main() is processed.
197 ir_to_mesa_instruction
*bgn_inst
;
200 * Index of the first instruction of the function body in actual
203 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
207 /** Storage for the return value. */
211 class ir_to_mesa_visitor
: public ir_visitor
{
213 ir_to_mesa_visitor();
214 ~ir_to_mesa_visitor();
216 function_entry
*current_function
;
218 struct gl_context
*ctx
;
219 struct gl_program
*prog
;
220 struct gl_shader_program
*shader_program
;
221 struct gl_shader_compiler_options
*options
;
225 variable_storage
*find_variable_storage(const ir_variable
*var
);
227 src_reg
get_temp(const glsl_type
*type
);
228 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
230 src_reg
src_reg_for_float(float val
);
233 * \name Visit methods
235 * As typical for the visitor pattern, there must be one \c visit method for
236 * each concrete subclass of \c ir_instruction. Virtual base classes within
237 * the hierarchy should not have \c visit methods.
240 virtual void visit(ir_variable
*);
241 virtual void visit(ir_loop
*);
242 virtual void visit(ir_loop_jump
*);
243 virtual void visit(ir_function_signature
*);
244 virtual void visit(ir_function
*);
245 virtual void visit(ir_expression
*);
246 virtual void visit(ir_swizzle
*);
247 virtual void visit(ir_dereference_variable
*);
248 virtual void visit(ir_dereference_array
*);
249 virtual void visit(ir_dereference_record
*);
250 virtual void visit(ir_assignment
*);
251 virtual void visit(ir_constant
*);
252 virtual void visit(ir_call
*);
253 virtual void visit(ir_return
*);
254 virtual void visit(ir_discard
*);
255 virtual void visit(ir_demote
*);
256 virtual void visit(ir_texture
*);
257 virtual void visit(ir_if
*);
258 virtual void visit(ir_emit_vertex
*);
259 virtual void visit(ir_end_primitive
*);
260 virtual void visit(ir_barrier
*);
265 /** List of variable_storage */
268 /** List of function_entry */
269 exec_list function_signatures
;
270 int next_signature_id
;
272 /** List of ir_to_mesa_instruction */
273 exec_list instructions
;
275 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
277 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
278 dst_reg dst
, src_reg src0
);
280 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
281 dst_reg dst
, src_reg src0
, src_reg src1
);
283 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
285 src_reg src0
, src_reg src1
, src_reg src2
);
288 * Emit the correct dot-product instruction for the type of arguments
290 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
296 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
297 dst_reg dst
, src_reg src0
);
299 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
300 dst_reg dst
, src_reg src0
, src_reg src1
);
302 bool try_emit_mad(ir_expression
*ir
,
304 bool try_emit_mad_for_and_not(ir_expression
*ir
,
307 void emit_swz(ir_expression
*ir
);
309 void emit_equality_comparison(ir_expression
*ir
, enum prog_opcode op
,
311 const src_reg
&src0
, const src_reg
&src1
);
313 inline void emit_sne(ir_expression
*ir
, dst_reg dst
,
314 const src_reg
&src0
, const src_reg
&src1
)
316 emit_equality_comparison(ir
, OPCODE_SLT
, dst
, src0
, src1
);
319 inline void emit_seq(ir_expression
*ir
, dst_reg dst
,
320 const src_reg
&src0
, const src_reg
&src1
)
322 emit_equality_comparison(ir
, OPCODE_SGE
, dst
, src0
, src1
);
325 bool process_move_condition(ir_rvalue
*ir
);
327 void copy_propagate(void);
332 } /* anonymous namespace */
334 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
336 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
338 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
341 swizzle_for_size(int size
)
343 static const int size_swizzles
[4] = {
344 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
345 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
346 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
347 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
350 assert((size
>= 1) && (size
<= 4));
351 return size_swizzles
[size
- 1];
354 ir_to_mesa_instruction
*
355 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
357 src_reg src0
, src_reg src1
, src_reg src2
)
359 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
362 /* If we have to do relative addressing, we want to load the ARL
363 * reg directly for one of the regs, and preload the other reladdr
364 * sources into temps.
366 num_reladdr
+= dst
.reladdr
!= NULL
;
367 num_reladdr
+= src0
.reladdr
!= NULL
;
368 num_reladdr
+= src1
.reladdr
!= NULL
;
369 num_reladdr
+= src2
.reladdr
!= NULL
;
371 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
372 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
373 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
376 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
379 assert(num_reladdr
== 0);
388 this->instructions
.push_tail(inst
);
394 ir_to_mesa_instruction
*
395 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
396 dst_reg dst
, src_reg src0
, src_reg src1
)
398 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
401 ir_to_mesa_instruction
*
402 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
403 dst_reg dst
, src_reg src0
)
405 assert(dst
.writemask
!= 0);
406 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
409 ir_to_mesa_instruction
*
410 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
412 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
415 ir_to_mesa_instruction
*
416 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
417 dst_reg dst
, src_reg src0
, src_reg src1
,
420 static const enum prog_opcode dot_opcodes
[] = {
421 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
424 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
428 * Emits Mesa scalar opcodes to produce unique answers across channels.
430 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
431 * channel determines the result across all channels. So to do a vec4
432 * of this operation, we want to emit a scalar per source channel used
433 * to produce dest channels.
436 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
438 src_reg orig_src0
, src_reg orig_src1
)
441 int done_mask
= ~dst
.writemask
;
443 /* Mesa RCP is a scalar operation splatting results to all channels,
444 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
447 for (i
= 0; i
< 4; i
++) {
448 GLuint this_mask
= (1 << i
);
449 ir_to_mesa_instruction
*inst
;
450 src_reg src0
= orig_src0
;
451 src_reg src1
= orig_src1
;
453 if (done_mask
& this_mask
)
456 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
457 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
458 for (j
= i
+ 1; j
< 4; j
++) {
459 /* If there is another enabled component in the destination that is
460 * derived from the same inputs, generate its value on this pass as
463 if (!(done_mask
& (1 << j
)) &&
464 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
465 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
466 this_mask
|= (1 << j
);
469 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
470 src0_swiz
, src0_swiz
);
471 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
472 src1_swiz
, src1_swiz
);
474 inst
= emit(ir
, op
, dst
, src0
, src1
);
475 inst
->dst
.writemask
= this_mask
;
476 done_mask
|= this_mask
;
481 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
482 dst_reg dst
, src_reg src0
)
484 src_reg undef
= undef_src
;
486 undef
.swizzle
= SWIZZLE_XXXX
;
488 emit_scalar(ir
, op
, dst
, src0
, undef
);
492 ir_to_mesa_visitor::src_reg_for_float(float val
)
494 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
496 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
497 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
503 storage_type_size(const struct glsl_type
*type
, bool bindless
)
508 switch (type
->base_type
) {
511 case GLSL_TYPE_UINT8
:
513 case GLSL_TYPE_UINT16
:
514 case GLSL_TYPE_INT16
:
515 case GLSL_TYPE_FLOAT
:
516 case GLSL_TYPE_FLOAT16
:
518 if (type
->is_matrix()) {
519 return type
->matrix_columns
;
521 /* Regardless of size of vector, it gets a vec4. This is bad
522 * packing for things like floats, but otherwise arrays become a
523 * mess. Hopefully a later pass over the code can pack scalars
524 * down if appropriate.
529 case GLSL_TYPE_DOUBLE
:
530 if (type
->is_matrix()) {
531 if (type
->vector_elements
> 2)
532 return type
->matrix_columns
* 2;
534 return type
->matrix_columns
;
536 if (type
->vector_elements
> 2)
542 case GLSL_TYPE_UINT64
:
543 case GLSL_TYPE_INT64
:
544 if (type
->vector_elements
> 2)
548 case GLSL_TYPE_ARRAY
:
549 assert(type
->length
> 0);
550 return storage_type_size(type
->fields
.array
, bindless
) * type
->length
;
551 case GLSL_TYPE_STRUCT
:
553 for (i
= 0; i
< type
->length
; i
++) {
554 size
+= storage_type_size(type
->fields
.structure
[i
].type
, bindless
);
557 case GLSL_TYPE_SAMPLER
:
558 case GLSL_TYPE_IMAGE
:
562 case GLSL_TYPE_SUBROUTINE
:
564 case GLSL_TYPE_ATOMIC_UINT
:
566 case GLSL_TYPE_ERROR
:
567 case GLSL_TYPE_INTERFACE
:
568 case GLSL_TYPE_FUNCTION
:
569 assert(!"Invalid type in type_size");
577 type_size(const struct glsl_type
*type
)
579 return storage_type_size(type
, false);
583 * In the initial pass of codegen, we assign temporary numbers to
584 * intermediate results. (not SSA -- variable assignments will reuse
585 * storage). Actual register allocation for the Mesa VM occurs in a
586 * pass over the Mesa IR later.
589 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
593 src
.file
= PROGRAM_TEMPORARY
;
594 src
.index
= next_temp
;
596 next_temp
+= type_size(type
);
598 if (type
->is_array() || type
->is_struct()) {
599 src
.swizzle
= SWIZZLE_NOOP
;
601 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
609 ir_to_mesa_visitor::find_variable_storage(const ir_variable
*var
)
611 foreach_in_list(variable_storage
, entry
, &this->variables
) {
612 if (entry
->var
== var
)
620 ir_to_mesa_visitor::visit(ir_variable
*ir
)
622 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
624 const ir_state_slot
*const slots
= ir
->get_state_slots();
625 assert(slots
!= NULL
);
627 /* Check if this statevar's setup in the STATE file exactly
628 * matches how we'll want to reference it as a
629 * struct/array/whatever. If not, then we need to move it into
630 * temporary storage and hope that it'll get copy-propagated
633 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
634 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
639 variable_storage
*storage
;
641 if (i
== ir
->get_num_state_slots()) {
642 /* We'll set the index later. */
643 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
644 this->variables
.push_tail(storage
);
648 /* The variable_storage constructor allocates slots based on the size
649 * of the type. However, this had better match the number of state
650 * elements that we're going to copy into the new temporary.
652 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
654 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
656 this->variables
.push_tail(storage
);
657 this->next_temp
+= type_size(ir
->type
);
659 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
663 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
664 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
667 if (storage
->file
== PROGRAM_STATE_VAR
) {
668 if (storage
->index
== -1) {
669 storage
->index
= index
;
671 assert(index
== storage
->index
+ (int)i
);
674 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
675 src
.swizzle
= slots
[i
].swizzle
;
676 emit(ir
, OPCODE_MOV
, dst
, src
);
677 /* even a float takes up a whole vec4 reg in a struct/array. */
682 if (storage
->file
== PROGRAM_TEMPORARY
&&
683 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
684 linker_error(this->shader_program
,
685 "failed to load builtin uniform `%s' "
686 "(%d/%d regs loaded)\n",
687 ir
->name
, dst
.index
- storage
->index
,
688 type_size(ir
->type
));
694 ir_to_mesa_visitor::visit(ir_loop
*ir
)
696 emit(NULL
, OPCODE_BGNLOOP
);
698 visit_exec_list(&ir
->body_instructions
, this);
700 emit(NULL
, OPCODE_ENDLOOP
);
704 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
707 case ir_loop_jump::jump_break
:
708 emit(NULL
, OPCODE_BRK
);
710 case ir_loop_jump::jump_continue
:
711 emit(NULL
, OPCODE_CONT
);
718 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
725 ir_to_mesa_visitor::visit(ir_function
*ir
)
727 /* Ignore function bodies other than main() -- we shouldn't see calls to
728 * them since they should all be inlined before we get to ir_to_mesa.
730 if (strcmp(ir
->name
, "main") == 0) {
731 const ir_function_signature
*sig
;
734 sig
= ir
->matching_signature(NULL
, &empty
, false);
738 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
745 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
747 int nonmul_operand
= 1 - mul_operand
;
750 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
751 if (!expr
|| expr
->operation
!= ir_binop_mul
)
754 expr
->operands
[0]->accept(this);
756 expr
->operands
[1]->accept(this);
758 ir
->operands
[nonmul_operand
]->accept(this);
761 this->result
= get_temp(ir
->type
);
762 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
768 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
770 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
771 * implemented using multiplication, and logical-or is implemented using
772 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
773 * As result, the logical expression (a & !b) can be rewritten as:
777 * - (a * 1) - (a * b)
781 * This final expression can be implemented as a single MAD(a, -b, a)
785 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
787 const int other_operand
= 1 - try_operand
;
790 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
791 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
794 ir
->operands
[other_operand
]->accept(this);
796 expr
->operands
[0]->accept(this);
799 b
.negate
= ~b
.negate
;
801 this->result
= get_temp(ir
->type
);
802 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
808 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
809 src_reg
*reg
, int *num_reladdr
)
814 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
816 if (*num_reladdr
!= 1) {
817 src_reg temp
= get_temp(glsl_type::vec4_type
);
819 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
827 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
829 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
830 * This means that each of the operands is either an immediate value of -1,
831 * 0, or 1, or is a component from one source register (possibly with
834 uint8_t components
[4] = { 0 };
835 bool negate
[4] = { false };
836 ir_variable
*var
= NULL
;
838 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
839 ir_rvalue
*op
= ir
->operands
[i
];
841 assert(op
->type
->is_scalar());
844 switch (op
->ir_type
) {
845 case ir_type_constant
: {
847 assert(op
->type
->is_scalar());
849 const ir_constant
*const c
= op
->as_constant();
851 components
[i
] = SWIZZLE_ONE
;
852 } else if (c
->is_zero()) {
853 components
[i
] = SWIZZLE_ZERO
;
854 } else if (c
->is_negative_one()) {
855 components
[i
] = SWIZZLE_ONE
;
858 assert(!"SWZ constant must be 0.0 or 1.0.");
865 case ir_type_dereference_variable
: {
866 ir_dereference_variable
*const deref
=
867 (ir_dereference_variable
*) op
;
869 assert((var
== NULL
) || (deref
->var
== var
));
870 components
[i
] = SWIZZLE_X
;
876 case ir_type_expression
: {
877 ir_expression
*const expr
= (ir_expression
*) op
;
879 assert(expr
->operation
== ir_unop_neg
);
882 op
= expr
->operands
[0];
886 case ir_type_swizzle
: {
887 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
889 components
[i
] = swiz
->mask
.x
;
895 assert(!"Should not get here.");
903 ir_dereference_variable
*const deref
=
904 new(mem_ctx
) ir_dereference_variable(var
);
906 this->result
.file
= PROGRAM_UNDEFINED
;
908 if (this->result
.file
== PROGRAM_UNDEFINED
) {
909 printf("Failed to get tree for expression operand:\n");
918 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
922 src
.negate
= ((unsigned(negate
[0]) << 0)
923 | (unsigned(negate
[1]) << 1)
924 | (unsigned(negate
[2]) << 2)
925 | (unsigned(negate
[3]) << 3));
927 /* Storage for our result. Ideally for an assignment we'd be using the
928 * actual storage for the result here, instead.
930 const src_reg result_src
= get_temp(ir
->type
);
931 dst_reg result_dst
= dst_reg(result_src
);
933 /* Limit writes to the channels that will be used by result_src later.
934 * This does limit this temp's use as a temporary for multi-instruction
937 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
939 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
940 this->result
= result_src
;
944 ir_to_mesa_visitor::emit_equality_comparison(ir_expression
*ir
,
951 src_reg abs_difference
= get_temp(glsl_type::vec4_type
);
952 const src_reg zero
= src_reg_for_float(0.0);
954 /* x == y is equivalent to -abs(x-y) >= 0. Since all of the code that
955 * consumes the generated IR is pretty dumb, take special care when one
956 * of the operands is zero.
958 * Similarly, x != y is equivalent to -abs(x-y) < 0.
960 if (src0
.file
== zero
.file
&&
961 src0
.index
== zero
.index
&&
962 src0
.swizzle
== zero
.swizzle
) {
964 } else if (src1
.file
== zero
.file
&&
965 src1
.index
== zero
.index
&&
966 src1
.swizzle
== zero
.swizzle
) {
969 difference
= get_temp(glsl_type::vec4_type
);
971 src_reg tmp_src
= src0
;
972 tmp_src
.negate
= ~tmp_src
.negate
;
974 emit(ir
, OPCODE_ADD
, dst_reg(difference
), tmp_src
, src1
);
977 emit(ir
, OPCODE_ABS
, dst_reg(abs_difference
), difference
);
979 abs_difference
.negate
= ~abs_difference
.negate
;
980 emit(ir
, op
, dst
, abs_difference
, zero
);
984 ir_to_mesa_visitor::visit(ir_expression
*ir
)
986 unsigned int operand
;
987 src_reg op
[ARRAY_SIZE(ir
->operands
)];
991 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
993 if (ir
->operation
== ir_binop_add
) {
994 if (try_emit_mad(ir
, 1))
996 if (try_emit_mad(ir
, 0))
1000 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1002 if (ir
->operation
== ir_binop_logic_and
) {
1003 if (try_emit_mad_for_and_not(ir
, 1))
1005 if (try_emit_mad_for_and_not(ir
, 0))
1009 if (ir
->operation
== ir_quadop_vector
) {
1014 for (operand
= 0; operand
< ir
->num_operands
; operand
++) {
1015 this->result
.file
= PROGRAM_UNDEFINED
;
1016 ir
->operands
[operand
]->accept(this);
1017 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1018 printf("Failed to get tree for expression operand:\n");
1019 ir
->operands
[operand
]->print();
1023 op
[operand
] = this->result
;
1025 /* Matrix expression operands should have been broken down to vector
1026 * operations already.
1028 assert(!ir
->operands
[operand
]->type
->is_matrix());
1031 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1032 if (ir
->operands
[1]) {
1033 vector_elements
= MAX2(vector_elements
,
1034 ir
->operands
[1]->type
->vector_elements
);
1037 this->result
.file
= PROGRAM_UNDEFINED
;
1039 /* Storage for our result. Ideally for an assignment we'd be using
1040 * the actual storage for the result here, instead.
1042 result_src
= get_temp(ir
->type
);
1043 /* convenience for the emit functions below. */
1044 result_dst
= dst_reg(result_src
);
1045 /* Limit writes to the channels that will be used by result_src later.
1046 * This does limit this temp's use as a temporary for multi-instruction
1049 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1051 switch (ir
->operation
) {
1052 case ir_unop_logic_not
:
1053 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1054 * older GPUs implement SEQ using multiple instructions (i915 uses two
1055 * SGE instructions and a MUL instruction). Since our logic values are
1056 * 0.0 and 1.0, 1-x also implements !x.
1058 op
[0].negate
= ~op
[0].negate
;
1059 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1062 op
[0].negate
= ~op
[0].negate
;
1066 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1069 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1072 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1076 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1079 assert(!"not reached: should be handled by exp_to_exp2");
1082 assert(!"not reached: should be handled by log_to_log2");
1085 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1088 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1091 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1095 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1098 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1101 case ir_unop_saturate
: {
1102 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_MOV
,
1104 inst
->saturate
= true;
1107 case ir_unop_noise
: {
1108 const enum prog_opcode opcode
=
1109 prog_opcode(OPCODE_NOISE1
1110 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1111 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1113 emit(ir
, opcode
, result_dst
, op
[0]);
1118 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1121 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1125 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1128 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1131 /* Floating point should be lowered by MOD_TO_FLOOR in the compiler. */
1132 assert(ir
->type
->is_integer_32());
1133 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1137 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1139 case ir_binop_gequal
:
1140 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1142 case ir_binop_equal
:
1143 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1145 case ir_binop_nequal
:
1146 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1148 case ir_binop_all_equal
:
1149 /* "==" operator producing a scalar boolean. */
1150 if (ir
->operands
[0]->type
->is_vector() ||
1151 ir
->operands
[1]->type
->is_vector()) {
1152 src_reg temp
= get_temp(glsl_type::vec4_type
);
1153 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1155 /* After the dot-product, the value will be an integer on the
1156 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1158 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1160 /* Negating the result of the dot-product gives values on the range
1161 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1162 * achieved using SGE.
1164 src_reg sge_src
= result_src
;
1165 sge_src
.negate
= ~sge_src
.negate
;
1166 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1168 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1171 case ir_binop_any_nequal
:
1172 /* "!=" operator producing a scalar boolean. */
1173 if (ir
->operands
[0]->type
->is_vector() ||
1174 ir
->operands
[1]->type
->is_vector()) {
1175 src_reg temp
= get_temp(glsl_type::vec4_type
);
1176 if (ir
->operands
[0]->type
->is_boolean() &&
1177 ir
->operands
[1]->as_constant() &&
1178 ir
->operands
[1]->as_constant()->is_zero()) {
1181 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1184 /* After the dot-product, the value will be an integer on the
1185 * range [0,4]. Zero stays zero, and positive values become 1.0.
1187 ir_to_mesa_instruction
*const dp
=
1188 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1189 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1190 /* The clamping to [0,1] can be done for free in the fragment
1191 * shader with a saturate.
1193 dp
->saturate
= true;
1195 /* Negating the result of the dot-product gives values on the range
1196 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1197 * achieved using SLT.
1199 src_reg slt_src
= result_src
;
1200 slt_src
.negate
= ~slt_src
.negate
;
1201 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1204 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1208 case ir_binop_logic_xor
:
1209 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1212 case ir_binop_logic_or
: {
1213 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1214 /* After the addition, the value will be an integer on the
1215 * range [0,2]. Zero stays zero, and positive values become 1.0.
1217 ir_to_mesa_instruction
*add
=
1218 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1219 add
->saturate
= true;
1221 /* The Boolean arguments are stored as float 0.0 and 1.0. If either
1222 * value is 1.0, the result of the logcal-or should be 1.0. If both
1223 * values are 0.0, the result should be 0.0. This is exactly what
1226 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1231 case ir_binop_logic_and
:
1232 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1233 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1237 assert(ir
->operands
[0]->type
->is_vector());
1238 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1239 emit_dp(ir
, result_dst
, op
[0], op
[1],
1240 ir
->operands
[0]->type
->vector_elements
);
1244 /* sqrt(x) = x * rsq(x). */
1245 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1246 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1247 /* For incoming channels <= 0, set the result to 0. */
1248 op
[0].negate
= ~op
[0].negate
;
1249 emit(ir
, OPCODE_CMP
, result_dst
,
1250 op
[0], result_src
, src_reg_for_float(0.0));
1253 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1261 /* Mesa IR lacks types, ints are stored as truncated floats. */
1266 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1270 emit_sne(ir
, result_dst
, op
[0], src_reg_for_float(0.0));
1272 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1273 case ir_unop_bitcast_f2u
:
1274 case ir_unop_bitcast_i2f
:
1275 case ir_unop_bitcast_u2f
:
1278 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1281 op
[0].negate
= ~op
[0].negate
;
1282 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1283 result_src
.negate
= ~result_src
.negate
;
1286 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1289 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1291 case ir_unop_pack_snorm_2x16
:
1292 case ir_unop_pack_snorm_4x8
:
1293 case ir_unop_pack_unorm_2x16
:
1294 case ir_unop_pack_unorm_4x8
:
1295 case ir_unop_pack_half_2x16
:
1296 case ir_unop_pack_double_2x32
:
1297 case ir_unop_unpack_snorm_2x16
:
1298 case ir_unop_unpack_snorm_4x8
:
1299 case ir_unop_unpack_unorm_2x16
:
1300 case ir_unop_unpack_unorm_4x8
:
1301 case ir_unop_unpack_half_2x16
:
1302 case ir_unop_unpack_double_2x32
:
1303 case ir_unop_bitfield_reverse
:
1304 case ir_unop_bit_count
:
1305 case ir_unop_find_msb
:
1306 case ir_unop_find_lsb
:
1314 case ir_unop_frexp_sig
:
1315 case ir_unop_frexp_exp
:
1316 assert(!"not supported");
1319 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1322 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1325 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1328 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1329 * hardware backends have no way to avoid Mesa IR generation
1330 * even if they don't use it, we need to emit "something" and
1333 case ir_binop_lshift
:
1334 case ir_binop_rshift
:
1335 case ir_binop_bit_and
:
1336 case ir_binop_bit_xor
:
1337 case ir_binop_bit_or
:
1338 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1341 case ir_unop_bit_not
:
1342 case ir_unop_round_even
:
1343 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1346 case ir_binop_ubo_load
:
1347 assert(!"not supported");
1351 /* ir_triop_lrp operands are (x, y, a) while
1352 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1354 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1358 /* We assume that boolean true and false are 1.0 and 0.0. OPCODE_CMP
1359 * selects src1 if src0 is < 0, src2 otherwise.
1361 op
[0].negate
= ~op
[0].negate
;
1362 emit(ir
, OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1365 case ir_binop_vector_extract
:
1367 case ir_triop_bitfield_extract
:
1368 case ir_triop_vector_insert
:
1369 case ir_quadop_bitfield_insert
:
1370 case ir_binop_ldexp
:
1371 case ir_binop_carry
:
1372 case ir_binop_borrow
:
1373 case ir_binop_imul_high
:
1374 case ir_unop_interpolate_at_centroid
:
1375 case ir_binop_interpolate_at_offset
:
1376 case ir_binop_interpolate_at_sample
:
1377 case ir_unop_dFdx_coarse
:
1378 case ir_unop_dFdx_fine
:
1379 case ir_unop_dFdy_coarse
:
1380 case ir_unop_dFdy_fine
:
1381 case ir_unop_subroutine_to_int
:
1382 case ir_unop_get_buffer_size
:
1383 case ir_unop_bitcast_u642d
:
1384 case ir_unop_bitcast_i642d
:
1385 case ir_unop_bitcast_d2u64
:
1386 case ir_unop_bitcast_d2i64
:
1405 case ir_unop_u642i64
:
1406 case ir_unop_i642u64
:
1407 case ir_unop_pack_int_2x32
:
1408 case ir_unop_unpack_int_2x32
:
1409 case ir_unop_pack_uint_2x32
:
1410 case ir_unop_unpack_uint_2x32
:
1411 case ir_unop_pack_sampler_2x32
:
1412 case ir_unop_unpack_sampler_2x32
:
1413 case ir_unop_pack_image_2x32
:
1414 case ir_unop_unpack_image_2x32
:
1416 case ir_binop_atan2
:
1417 assert(!"not supported");
1420 case ir_unop_ssbo_unsized_array_length
:
1421 case ir_quadop_vector
:
1422 /* This operation should have already been handled.
1424 assert(!"Should not get here.");
1428 this->result
= result_src
;
1433 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1439 /* Note that this is only swizzles in expressions, not those on the left
1440 * hand side of an assignment, which do write masking. See ir_assignment
1444 ir
->val
->accept(this);
1446 assert(src
.file
!= PROGRAM_UNDEFINED
);
1447 assert(ir
->type
->vector_elements
> 0);
1449 for (i
= 0; i
< 4; i
++) {
1450 if (i
< ir
->type
->vector_elements
) {
1453 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1456 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1459 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1462 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1466 /* If the type is smaller than a vec4, replicate the last
1469 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1473 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1479 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1481 variable_storage
*entry
= find_variable_storage(ir
->var
);
1482 ir_variable
*var
= ir
->var
;
1485 switch (var
->data
.mode
) {
1486 case ir_var_uniform
:
1487 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1488 var
->data
.param_index
);
1489 this->variables
.push_tail(entry
);
1491 case ir_var_shader_in
:
1492 /* The linker assigns locations for varyings and attributes,
1493 * including deprecated builtins (like gl_Color),
1494 * user-assigned generic attributes (glBindVertexLocation),
1495 * and user-defined varyings.
1497 assert(var
->data
.location
!= -1);
1498 entry
= new(mem_ctx
) variable_storage(var
,
1500 var
->data
.location
);
1502 case ir_var_shader_out
:
1503 assert(var
->data
.location
!= -1);
1504 entry
= new(mem_ctx
) variable_storage(var
,
1506 var
->data
.location
);
1508 case ir_var_system_value
:
1509 entry
= new(mem_ctx
) variable_storage(var
,
1510 PROGRAM_SYSTEM_VALUE
,
1511 var
->data
.location
);
1514 case ir_var_temporary
:
1515 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1517 this->variables
.push_tail(entry
);
1519 next_temp
+= type_size(var
->type
);
1524 printf("Failed to make storage for %s\n", var
->name
);
1529 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1533 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1537 int element_size
= type_size(ir
->type
);
1539 index
= ir
->array_index
->constant_expression_value(ralloc_parent(ir
));
1541 ir
->array
->accept(this);
1545 src
.index
+= index
->value
.i
[0] * element_size
;
1547 /* Variable index array dereference. It eats the "vec4" of the
1548 * base of the array and an index that offsets the Mesa register
1551 ir
->array_index
->accept(this);
1555 if (element_size
== 1) {
1556 index_reg
= this->result
;
1558 index_reg
= get_temp(glsl_type::float_type
);
1560 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1561 this->result
, src_reg_for_float(element_size
));
1564 /* If there was already a relative address register involved, add the
1565 * new and the old together to get the new offset.
1567 if (src
.reladdr
!= NULL
) {
1568 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1570 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1571 index_reg
, *src
.reladdr
);
1573 index_reg
= accum_reg
;
1576 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1577 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1580 /* If the type is smaller than a vec4, replicate the last channel out. */
1581 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1582 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1584 src
.swizzle
= SWIZZLE_NOOP
;
1590 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1593 const glsl_type
*struct_type
= ir
->record
->type
;
1596 ir
->record
->accept(this);
1598 assert(ir
->field_idx
>= 0);
1599 for (i
= 0; i
< struct_type
->length
; i
++) {
1600 if (i
== (unsigned) ir
->field_idx
)
1602 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1605 /* If the type is smaller than a vec4, replicate the last channel out. */
1606 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1607 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1609 this->result
.swizzle
= SWIZZLE_NOOP
;
1611 this->result
.index
+= offset
;
1615 * We want to be careful in assignment setup to hit the actual storage
1616 * instead of potentially using a temporary like we might with the
1617 * ir_dereference handler.
1620 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1622 /* The LHS must be a dereference. If the LHS is a variable indexed array
1623 * access of a vector, it must be separated into a series conditional moves
1624 * before reaching this point (see ir_vec_index_to_cond_assign).
1626 assert(ir
->as_dereference());
1627 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1629 assert(!deref_array
->array
->type
->is_vector());
1632 /* Use the rvalue deref handler for the most part. We'll ignore
1633 * swizzles in it and write swizzles using writemask, though.
1636 return dst_reg(v
->result
);
1639 /* Calculate the sampler index and also calculate the base uniform location
1640 * for struct members.
1643 calc_sampler_offsets(struct gl_shader_program
*prog
, ir_dereference
*deref
,
1644 unsigned *offset
, unsigned *array_elements
,
1647 if (deref
->ir_type
== ir_type_dereference_variable
)
1650 switch (deref
->ir_type
) {
1651 case ir_type_dereference_array
: {
1652 ir_dereference_array
*deref_arr
= deref
->as_dereference_array();
1654 void *mem_ctx
= ralloc_parent(deref_arr
);
1655 ir_constant
*array_index
=
1656 deref_arr
->array_index
->constant_expression_value(mem_ctx
);
1659 /* GLSL 1.10 and 1.20 allowed variable sampler array indices,
1660 * while GLSL 1.30 requires that the array indices be
1661 * constant integer expressions. We don't expect any driver
1662 * to actually work with a really variable array index, so
1663 * all that would work would be an unrolled loop counter that ends
1664 * up being constant above.
1666 ralloc_strcat(&prog
->data
->InfoLog
,
1667 "warning: Variable sampler array index unsupported.\n"
1668 "This feature of the language was removed in GLSL 1.20 "
1669 "and is unlikely to be supported for 1.10 in Mesa.\n");
1671 *offset
+= array_index
->value
.u
[0] * *array_elements
;
1674 *array_elements
*= deref_arr
->array
->type
->length
;
1676 calc_sampler_offsets(prog
, deref_arr
->array
->as_dereference(),
1677 offset
, array_elements
, location
);
1681 case ir_type_dereference_record
: {
1682 ir_dereference_record
*deref_record
= deref
->as_dereference_record();
1683 unsigned field_index
= deref_record
->field_idx
;
1685 deref_record
->record
->type
->struct_location_offset(field_index
);
1686 calc_sampler_offsets(prog
, deref_record
->record
->as_dereference(),
1687 offset
, array_elements
, location
);
1692 unreachable("Invalid deref type");
1698 get_sampler_uniform_value(class ir_dereference
*sampler
,
1699 struct gl_shader_program
*shader_program
,
1700 const struct gl_program
*prog
)
1702 GLuint shader
= _mesa_program_enum_to_shader_stage(prog
->Target
);
1703 ir_variable
*var
= sampler
->variable_referenced();
1704 unsigned location
= var
->data
.location
;
1705 unsigned array_elements
= 1;
1706 unsigned offset
= 0;
1708 calc_sampler_offsets(shader_program
, sampler
, &offset
, &array_elements
,
1711 assert(shader_program
->data
->UniformStorage
[location
].opaque
[shader
].active
);
1712 return shader_program
->data
->UniformStorage
[location
].opaque
[shader
].index
+
1717 * Process the condition of a conditional assignment
1719 * Examines the condition of a conditional assignment to generate the optimal
1720 * first operand of a \c CMP instruction. If the condition is a relational
1721 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1722 * used as the source for the \c CMP instruction. Otherwise the comparison
1723 * is processed to a boolean result, and the boolean result is used as the
1724 * operand to the CMP instruction.
1727 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1729 ir_rvalue
*src_ir
= ir
;
1731 bool switch_order
= false;
1733 ir_expression
*const expr
= ir
->as_expression();
1734 if ((expr
!= NULL
) && (expr
->num_operands
== 2)) {
1735 bool zero_on_left
= false;
1737 if (expr
->operands
[0]->is_zero()) {
1738 src_ir
= expr
->operands
[1];
1739 zero_on_left
= true;
1740 } else if (expr
->operands
[1]->is_zero()) {
1741 src_ir
= expr
->operands
[0];
1742 zero_on_left
= false;
1746 * (a < 0) T F F ( a < 0) T F F
1747 * (0 < a) F F T (-a < 0) F F T
1748 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1749 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1751 * Note that exchanging the order of 0 and 'a' in the comparison simply
1752 * means that the value of 'a' should be negated.
1755 switch (expr
->operation
) {
1757 switch_order
= false;
1758 negate
= zero_on_left
;
1761 case ir_binop_gequal
:
1762 switch_order
= true;
1763 negate
= zero_on_left
;
1767 /* This isn't the right kind of comparison afterall, so make sure
1768 * the whole condition is visited.
1776 src_ir
->accept(this);
1778 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1779 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1780 * choose which value OPCODE_CMP produces without an extra instruction
1781 * computing the condition.
1784 this->result
.negate
= ~this->result
.negate
;
1786 return switch_order
;
1790 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1796 ir
->rhs
->accept(this);
1799 l
= get_assignment_lhs(ir
->lhs
, this);
1801 /* FINISHME: This should really set to the correct maximal writemask for each
1802 * FINISHME: component written (in the loops below). This case can only
1803 * FINISHME: occur for matrices, arrays, and structures.
1805 if (ir
->write_mask
== 0) {
1806 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1807 l
.writemask
= WRITEMASK_XYZW
;
1808 } else if (ir
->lhs
->type
->is_scalar()) {
1809 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1810 * FINISHME: W component of fragment shader output zero, work correctly.
1812 l
.writemask
= WRITEMASK_XYZW
;
1815 int first_enabled_chan
= 0;
1818 assert(ir
->lhs
->type
->is_vector());
1819 l
.writemask
= ir
->write_mask
;
1821 for (int i
= 0; i
< 4; i
++) {
1822 if (l
.writemask
& (1 << i
)) {
1823 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1828 /* Swizzle a small RHS vector into the channels being written.
1830 * glsl ir treats write_mask as dictating how many channels are
1831 * present on the RHS while Mesa IR treats write_mask as just
1832 * showing which channels of the vec4 RHS get written.
1834 for (int i
= 0; i
< 4; i
++) {
1835 if (l
.writemask
& (1 << i
))
1836 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1838 swizzles
[i
] = first_enabled_chan
;
1840 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1841 swizzles
[2], swizzles
[3]);
1844 assert(l
.file
!= PROGRAM_UNDEFINED
);
1845 assert(r
.file
!= PROGRAM_UNDEFINED
);
1847 if (ir
->condition
) {
1848 const bool switch_order
= this->process_move_condition(ir
->condition
);
1849 src_reg condition
= this->result
;
1851 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1853 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1855 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1862 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1863 emit(ir
, OPCODE_MOV
, l
, r
);
1872 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1875 GLfloat stack_vals
[4] = { 0 };
1876 GLfloat
*values
= stack_vals
;
1879 /* Unfortunately, 4 floats is all we can get into
1880 * _mesa_add_unnamed_constant. So, make a temp to store an
1881 * aggregate constant and move each constant value into it. If we
1882 * get lucky, copy propagation will eliminate the extra moves.
1885 if (ir
->type
->is_struct()) {
1886 src_reg temp_base
= get_temp(ir
->type
);
1887 dst_reg temp
= dst_reg(temp_base
);
1889 for (i
= 0; i
< ir
->type
->length
; i
++) {
1890 ir_constant
*const field_value
= ir
->get_record_field(i
);
1891 int size
= type_size(field_value
->type
);
1895 field_value
->accept(this);
1898 for (unsigned j
= 0; j
< (unsigned int)size
; j
++) {
1899 emit(ir
, OPCODE_MOV
, temp
, src
);
1905 this->result
= temp_base
;
1909 if (ir
->type
->is_array()) {
1910 src_reg temp_base
= get_temp(ir
->type
);
1911 dst_reg temp
= dst_reg(temp_base
);
1912 int size
= type_size(ir
->type
->fields
.array
);
1916 for (i
= 0; i
< ir
->type
->length
; i
++) {
1917 ir
->const_elements
[i
]->accept(this);
1919 for (int j
= 0; j
< size
; j
++) {
1920 emit(ir
, OPCODE_MOV
, temp
, src
);
1926 this->result
= temp_base
;
1930 if (ir
->type
->is_matrix()) {
1931 src_reg mat
= get_temp(ir
->type
);
1932 dst_reg mat_column
= dst_reg(mat
);
1934 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1935 assert(ir
->type
->is_float());
1936 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1938 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1939 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1940 (gl_constant_value
*) values
,
1941 ir
->type
->vector_elements
,
1943 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1952 src
.file
= PROGRAM_CONSTANT
;
1953 switch (ir
->type
->base_type
) {
1954 case GLSL_TYPE_FLOAT
:
1955 values
= &ir
->value
.f
[0];
1957 case GLSL_TYPE_UINT
:
1958 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1959 values
[i
] = ir
->value
.u
[i
];
1963 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1964 values
[i
] = ir
->value
.i
[i
];
1967 case GLSL_TYPE_BOOL
:
1968 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1969 values
[i
] = ir
->value
.b
[i
];
1973 assert(!"Non-float/uint/int/bool constant");
1976 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1977 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1978 (gl_constant_value
*) values
,
1979 ir
->type
->vector_elements
,
1980 &this->result
.swizzle
);
1984 ir_to_mesa_visitor::visit(ir_call
*)
1986 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
1990 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1992 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
1993 dst_reg result_dst
, coord_dst
;
1994 ir_to_mesa_instruction
*inst
= NULL
;
1995 prog_opcode opcode
= OPCODE_NOP
;
1997 if (ir
->op
== ir_txs
)
1998 this->result
= src_reg_for_float(0.0);
2000 ir
->coordinate
->accept(this);
2002 /* Put our coords in a temp. We'll need to modify them for shadow,
2003 * projection, or LOD, so the only case we'd use it as-is is if
2004 * we're doing plain old texturing. Mesa IR optimization should
2005 * handle cleaning up our mess in that case.
2007 coord
= get_temp(glsl_type::vec4_type
);
2008 coord_dst
= dst_reg(coord
);
2009 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2011 if (ir
->projector
) {
2012 ir
->projector
->accept(this);
2013 projector
= this->result
;
2016 /* Storage for our result. Ideally for an assignment we'd be using
2017 * the actual storage for the result here, instead.
2019 result_src
= get_temp(glsl_type::vec4_type
);
2020 result_dst
= dst_reg(result_src
);
2025 opcode
= OPCODE_TEX
;
2028 opcode
= OPCODE_TXB
;
2029 ir
->lod_info
.bias
->accept(this);
2030 lod_info
= this->result
;
2033 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2035 opcode
= OPCODE_TXL
;
2036 ir
->lod_info
.lod
->accept(this);
2037 lod_info
= this->result
;
2040 opcode
= OPCODE_TXD
;
2041 ir
->lod_info
.grad
.dPdx
->accept(this);
2043 ir
->lod_info
.grad
.dPdy
->accept(this);
2047 assert(!"Unexpected ir_txf_ms opcode");
2050 assert(!"Unexpected ir_lod opcode");
2053 assert(!"Unexpected ir_tg4 opcode");
2055 case ir_query_levels
:
2056 assert(!"Unexpected ir_query_levels opcode");
2058 case ir_samples_identical
:
2059 unreachable("Unexpected ir_samples_identical opcode");
2060 case ir_texture_samples
:
2061 unreachable("Unexpected ir_texture_samples opcode");
2064 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2066 if (ir
->projector
) {
2067 if (opcode
== OPCODE_TEX
) {
2068 /* Slot the projector in as the last component of the coord. */
2069 coord_dst
.writemask
= WRITEMASK_W
;
2070 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2071 coord_dst
.writemask
= WRITEMASK_XYZW
;
2072 opcode
= OPCODE_TXP
;
2074 src_reg coord_w
= coord
;
2075 coord_w
.swizzle
= SWIZZLE_WWWW
;
2077 /* For the other TEX opcodes there's no projective version
2078 * since the last slot is taken up by lod info. Do the
2079 * projective divide now.
2081 coord_dst
.writemask
= WRITEMASK_W
;
2082 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2084 /* In the case where we have to project the coordinates "by hand,"
2085 * the shadow comparator value must also be projected.
2087 src_reg tmp_src
= coord
;
2088 if (ir
->shadow_comparator
) {
2089 /* Slot the shadow value in as the second to last component of the
2092 ir
->shadow_comparator
->accept(this);
2094 tmp_src
= get_temp(glsl_type::vec4_type
);
2095 dst_reg tmp_dst
= dst_reg(tmp_src
);
2097 /* Projective division not allowed for array samplers. */
2098 assert(!sampler_type
->sampler_array
);
2100 tmp_dst
.writemask
= WRITEMASK_Z
;
2101 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2103 tmp_dst
.writemask
= WRITEMASK_XY
;
2104 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2107 coord_dst
.writemask
= WRITEMASK_XYZ
;
2108 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2110 coord_dst
.writemask
= WRITEMASK_XYZW
;
2111 coord
.swizzle
= SWIZZLE_XYZW
;
2115 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2116 * comparator was put in the correct place (and projected) by the code,
2117 * above, that handles by-hand projection.
2119 if (ir
->shadow_comparator
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2120 /* Slot the shadow value in as the second to last component of the
2123 ir
->shadow_comparator
->accept(this);
2125 /* XXX This will need to be updated for cubemap array samplers. */
2126 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2127 sampler_type
->sampler_array
) {
2128 coord_dst
.writemask
= WRITEMASK_W
;
2130 coord_dst
.writemask
= WRITEMASK_Z
;
2133 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2134 coord_dst
.writemask
= WRITEMASK_XYZW
;
2137 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2138 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2139 coord_dst
.writemask
= WRITEMASK_W
;
2140 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2141 coord_dst
.writemask
= WRITEMASK_XYZW
;
2144 if (opcode
== OPCODE_TXD
)
2145 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2147 inst
= emit(ir
, opcode
, result_dst
, coord
);
2149 if (ir
->shadow_comparator
)
2150 inst
->tex_shadow
= GL_TRUE
;
2152 inst
->sampler
= get_sampler_uniform_value(ir
->sampler
, shader_program
,
2155 switch (sampler_type
->sampler_dimensionality
) {
2156 case GLSL_SAMPLER_DIM_1D
:
2157 inst
->tex_target
= (sampler_type
->sampler_array
)
2158 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2160 case GLSL_SAMPLER_DIM_2D
:
2161 inst
->tex_target
= (sampler_type
->sampler_array
)
2162 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2164 case GLSL_SAMPLER_DIM_3D
:
2165 inst
->tex_target
= TEXTURE_3D_INDEX
;
2167 case GLSL_SAMPLER_DIM_CUBE
:
2168 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2170 case GLSL_SAMPLER_DIM_RECT
:
2171 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2173 case GLSL_SAMPLER_DIM_BUF
:
2174 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2176 case GLSL_SAMPLER_DIM_EXTERNAL
:
2177 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2180 assert(!"Should not get here.");
2183 this->result
= result_src
;
2187 ir_to_mesa_visitor::visit(ir_return
*ir
)
2189 /* Non-void functions should have been inlined. We may still emit RETs
2190 * from main() unless the EmitNoMainReturn option is set.
2192 assert(!ir
->get_value());
2193 emit(ir
, OPCODE_RET
);
2197 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2200 ir
->condition
= new(mem_ctx
) ir_constant(true);
2202 ir
->condition
->accept(this);
2203 this->result
.negate
= ~this->result
.negate
;
2204 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2208 ir_to_mesa_visitor::visit(ir_demote
*ir
)
2210 assert(!"demote statement unsupported");
2214 ir_to_mesa_visitor::visit(ir_if
*ir
)
2216 ir_to_mesa_instruction
*if_inst
;
2218 ir
->condition
->accept(this);
2219 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2221 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2223 this->instructions
.push_tail(if_inst
);
2225 visit_exec_list(&ir
->then_instructions
, this);
2227 if (!ir
->else_instructions
.is_empty()) {
2228 emit(ir
->condition
, OPCODE_ELSE
);
2229 visit_exec_list(&ir
->else_instructions
, this);
2232 emit(ir
->condition
, OPCODE_ENDIF
);
2236 ir_to_mesa_visitor::visit(ir_emit_vertex
*)
2238 assert(!"Geometry shaders not supported.");
2242 ir_to_mesa_visitor::visit(ir_end_primitive
*)
2244 assert(!"Geometry shaders not supported.");
2248 ir_to_mesa_visitor::visit(ir_barrier
*)
2250 unreachable("GLSL barrier() not supported.");
2253 ir_to_mesa_visitor::ir_to_mesa_visitor()
2255 result
.file
= PROGRAM_UNDEFINED
;
2257 next_signature_id
= 1;
2258 current_function
= NULL
;
2259 mem_ctx
= ralloc_context(NULL
);
2262 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2264 ralloc_free(mem_ctx
);
2267 static struct prog_src_register
2268 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2270 struct prog_src_register mesa_reg
;
2272 mesa_reg
.File
= reg
.file
;
2273 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2274 mesa_reg
.Index
= reg
.index
;
2275 mesa_reg
.Swizzle
= reg
.swizzle
;
2276 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2277 mesa_reg
.Negate
= reg
.negate
;
2283 set_branchtargets(ir_to_mesa_visitor
*v
,
2284 struct prog_instruction
*mesa_instructions
,
2285 int num_instructions
)
2287 int if_count
= 0, loop_count
= 0;
2288 int *if_stack
, *loop_stack
;
2289 int if_stack_pos
= 0, loop_stack_pos
= 0;
2292 for (i
= 0; i
< num_instructions
; i
++) {
2293 switch (mesa_instructions
[i
].Opcode
) {
2297 case OPCODE_BGNLOOP
:
2302 mesa_instructions
[i
].BranchTarget
= -1;
2309 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2310 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2312 for (i
= 0; i
< num_instructions
; i
++) {
2313 switch (mesa_instructions
[i
].Opcode
) {
2315 if_stack
[if_stack_pos
] = i
;
2319 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2320 if_stack
[if_stack_pos
- 1] = i
;
2323 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2326 case OPCODE_BGNLOOP
:
2327 loop_stack
[loop_stack_pos
] = i
;
2330 case OPCODE_ENDLOOP
:
2332 /* Rewrite any breaks/conts at this nesting level (haven't
2333 * already had a BranchTarget assigned) to point to the end
2336 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2337 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2338 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2339 if (mesa_instructions
[j
].BranchTarget
== -1) {
2340 mesa_instructions
[j
].BranchTarget
= i
;
2344 /* The loop ends point at each other. */
2345 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2346 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2349 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
2350 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2351 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2363 print_program(struct prog_instruction
*mesa_instructions
,
2364 ir_instruction
**mesa_instruction_annotation
,
2365 int num_instructions
)
2367 ir_instruction
*last_ir
= NULL
;
2371 for (i
= 0; i
< num_instructions
; i
++) {
2372 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2373 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2375 fprintf(stdout
, "%3d: ", i
);
2377 if (last_ir
!= ir
&& ir
) {
2380 for (j
= 0; j
< indent
; j
++) {
2381 fprintf(stdout
, " ");
2387 fprintf(stdout
, " "); /* line number spacing. */
2390 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2391 PROG_PRINT_DEBUG
, NULL
);
2397 class add_uniform_to_shader
: public program_resource_visitor
{
2399 add_uniform_to_shader(struct gl_context
*ctx
,
2400 struct gl_shader_program
*shader_program
,
2401 struct gl_program_parameter_list
*params
)
2402 : ctx(ctx
), shader_program(shader_program
), params(params
), idx(-1)
2407 void process(ir_variable
*var
)
2411 this->program_resource_visitor::process(var
,
2412 ctx
->Const
.UseSTD430AsDefaultPacking
);
2413 var
->data
.param_index
= this->idx
;
2417 virtual void visit_field(const glsl_type
*type
, const char *name
,
2418 bool row_major
, const glsl_type
*record_type
,
2419 const enum glsl_interface_packing packing
,
2422 struct gl_context
*ctx
;
2423 struct gl_shader_program
*shader_program
;
2424 struct gl_program_parameter_list
*params
;
2429 } /* anonymous namespace */
2432 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2433 bool /* row_major */,
2434 const glsl_type
* /* record_type */,
2435 const enum glsl_interface_packing
,
2436 bool /* last_field */)
2438 /* opaque types don't use storage in the param list unless they are
2439 * bindless samplers or images.
2441 if (type
->contains_opaque() && !var
->data
.bindless
)
2444 /* Add the uniform to the param list */
2445 assert(_mesa_lookup_parameter_index(params
, name
) < 0);
2446 int index
= _mesa_lookup_parameter_index(params
, name
);
2448 unsigned num_params
= type
->arrays_of_arrays_size();
2449 num_params
= MAX2(num_params
, 1);
2450 num_params
*= type
->without_array()->matrix_columns
;
2452 bool is_dual_slot
= type
->without_array()->is_dual_slot();
2456 _mesa_reserve_parameter_storage(params
, num_params
);
2457 index
= params
->NumParameters
;
2459 if (ctx
->Const
.PackedDriverUniformStorage
) {
2460 for (unsigned i
= 0; i
< num_params
; i
++) {
2461 unsigned dmul
= type
->without_array()->is_64bit() ? 2 : 1;
2462 unsigned comps
= type
->without_array()->vector_elements
* dmul
;
2470 _mesa_add_parameter(params
, PROGRAM_UNIFORM
, name
, comps
,
2471 type
->gl_type
, NULL
, NULL
, false);
2474 for (unsigned i
= 0; i
< num_params
; i
++) {
2475 _mesa_add_parameter(params
, PROGRAM_UNIFORM
, name
, 4,
2476 type
->gl_type
, NULL
, NULL
, true);
2480 /* The first part of the uniform that's processed determines the base
2481 * location of the whole uniform (for structures).
2486 /* Each Parameter will hold the index to the backing uniform storage.
2487 * This avoids relying on names to match parameters and uniform
2488 * storages later when associating uniform storage.
2492 shader_program
->UniformHash
->get(location
, params
->Parameters
[index
].Name
);
2495 for (unsigned i
= 0; i
< num_params
; i
++) {
2496 struct gl_program_parameter
*param
= ¶ms
->Parameters
[index
+ i
];
2497 param
->UniformStorageIndex
= location
;
2498 param
->MainUniformStorageIndex
= params
->Parameters
[this->idx
].UniformStorageIndex
;
2503 * Generate the program parameters list for the user uniforms in a shader
2505 * \param shader_program Linked shader program. This is only used to
2506 * emit possible link errors to the info log.
2507 * \param sh Shader whose uniforms are to be processed.
2508 * \param params Parameter list to be filled in.
2511 _mesa_generate_parameters_list_for_uniforms(struct gl_context
*ctx
,
2512 struct gl_shader_program
2514 struct gl_linked_shader
*sh
,
2515 struct gl_program_parameter_list
2518 add_uniform_to_shader
add(ctx
, shader_program
, params
);
2520 foreach_in_list(ir_instruction
, node
, sh
->ir
) {
2521 ir_variable
*var
= node
->as_variable();
2523 if ((var
== NULL
) || (var
->data
.mode
!= ir_var_uniform
)
2524 || var
->is_in_buffer_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2532 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2533 struct gl_shader_program
*shader_program
,
2534 struct gl_program
*prog
)
2536 struct gl_program_parameter_list
*params
= prog
->Parameters
;
2537 gl_shader_stage shader_type
= prog
->info
.stage
;
2539 /* After adding each uniform to the parameter list, connect the storage for
2540 * the parameter with the tracking structure used by the API for the
2543 unsigned last_location
= unsigned(~0);
2544 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2545 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2548 unsigned location
= params
->Parameters
[i
].UniformStorageIndex
;
2550 struct gl_uniform_storage
*storage
=
2551 &shader_program
->data
->UniformStorage
[location
];
2553 /* Do not associate any uniform storage to built-in uniforms */
2554 if (storage
->builtin
)
2557 if (location
!= last_location
) {
2558 enum gl_uniform_driver_format format
= uniform_native
;
2559 unsigned columns
= 0;
2562 if (ctx
->Const
.PackedDriverUniformStorage
&& !prog
->is_arb_asm
) {
2563 dmul
= storage
->type
->vector_elements
* sizeof(float);
2565 dmul
= 4 * sizeof(float);
2568 switch (storage
->type
->base_type
) {
2569 case GLSL_TYPE_UINT64
:
2570 if (storage
->type
->vector_elements
> 2)
2573 case GLSL_TYPE_UINT
:
2574 case GLSL_TYPE_UINT16
:
2575 case GLSL_TYPE_UINT8
:
2576 assert(ctx
->Const
.NativeIntegers
);
2577 format
= uniform_native
;
2580 case GLSL_TYPE_INT64
:
2581 if (storage
->type
->vector_elements
> 2)
2585 case GLSL_TYPE_INT16
:
2586 case GLSL_TYPE_INT8
:
2588 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2591 case GLSL_TYPE_DOUBLE
:
2592 if (storage
->type
->vector_elements
> 2)
2595 case GLSL_TYPE_FLOAT
:
2596 case GLSL_TYPE_FLOAT16
:
2597 format
= uniform_native
;
2598 columns
= storage
->type
->matrix_columns
;
2600 case GLSL_TYPE_BOOL
:
2601 format
= uniform_native
;
2604 case GLSL_TYPE_SAMPLER
:
2605 case GLSL_TYPE_IMAGE
:
2606 case GLSL_TYPE_SUBROUTINE
:
2607 format
= uniform_native
;
2610 case GLSL_TYPE_ATOMIC_UINT
:
2611 case GLSL_TYPE_ARRAY
:
2612 case GLSL_TYPE_VOID
:
2613 case GLSL_TYPE_STRUCT
:
2614 case GLSL_TYPE_ERROR
:
2615 case GLSL_TYPE_INTERFACE
:
2616 case GLSL_TYPE_FUNCTION
:
2617 assert(!"Should not get here.");
2621 unsigned pvo
= params
->ParameterValueOffset
[i
];
2622 _mesa_uniform_attach_driver_storage(storage
, dmul
* columns
, dmul
,
2624 ¶ms
->ParameterValues
[pvo
]);
2626 /* When a bindless sampler/image is bound to a texture/image unit, we
2627 * have to overwrite the constant value by the resident handle
2628 * directly in the constant buffer before the next draw. One solution
2629 * is to keep track a pointer to the base of the data.
2631 if (storage
->is_bindless
&& (prog
->sh
.NumBindlessSamplers
||
2632 prog
->sh
.NumBindlessImages
)) {
2633 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2635 for (unsigned j
= 0; j
< array_elements
; ++j
) {
2636 unsigned unit
= storage
->opaque
[shader_type
].index
+ j
;
2638 if (storage
->type
->without_array()->is_sampler()) {
2639 assert(unit
>= 0 && unit
< prog
->sh
.NumBindlessSamplers
);
2640 prog
->sh
.BindlessSamplers
[unit
].data
=
2641 ¶ms
->ParameterValues
[pvo
] + 4 * j
;
2642 } else if (storage
->type
->without_array()->is_image()) {
2643 assert(unit
>= 0 && unit
< prog
->sh
.NumBindlessImages
);
2644 prog
->sh
.BindlessImages
[unit
].data
=
2645 ¶ms
->ParameterValues
[pvo
] + 4 * j
;
2650 /* After attaching the driver's storage to the uniform, propagate any
2651 * data from the linker's backing store. This will cause values from
2652 * initializers in the source code to be copied over.
2654 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2655 if (ctx
->Const
.PackedDriverUniformStorage
&& !prog
->is_arb_asm
&&
2656 (storage
->is_bindless
|| !storage
->type
->contains_opaque())) {
2657 const int dmul
= storage
->type
->is_64bit() ? 2 : 1;
2658 const unsigned components
=
2659 storage
->type
->vector_elements
*
2660 storage
->type
->matrix_columns
;
2662 for (unsigned s
= 0; s
< storage
->num_driver_storage
; s
++) {
2663 gl_constant_value
*uni_storage
= (gl_constant_value
*)
2664 storage
->driver_storage
[s
].data
;
2665 memcpy(uni_storage
, storage
->storage
,
2666 sizeof(storage
->storage
[0]) * components
*
2667 array_elements
* dmul
);
2670 _mesa_propagate_uniforms_to_driver_storage(storage
, 0,
2674 last_location
= location
;
2680 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2681 * channels for copy propagation and updates following instructions to
2682 * use the original versions.
2684 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2685 * will occur. As an example, a TXP production before this pass:
2687 * 0: MOV TEMP[1], INPUT[4].xyyy;
2688 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2689 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2693 * 0: MOV TEMP[1], INPUT[4].xyyy;
2694 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2695 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2697 * which allows for dead code elimination on TEMP[1]'s writes.
2700 ir_to_mesa_visitor::copy_propagate(void)
2702 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2703 ir_to_mesa_instruction
*,
2704 this->next_temp
* 4);
2705 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2708 foreach_in_list(ir_to_mesa_instruction
, inst
, &this->instructions
) {
2709 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2710 || inst
->dst
.index
< this->next_temp
);
2712 /* First, do any copy propagation possible into the src regs. */
2713 for (int r
= 0; r
< 3; r
++) {
2714 ir_to_mesa_instruction
*first
= NULL
;
2716 int acp_base
= inst
->src
[r
].index
* 4;
2718 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2719 inst
->src
[r
].reladdr
)
2722 /* See if we can find entries in the ACP consisting of MOVs
2723 * from the same src register for all the swizzled channels
2724 * of this src register reference.
2726 for (int i
= 0; i
< 4; i
++) {
2727 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2728 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2735 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2740 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2741 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2749 /* We've now validated that we can copy-propagate to
2750 * replace this src register reference. Do it.
2752 inst
->src
[r
].file
= first
->src
[0].file
;
2753 inst
->src
[r
].index
= first
->src
[0].index
;
2756 for (int i
= 0; i
< 4; i
++) {
2757 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2758 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2759 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2762 inst
->src
[r
].swizzle
= swizzle
;
2767 case OPCODE_BGNLOOP
:
2768 case OPCODE_ENDLOOP
:
2769 /* End of a basic block, clear the ACP entirely. */
2770 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2779 /* Clear all channels written inside the block from the ACP, but
2780 * leaving those that were not touched.
2782 for (int r
= 0; r
< this->next_temp
; r
++) {
2783 for (int c
= 0; c
< 4; c
++) {
2784 if (!acp
[4 * r
+ c
])
2787 if (acp_level
[4 * r
+ c
] >= level
)
2788 acp
[4 * r
+ c
] = NULL
;
2791 if (inst
->op
== OPCODE_ENDIF
)
2796 /* Continuing the block, clear any written channels from
2799 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2800 /* Any temporary might be written, so no copy propagation
2801 * across this instruction.
2803 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2804 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2805 inst
->dst
.reladdr
) {
2806 /* Any output might be written, so no copy propagation
2807 * from outputs across this instruction.
2809 for (int r
= 0; r
< this->next_temp
; r
++) {
2810 for (int c
= 0; c
< 4; c
++) {
2811 if (!acp
[4 * r
+ c
])
2814 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2815 acp
[4 * r
+ c
] = NULL
;
2818 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2819 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2820 /* Clear where it's used as dst. */
2821 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2822 for (int c
= 0; c
< 4; c
++) {
2823 if (inst
->dst
.writemask
& (1 << c
)) {
2824 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2829 /* Clear where it's used as src. */
2830 for (int r
= 0; r
< this->next_temp
; r
++) {
2831 for (int c
= 0; c
< 4; c
++) {
2832 if (!acp
[4 * r
+ c
])
2835 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2837 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2838 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2839 inst
->dst
.writemask
& (1 << src_chan
))
2841 acp
[4 * r
+ c
] = NULL
;
2849 /* If this is a copy, add it to the ACP. */
2850 if (inst
->op
== OPCODE_MOV
&&
2851 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2852 !(inst
->dst
.file
== inst
->src
[0].file
&&
2853 inst
->dst
.index
== inst
->src
[0].index
) &&
2854 !inst
->dst
.reladdr
&&
2856 !inst
->src
[0].reladdr
&&
2857 !inst
->src
[0].negate
) {
2858 for (int i
= 0; i
< 4; i
++) {
2859 if (inst
->dst
.writemask
& (1 << i
)) {
2860 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2861 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2867 ralloc_free(acp_level
);
2873 * Convert a shader's GLSL IR into a Mesa gl_program.
2875 static struct gl_program
*
2876 get_mesa_program(struct gl_context
*ctx
,
2877 struct gl_shader_program
*shader_program
,
2878 struct gl_linked_shader
*shader
)
2880 ir_to_mesa_visitor v
;
2881 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2882 ir_instruction
**mesa_instruction_annotation
;
2884 struct gl_program
*prog
;
2885 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
2886 const char *target_string
= _mesa_shader_stage_to_string(shader
->Stage
);
2887 struct gl_shader_compiler_options
*options
=
2888 &ctx
->Const
.ShaderCompilerOptions
[shader
->Stage
];
2890 validate_ir_tree(shader
->ir
);
2892 prog
= shader
->Program
;
2893 prog
->Parameters
= _mesa_new_parameter_list();
2896 v
.shader_program
= shader_program
;
2897 v
.options
= options
;
2899 _mesa_generate_parameters_list_for_uniforms(ctx
, shader_program
, shader
,
2902 /* Emit Mesa IR for main(). */
2903 visit_exec_list(shader
->ir
, &v
);
2904 v
.emit(NULL
, OPCODE_END
);
2906 prog
->arb
.NumTemporaries
= v
.next_temp
;
2908 unsigned num_instructions
= v
.instructions
.length();
2910 mesa_instructions
= rzalloc_array(prog
, struct prog_instruction
,
2912 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2917 /* Convert ir_mesa_instructions into prog_instructions.
2919 mesa_inst
= mesa_instructions
;
2921 foreach_in_list(const ir_to_mesa_instruction
, inst
, &v
.instructions
) {
2922 mesa_inst
->Opcode
= inst
->op
;
2924 mesa_inst
->Saturate
= GL_TRUE
;
2925 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2926 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2927 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2928 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2929 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2930 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2931 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2932 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2933 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2934 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2935 mesa_instruction_annotation
[i
] = inst
->ir
;
2937 /* Set IndirectRegisterFiles. */
2938 if (mesa_inst
->DstReg
.RelAddr
)
2939 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2941 /* Update program's bitmask of indirectly accessed register files */
2942 for (unsigned src
= 0; src
< 3; src
++)
2943 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2944 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2946 switch (mesa_inst
->Opcode
) {
2948 if (options
->MaxIfDepth
== 0) {
2949 linker_warning(shader_program
,
2950 "Couldn't flatten if-statement. "
2951 "This will likely result in software "
2952 "rasterization.\n");
2955 case OPCODE_BGNLOOP
:
2956 if (options
->EmitNoLoops
) {
2957 linker_warning(shader_program
,
2958 "Couldn't unroll loop. "
2959 "This will likely result in software "
2960 "rasterization.\n");
2964 if (options
->EmitNoCont
) {
2965 linker_warning(shader_program
,
2966 "Couldn't lower continue-statement. "
2967 "This will likely result in software "
2968 "rasterization.\n");
2972 prog
->arb
.NumAddressRegs
= 1;
2981 if (!shader_program
->data
->LinkStatus
)
2985 if (!shader_program
->data
->LinkStatus
) {
2989 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2991 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
2992 fprintf(stderr
, "\n");
2993 fprintf(stderr
, "GLSL IR for linked %s program %d:\n", target_string
,
2994 shader_program
->Name
);
2995 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
2996 fprintf(stderr
, "\n");
2997 fprintf(stderr
, "\n");
2998 fprintf(stderr
, "Mesa IR for linked %s program %d:\n", target_string
,
2999 shader_program
->Name
);
3000 print_program(mesa_instructions
, mesa_instruction_annotation
,
3005 prog
->arb
.Instructions
= mesa_instructions
;
3006 prog
->arb
.NumInstructions
= num_instructions
;
3008 /* Setting this to NULL prevents a possible double free in the fail_exit
3011 mesa_instructions
= NULL
;
3013 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
3015 prog
->ShadowSamplers
= shader
->shadow_samplers
;
3016 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
3017 _mesa_update_shader_textures_used(shader_program
, prog
);
3019 /* Set the gl_FragDepth layout. */
3020 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
3021 prog
->info
.fs
.depth_layout
= shader_program
->FragDepthLayout
;
3024 _mesa_optimize_program(prog
, prog
);
3026 /* This has to be done last. Any operation that can cause
3027 * prog->ParameterValues to get reallocated (e.g., anything that adds a
3028 * program constant) has to happen before creating this linkage.
3030 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
);
3031 if (!shader_program
->data
->LinkStatus
) {
3038 ralloc_free(mesa_instructions
);
3039 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
3047 * Called via ctx->Driver.LinkShader()
3048 * This actually involves converting GLSL IR into Mesa gl_programs with
3049 * code lowering and other optimizations.
3052 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3054 assert(prog
->data
->LinkStatus
);
3056 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3057 if (prog
->_LinkedShaders
[i
] == NULL
)
3061 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3062 const struct gl_shader_compiler_options
*options
=
3063 &ctx
->Const
.ShaderCompilerOptions
[prog
->_LinkedShaders
[i
]->Stage
];
3069 do_mat_op_to_vec(ir
);
3070 lower_instructions(ir
, (MOD_TO_FLOOR
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3071 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3072 | MUL64_TO_MUL_AND_MUL_HIGH
3073 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3075 progress
= do_common_optimization(ir
, true, true,
3076 options
, ctx
->Const
.NativeIntegers
)
3079 progress
= lower_quadop_vector(ir
, true) || progress
;
3081 if (options
->MaxIfDepth
== 0)
3082 progress
= lower_discard(ir
) || progress
;
3084 progress
= lower_if_to_cond_assign((gl_shader_stage
)i
, ir
,
3085 options
->MaxIfDepth
) || progress
;
3087 progress
= lower_noise(ir
) || progress
;
3089 /* If there are forms of indirect addressing that the driver
3090 * cannot handle, perform the lowering pass.
3092 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3093 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3095 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
3096 options
->EmitNoIndirectInput
,
3097 options
->EmitNoIndirectOutput
,
3098 options
->EmitNoIndirectTemp
,
3099 options
->EmitNoIndirectUniform
)
3102 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3103 progress
= lower_vector_insert(ir
, true) || progress
;
3106 validate_ir_tree(ir
);
3109 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3110 struct gl_program
*linked_prog
;
3112 if (prog
->_LinkedShaders
[i
] == NULL
)
3115 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3118 _mesa_copy_linked_program_data(prog
, prog
->_LinkedShaders
[i
]);
3120 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
3121 _mesa_shader_stage_to_program(i
),
3123 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3130 build_program_resource_list(ctx
, prog
, false);
3131 return prog
->data
->LinkStatus
;
3135 * Link a GLSL shader program. Called via glLinkProgram().
3138 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3143 _mesa_clear_shader_program_data(ctx
, prog
);
3145 prog
->data
= _mesa_create_shader_program_data();
3147 prog
->data
->LinkStatus
= LINKING_SUCCESS
;
3149 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3150 if (!prog
->Shaders
[i
]->CompileStatus
) {
3151 linker_error(prog
, "linking with uncompiled/unspecialized shader");
3155 spirv
= (prog
->Shaders
[i
]->spirv_data
!= NULL
);
3156 } else if (spirv
&& !prog
->Shaders
[i
]->spirv_data
) {
3157 /* The GL_ARB_gl_spirv spec adds a new bullet point to the list of
3158 * reasons LinkProgram can fail:
3160 * "All the shader objects attached to <program> do not have the
3161 * same value for the SPIR_V_BINARY_ARB state."
3164 "not all attached shaders have the same "
3165 "SPIR_V_BINARY_ARB state");
3168 prog
->data
->spirv
= spirv
;
3170 if (prog
->data
->LinkStatus
) {
3172 link_shaders(ctx
, prog
);
3174 _mesa_spirv_link_shaders(ctx
, prog
);
3177 /* If LinkStatus is LINKING_SUCCESS, then reset sampler validated to true.
3178 * Validation happens via the LinkShader call below. If LinkStatus is
3179 * LINKING_SKIPPED, then SamplersValidated will have been restored from the
3182 if (prog
->data
->LinkStatus
== LINKING_SUCCESS
) {
3183 prog
->SamplersValidated
= GL_TRUE
;
3186 if (prog
->data
->LinkStatus
&& !ctx
->Driver
.LinkShader(ctx
, prog
)) {
3187 prog
->data
->LinkStatus
= LINKING_FAILURE
;
3190 /* Return early if we are loading the shader from on-disk cache */
3191 if (prog
->data
->LinkStatus
== LINKING_SKIPPED
)
3194 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
3195 if (!prog
->data
->LinkStatus
) {
3196 fprintf(stderr
, "GLSL shader program %d failed to link\n", prog
->Name
);
3199 if (prog
->data
->InfoLog
&& prog
->data
->InfoLog
[0] != 0) {
3200 fprintf(stderr
, "GLSL shader program %d info log:\n", prog
->Name
);
3201 fprintf(stderr
, "%s\n", prog
->data
->InfoLog
);
3205 #ifdef ENABLE_SHADER_CACHE
3206 if (prog
->data
->LinkStatus
)
3207 shader_cache_write_program_metadata(ctx
, prog
);