2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/macros.h"
34 #include "main/mtypes.h"
35 #include "main/shaderapi.h"
36 #include "main/shaderobj.h"
37 #include "main/uniforms.h"
38 #include "main/glspirv.h"
39 #include "compiler/glsl/ast.h"
40 #include "compiler/glsl/ir.h"
41 #include "compiler/glsl/ir_expression_flattening.h"
42 #include "compiler/glsl/ir_visitor.h"
43 #include "compiler/glsl/ir_optimization.h"
44 #include "compiler/glsl/ir_uniform.h"
45 #include "compiler/glsl/glsl_parser_extras.h"
46 #include "compiler/glsl_types.h"
47 #include "compiler/glsl/linker.h"
48 #include "compiler/glsl/program.h"
49 #include "compiler/glsl/shader_cache.h"
50 #include "compiler/glsl/string_to_uint_map.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
58 static int swizzle_for_size(int size
);
66 * This struct is a corresponding struct to Mesa prog_src_register, with
71 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
75 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
76 this->swizzle
= swizzle_for_size(type
->vector_elements
);
78 this->swizzle
= SWIZZLE_XYZW
;
85 this->file
= PROGRAM_UNDEFINED
;
92 explicit src_reg(dst_reg reg
);
94 gl_register_file file
; /**< PROGRAM_* from Mesa */
95 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
96 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
97 int negate
; /**< NEGATE_XYZW mask from mesa */
98 /** Register index should be offset by the integer in this reg. */
104 dst_reg(gl_register_file file
, int writemask
)
108 this->writemask
= writemask
;
109 this->reladdr
= NULL
;
114 this->file
= PROGRAM_UNDEFINED
;
117 this->reladdr
= NULL
;
120 explicit dst_reg(src_reg reg
);
122 gl_register_file file
; /**< PROGRAM_* from Mesa */
123 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
124 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
125 /** Register index should be offset by the integer in this reg. */
129 } /* anonymous namespace */
131 src_reg::src_reg(dst_reg reg
)
133 this->file
= reg
.file
;
134 this->index
= reg
.index
;
135 this->swizzle
= SWIZZLE_XYZW
;
137 this->reladdr
= reg
.reladdr
;
140 dst_reg::dst_reg(src_reg reg
)
142 this->file
= reg
.file
;
143 this->index
= reg
.index
;
144 this->writemask
= WRITEMASK_XYZW
;
145 this->reladdr
= reg
.reladdr
;
150 class ir_to_mesa_instruction
: public exec_node
{
152 DECLARE_RALLOC_CXX_OPERATORS(ir_to_mesa_instruction
)
157 /** Pointer to the ir source this tree came from for debugging */
160 int sampler
; /**< sampler index */
161 int tex_target
; /**< One of TEXTURE_*_INDEX */
162 GLboolean tex_shadow
;
165 class variable_storage
: public exec_node
{
167 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
168 : file(file
), index(index
), var(var
)
173 gl_register_file file
;
175 ir_variable
*var
; /* variable that maps to this, if any */
178 class function_entry
: public exec_node
{
180 ir_function_signature
*sig
;
183 * identifier of this function signature used by the program.
185 * At the point that Mesa instructions for function calls are
186 * generated, we don't know the address of the first instruction of
187 * the function body. So we make the BranchTarget that is called a
188 * small integer and rewrite them during set_branchtargets().
193 * Pointer to first instruction of the function body.
195 * Set during function body emits after main() is processed.
197 ir_to_mesa_instruction
*bgn_inst
;
200 * Index of the first instruction of the function body in actual
203 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
207 /** Storage for the return value. */
211 class ir_to_mesa_visitor
: public ir_visitor
{
213 ir_to_mesa_visitor();
214 ~ir_to_mesa_visitor();
216 function_entry
*current_function
;
218 struct gl_context
*ctx
;
219 struct gl_program
*prog
;
220 struct gl_shader_program
*shader_program
;
221 struct gl_shader_compiler_options
*options
;
225 variable_storage
*find_variable_storage(const ir_variable
*var
);
227 src_reg
get_temp(const glsl_type
*type
);
228 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
230 src_reg
src_reg_for_float(float val
);
233 * \name Visit methods
235 * As typical for the visitor pattern, there must be one \c visit method for
236 * each concrete subclass of \c ir_instruction. Virtual base classes within
237 * the hierarchy should not have \c visit methods.
240 virtual void visit(ir_variable
*);
241 virtual void visit(ir_loop
*);
242 virtual void visit(ir_loop_jump
*);
243 virtual void visit(ir_function_signature
*);
244 virtual void visit(ir_function
*);
245 virtual void visit(ir_expression
*);
246 virtual void visit(ir_swizzle
*);
247 virtual void visit(ir_dereference_variable
*);
248 virtual void visit(ir_dereference_array
*);
249 virtual void visit(ir_dereference_record
*);
250 virtual void visit(ir_assignment
*);
251 virtual void visit(ir_constant
*);
252 virtual void visit(ir_call
*);
253 virtual void visit(ir_return
*);
254 virtual void visit(ir_discard
*);
255 virtual void visit(ir_demote
*);
256 virtual void visit(ir_texture
*);
257 virtual void visit(ir_if
*);
258 virtual void visit(ir_emit_vertex
*);
259 virtual void visit(ir_end_primitive
*);
260 virtual void visit(ir_barrier
*);
265 /** List of variable_storage */
268 /** List of function_entry */
269 exec_list function_signatures
;
270 int next_signature_id
;
272 /** List of ir_to_mesa_instruction */
273 exec_list instructions
;
275 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
277 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
278 dst_reg dst
, src_reg src0
);
280 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
281 dst_reg dst
, src_reg src0
, src_reg src1
);
283 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
285 src_reg src0
, src_reg src1
, src_reg src2
);
288 * Emit the correct dot-product instruction for the type of arguments
290 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
296 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
297 dst_reg dst
, src_reg src0
);
299 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
300 dst_reg dst
, src_reg src0
, src_reg src1
);
302 bool try_emit_mad(ir_expression
*ir
,
304 bool try_emit_mad_for_and_not(ir_expression
*ir
,
307 void emit_swz(ir_expression
*ir
);
309 void emit_equality_comparison(ir_expression
*ir
, enum prog_opcode op
,
311 const src_reg
&src0
, const src_reg
&src1
);
313 inline void emit_sne(ir_expression
*ir
, dst_reg dst
,
314 const src_reg
&src0
, const src_reg
&src1
)
316 emit_equality_comparison(ir
, OPCODE_SLT
, dst
, src0
, src1
);
319 inline void emit_seq(ir_expression
*ir
, dst_reg dst
,
320 const src_reg
&src0
, const src_reg
&src1
)
322 emit_equality_comparison(ir
, OPCODE_SGE
, dst
, src0
, src1
);
325 bool process_move_condition(ir_rvalue
*ir
);
327 void copy_propagate(void);
332 } /* anonymous namespace */
334 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
336 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
338 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
341 swizzle_for_size(int size
)
343 static const int size_swizzles
[4] = {
344 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
345 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
346 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
347 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
350 assert((size
>= 1) && (size
<= 4));
351 return size_swizzles
[size
- 1];
354 ir_to_mesa_instruction
*
355 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
357 src_reg src0
, src_reg src1
, src_reg src2
)
359 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
362 /* If we have to do relative addressing, we want to load the ARL
363 * reg directly for one of the regs, and preload the other reladdr
364 * sources into temps.
366 num_reladdr
+= dst
.reladdr
!= NULL
;
367 num_reladdr
+= src0
.reladdr
!= NULL
;
368 num_reladdr
+= src1
.reladdr
!= NULL
;
369 num_reladdr
+= src2
.reladdr
!= NULL
;
371 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
372 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
373 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
376 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
379 assert(num_reladdr
== 0);
388 this->instructions
.push_tail(inst
);
394 ir_to_mesa_instruction
*
395 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
396 dst_reg dst
, src_reg src0
, src_reg src1
)
398 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
401 ir_to_mesa_instruction
*
402 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
403 dst_reg dst
, src_reg src0
)
405 assert(dst
.writemask
!= 0);
406 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
409 ir_to_mesa_instruction
*
410 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
412 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
415 ir_to_mesa_instruction
*
416 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
417 dst_reg dst
, src_reg src0
, src_reg src1
,
420 static const enum prog_opcode dot_opcodes
[] = {
421 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
424 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
428 * Emits Mesa scalar opcodes to produce unique answers across channels.
430 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
431 * channel determines the result across all channels. So to do a vec4
432 * of this operation, we want to emit a scalar per source channel used
433 * to produce dest channels.
436 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
438 src_reg orig_src0
, src_reg orig_src1
)
441 int done_mask
= ~dst
.writemask
;
443 /* Mesa RCP is a scalar operation splatting results to all channels,
444 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
447 for (i
= 0; i
< 4; i
++) {
448 GLuint this_mask
= (1 << i
);
449 ir_to_mesa_instruction
*inst
;
450 src_reg src0
= orig_src0
;
451 src_reg src1
= orig_src1
;
453 if (done_mask
& this_mask
)
456 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
457 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
458 for (j
= i
+ 1; j
< 4; j
++) {
459 /* If there is another enabled component in the destination that is
460 * derived from the same inputs, generate its value on this pass as
463 if (!(done_mask
& (1 << j
)) &&
464 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
465 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
466 this_mask
|= (1 << j
);
469 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
470 src0_swiz
, src0_swiz
);
471 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
472 src1_swiz
, src1_swiz
);
474 inst
= emit(ir
, op
, dst
, src0
, src1
);
475 inst
->dst
.writemask
= this_mask
;
476 done_mask
|= this_mask
;
481 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
482 dst_reg dst
, src_reg src0
)
484 src_reg undef
= undef_src
;
486 undef
.swizzle
= SWIZZLE_XXXX
;
488 emit_scalar(ir
, op
, dst
, src0
, undef
);
492 ir_to_mesa_visitor::src_reg_for_float(float val
)
494 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
496 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
497 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
503 type_size(const struct glsl_type
*type
)
505 return type
->count_vec4_slots(false, false);
509 * In the initial pass of codegen, we assign temporary numbers to
510 * intermediate results. (not SSA -- variable assignments will reuse
511 * storage). Actual register allocation for the Mesa VM occurs in a
512 * pass over the Mesa IR later.
515 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
519 src
.file
= PROGRAM_TEMPORARY
;
520 src
.index
= next_temp
;
522 next_temp
+= type_size(type
);
524 if (type
->is_array() || type
->is_struct()) {
525 src
.swizzle
= SWIZZLE_NOOP
;
527 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
535 ir_to_mesa_visitor::find_variable_storage(const ir_variable
*var
)
537 foreach_in_list(variable_storage
, entry
, &this->variables
) {
538 if (entry
->var
== var
)
546 ir_to_mesa_visitor::visit(ir_variable
*ir
)
548 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
550 const ir_state_slot
*const slots
= ir
->get_state_slots();
551 assert(slots
!= NULL
);
553 /* Check if this statevar's setup in the STATE file exactly
554 * matches how we'll want to reference it as a
555 * struct/array/whatever. If not, then we need to move it into
556 * temporary storage and hope that it'll get copy-propagated
559 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
560 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
565 variable_storage
*storage
;
567 if (i
== ir
->get_num_state_slots()) {
568 /* We'll set the index later. */
569 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
570 this->variables
.push_tail(storage
);
574 /* The variable_storage constructor allocates slots based on the size
575 * of the type. However, this had better match the number of state
576 * elements that we're going to copy into the new temporary.
578 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
580 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
582 this->variables
.push_tail(storage
);
583 this->next_temp
+= type_size(ir
->type
);
585 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
589 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
590 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
593 if (storage
->file
== PROGRAM_STATE_VAR
) {
594 if (storage
->index
== -1) {
595 storage
->index
= index
;
597 assert(index
== storage
->index
+ (int)i
);
600 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
601 src
.swizzle
= slots
[i
].swizzle
;
602 emit(ir
, OPCODE_MOV
, dst
, src
);
603 /* even a float takes up a whole vec4 reg in a struct/array. */
608 if (storage
->file
== PROGRAM_TEMPORARY
&&
609 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
610 linker_error(this->shader_program
,
611 "failed to load builtin uniform `%s' "
612 "(%d/%d regs loaded)\n",
613 ir
->name
, dst
.index
- storage
->index
,
614 type_size(ir
->type
));
620 ir_to_mesa_visitor::visit(ir_loop
*ir
)
622 emit(NULL
, OPCODE_BGNLOOP
);
624 visit_exec_list(&ir
->body_instructions
, this);
626 emit(NULL
, OPCODE_ENDLOOP
);
630 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
633 case ir_loop_jump::jump_break
:
634 emit(NULL
, OPCODE_BRK
);
636 case ir_loop_jump::jump_continue
:
637 emit(NULL
, OPCODE_CONT
);
644 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
651 ir_to_mesa_visitor::visit(ir_function
*ir
)
653 /* Ignore function bodies other than main() -- we shouldn't see calls to
654 * them since they should all be inlined before we get to ir_to_mesa.
656 if (strcmp(ir
->name
, "main") == 0) {
657 const ir_function_signature
*sig
;
660 sig
= ir
->matching_signature(NULL
, &empty
, false);
664 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
671 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
673 int nonmul_operand
= 1 - mul_operand
;
676 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
677 if (!expr
|| expr
->operation
!= ir_binop_mul
)
680 expr
->operands
[0]->accept(this);
682 expr
->operands
[1]->accept(this);
684 ir
->operands
[nonmul_operand
]->accept(this);
687 this->result
= get_temp(ir
->type
);
688 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
694 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
696 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
697 * implemented using multiplication, and logical-or is implemented using
698 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
699 * As result, the logical expression (a & !b) can be rewritten as:
703 * - (a * 1) - (a * b)
707 * This final expression can be implemented as a single MAD(a, -b, a)
711 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
713 const int other_operand
= 1 - try_operand
;
716 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
717 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
720 ir
->operands
[other_operand
]->accept(this);
722 expr
->operands
[0]->accept(this);
725 b
.negate
= ~b
.negate
;
727 this->result
= get_temp(ir
->type
);
728 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
734 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
735 src_reg
*reg
, int *num_reladdr
)
740 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
742 if (*num_reladdr
!= 1) {
743 src_reg temp
= get_temp(glsl_type::vec4_type
);
745 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
753 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
755 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
756 * This means that each of the operands is either an immediate value of -1,
757 * 0, or 1, or is a component from one source register (possibly with
760 uint8_t components
[4] = { 0 };
761 bool negate
[4] = { false };
762 ir_variable
*var
= NULL
;
764 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
765 ir_rvalue
*op
= ir
->operands
[i
];
767 assert(op
->type
->is_scalar());
770 switch (op
->ir_type
) {
771 case ir_type_constant
: {
773 assert(op
->type
->is_scalar());
775 const ir_constant
*const c
= op
->as_constant();
777 components
[i
] = SWIZZLE_ONE
;
778 } else if (c
->is_zero()) {
779 components
[i
] = SWIZZLE_ZERO
;
780 } else if (c
->is_negative_one()) {
781 components
[i
] = SWIZZLE_ONE
;
784 assert(!"SWZ constant must be 0.0 or 1.0.");
791 case ir_type_dereference_variable
: {
792 ir_dereference_variable
*const deref
=
793 (ir_dereference_variable
*) op
;
795 assert((var
== NULL
) || (deref
->var
== var
));
796 components
[i
] = SWIZZLE_X
;
802 case ir_type_expression
: {
803 ir_expression
*const expr
= (ir_expression
*) op
;
805 assert(expr
->operation
== ir_unop_neg
);
808 op
= expr
->operands
[0];
812 case ir_type_swizzle
: {
813 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
815 components
[i
] = swiz
->mask
.x
;
821 assert(!"Should not get here.");
829 ir_dereference_variable
*const deref
=
830 new(mem_ctx
) ir_dereference_variable(var
);
832 this->result
.file
= PROGRAM_UNDEFINED
;
834 if (this->result
.file
== PROGRAM_UNDEFINED
) {
835 printf("Failed to get tree for expression operand:\n");
844 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
848 src
.negate
= ((unsigned(negate
[0]) << 0)
849 | (unsigned(negate
[1]) << 1)
850 | (unsigned(negate
[2]) << 2)
851 | (unsigned(negate
[3]) << 3));
853 /* Storage for our result. Ideally for an assignment we'd be using the
854 * actual storage for the result here, instead.
856 const src_reg result_src
= get_temp(ir
->type
);
857 dst_reg result_dst
= dst_reg(result_src
);
859 /* Limit writes to the channels that will be used by result_src later.
860 * This does limit this temp's use as a temporary for multi-instruction
863 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
865 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
866 this->result
= result_src
;
870 ir_to_mesa_visitor::emit_equality_comparison(ir_expression
*ir
,
877 src_reg abs_difference
= get_temp(glsl_type::vec4_type
);
878 const src_reg zero
= src_reg_for_float(0.0);
880 /* x == y is equivalent to -abs(x-y) >= 0. Since all of the code that
881 * consumes the generated IR is pretty dumb, take special care when one
882 * of the operands is zero.
884 * Similarly, x != y is equivalent to -abs(x-y) < 0.
886 if (src0
.file
== zero
.file
&&
887 src0
.index
== zero
.index
&&
888 src0
.swizzle
== zero
.swizzle
) {
890 } else if (src1
.file
== zero
.file
&&
891 src1
.index
== zero
.index
&&
892 src1
.swizzle
== zero
.swizzle
) {
895 difference
= get_temp(glsl_type::vec4_type
);
897 src_reg tmp_src
= src0
;
898 tmp_src
.negate
= ~tmp_src
.negate
;
900 emit(ir
, OPCODE_ADD
, dst_reg(difference
), tmp_src
, src1
);
903 emit(ir
, OPCODE_ABS
, dst_reg(abs_difference
), difference
);
905 abs_difference
.negate
= ~abs_difference
.negate
;
906 emit(ir
, op
, dst
, abs_difference
, zero
);
910 ir_to_mesa_visitor::visit(ir_expression
*ir
)
912 unsigned int operand
;
913 src_reg op
[ARRAY_SIZE(ir
->operands
)];
917 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
919 if (ir
->operation
== ir_binop_add
) {
920 if (try_emit_mad(ir
, 1))
922 if (try_emit_mad(ir
, 0))
926 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
928 if (ir
->operation
== ir_binop_logic_and
) {
929 if (try_emit_mad_for_and_not(ir
, 1))
931 if (try_emit_mad_for_and_not(ir
, 0))
935 if (ir
->operation
== ir_quadop_vector
) {
940 for (operand
= 0; operand
< ir
->num_operands
; operand
++) {
941 this->result
.file
= PROGRAM_UNDEFINED
;
942 ir
->operands
[operand
]->accept(this);
943 if (this->result
.file
== PROGRAM_UNDEFINED
) {
944 printf("Failed to get tree for expression operand:\n");
945 ir
->operands
[operand
]->print();
949 op
[operand
] = this->result
;
951 /* Matrix expression operands should have been broken down to vector
952 * operations already.
954 assert(!ir
->operands
[operand
]->type
->is_matrix());
957 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
958 if (ir
->operands
[1]) {
959 vector_elements
= MAX2(vector_elements
,
960 ir
->operands
[1]->type
->vector_elements
);
963 this->result
.file
= PROGRAM_UNDEFINED
;
965 /* Storage for our result. Ideally for an assignment we'd be using
966 * the actual storage for the result here, instead.
968 result_src
= get_temp(ir
->type
);
969 /* convenience for the emit functions below. */
970 result_dst
= dst_reg(result_src
);
971 /* Limit writes to the channels that will be used by result_src later.
972 * This does limit this temp's use as a temporary for multi-instruction
975 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
977 switch (ir
->operation
) {
978 case ir_unop_logic_not
:
979 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
980 * older GPUs implement SEQ using multiple instructions (i915 uses two
981 * SGE instructions and a MUL instruction). Since our logic values are
982 * 0.0 and 1.0, 1-x also implements !x.
984 op
[0].negate
= ~op
[0].negate
;
985 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
988 op
[0].negate
= ~op
[0].negate
;
992 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
995 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
998 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1002 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1005 assert(!"not reached: should be handled by exp_to_exp2");
1008 assert(!"not reached: should be handled by log_to_log2");
1011 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1014 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1017 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1021 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1024 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1027 case ir_unop_saturate
: {
1028 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_MOV
,
1030 inst
->saturate
= true;
1033 case ir_unop_noise
: {
1034 const enum prog_opcode opcode
=
1035 prog_opcode(OPCODE_NOISE1
1036 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1037 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1039 emit(ir
, opcode
, result_dst
, op
[0]);
1044 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1047 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1051 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1054 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1057 /* Floating point should be lowered by MOD_TO_FLOOR in the compiler. */
1058 assert(ir
->type
->is_integer_32());
1059 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1063 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1065 case ir_binop_gequal
:
1066 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1068 case ir_binop_equal
:
1069 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1071 case ir_binop_nequal
:
1072 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1074 case ir_binop_all_equal
:
1075 /* "==" operator producing a scalar boolean. */
1076 if (ir
->operands
[0]->type
->is_vector() ||
1077 ir
->operands
[1]->type
->is_vector()) {
1078 src_reg temp
= get_temp(glsl_type::vec4_type
);
1079 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1081 /* After the dot-product, the value will be an integer on the
1082 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1084 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1086 /* Negating the result of the dot-product gives values on the range
1087 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1088 * achieved using SGE.
1090 src_reg sge_src
= result_src
;
1091 sge_src
.negate
= ~sge_src
.negate
;
1092 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1094 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1097 case ir_binop_any_nequal
:
1098 /* "!=" operator producing a scalar boolean. */
1099 if (ir
->operands
[0]->type
->is_vector() ||
1100 ir
->operands
[1]->type
->is_vector()) {
1101 src_reg temp
= get_temp(glsl_type::vec4_type
);
1102 if (ir
->operands
[0]->type
->is_boolean() &&
1103 ir
->operands
[1]->as_constant() &&
1104 ir
->operands
[1]->as_constant()->is_zero()) {
1107 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1110 /* After the dot-product, the value will be an integer on the
1111 * range [0,4]. Zero stays zero, and positive values become 1.0.
1113 ir_to_mesa_instruction
*const dp
=
1114 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1115 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1116 /* The clamping to [0,1] can be done for free in the fragment
1117 * shader with a saturate.
1119 dp
->saturate
= true;
1121 /* Negating the result of the dot-product gives values on the range
1122 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1123 * achieved using SLT.
1125 src_reg slt_src
= result_src
;
1126 slt_src
.negate
= ~slt_src
.negate
;
1127 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1130 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1134 case ir_binop_logic_xor
:
1135 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1138 case ir_binop_logic_or
: {
1139 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1140 /* After the addition, the value will be an integer on the
1141 * range [0,2]. Zero stays zero, and positive values become 1.0.
1143 ir_to_mesa_instruction
*add
=
1144 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1145 add
->saturate
= true;
1147 /* The Boolean arguments are stored as float 0.0 and 1.0. If either
1148 * value is 1.0, the result of the logcal-or should be 1.0. If both
1149 * values are 0.0, the result should be 0.0. This is exactly what
1152 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1157 case ir_binop_logic_and
:
1158 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1159 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1163 assert(ir
->operands
[0]->type
->is_vector());
1164 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1165 emit_dp(ir
, result_dst
, op
[0], op
[1],
1166 ir
->operands
[0]->type
->vector_elements
);
1170 /* sqrt(x) = x * rsq(x). */
1171 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1172 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1173 /* For incoming channels <= 0, set the result to 0. */
1174 op
[0].negate
= ~op
[0].negate
;
1175 emit(ir
, OPCODE_CMP
, result_dst
,
1176 op
[0], result_src
, src_reg_for_float(0.0));
1179 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1187 /* Mesa IR lacks types, ints are stored as truncated floats. */
1192 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1196 emit_sne(ir
, result_dst
, op
[0], src_reg_for_float(0.0));
1198 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1199 case ir_unop_bitcast_f2u
:
1200 case ir_unop_bitcast_i2f
:
1201 case ir_unop_bitcast_u2f
:
1204 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1207 op
[0].negate
= ~op
[0].negate
;
1208 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1209 result_src
.negate
= ~result_src
.negate
;
1212 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1215 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1217 case ir_unop_pack_snorm_2x16
:
1218 case ir_unop_pack_snorm_4x8
:
1219 case ir_unop_pack_unorm_2x16
:
1220 case ir_unop_pack_unorm_4x8
:
1221 case ir_unop_pack_half_2x16
:
1222 case ir_unop_pack_double_2x32
:
1223 case ir_unop_unpack_snorm_2x16
:
1224 case ir_unop_unpack_snorm_4x8
:
1225 case ir_unop_unpack_unorm_2x16
:
1226 case ir_unop_unpack_unorm_4x8
:
1227 case ir_unop_unpack_half_2x16
:
1228 case ir_unop_unpack_double_2x32
:
1229 case ir_unop_bitfield_reverse
:
1230 case ir_unop_bit_count
:
1231 case ir_unop_find_msb
:
1232 case ir_unop_find_lsb
:
1240 case ir_unop_frexp_sig
:
1241 case ir_unop_frexp_exp
:
1242 assert(!"not supported");
1245 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1248 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1251 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1254 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1255 * hardware backends have no way to avoid Mesa IR generation
1256 * even if they don't use it, we need to emit "something" and
1259 case ir_binop_lshift
:
1260 case ir_binop_rshift
:
1261 case ir_binop_bit_and
:
1262 case ir_binop_bit_xor
:
1263 case ir_binop_bit_or
:
1264 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1267 case ir_unop_bit_not
:
1268 case ir_unop_round_even
:
1269 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1272 case ir_binop_ubo_load
:
1273 assert(!"not supported");
1277 /* ir_triop_lrp operands are (x, y, a) while
1278 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1280 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1284 /* We assume that boolean true and false are 1.0 and 0.0. OPCODE_CMP
1285 * selects src1 if src0 is < 0, src2 otherwise.
1287 op
[0].negate
= ~op
[0].negate
;
1288 emit(ir
, OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1291 case ir_binop_vector_extract
:
1293 case ir_triop_bitfield_extract
:
1294 case ir_triop_vector_insert
:
1295 case ir_quadop_bitfield_insert
:
1296 case ir_binop_ldexp
:
1297 case ir_binop_carry
:
1298 case ir_binop_borrow
:
1299 case ir_binop_abs_sub
:
1300 case ir_binop_add_sat
:
1301 case ir_binop_sub_sat
:
1303 case ir_binop_avg_round
:
1304 case ir_binop_mul_32x16
:
1305 case ir_binop_imul_high
:
1306 case ir_unop_interpolate_at_centroid
:
1307 case ir_binop_interpolate_at_offset
:
1308 case ir_binop_interpolate_at_sample
:
1309 case ir_unop_dFdx_coarse
:
1310 case ir_unop_dFdx_fine
:
1311 case ir_unop_dFdy_coarse
:
1312 case ir_unop_dFdy_fine
:
1313 case ir_unop_subroutine_to_int
:
1314 case ir_unop_get_buffer_size
:
1315 case ir_unop_bitcast_u642d
:
1316 case ir_unop_bitcast_i642d
:
1317 case ir_unop_bitcast_d2u64
:
1318 case ir_unop_bitcast_d2i64
:
1337 case ir_unop_u642i64
:
1338 case ir_unop_i642u64
:
1339 case ir_unop_pack_int_2x32
:
1340 case ir_unop_unpack_int_2x32
:
1341 case ir_unop_pack_uint_2x32
:
1342 case ir_unop_unpack_uint_2x32
:
1343 case ir_unop_pack_sampler_2x32
:
1344 case ir_unop_unpack_sampler_2x32
:
1345 case ir_unop_pack_image_2x32
:
1346 case ir_unop_unpack_image_2x32
:
1348 case ir_binop_atan2
:
1352 assert(!"not supported");
1355 case ir_unop_ssbo_unsized_array_length
:
1356 case ir_quadop_vector
:
1357 /* This operation should have already been handled.
1359 assert(!"Should not get here.");
1363 this->result
= result_src
;
1368 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1372 int swizzle
[4] = {0};
1374 /* Note that this is only swizzles in expressions, not those on the left
1375 * hand side of an assignment, which do write masking. See ir_assignment
1379 ir
->val
->accept(this);
1381 assert(src
.file
!= PROGRAM_UNDEFINED
);
1382 assert(ir
->type
->vector_elements
> 0);
1384 for (i
= 0; i
< 4; i
++) {
1385 if (i
< ir
->type
->vector_elements
) {
1388 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1391 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1394 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1397 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1401 /* If the type is smaller than a vec4, replicate the last
1404 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1408 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1414 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1416 variable_storage
*entry
= find_variable_storage(ir
->var
);
1417 ir_variable
*var
= ir
->var
;
1420 switch (var
->data
.mode
) {
1421 case ir_var_uniform
:
1422 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1423 var
->data
.param_index
);
1424 this->variables
.push_tail(entry
);
1426 case ir_var_shader_in
:
1427 /* The linker assigns locations for varyings and attributes,
1428 * including deprecated builtins (like gl_Color),
1429 * user-assigned generic attributes (glBindVertexLocation),
1430 * and user-defined varyings.
1432 assert(var
->data
.location
!= -1);
1433 entry
= new(mem_ctx
) variable_storage(var
,
1435 var
->data
.location
);
1437 case ir_var_shader_out
:
1438 assert(var
->data
.location
!= -1);
1439 entry
= new(mem_ctx
) variable_storage(var
,
1441 var
->data
.location
);
1443 case ir_var_system_value
:
1444 entry
= new(mem_ctx
) variable_storage(var
,
1445 PROGRAM_SYSTEM_VALUE
,
1446 var
->data
.location
);
1449 case ir_var_temporary
:
1450 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1452 this->variables
.push_tail(entry
);
1454 next_temp
+= type_size(var
->type
);
1459 printf("Failed to make storage for %s\n", var
->name
);
1464 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1468 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1472 int element_size
= type_size(ir
->type
);
1474 index
= ir
->array_index
->constant_expression_value(ralloc_parent(ir
));
1476 ir
->array
->accept(this);
1480 src
.index
+= index
->value
.i
[0] * element_size
;
1482 /* Variable index array dereference. It eats the "vec4" of the
1483 * base of the array and an index that offsets the Mesa register
1486 ir
->array_index
->accept(this);
1490 if (element_size
== 1) {
1491 index_reg
= this->result
;
1493 index_reg
= get_temp(glsl_type::float_type
);
1495 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1496 this->result
, src_reg_for_float(element_size
));
1499 /* If there was already a relative address register involved, add the
1500 * new and the old together to get the new offset.
1502 if (src
.reladdr
!= NULL
) {
1503 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1505 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1506 index_reg
, *src
.reladdr
);
1508 index_reg
= accum_reg
;
1511 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1512 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1515 /* If the type is smaller than a vec4, replicate the last channel out. */
1516 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1517 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1519 src
.swizzle
= SWIZZLE_NOOP
;
1525 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1528 const glsl_type
*struct_type
= ir
->record
->type
;
1531 ir
->record
->accept(this);
1533 assert(ir
->field_idx
>= 0);
1534 for (i
= 0; i
< struct_type
->length
; i
++) {
1535 if (i
== (unsigned) ir
->field_idx
)
1537 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1540 /* If the type is smaller than a vec4, replicate the last channel out. */
1541 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1542 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1544 this->result
.swizzle
= SWIZZLE_NOOP
;
1546 this->result
.index
+= offset
;
1550 * We want to be careful in assignment setup to hit the actual storage
1551 * instead of potentially using a temporary like we might with the
1552 * ir_dereference handler.
1555 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1557 /* The LHS must be a dereference. If the LHS is a variable indexed array
1558 * access of a vector, it must be separated into a series conditional moves
1559 * before reaching this point (see ir_vec_index_to_cond_assign).
1561 assert(ir
->as_dereference());
1562 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1564 assert(!deref_array
->array
->type
->is_vector());
1567 /* Use the rvalue deref handler for the most part. We'll ignore
1568 * swizzles in it and write swizzles using writemask, though.
1571 return dst_reg(v
->result
);
1574 /* Calculate the sampler index and also calculate the base uniform location
1575 * for struct members.
1578 calc_sampler_offsets(struct gl_shader_program
*prog
, ir_dereference
*deref
,
1579 unsigned *offset
, unsigned *array_elements
,
1582 if (deref
->ir_type
== ir_type_dereference_variable
)
1585 switch (deref
->ir_type
) {
1586 case ir_type_dereference_array
: {
1587 ir_dereference_array
*deref_arr
= deref
->as_dereference_array();
1589 void *mem_ctx
= ralloc_parent(deref_arr
);
1590 ir_constant
*array_index
=
1591 deref_arr
->array_index
->constant_expression_value(mem_ctx
);
1594 /* GLSL 1.10 and 1.20 allowed variable sampler array indices,
1595 * while GLSL 1.30 requires that the array indices be
1596 * constant integer expressions. We don't expect any driver
1597 * to actually work with a really variable array index, so
1598 * all that would work would be an unrolled loop counter that ends
1599 * up being constant above.
1601 ralloc_strcat(&prog
->data
->InfoLog
,
1602 "warning: Variable sampler array index unsupported.\n"
1603 "This feature of the language was removed in GLSL 1.20 "
1604 "and is unlikely to be supported for 1.10 in Mesa.\n");
1606 *offset
+= array_index
->value
.u
[0] * *array_elements
;
1609 *array_elements
*= deref_arr
->array
->type
->length
;
1611 calc_sampler_offsets(prog
, deref_arr
->array
->as_dereference(),
1612 offset
, array_elements
, location
);
1616 case ir_type_dereference_record
: {
1617 ir_dereference_record
*deref_record
= deref
->as_dereference_record();
1618 unsigned field_index
= deref_record
->field_idx
;
1620 deref_record
->record
->type
->struct_location_offset(field_index
);
1621 calc_sampler_offsets(prog
, deref_record
->record
->as_dereference(),
1622 offset
, array_elements
, location
);
1627 unreachable("Invalid deref type");
1633 get_sampler_uniform_value(class ir_dereference
*sampler
,
1634 struct gl_shader_program
*shader_program
,
1635 const struct gl_program
*prog
)
1637 GLuint shader
= _mesa_program_enum_to_shader_stage(prog
->Target
);
1638 ir_variable
*var
= sampler
->variable_referenced();
1639 unsigned location
= var
->data
.location
;
1640 unsigned array_elements
= 1;
1641 unsigned offset
= 0;
1643 calc_sampler_offsets(shader_program
, sampler
, &offset
, &array_elements
,
1646 assert(shader_program
->data
->UniformStorage
[location
].opaque
[shader
].active
);
1647 return shader_program
->data
->UniformStorage
[location
].opaque
[shader
].index
+
1652 * Process the condition of a conditional assignment
1654 * Examines the condition of a conditional assignment to generate the optimal
1655 * first operand of a \c CMP instruction. If the condition is a relational
1656 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1657 * used as the source for the \c CMP instruction. Otherwise the comparison
1658 * is processed to a boolean result, and the boolean result is used as the
1659 * operand to the CMP instruction.
1662 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1664 ir_rvalue
*src_ir
= ir
;
1666 bool switch_order
= false;
1668 ir_expression
*const expr
= ir
->as_expression();
1669 if ((expr
!= NULL
) && (expr
->num_operands
== 2)) {
1670 bool zero_on_left
= false;
1672 if (expr
->operands
[0]->is_zero()) {
1673 src_ir
= expr
->operands
[1];
1674 zero_on_left
= true;
1675 } else if (expr
->operands
[1]->is_zero()) {
1676 src_ir
= expr
->operands
[0];
1677 zero_on_left
= false;
1681 * (a < 0) T F F ( a < 0) T F F
1682 * (0 < a) F F T (-a < 0) F F T
1683 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1684 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1686 * Note that exchanging the order of 0 and 'a' in the comparison simply
1687 * means that the value of 'a' should be negated.
1690 switch (expr
->operation
) {
1692 switch_order
= false;
1693 negate
= zero_on_left
;
1696 case ir_binop_gequal
:
1697 switch_order
= true;
1698 negate
= zero_on_left
;
1702 /* This isn't the right kind of comparison afterall, so make sure
1703 * the whole condition is visited.
1711 src_ir
->accept(this);
1713 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1714 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1715 * choose which value OPCODE_CMP produces without an extra instruction
1716 * computing the condition.
1719 this->result
.negate
= ~this->result
.negate
;
1721 return switch_order
;
1725 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1731 ir
->rhs
->accept(this);
1734 l
= get_assignment_lhs(ir
->lhs
, this);
1736 /* FINISHME: This should really set to the correct maximal writemask for each
1737 * FINISHME: component written (in the loops below). This case can only
1738 * FINISHME: occur for matrices, arrays, and structures.
1740 if (ir
->write_mask
== 0) {
1741 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1742 l
.writemask
= WRITEMASK_XYZW
;
1743 } else if (ir
->lhs
->type
->is_scalar()) {
1744 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1745 * FINISHME: W component of fragment shader output zero, work correctly.
1747 l
.writemask
= WRITEMASK_XYZW
;
1750 int first_enabled_chan
= 0;
1753 assert(ir
->lhs
->type
->is_vector());
1754 l
.writemask
= ir
->write_mask
;
1756 for (int i
= 0; i
< 4; i
++) {
1757 if (l
.writemask
& (1 << i
)) {
1758 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1763 /* Swizzle a small RHS vector into the channels being written.
1765 * glsl ir treats write_mask as dictating how many channels are
1766 * present on the RHS while Mesa IR treats write_mask as just
1767 * showing which channels of the vec4 RHS get written.
1769 for (int i
= 0; i
< 4; i
++) {
1770 if (l
.writemask
& (1 << i
))
1771 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1773 swizzles
[i
] = first_enabled_chan
;
1775 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1776 swizzles
[2], swizzles
[3]);
1779 assert(l
.file
!= PROGRAM_UNDEFINED
);
1780 assert(r
.file
!= PROGRAM_UNDEFINED
);
1782 if (ir
->condition
) {
1783 const bool switch_order
= this->process_move_condition(ir
->condition
);
1784 src_reg condition
= this->result
;
1786 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1788 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1790 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1797 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1798 emit(ir
, OPCODE_MOV
, l
, r
);
1807 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1810 GLfloat stack_vals
[4] = { 0 };
1811 GLfloat
*values
= stack_vals
;
1814 /* Unfortunately, 4 floats is all we can get into
1815 * _mesa_add_unnamed_constant. So, make a temp to store an
1816 * aggregate constant and move each constant value into it. If we
1817 * get lucky, copy propagation will eliminate the extra moves.
1820 if (ir
->type
->is_struct()) {
1821 src_reg temp_base
= get_temp(ir
->type
);
1822 dst_reg temp
= dst_reg(temp_base
);
1824 for (i
= 0; i
< ir
->type
->length
; i
++) {
1825 ir_constant
*const field_value
= ir
->get_record_field(i
);
1826 int size
= type_size(field_value
->type
);
1830 field_value
->accept(this);
1833 for (unsigned j
= 0; j
< (unsigned int)size
; j
++) {
1834 emit(ir
, OPCODE_MOV
, temp
, src
);
1840 this->result
= temp_base
;
1844 if (ir
->type
->is_array()) {
1845 src_reg temp_base
= get_temp(ir
->type
);
1846 dst_reg temp
= dst_reg(temp_base
);
1847 int size
= type_size(ir
->type
->fields
.array
);
1851 for (i
= 0; i
< ir
->type
->length
; i
++) {
1852 ir
->const_elements
[i
]->accept(this);
1854 for (int j
= 0; j
< size
; j
++) {
1855 emit(ir
, OPCODE_MOV
, temp
, src
);
1861 this->result
= temp_base
;
1865 if (ir
->type
->is_matrix()) {
1866 src_reg mat
= get_temp(ir
->type
);
1867 dst_reg mat_column
= dst_reg(mat
);
1869 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1870 assert(ir
->type
->is_float());
1871 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1873 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1874 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1875 (gl_constant_value
*) values
,
1876 ir
->type
->vector_elements
,
1878 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1887 src
.file
= PROGRAM_CONSTANT
;
1888 switch (ir
->type
->base_type
) {
1889 case GLSL_TYPE_FLOAT
:
1890 values
= &ir
->value
.f
[0];
1892 case GLSL_TYPE_UINT
:
1893 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1894 values
[i
] = ir
->value
.u
[i
];
1898 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1899 values
[i
] = ir
->value
.i
[i
];
1902 case GLSL_TYPE_BOOL
:
1903 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1904 values
[i
] = ir
->value
.b
[i
];
1908 assert(!"Non-float/uint/int/bool constant");
1911 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1912 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1913 (gl_constant_value
*) values
,
1914 ir
->type
->vector_elements
,
1915 &this->result
.swizzle
);
1919 ir_to_mesa_visitor::visit(ir_call
*)
1921 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
1925 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1927 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
1928 dst_reg result_dst
, coord_dst
;
1929 ir_to_mesa_instruction
*inst
= NULL
;
1930 prog_opcode opcode
= OPCODE_NOP
;
1932 if (ir
->op
== ir_txs
)
1933 this->result
= src_reg_for_float(0.0);
1935 ir
->coordinate
->accept(this);
1937 /* Put our coords in a temp. We'll need to modify them for shadow,
1938 * projection, or LOD, so the only case we'd use it as-is is if
1939 * we're doing plain old texturing. Mesa IR optimization should
1940 * handle cleaning up our mess in that case.
1942 coord
= get_temp(glsl_type::vec4_type
);
1943 coord_dst
= dst_reg(coord
);
1944 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
1946 if (ir
->projector
) {
1947 ir
->projector
->accept(this);
1948 projector
= this->result
;
1951 /* Storage for our result. Ideally for an assignment we'd be using
1952 * the actual storage for the result here, instead.
1954 result_src
= get_temp(glsl_type::vec4_type
);
1955 result_dst
= dst_reg(result_src
);
1960 opcode
= OPCODE_TEX
;
1963 opcode
= OPCODE_TXB
;
1964 ir
->lod_info
.bias
->accept(this);
1965 lod_info
= this->result
;
1968 /* Pretend to be TXL so the sampler, coordinate, lod are available */
1970 opcode
= OPCODE_TXL
;
1971 ir
->lod_info
.lod
->accept(this);
1972 lod_info
= this->result
;
1975 opcode
= OPCODE_TXD
;
1976 ir
->lod_info
.grad
.dPdx
->accept(this);
1978 ir
->lod_info
.grad
.dPdy
->accept(this);
1982 assert(!"Unexpected ir_txf_ms opcode");
1985 assert(!"Unexpected ir_lod opcode");
1988 assert(!"Unexpected ir_tg4 opcode");
1990 case ir_query_levels
:
1991 assert(!"Unexpected ir_query_levels opcode");
1993 case ir_samples_identical
:
1994 unreachable("Unexpected ir_samples_identical opcode");
1995 case ir_texture_samples
:
1996 unreachable("Unexpected ir_texture_samples opcode");
1999 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2001 if (ir
->projector
) {
2002 if (opcode
== OPCODE_TEX
) {
2003 /* Slot the projector in as the last component of the coord. */
2004 coord_dst
.writemask
= WRITEMASK_W
;
2005 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2006 coord_dst
.writemask
= WRITEMASK_XYZW
;
2007 opcode
= OPCODE_TXP
;
2009 src_reg coord_w
= coord
;
2010 coord_w
.swizzle
= SWIZZLE_WWWW
;
2012 /* For the other TEX opcodes there's no projective version
2013 * since the last slot is taken up by lod info. Do the
2014 * projective divide now.
2016 coord_dst
.writemask
= WRITEMASK_W
;
2017 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2019 /* In the case where we have to project the coordinates "by hand,"
2020 * the shadow comparator value must also be projected.
2022 src_reg tmp_src
= coord
;
2023 if (ir
->shadow_comparator
) {
2024 /* Slot the shadow value in as the second to last component of the
2027 ir
->shadow_comparator
->accept(this);
2029 tmp_src
= get_temp(glsl_type::vec4_type
);
2030 dst_reg tmp_dst
= dst_reg(tmp_src
);
2032 /* Projective division not allowed for array samplers. */
2033 assert(!sampler_type
->sampler_array
);
2035 tmp_dst
.writemask
= WRITEMASK_Z
;
2036 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2038 tmp_dst
.writemask
= WRITEMASK_XY
;
2039 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2042 coord_dst
.writemask
= WRITEMASK_XYZ
;
2043 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2045 coord_dst
.writemask
= WRITEMASK_XYZW
;
2046 coord
.swizzle
= SWIZZLE_XYZW
;
2050 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2051 * comparator was put in the correct place (and projected) by the code,
2052 * above, that handles by-hand projection.
2054 if (ir
->shadow_comparator
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2055 /* Slot the shadow value in as the second to last component of the
2058 ir
->shadow_comparator
->accept(this);
2060 /* XXX This will need to be updated for cubemap array samplers. */
2061 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2062 sampler_type
->sampler_array
) {
2063 coord_dst
.writemask
= WRITEMASK_W
;
2065 coord_dst
.writemask
= WRITEMASK_Z
;
2068 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2069 coord_dst
.writemask
= WRITEMASK_XYZW
;
2072 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2073 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2074 coord_dst
.writemask
= WRITEMASK_W
;
2075 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2076 coord_dst
.writemask
= WRITEMASK_XYZW
;
2079 if (opcode
== OPCODE_TXD
)
2080 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2082 inst
= emit(ir
, opcode
, result_dst
, coord
);
2084 if (ir
->shadow_comparator
)
2085 inst
->tex_shadow
= GL_TRUE
;
2087 inst
->sampler
= get_sampler_uniform_value(ir
->sampler
, shader_program
,
2090 switch (sampler_type
->sampler_dimensionality
) {
2091 case GLSL_SAMPLER_DIM_1D
:
2092 inst
->tex_target
= (sampler_type
->sampler_array
)
2093 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2095 case GLSL_SAMPLER_DIM_2D
:
2096 inst
->tex_target
= (sampler_type
->sampler_array
)
2097 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2099 case GLSL_SAMPLER_DIM_3D
:
2100 inst
->tex_target
= TEXTURE_3D_INDEX
;
2102 case GLSL_SAMPLER_DIM_CUBE
:
2103 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2105 case GLSL_SAMPLER_DIM_RECT
:
2106 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2108 case GLSL_SAMPLER_DIM_BUF
:
2109 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2111 case GLSL_SAMPLER_DIM_EXTERNAL
:
2112 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2115 assert(!"Should not get here.");
2118 this->result
= result_src
;
2122 ir_to_mesa_visitor::visit(ir_return
*ir
)
2124 /* Non-void functions should have been inlined. We may still emit RETs
2125 * from main() unless the EmitNoMainReturn option is set.
2127 assert(!ir
->get_value());
2128 emit(ir
, OPCODE_RET
);
2132 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2135 ir
->condition
= new(mem_ctx
) ir_constant(true);
2137 ir
->condition
->accept(this);
2138 this->result
.negate
= ~this->result
.negate
;
2139 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2143 ir_to_mesa_visitor::visit(ir_demote
*ir
)
2145 assert(!"demote statement unsupported");
2149 ir_to_mesa_visitor::visit(ir_if
*ir
)
2151 ir_to_mesa_instruction
*if_inst
;
2153 ir
->condition
->accept(this);
2154 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2156 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2158 this->instructions
.push_tail(if_inst
);
2160 visit_exec_list(&ir
->then_instructions
, this);
2162 if (!ir
->else_instructions
.is_empty()) {
2163 emit(ir
->condition
, OPCODE_ELSE
);
2164 visit_exec_list(&ir
->else_instructions
, this);
2167 emit(ir
->condition
, OPCODE_ENDIF
);
2171 ir_to_mesa_visitor::visit(ir_emit_vertex
*)
2173 assert(!"Geometry shaders not supported.");
2177 ir_to_mesa_visitor::visit(ir_end_primitive
*)
2179 assert(!"Geometry shaders not supported.");
2183 ir_to_mesa_visitor::visit(ir_barrier
*)
2185 unreachable("GLSL barrier() not supported.");
2188 ir_to_mesa_visitor::ir_to_mesa_visitor()
2190 result
.file
= PROGRAM_UNDEFINED
;
2192 next_signature_id
= 1;
2193 current_function
= NULL
;
2194 mem_ctx
= ralloc_context(NULL
);
2197 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2199 ralloc_free(mem_ctx
);
2202 static struct prog_src_register
2203 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2205 struct prog_src_register mesa_reg
;
2207 mesa_reg
.File
= reg
.file
;
2208 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2209 mesa_reg
.Index
= reg
.index
;
2210 mesa_reg
.Swizzle
= reg
.swizzle
;
2211 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2212 mesa_reg
.Negate
= reg
.negate
;
2218 set_branchtargets(ir_to_mesa_visitor
*v
,
2219 struct prog_instruction
*mesa_instructions
,
2220 int num_instructions
)
2222 int if_count
= 0, loop_count
= 0;
2223 int *if_stack
, *loop_stack
;
2224 int if_stack_pos
= 0, loop_stack_pos
= 0;
2227 for (i
= 0; i
< num_instructions
; i
++) {
2228 switch (mesa_instructions
[i
].Opcode
) {
2232 case OPCODE_BGNLOOP
:
2237 mesa_instructions
[i
].BranchTarget
= -1;
2244 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2245 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2247 for (i
= 0; i
< num_instructions
; i
++) {
2248 switch (mesa_instructions
[i
].Opcode
) {
2250 if_stack
[if_stack_pos
] = i
;
2254 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2255 if_stack
[if_stack_pos
- 1] = i
;
2258 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2261 case OPCODE_BGNLOOP
:
2262 loop_stack
[loop_stack_pos
] = i
;
2265 case OPCODE_ENDLOOP
:
2267 /* Rewrite any breaks/conts at this nesting level (haven't
2268 * already had a BranchTarget assigned) to point to the end
2271 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2272 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2273 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2274 if (mesa_instructions
[j
].BranchTarget
== -1) {
2275 mesa_instructions
[j
].BranchTarget
= i
;
2279 /* The loop ends point at each other. */
2280 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2281 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2284 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
2285 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2286 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2298 print_program(struct prog_instruction
*mesa_instructions
,
2299 ir_instruction
**mesa_instruction_annotation
,
2300 int num_instructions
)
2302 ir_instruction
*last_ir
= NULL
;
2306 for (i
= 0; i
< num_instructions
; i
++) {
2307 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2308 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2310 fprintf(stdout
, "%3d: ", i
);
2312 if (last_ir
!= ir
&& ir
) {
2315 for (j
= 0; j
< indent
; j
++) {
2316 fprintf(stdout
, " ");
2322 fprintf(stdout
, " "); /* line number spacing. */
2325 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2326 PROG_PRINT_DEBUG
, NULL
);
2332 class add_uniform_to_shader
: public program_resource_visitor
{
2334 add_uniform_to_shader(struct gl_context
*ctx
,
2335 struct gl_shader_program
*shader_program
,
2336 struct gl_program_parameter_list
*params
)
2337 : ctx(ctx
), shader_program(shader_program
), params(params
), idx(-1)
2342 void process(ir_variable
*var
)
2346 this->program_resource_visitor::process(var
,
2347 ctx
->Const
.UseSTD430AsDefaultPacking
);
2348 var
->data
.param_index
= this->idx
;
2352 virtual void visit_field(const glsl_type
*type
, const char *name
,
2353 bool row_major
, const glsl_type
*record_type
,
2354 const enum glsl_interface_packing packing
,
2357 struct gl_context
*ctx
;
2358 struct gl_shader_program
*shader_program
;
2359 struct gl_program_parameter_list
*params
;
2364 } /* anonymous namespace */
2367 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2368 bool /* row_major */,
2369 const glsl_type
* /* record_type */,
2370 const enum glsl_interface_packing
,
2371 bool /* last_field */)
2373 /* opaque types don't use storage in the param list unless they are
2374 * bindless samplers or images.
2376 if (type
->contains_opaque() && !var
->data
.bindless
)
2379 /* Add the uniform to the param list */
2380 assert(_mesa_lookup_parameter_index(params
, name
) < 0);
2381 int index
= _mesa_lookup_parameter_index(params
, name
);
2383 unsigned num_params
= type
->arrays_of_arrays_size();
2384 num_params
= MAX2(num_params
, 1);
2385 num_params
*= type
->without_array()->matrix_columns
;
2387 bool is_dual_slot
= type
->without_array()->is_dual_slot();
2391 _mesa_reserve_parameter_storage(params
, num_params
);
2392 index
= params
->NumParameters
;
2394 if (ctx
->Const
.PackedDriverUniformStorage
) {
2395 for (unsigned i
= 0; i
< num_params
; i
++) {
2396 unsigned dmul
= type
->without_array()->is_64bit() ? 2 : 1;
2397 unsigned comps
= type
->without_array()->vector_elements
* dmul
;
2405 _mesa_add_parameter(params
, PROGRAM_UNIFORM
, name
, comps
,
2406 type
->gl_type
, NULL
, NULL
, false);
2409 for (unsigned i
= 0; i
< num_params
; i
++) {
2410 _mesa_add_parameter(params
, PROGRAM_UNIFORM
, name
, 4,
2411 type
->gl_type
, NULL
, NULL
, true);
2415 /* The first part of the uniform that's processed determines the base
2416 * location of the whole uniform (for structures).
2421 /* Each Parameter will hold the index to the backing uniform storage.
2422 * This avoids relying on names to match parameters and uniform
2423 * storages later when associating uniform storage.
2425 unsigned location
= -1;
2426 ASSERTED
const bool found
=
2427 shader_program
->UniformHash
->get(location
, params
->Parameters
[index
].Name
);
2430 for (unsigned i
= 0; i
< num_params
; i
++) {
2431 struct gl_program_parameter
*param
= ¶ms
->Parameters
[index
+ i
];
2432 param
->UniformStorageIndex
= location
;
2433 param
->MainUniformStorageIndex
= params
->Parameters
[this->idx
].UniformStorageIndex
;
2438 * Generate the program parameters list for the user uniforms in a shader
2440 * \param shader_program Linked shader program. This is only used to
2441 * emit possible link errors to the info log.
2442 * \param sh Shader whose uniforms are to be processed.
2443 * \param params Parameter list to be filled in.
2446 _mesa_generate_parameters_list_for_uniforms(struct gl_context
*ctx
,
2447 struct gl_shader_program
2449 struct gl_linked_shader
*sh
,
2450 struct gl_program_parameter_list
2453 add_uniform_to_shader
add(ctx
, shader_program
, params
);
2455 foreach_in_list(ir_instruction
, node
, sh
->ir
) {
2456 ir_variable
*var
= node
->as_variable();
2458 if ((var
== NULL
) || (var
->data
.mode
!= ir_var_uniform
)
2459 || var
->is_in_buffer_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2467 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2468 struct gl_shader_program
*shader_program
,
2469 struct gl_program
*prog
)
2471 struct gl_program_parameter_list
*params
= prog
->Parameters
;
2472 gl_shader_stage shader_type
= prog
->info
.stage
;
2474 /* After adding each uniform to the parameter list, connect the storage for
2475 * the parameter with the tracking structure used by the API for the
2478 unsigned last_location
= unsigned(~0);
2479 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2480 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2483 unsigned location
= params
->Parameters
[i
].UniformStorageIndex
;
2485 struct gl_uniform_storage
*storage
=
2486 &shader_program
->data
->UniformStorage
[location
];
2488 /* Do not associate any uniform storage to built-in uniforms */
2489 if (storage
->builtin
)
2492 if (location
!= last_location
) {
2493 enum gl_uniform_driver_format format
= uniform_native
;
2494 unsigned columns
= 0;
2497 if (ctx
->Const
.PackedDriverUniformStorage
&& !prog
->is_arb_asm
) {
2498 dmul
= storage
->type
->vector_elements
* sizeof(float);
2500 dmul
= 4 * sizeof(float);
2503 switch (storage
->type
->base_type
) {
2504 case GLSL_TYPE_UINT64
:
2505 if (storage
->type
->vector_elements
> 2)
2508 case GLSL_TYPE_UINT
:
2509 case GLSL_TYPE_UINT16
:
2510 case GLSL_TYPE_UINT8
:
2511 assert(ctx
->Const
.NativeIntegers
);
2512 format
= uniform_native
;
2515 case GLSL_TYPE_INT64
:
2516 if (storage
->type
->vector_elements
> 2)
2520 case GLSL_TYPE_INT16
:
2521 case GLSL_TYPE_INT8
:
2523 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2526 case GLSL_TYPE_DOUBLE
:
2527 if (storage
->type
->vector_elements
> 2)
2530 case GLSL_TYPE_FLOAT
:
2531 case GLSL_TYPE_FLOAT16
:
2532 format
= uniform_native
;
2533 columns
= storage
->type
->matrix_columns
;
2535 case GLSL_TYPE_BOOL
:
2536 format
= uniform_native
;
2539 case GLSL_TYPE_SAMPLER
:
2540 case GLSL_TYPE_IMAGE
:
2541 case GLSL_TYPE_SUBROUTINE
:
2542 format
= uniform_native
;
2545 case GLSL_TYPE_ATOMIC_UINT
:
2546 case GLSL_TYPE_ARRAY
:
2547 case GLSL_TYPE_VOID
:
2548 case GLSL_TYPE_STRUCT
:
2549 case GLSL_TYPE_ERROR
:
2550 case GLSL_TYPE_INTERFACE
:
2551 case GLSL_TYPE_FUNCTION
:
2552 assert(!"Should not get here.");
2556 unsigned pvo
= params
->ParameterValueOffset
[i
];
2557 _mesa_uniform_attach_driver_storage(storage
, dmul
* columns
, dmul
,
2559 ¶ms
->ParameterValues
[pvo
]);
2561 /* When a bindless sampler/image is bound to a texture/image unit, we
2562 * have to overwrite the constant value by the resident handle
2563 * directly in the constant buffer before the next draw. One solution
2564 * is to keep track a pointer to the base of the data.
2566 if (storage
->is_bindless
&& (prog
->sh
.NumBindlessSamplers
||
2567 prog
->sh
.NumBindlessImages
)) {
2568 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2570 for (unsigned j
= 0; j
< array_elements
; ++j
) {
2571 unsigned unit
= storage
->opaque
[shader_type
].index
+ j
;
2573 if (storage
->type
->without_array()->is_sampler()) {
2574 assert(unit
>= 0 && unit
< prog
->sh
.NumBindlessSamplers
);
2575 prog
->sh
.BindlessSamplers
[unit
].data
=
2576 ¶ms
->ParameterValues
[pvo
] + 4 * j
;
2577 } else if (storage
->type
->without_array()->is_image()) {
2578 assert(unit
>= 0 && unit
< prog
->sh
.NumBindlessImages
);
2579 prog
->sh
.BindlessImages
[unit
].data
=
2580 ¶ms
->ParameterValues
[pvo
] + 4 * j
;
2585 /* After attaching the driver's storage to the uniform, propagate any
2586 * data from the linker's backing store. This will cause values from
2587 * initializers in the source code to be copied over.
2589 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2590 if (ctx
->Const
.PackedDriverUniformStorage
&& !prog
->is_arb_asm
&&
2591 (storage
->is_bindless
|| !storage
->type
->contains_opaque())) {
2592 const int dmul
= storage
->type
->is_64bit() ? 2 : 1;
2593 const unsigned components
=
2594 storage
->type
->vector_elements
*
2595 storage
->type
->matrix_columns
;
2597 for (unsigned s
= 0; s
< storage
->num_driver_storage
; s
++) {
2598 gl_constant_value
*uni_storage
= (gl_constant_value
*)
2599 storage
->driver_storage
[s
].data
;
2600 memcpy(uni_storage
, storage
->storage
,
2601 sizeof(storage
->storage
[0]) * components
*
2602 array_elements
* dmul
);
2605 _mesa_propagate_uniforms_to_driver_storage(storage
, 0,
2609 last_location
= location
;
2615 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2616 * channels for copy propagation and updates following instructions to
2617 * use the original versions.
2619 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2620 * will occur. As an example, a TXP production before this pass:
2622 * 0: MOV TEMP[1], INPUT[4].xyyy;
2623 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2624 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2628 * 0: MOV TEMP[1], INPUT[4].xyyy;
2629 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2630 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2632 * which allows for dead code elimination on TEMP[1]'s writes.
2635 ir_to_mesa_visitor::copy_propagate(void)
2637 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2638 ir_to_mesa_instruction
*,
2639 this->next_temp
* 4);
2640 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2643 foreach_in_list(ir_to_mesa_instruction
, inst
, &this->instructions
) {
2644 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2645 || inst
->dst
.index
< this->next_temp
);
2647 /* First, do any copy propagation possible into the src regs. */
2648 for (int r
= 0; r
< 3; r
++) {
2649 ir_to_mesa_instruction
*first
= NULL
;
2651 int acp_base
= inst
->src
[r
].index
* 4;
2653 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2654 inst
->src
[r
].reladdr
)
2657 /* See if we can find entries in the ACP consisting of MOVs
2658 * from the same src register for all the swizzled channels
2659 * of this src register reference.
2661 for (int i
= 0; i
< 4; i
++) {
2662 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2663 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2670 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2675 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2676 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2684 /* We've now validated that we can copy-propagate to
2685 * replace this src register reference. Do it.
2687 inst
->src
[r
].file
= first
->src
[0].file
;
2688 inst
->src
[r
].index
= first
->src
[0].index
;
2691 for (int i
= 0; i
< 4; i
++) {
2692 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2693 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2694 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2697 inst
->src
[r
].swizzle
= swizzle
;
2702 case OPCODE_BGNLOOP
:
2703 case OPCODE_ENDLOOP
:
2704 /* End of a basic block, clear the ACP entirely. */
2705 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2714 /* Clear all channels written inside the block from the ACP, but
2715 * leaving those that were not touched.
2717 for (int r
= 0; r
< this->next_temp
; r
++) {
2718 for (int c
= 0; c
< 4; c
++) {
2719 if (!acp
[4 * r
+ c
])
2722 if (acp_level
[4 * r
+ c
] >= level
)
2723 acp
[4 * r
+ c
] = NULL
;
2726 if (inst
->op
== OPCODE_ENDIF
)
2731 /* Continuing the block, clear any written channels from
2734 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2735 /* Any temporary might be written, so no copy propagation
2736 * across this instruction.
2738 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2739 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2740 inst
->dst
.reladdr
) {
2741 /* Any output might be written, so no copy propagation
2742 * from outputs across this instruction.
2744 for (int r
= 0; r
< this->next_temp
; r
++) {
2745 for (int c
= 0; c
< 4; c
++) {
2746 if (!acp
[4 * r
+ c
])
2749 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2750 acp
[4 * r
+ c
] = NULL
;
2753 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2754 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2755 /* Clear where it's used as dst. */
2756 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2757 for (int c
= 0; c
< 4; c
++) {
2758 if (inst
->dst
.writemask
& (1 << c
)) {
2759 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2764 /* Clear where it's used as src. */
2765 for (int r
= 0; r
< this->next_temp
; r
++) {
2766 for (int c
= 0; c
< 4; c
++) {
2767 if (!acp
[4 * r
+ c
])
2770 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2772 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2773 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2774 inst
->dst
.writemask
& (1 << src_chan
))
2776 acp
[4 * r
+ c
] = NULL
;
2784 /* If this is a copy, add it to the ACP. */
2785 if (inst
->op
== OPCODE_MOV
&&
2786 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2787 !(inst
->dst
.file
== inst
->src
[0].file
&&
2788 inst
->dst
.index
== inst
->src
[0].index
) &&
2789 !inst
->dst
.reladdr
&&
2791 !inst
->src
[0].reladdr
&&
2792 !inst
->src
[0].negate
) {
2793 for (int i
= 0; i
< 4; i
++) {
2794 if (inst
->dst
.writemask
& (1 << i
)) {
2795 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2796 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2802 ralloc_free(acp_level
);
2808 * Convert a shader's GLSL IR into a Mesa gl_program.
2810 static struct gl_program
*
2811 get_mesa_program(struct gl_context
*ctx
,
2812 struct gl_shader_program
*shader_program
,
2813 struct gl_linked_shader
*shader
)
2815 ir_to_mesa_visitor v
;
2816 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2817 ir_instruction
**mesa_instruction_annotation
;
2819 struct gl_program
*prog
;
2820 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
2821 const char *target_string
= _mesa_shader_stage_to_string(shader
->Stage
);
2822 struct gl_shader_compiler_options
*options
=
2823 &ctx
->Const
.ShaderCompilerOptions
[shader
->Stage
];
2825 validate_ir_tree(shader
->ir
);
2827 prog
= shader
->Program
;
2828 prog
->Parameters
= _mesa_new_parameter_list();
2831 v
.shader_program
= shader_program
;
2832 v
.options
= options
;
2834 _mesa_generate_parameters_list_for_uniforms(ctx
, shader_program
, shader
,
2837 /* Emit Mesa IR for main(). */
2838 visit_exec_list(shader
->ir
, &v
);
2839 v
.emit(NULL
, OPCODE_END
);
2841 prog
->arb
.NumTemporaries
= v
.next_temp
;
2843 unsigned num_instructions
= v
.instructions
.length();
2845 mesa_instructions
= rzalloc_array(prog
, struct prog_instruction
,
2847 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2852 /* Convert ir_mesa_instructions into prog_instructions.
2854 mesa_inst
= mesa_instructions
;
2856 foreach_in_list(const ir_to_mesa_instruction
, inst
, &v
.instructions
) {
2857 mesa_inst
->Opcode
= inst
->op
;
2859 mesa_inst
->Saturate
= GL_TRUE
;
2860 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2861 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2862 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2863 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2864 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2865 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2866 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2867 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2868 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2869 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2870 mesa_instruction_annotation
[i
] = inst
->ir
;
2872 /* Set IndirectRegisterFiles. */
2873 if (mesa_inst
->DstReg
.RelAddr
)
2874 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2876 /* Update program's bitmask of indirectly accessed register files */
2877 for (unsigned src
= 0; src
< 3; src
++)
2878 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2879 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2881 switch (mesa_inst
->Opcode
) {
2883 if (options
->MaxIfDepth
== 0) {
2884 linker_warning(shader_program
,
2885 "Couldn't flatten if-statement. "
2886 "This will likely result in software "
2887 "rasterization.\n");
2890 case OPCODE_BGNLOOP
:
2891 if (options
->EmitNoLoops
) {
2892 linker_warning(shader_program
,
2893 "Couldn't unroll loop. "
2894 "This will likely result in software "
2895 "rasterization.\n");
2899 if (options
->EmitNoCont
) {
2900 linker_warning(shader_program
,
2901 "Couldn't lower continue-statement. "
2902 "This will likely result in software "
2903 "rasterization.\n");
2907 prog
->arb
.NumAddressRegs
= 1;
2916 if (!shader_program
->data
->LinkStatus
)
2920 if (!shader_program
->data
->LinkStatus
) {
2924 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2926 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
2927 fprintf(stderr
, "\n");
2928 fprintf(stderr
, "GLSL IR for linked %s program %d:\n", target_string
,
2929 shader_program
->Name
);
2930 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
2931 fprintf(stderr
, "\n");
2932 fprintf(stderr
, "\n");
2933 fprintf(stderr
, "Mesa IR for linked %s program %d:\n", target_string
,
2934 shader_program
->Name
);
2935 print_program(mesa_instructions
, mesa_instruction_annotation
,
2940 prog
->arb
.Instructions
= mesa_instructions
;
2941 prog
->arb
.NumInstructions
= num_instructions
;
2943 /* Setting this to NULL prevents a possible double free in the fail_exit
2946 mesa_instructions
= NULL
;
2948 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
2950 prog
->ShadowSamplers
= shader
->shadow_samplers
;
2951 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
2952 _mesa_update_shader_textures_used(shader_program
, prog
);
2954 /* Set the gl_FragDepth layout. */
2955 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
2956 prog
->info
.fs
.depth_layout
= shader_program
->FragDepthLayout
;
2959 _mesa_optimize_program(prog
, prog
);
2961 /* This has to be done last. Any operation that can cause
2962 * prog->ParameterValues to get reallocated (e.g., anything that adds a
2963 * program constant) has to happen before creating this linkage.
2965 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
);
2966 if (!shader_program
->data
->LinkStatus
) {
2973 ralloc_free(mesa_instructions
);
2974 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
2982 * Called via ctx->Driver.LinkShader()
2983 * This actually involves converting GLSL IR into Mesa gl_programs with
2984 * code lowering and other optimizations.
2987 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
2989 assert(prog
->data
->LinkStatus
);
2991 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
2992 if (prog
->_LinkedShaders
[i
] == NULL
)
2996 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
2997 const struct gl_shader_compiler_options
*options
=
2998 &ctx
->Const
.ShaderCompilerOptions
[prog
->_LinkedShaders
[i
]->Stage
];
3004 do_mat_op_to_vec(ir
);
3005 lower_instructions(ir
, (MOD_TO_FLOOR
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3006 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3007 | MUL64_TO_MUL_AND_MUL_HIGH
3008 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3010 progress
= do_common_optimization(ir
, true, true,
3011 options
, ctx
->Const
.NativeIntegers
)
3014 progress
= lower_quadop_vector(ir
, true) || progress
;
3016 if (options
->MaxIfDepth
== 0)
3017 progress
= lower_discard(ir
) || progress
;
3019 progress
= lower_if_to_cond_assign((gl_shader_stage
)i
, ir
,
3020 options
->MaxIfDepth
) || progress
;
3022 progress
= lower_noise(ir
) || progress
;
3024 /* If there are forms of indirect addressing that the driver
3025 * cannot handle, perform the lowering pass.
3027 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3028 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3030 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
3031 options
->EmitNoIndirectInput
,
3032 options
->EmitNoIndirectOutput
,
3033 options
->EmitNoIndirectTemp
,
3034 options
->EmitNoIndirectUniform
)
3037 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3038 progress
= lower_vector_insert(ir
, true) || progress
;
3041 validate_ir_tree(ir
);
3044 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3045 struct gl_program
*linked_prog
;
3047 if (prog
->_LinkedShaders
[i
] == NULL
)
3050 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3053 _mesa_copy_linked_program_data(prog
, prog
->_LinkedShaders
[i
]);
3055 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
3056 _mesa_shader_stage_to_program(i
),
3058 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3065 build_program_resource_list(ctx
, prog
, false);
3066 return prog
->data
->LinkStatus
;
3070 * Link a GLSL shader program. Called via glLinkProgram().
3073 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3078 _mesa_clear_shader_program_data(ctx
, prog
);
3080 prog
->data
= _mesa_create_shader_program_data();
3082 prog
->data
->LinkStatus
= LINKING_SUCCESS
;
3084 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3085 if (!prog
->Shaders
[i
]->CompileStatus
) {
3086 linker_error(prog
, "linking with uncompiled/unspecialized shader");
3090 spirv
= (prog
->Shaders
[i
]->spirv_data
!= NULL
);
3091 } else if (spirv
&& !prog
->Shaders
[i
]->spirv_data
) {
3092 /* The GL_ARB_gl_spirv spec adds a new bullet point to the list of
3093 * reasons LinkProgram can fail:
3095 * "All the shader objects attached to <program> do not have the
3096 * same value for the SPIR_V_BINARY_ARB state."
3099 "not all attached shaders have the same "
3100 "SPIR_V_BINARY_ARB state");
3103 prog
->data
->spirv
= spirv
;
3105 if (prog
->data
->LinkStatus
) {
3107 link_shaders(ctx
, prog
);
3109 _mesa_spirv_link_shaders(ctx
, prog
);
3112 /* If LinkStatus is LINKING_SUCCESS, then reset sampler validated to true.
3113 * Validation happens via the LinkShader call below. If LinkStatus is
3114 * LINKING_SKIPPED, then SamplersValidated will have been restored from the
3117 if (prog
->data
->LinkStatus
== LINKING_SUCCESS
) {
3118 prog
->SamplersValidated
= GL_TRUE
;
3121 if (prog
->data
->LinkStatus
&& !ctx
->Driver
.LinkShader(ctx
, prog
)) {
3122 prog
->data
->LinkStatus
= LINKING_FAILURE
;
3125 if (prog
->data
->LinkStatus
!= LINKING_FAILURE
)
3126 _mesa_create_program_resource_hash(prog
);
3128 /* Return early if we are loading the shader from on-disk cache */
3129 if (prog
->data
->LinkStatus
== LINKING_SKIPPED
)
3132 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
3133 if (!prog
->data
->LinkStatus
) {
3134 fprintf(stderr
, "GLSL shader program %d failed to link\n", prog
->Name
);
3137 if (prog
->data
->InfoLog
&& prog
->data
->InfoLog
[0] != 0) {
3138 fprintf(stderr
, "GLSL shader program %d info log:\n", prog
->Name
);
3139 fprintf(stderr
, "%s\n", prog
->data
->InfoLog
);
3143 #ifdef ENABLE_SHADER_CACHE
3144 if (prog
->data
->LinkStatus
)
3145 shader_cache_write_program_metadata(ctx
, prog
);