2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
44 #include "main/mtypes.h"
45 #include "main/shaderobj.h"
46 #include "program/hash_table.h"
49 #include "main/shaderapi.h"
50 #include "main/uniforms.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_uniform.h"
56 #include "program/prog_parameter.h"
57 #include "program/sampler.h"
63 static int swizzle_for_size(int size
);
66 * This struct is a corresponding struct to Mesa prog_src_register, with
71 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
75 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
76 this->swizzle
= swizzle_for_size(type
->vector_elements
);
78 this->swizzle
= SWIZZLE_XYZW
;
85 this->file
= PROGRAM_UNDEFINED
;
92 explicit src_reg(dst_reg reg
);
94 gl_register_file file
; /**< PROGRAM_* from Mesa */
95 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
96 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
97 int negate
; /**< NEGATE_XYZW mask from mesa */
98 /** Register index should be offset by the integer in this reg. */
104 dst_reg(gl_register_file file
, int writemask
)
108 this->writemask
= writemask
;
109 this->cond_mask
= COND_TR
;
110 this->reladdr
= NULL
;
115 this->file
= PROGRAM_UNDEFINED
;
118 this->cond_mask
= COND_TR
;
119 this->reladdr
= NULL
;
122 explicit dst_reg(src_reg reg
);
124 gl_register_file file
; /**< PROGRAM_* from Mesa */
125 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
126 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
128 /** Register index should be offset by the integer in this reg. */
132 src_reg::src_reg(dst_reg reg
)
134 this->file
= reg
.file
;
135 this->index
= reg
.index
;
136 this->swizzle
= SWIZZLE_XYZW
;
138 this->reladdr
= reg
.reladdr
;
141 dst_reg::dst_reg(src_reg reg
)
143 this->file
= reg
.file
;
144 this->index
= reg
.index
;
145 this->writemask
= WRITEMASK_XYZW
;
146 this->cond_mask
= COND_TR
;
147 this->reladdr
= reg
.reladdr
;
150 class ir_to_mesa_instruction
: public exec_node
{
152 /* Callers of this ralloc-based new need not call delete. It's
153 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
154 static void* operator new(size_t size
, void *ctx
)
158 node
= rzalloc_size(ctx
, size
);
159 assert(node
!= NULL
);
167 /** Pointer to the ir source this tree came from for debugging */
169 GLboolean cond_update
;
171 int sampler
; /**< sampler index */
172 int tex_target
; /**< One of TEXTURE_*_INDEX */
173 GLboolean tex_shadow
;
175 class function_entry
*function
; /* Set on OPCODE_CAL or OPCODE_BGNSUB */
178 class variable_storage
: public exec_node
{
180 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
181 : file(file
), index(index
), var(var
)
186 gl_register_file file
;
188 ir_variable
*var
; /* variable that maps to this, if any */
191 class function_entry
: public exec_node
{
193 ir_function_signature
*sig
;
196 * identifier of this function signature used by the program.
198 * At the point that Mesa instructions for function calls are
199 * generated, we don't know the address of the first instruction of
200 * the function body. So we make the BranchTarget that is called a
201 * small integer and rewrite them during set_branchtargets().
206 * Pointer to first instruction of the function body.
208 * Set during function body emits after main() is processed.
210 ir_to_mesa_instruction
*bgn_inst
;
213 * Index of the first instruction of the function body in actual
216 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
220 /** Storage for the return value. */
224 class ir_to_mesa_visitor
: public ir_visitor
{
226 ir_to_mesa_visitor();
227 ~ir_to_mesa_visitor();
229 function_entry
*current_function
;
231 struct gl_context
*ctx
;
232 struct gl_program
*prog
;
233 struct gl_shader_program
*shader_program
;
234 struct gl_shader_compiler_options
*options
;
238 variable_storage
*find_variable_storage(ir_variable
*var
);
240 function_entry
*get_function_signature(ir_function_signature
*sig
);
242 src_reg
get_temp(const glsl_type
*type
);
243 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
245 src_reg
src_reg_for_float(float val
);
248 * \name Visit methods
250 * As typical for the visitor pattern, there must be one \c visit method for
251 * each concrete subclass of \c ir_instruction. Virtual base classes within
252 * the hierarchy should not have \c visit methods.
255 virtual void visit(ir_variable
*);
256 virtual void visit(ir_loop
*);
257 virtual void visit(ir_loop_jump
*);
258 virtual void visit(ir_function_signature
*);
259 virtual void visit(ir_function
*);
260 virtual void visit(ir_expression
*);
261 virtual void visit(ir_swizzle
*);
262 virtual void visit(ir_dereference_variable
*);
263 virtual void visit(ir_dereference_array
*);
264 virtual void visit(ir_dereference_record
*);
265 virtual void visit(ir_assignment
*);
266 virtual void visit(ir_constant
*);
267 virtual void visit(ir_call
*);
268 virtual void visit(ir_return
*);
269 virtual void visit(ir_discard
*);
270 virtual void visit(ir_texture
*);
271 virtual void visit(ir_if
*);
276 /** List of variable_storage */
279 /** List of function_entry */
280 exec_list function_signatures
;
281 int next_signature_id
;
283 /** List of ir_to_mesa_instruction */
284 exec_list instructions
;
286 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
288 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
289 dst_reg dst
, src_reg src0
);
291 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
292 dst_reg dst
, src_reg src0
, src_reg src1
);
294 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
296 src_reg src0
, src_reg src1
, src_reg src2
);
299 * Emit the correct dot-product instruction for the type of arguments
301 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
307 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
308 dst_reg dst
, src_reg src0
);
310 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
311 dst_reg dst
, src_reg src0
, src_reg src1
);
313 void emit_scs(ir_instruction
*ir
, enum prog_opcode op
,
314 dst_reg dst
, const src_reg
&src
);
316 bool try_emit_mad(ir_expression
*ir
,
318 bool try_emit_mad_for_and_not(ir_expression
*ir
,
320 bool try_emit_sat(ir_expression
*ir
);
322 void emit_swz(ir_expression
*ir
);
324 bool process_move_condition(ir_rvalue
*ir
);
326 void copy_propagate(void);
331 src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
333 dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
335 dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
338 swizzle_for_size(int size
)
340 int size_swizzles
[4] = {
341 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
342 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
343 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
344 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
347 assert((size
>= 1) && (size
<= 4));
348 return size_swizzles
[size
- 1];
351 ir_to_mesa_instruction
*
352 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
354 src_reg src0
, src_reg src1
, src_reg src2
)
356 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
359 /* If we have to do relative addressing, we want to load the ARL
360 * reg directly for one of the regs, and preload the other reladdr
361 * sources into temps.
363 num_reladdr
+= dst
.reladdr
!= NULL
;
364 num_reladdr
+= src0
.reladdr
!= NULL
;
365 num_reladdr
+= src1
.reladdr
!= NULL
;
366 num_reladdr
+= src2
.reladdr
!= NULL
;
368 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
369 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
370 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
373 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
376 assert(num_reladdr
== 0);
385 inst
->function
= NULL
;
387 this->instructions
.push_tail(inst
);
393 ir_to_mesa_instruction
*
394 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
395 dst_reg dst
, src_reg src0
, src_reg src1
)
397 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
400 ir_to_mesa_instruction
*
401 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
402 dst_reg dst
, src_reg src0
)
404 assert(dst
.writemask
!= 0);
405 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
408 ir_to_mesa_instruction
*
409 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
411 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
414 ir_to_mesa_instruction
*
415 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
416 dst_reg dst
, src_reg src0
, src_reg src1
,
419 static const gl_inst_opcode dot_opcodes
[] = {
420 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
423 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
427 * Emits Mesa scalar opcodes to produce unique answers across channels.
429 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
430 * channel determines the result across all channels. So to do a vec4
431 * of this operation, we want to emit a scalar per source channel used
432 * to produce dest channels.
435 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
437 src_reg orig_src0
, src_reg orig_src1
)
440 int done_mask
= ~dst
.writemask
;
442 /* Mesa RCP is a scalar operation splatting results to all channels,
443 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
446 for (i
= 0; i
< 4; i
++) {
447 GLuint this_mask
= (1 << i
);
448 ir_to_mesa_instruction
*inst
;
449 src_reg src0
= orig_src0
;
450 src_reg src1
= orig_src1
;
452 if (done_mask
& this_mask
)
455 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
456 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
457 for (j
= i
+ 1; j
< 4; j
++) {
458 /* If there is another enabled component in the destination that is
459 * derived from the same inputs, generate its value on this pass as
462 if (!(done_mask
& (1 << j
)) &&
463 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
464 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
465 this_mask
|= (1 << j
);
468 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
469 src0_swiz
, src0_swiz
);
470 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
471 src1_swiz
, src1_swiz
);
473 inst
= emit(ir
, op
, dst
, src0
, src1
);
474 inst
->dst
.writemask
= this_mask
;
475 done_mask
|= this_mask
;
480 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
481 dst_reg dst
, src_reg src0
)
483 src_reg undef
= undef_src
;
485 undef
.swizzle
= SWIZZLE_XXXX
;
487 emit_scalar(ir
, op
, dst
, src0
, undef
);
491 * Emit an OPCODE_SCS instruction
493 * The \c SCS opcode functions a bit differently than the other Mesa (or
494 * ARB_fragment_program) opcodes. Instead of splatting its result across all
495 * four components of the destination, it writes one value to the \c x
496 * component and another value to the \c y component.
498 * \param ir IR instruction being processed
499 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
501 * \param dst Destination register
502 * \param src Source register
505 ir_to_mesa_visitor::emit_scs(ir_instruction
*ir
, enum prog_opcode op
,
509 /* Vertex programs cannot use the SCS opcode.
511 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
512 emit_scalar(ir
, op
, dst
, src
);
516 const unsigned component
= (op
== OPCODE_SIN
) ? 0 : 1;
517 const unsigned scs_mask
= (1U << component
);
518 int done_mask
= ~dst
.writemask
;
521 assert(op
== OPCODE_SIN
|| op
== OPCODE_COS
);
523 /* If there are compnents in the destination that differ from the component
524 * that will be written by the SCS instrution, we'll need a temporary.
526 if (scs_mask
!= unsigned(dst
.writemask
)) {
527 tmp
= get_temp(glsl_type::vec4_type
);
530 for (unsigned i
= 0; i
< 4; i
++) {
531 unsigned this_mask
= (1U << i
);
534 if ((done_mask
& this_mask
) != 0)
537 /* The source swizzle specified which component of the source generates
538 * sine / cosine for the current component in the destination. The SCS
539 * instruction requires that this value be swizzle to the X component.
540 * Replace the current swizzle with a swizzle that puts the source in
543 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
545 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
546 src0_swiz
, src0_swiz
);
547 for (unsigned j
= i
+ 1; j
< 4; j
++) {
548 /* If there is another enabled component in the destination that is
549 * derived from the same inputs, generate its value on this pass as
552 if (!(done_mask
& (1 << j
)) &&
553 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
554 this_mask
|= (1 << j
);
558 if (this_mask
!= scs_mask
) {
559 ir_to_mesa_instruction
*inst
;
560 dst_reg tmp_dst
= dst_reg(tmp
);
562 /* Emit the SCS instruction.
564 inst
= emit(ir
, OPCODE_SCS
, tmp_dst
, src0
);
565 inst
->dst
.writemask
= scs_mask
;
567 /* Move the result of the SCS instruction to the desired location in
570 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
571 component
, component
);
572 inst
= emit(ir
, OPCODE_SCS
, dst
, tmp
);
573 inst
->dst
.writemask
= this_mask
;
575 /* Emit the SCS instruction to write directly to the destination.
577 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_SCS
, dst
, src0
);
578 inst
->dst
.writemask
= scs_mask
;
581 done_mask
|= this_mask
;
586 ir_to_mesa_visitor::src_reg_for_float(float val
)
588 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
590 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
591 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
597 type_size(const struct glsl_type
*type
)
602 switch (type
->base_type
) {
605 case GLSL_TYPE_FLOAT
:
607 if (type
->is_matrix()) {
608 return type
->matrix_columns
;
610 /* Regardless of size of vector, it gets a vec4. This is bad
611 * packing for things like floats, but otherwise arrays become a
612 * mess. Hopefully a later pass over the code can pack scalars
613 * down if appropriate.
617 case GLSL_TYPE_ARRAY
:
618 assert(type
->length
> 0);
619 return type_size(type
->fields
.array
) * type
->length
;
620 case GLSL_TYPE_STRUCT
:
622 for (i
= 0; i
< type
->length
; i
++) {
623 size
+= type_size(type
->fields
.structure
[i
].type
);
626 case GLSL_TYPE_SAMPLER
:
627 /* Samplers take up one slot in UNIFORMS[], but they're baked in
638 * In the initial pass of codegen, we assign temporary numbers to
639 * intermediate results. (not SSA -- variable assignments will reuse
640 * storage). Actual register allocation for the Mesa VM occurs in a
641 * pass over the Mesa IR later.
644 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
648 src
.file
= PROGRAM_TEMPORARY
;
649 src
.index
= next_temp
;
651 next_temp
+= type_size(type
);
653 if (type
->is_array() || type
->is_record()) {
654 src
.swizzle
= SWIZZLE_NOOP
;
656 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
664 ir_to_mesa_visitor::find_variable_storage(ir_variable
*var
)
667 variable_storage
*entry
;
669 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
670 entry
= (variable_storage
*)iter
.get();
672 if (entry
->var
== var
)
680 ir_to_mesa_visitor::visit(ir_variable
*ir
)
682 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
683 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
685 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
686 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
688 } else if (strcmp(ir
->name
, "gl_FragDepth") == 0) {
689 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
690 switch (ir
->depth_layout
) {
691 case ir_depth_layout_none
:
692 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_NONE
;
694 case ir_depth_layout_any
:
695 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_ANY
;
697 case ir_depth_layout_greater
:
698 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_GREATER
;
700 case ir_depth_layout_less
:
701 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_LESS
;
703 case ir_depth_layout_unchanged
:
704 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_UNCHANGED
;
712 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
714 const ir_state_slot
*const slots
= ir
->state_slots
;
715 assert(ir
->state_slots
!= NULL
);
717 /* Check if this statevar's setup in the STATE file exactly
718 * matches how we'll want to reference it as a
719 * struct/array/whatever. If not, then we need to move it into
720 * temporary storage and hope that it'll get copy-propagated
723 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
724 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
729 variable_storage
*storage
;
731 if (i
== ir
->num_state_slots
) {
732 /* We'll set the index later. */
733 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
734 this->variables
.push_tail(storage
);
738 /* The variable_storage constructor allocates slots based on the size
739 * of the type. However, this had better match the number of state
740 * elements that we're going to copy into the new temporary.
742 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
744 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
746 this->variables
.push_tail(storage
);
747 this->next_temp
+= type_size(ir
->type
);
749 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
753 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
754 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
755 (gl_state_index
*)slots
[i
].tokens
);
757 if (storage
->file
== PROGRAM_STATE_VAR
) {
758 if (storage
->index
== -1) {
759 storage
->index
= index
;
761 assert(index
== storage
->index
+ (int)i
);
764 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
765 src
.swizzle
= slots
[i
].swizzle
;
766 emit(ir
, OPCODE_MOV
, dst
, src
);
767 /* even a float takes up a whole vec4 reg in a struct/array. */
772 if (storage
->file
== PROGRAM_TEMPORARY
&&
773 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
774 linker_error(this->shader_program
,
775 "failed to load builtin uniform `%s' "
776 "(%d/%d regs loaded)\n",
777 ir
->name
, dst
.index
- storage
->index
,
778 type_size(ir
->type
));
784 ir_to_mesa_visitor::visit(ir_loop
*ir
)
786 ir_dereference_variable
*counter
= NULL
;
788 if (ir
->counter
!= NULL
)
789 counter
= new(mem_ctx
) ir_dereference_variable(ir
->counter
);
791 if (ir
->from
!= NULL
) {
792 assert(ir
->counter
!= NULL
);
795 new(mem_ctx
) ir_assignment(counter
, ir
->from
, NULL
);
800 emit(NULL
, OPCODE_BGNLOOP
);
804 new(mem_ctx
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
806 ir_if
*if_stmt
= new(mem_ctx
) ir_if(e
);
809 new(mem_ctx
) ir_loop_jump(ir_loop_jump::jump_break
);
811 if_stmt
->then_instructions
.push_tail(brk
);
813 if_stmt
->accept(this);
816 visit_exec_list(&ir
->body_instructions
, this);
820 new(mem_ctx
) ir_expression(ir_binop_add
, counter
->type
,
821 counter
, ir
->increment
);
824 new(mem_ctx
) ir_assignment(counter
, e
, NULL
);
829 emit(NULL
, OPCODE_ENDLOOP
);
833 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
836 case ir_loop_jump::jump_break
:
837 emit(NULL
, OPCODE_BRK
);
839 case ir_loop_jump::jump_continue
:
840 emit(NULL
, OPCODE_CONT
);
847 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
854 ir_to_mesa_visitor::visit(ir_function
*ir
)
856 /* Ignore function bodies other than main() -- we shouldn't see calls to
857 * them since they should all be inlined before we get to ir_to_mesa.
859 if (strcmp(ir
->name
, "main") == 0) {
860 const ir_function_signature
*sig
;
863 sig
= ir
->matching_signature(&empty
);
867 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
868 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
876 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
878 int nonmul_operand
= 1 - mul_operand
;
881 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
882 if (!expr
|| expr
->operation
!= ir_binop_mul
)
885 expr
->operands
[0]->accept(this);
887 expr
->operands
[1]->accept(this);
889 ir
->operands
[nonmul_operand
]->accept(this);
892 this->result
= get_temp(ir
->type
);
893 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
899 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
901 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
902 * implemented using multiplication, and logical-or is implemented using
903 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
904 * As result, the logical expression (a & !b) can be rewritten as:
908 * - (a * 1) - (a * b)
912 * This final expression can be implemented as a single MAD(a, -b, a)
916 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
918 const int other_operand
= 1 - try_operand
;
921 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
922 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
925 ir
->operands
[other_operand
]->accept(this);
927 expr
->operands
[0]->accept(this);
930 b
.negate
= ~b
.negate
;
932 this->result
= get_temp(ir
->type
);
933 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
939 ir_to_mesa_visitor::try_emit_sat(ir_expression
*ir
)
941 /* Saturates were only introduced to vertex programs in
942 * NV_vertex_program3, so don't give them to drivers in the VP.
944 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
)
947 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
951 sat_src
->accept(this);
952 src_reg src
= this->result
;
954 /* If we generated an expression instruction into a temporary in
955 * processing the saturate's operand, apply the saturate to that
956 * instruction. Otherwise, generate a MOV to do the saturate.
958 * Note that we have to be careful to only do this optimization if
959 * the instruction in question was what generated src->result. For
960 * example, ir_dereference_array might generate a MUL instruction
961 * to create the reladdr, and return us a src reg using that
962 * reladdr. That MUL result is not the value we're trying to
965 ir_expression
*sat_src_expr
= sat_src
->as_expression();
966 ir_to_mesa_instruction
*new_inst
;
967 new_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
968 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
969 sat_src_expr
->operation
== ir_binop_add
||
970 sat_src_expr
->operation
== ir_binop_dot
)) {
971 new_inst
->saturate
= true;
973 this->result
= get_temp(ir
->type
);
974 ir_to_mesa_instruction
*inst
;
975 inst
= emit(ir
, OPCODE_MOV
, dst_reg(this->result
), src
);
976 inst
->saturate
= true;
983 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
984 src_reg
*reg
, int *num_reladdr
)
989 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
991 if (*num_reladdr
!= 1) {
992 src_reg temp
= get_temp(glsl_type::vec4_type
);
994 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
1002 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
1004 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
1005 * This means that each of the operands is either an immediate value of -1,
1006 * 0, or 1, or is a component from one source register (possibly with
1009 uint8_t components
[4] = { 0 };
1010 bool negate
[4] = { false };
1011 ir_variable
*var
= NULL
;
1013 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1014 ir_rvalue
*op
= ir
->operands
[i
];
1016 assert(op
->type
->is_scalar());
1018 while (op
!= NULL
) {
1019 switch (op
->ir_type
) {
1020 case ir_type_constant
: {
1022 assert(op
->type
->is_scalar());
1024 const ir_constant
*const c
= op
->as_constant();
1026 components
[i
] = SWIZZLE_ONE
;
1027 } else if (c
->is_zero()) {
1028 components
[i
] = SWIZZLE_ZERO
;
1029 } else if (c
->is_negative_one()) {
1030 components
[i
] = SWIZZLE_ONE
;
1033 assert(!"SWZ constant must be 0.0 or 1.0.");
1040 case ir_type_dereference_variable
: {
1041 ir_dereference_variable
*const deref
=
1042 (ir_dereference_variable
*) op
;
1044 assert((var
== NULL
) || (deref
->var
== var
));
1045 components
[i
] = SWIZZLE_X
;
1051 case ir_type_expression
: {
1052 ir_expression
*const expr
= (ir_expression
*) op
;
1054 assert(expr
->operation
== ir_unop_neg
);
1057 op
= expr
->operands
[0];
1061 case ir_type_swizzle
: {
1062 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
1064 components
[i
] = swiz
->mask
.x
;
1070 assert(!"Should not get here.");
1076 assert(var
!= NULL
);
1078 ir_dereference_variable
*const deref
=
1079 new(mem_ctx
) ir_dereference_variable(var
);
1081 this->result
.file
= PROGRAM_UNDEFINED
;
1082 deref
->accept(this);
1083 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1085 printf("Failed to get tree for expression operand:\n");
1093 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
1097 src
.negate
= ((unsigned(negate
[0]) << 0)
1098 | (unsigned(negate
[1]) << 1)
1099 | (unsigned(negate
[2]) << 2)
1100 | (unsigned(negate
[3]) << 3));
1102 /* Storage for our result. Ideally for an assignment we'd be using the
1103 * actual storage for the result here, instead.
1105 const src_reg result_src
= get_temp(ir
->type
);
1106 dst_reg result_dst
= dst_reg(result_src
);
1108 /* Limit writes to the channels that will be used by result_src later.
1109 * This does limit this temp's use as a temporary for multi-instruction
1112 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1114 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
1115 this->result
= result_src
;
1119 ir_to_mesa_visitor::visit(ir_expression
*ir
)
1121 unsigned int operand
;
1122 src_reg op
[Elements(ir
->operands
)];
1126 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1128 if (ir
->operation
== ir_binop_add
) {
1129 if (try_emit_mad(ir
, 1))
1131 if (try_emit_mad(ir
, 0))
1135 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1137 if (ir
->operation
== ir_binop_logic_and
) {
1138 if (try_emit_mad_for_and_not(ir
, 1))
1140 if (try_emit_mad_for_and_not(ir
, 0))
1144 if (try_emit_sat(ir
))
1147 if (ir
->operation
== ir_quadop_vector
) {
1152 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1153 this->result
.file
= PROGRAM_UNDEFINED
;
1154 ir
->operands
[operand
]->accept(this);
1155 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1157 printf("Failed to get tree for expression operand:\n");
1158 ir
->operands
[operand
]->accept(&v
);
1161 op
[operand
] = this->result
;
1163 /* Matrix expression operands should have been broken down to vector
1164 * operations already.
1166 assert(!ir
->operands
[operand
]->type
->is_matrix());
1169 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1170 if (ir
->operands
[1]) {
1171 vector_elements
= MAX2(vector_elements
,
1172 ir
->operands
[1]->type
->vector_elements
);
1175 this->result
.file
= PROGRAM_UNDEFINED
;
1177 /* Storage for our result. Ideally for an assignment we'd be using
1178 * the actual storage for the result here, instead.
1180 result_src
= get_temp(ir
->type
);
1181 /* convenience for the emit functions below. */
1182 result_dst
= dst_reg(result_src
);
1183 /* Limit writes to the channels that will be used by result_src later.
1184 * This does limit this temp's use as a temporary for multi-instruction
1187 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1189 switch (ir
->operation
) {
1190 case ir_unop_logic_not
:
1191 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1192 * older GPUs implement SEQ using multiple instructions (i915 uses two
1193 * SGE instructions and a MUL instruction). Since our logic values are
1194 * 0.0 and 1.0, 1-x also implements !x.
1196 op
[0].negate
= ~op
[0].negate
;
1197 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1200 op
[0].negate
= ~op
[0].negate
;
1204 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1207 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1210 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1214 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1218 assert(!"not reached: should be handled by ir_explog_to_explog2");
1221 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1224 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1227 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1229 case ir_unop_sin_reduced
:
1230 emit_scs(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1232 case ir_unop_cos_reduced
:
1233 emit_scs(ir
, OPCODE_COS
, result_dst
, op
[0]);
1237 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1240 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1243 case ir_unop_noise
: {
1244 const enum prog_opcode opcode
=
1245 prog_opcode(OPCODE_NOISE1
1246 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1247 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1249 emit(ir
, opcode
, result_dst
, op
[0]);
1254 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1257 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1261 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1264 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1267 /* Floating point should be lowered by MOD_TO_FRACT in the compiler. */
1268 assert(ir
->type
->is_integer());
1269 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1273 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1275 case ir_binop_greater
:
1276 emit(ir
, OPCODE_SGT
, result_dst
, op
[0], op
[1]);
1278 case ir_binop_lequal
:
1279 emit(ir
, OPCODE_SLE
, result_dst
, op
[0], op
[1]);
1281 case ir_binop_gequal
:
1282 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1284 case ir_binop_equal
:
1285 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1287 case ir_binop_nequal
:
1288 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1290 case ir_binop_all_equal
:
1291 /* "==" operator producing a scalar boolean. */
1292 if (ir
->operands
[0]->type
->is_vector() ||
1293 ir
->operands
[1]->type
->is_vector()) {
1294 src_reg temp
= get_temp(glsl_type::vec4_type
);
1295 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1297 /* After the dot-product, the value will be an integer on the
1298 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1300 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1302 /* Negating the result of the dot-product gives values on the range
1303 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1304 * achieved using SGE.
1306 src_reg sge_src
= result_src
;
1307 sge_src
.negate
= ~sge_src
.negate
;
1308 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1310 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1313 case ir_binop_any_nequal
:
1314 /* "!=" operator producing a scalar boolean. */
1315 if (ir
->operands
[0]->type
->is_vector() ||
1316 ir
->operands
[1]->type
->is_vector()) {
1317 src_reg temp
= get_temp(glsl_type::vec4_type
);
1318 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1320 /* After the dot-product, the value will be an integer on the
1321 * range [0,4]. Zero stays zero, and positive values become 1.0.
1323 ir_to_mesa_instruction
*const dp
=
1324 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1325 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1326 /* The clamping to [0,1] can be done for free in the fragment
1327 * shader with a saturate.
1329 dp
->saturate
= true;
1331 /* Negating the result of the dot-product gives values on the range
1332 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1333 * achieved using SLT.
1335 src_reg slt_src
= result_src
;
1336 slt_src
.negate
= ~slt_src
.negate
;
1337 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1340 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1345 assert(ir
->operands
[0]->type
->is_vector());
1347 /* After the dot-product, the value will be an integer on the
1348 * range [0,4]. Zero stays zero, and positive values become 1.0.
1350 ir_to_mesa_instruction
*const dp
=
1351 emit_dp(ir
, result_dst
, op
[0], op
[0],
1352 ir
->operands
[0]->type
->vector_elements
);
1353 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1354 /* The clamping to [0,1] can be done for free in the fragment
1355 * shader with a saturate.
1357 dp
->saturate
= true;
1359 /* Negating the result of the dot-product gives values on the range
1360 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1361 * is achieved using SLT.
1363 src_reg slt_src
= result_src
;
1364 slt_src
.negate
= ~slt_src
.negate
;
1365 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1370 case ir_binop_logic_xor
:
1371 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1374 case ir_binop_logic_or
: {
1375 /* After the addition, the value will be an integer on the
1376 * range [0,2]. Zero stays zero, and positive values become 1.0.
1378 ir_to_mesa_instruction
*add
=
1379 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1380 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1381 /* The clamping to [0,1] can be done for free in the fragment
1382 * shader with a saturate.
1384 add
->saturate
= true;
1386 /* Negating the result of the addition gives values on the range
1387 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1388 * is achieved using SLT.
1390 src_reg slt_src
= result_src
;
1391 slt_src
.negate
= ~slt_src
.negate
;
1392 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1397 case ir_binop_logic_and
:
1398 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1399 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1403 assert(ir
->operands
[0]->type
->is_vector());
1404 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1405 emit_dp(ir
, result_dst
, op
[0], op
[1],
1406 ir
->operands
[0]->type
->vector_elements
);
1410 /* sqrt(x) = x * rsq(x). */
1411 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1412 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1413 /* For incoming channels <= 0, set the result to 0. */
1414 op
[0].negate
= ~op
[0].negate
;
1415 emit(ir
, OPCODE_CMP
, result_dst
,
1416 op
[0], result_src
, src_reg_for_float(0.0));
1419 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1427 /* Mesa IR lacks types, ints are stored as truncated floats. */
1431 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1435 emit(ir
, OPCODE_SNE
, result_dst
,
1436 op
[0], src_reg_for_float(0.0));
1439 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1442 op
[0].negate
= ~op
[0].negate
;
1443 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1444 result_src
.negate
= ~result_src
.negate
;
1447 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1450 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1454 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1457 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1460 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1463 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1464 * hardware backends have no way to avoid Mesa IR generation
1465 * even if they don't use it, we need to emit "something" and
1468 case ir_binop_lshift
:
1469 case ir_binop_rshift
:
1470 case ir_binop_bit_and
:
1471 case ir_binop_bit_xor
:
1472 case ir_binop_bit_or
:
1473 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1476 case ir_unop_bit_not
:
1477 case ir_unop_round_even
:
1478 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1481 case ir_quadop_vector
:
1482 /* This operation should have already been handled.
1484 assert(!"Should not get here.");
1488 this->result
= result_src
;
1493 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1499 /* Note that this is only swizzles in expressions, not those on the left
1500 * hand side of an assignment, which do write masking. See ir_assignment
1504 ir
->val
->accept(this);
1506 assert(src
.file
!= PROGRAM_UNDEFINED
);
1508 for (i
= 0; i
< 4; i
++) {
1509 if (i
< ir
->type
->vector_elements
) {
1512 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1515 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1518 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1521 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1525 /* If the type is smaller than a vec4, replicate the last
1528 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1532 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1538 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1540 variable_storage
*entry
= find_variable_storage(ir
->var
);
1541 ir_variable
*var
= ir
->var
;
1544 switch (var
->mode
) {
1545 case ir_var_uniform
:
1546 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1548 this->variables
.push_tail(entry
);
1552 /* The linker assigns locations for varyings and attributes,
1553 * including deprecated builtins (like gl_Color),
1554 * user-assigned generic attributes (glBindVertexLocation),
1555 * and user-defined varyings.
1557 * FINISHME: We would hit this path for function arguments. Fix!
1559 assert(var
->location
!= -1);
1560 entry
= new(mem_ctx
) variable_storage(var
,
1565 assert(var
->location
!= -1);
1566 entry
= new(mem_ctx
) variable_storage(var
,
1570 case ir_var_system_value
:
1571 entry
= new(mem_ctx
) variable_storage(var
,
1572 PROGRAM_SYSTEM_VALUE
,
1576 case ir_var_temporary
:
1577 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1579 this->variables
.push_tail(entry
);
1581 next_temp
+= type_size(var
->type
);
1586 printf("Failed to make storage for %s\n", var
->name
);
1591 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1595 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1599 int element_size
= type_size(ir
->type
);
1601 index
= ir
->array_index
->constant_expression_value();
1603 ir
->array
->accept(this);
1607 src
.index
+= index
->value
.i
[0] * element_size
;
1609 /* Variable index array dereference. It eats the "vec4" of the
1610 * base of the array and an index that offsets the Mesa register
1613 ir
->array_index
->accept(this);
1617 if (element_size
== 1) {
1618 index_reg
= this->result
;
1620 index_reg
= get_temp(glsl_type::float_type
);
1622 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1623 this->result
, src_reg_for_float(element_size
));
1626 /* If there was already a relative address register involved, add the
1627 * new and the old together to get the new offset.
1629 if (src
.reladdr
!= NULL
) {
1630 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1632 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1633 index_reg
, *src
.reladdr
);
1635 index_reg
= accum_reg
;
1638 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1639 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1642 /* If the type is smaller than a vec4, replicate the last channel out. */
1643 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1644 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1646 src
.swizzle
= SWIZZLE_NOOP
;
1652 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1655 const glsl_type
*struct_type
= ir
->record
->type
;
1658 ir
->record
->accept(this);
1660 for (i
= 0; i
< struct_type
->length
; i
++) {
1661 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1663 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1666 /* If the type is smaller than a vec4, replicate the last channel out. */
1667 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1668 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1670 this->result
.swizzle
= SWIZZLE_NOOP
;
1672 this->result
.index
+= offset
;
1676 * We want to be careful in assignment setup to hit the actual storage
1677 * instead of potentially using a temporary like we might with the
1678 * ir_dereference handler.
1681 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1683 /* The LHS must be a dereference. If the LHS is a variable indexed array
1684 * access of a vector, it must be separated into a series conditional moves
1685 * before reaching this point (see ir_vec_index_to_cond_assign).
1687 assert(ir
->as_dereference());
1688 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1690 assert(!deref_array
->array
->type
->is_vector());
1693 /* Use the rvalue deref handler for the most part. We'll ignore
1694 * swizzles in it and write swizzles using writemask, though.
1697 return dst_reg(v
->result
);
1701 * Process the condition of a conditional assignment
1703 * Examines the condition of a conditional assignment to generate the optimal
1704 * first operand of a \c CMP instruction. If the condition is a relational
1705 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1706 * used as the source for the \c CMP instruction. Otherwise the comparison
1707 * is processed to a boolean result, and the boolean result is used as the
1708 * operand to the CMP instruction.
1711 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1713 ir_rvalue
*src_ir
= ir
;
1715 bool switch_order
= false;
1717 ir_expression
*const expr
= ir
->as_expression();
1718 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
1719 bool zero_on_left
= false;
1721 if (expr
->operands
[0]->is_zero()) {
1722 src_ir
= expr
->operands
[1];
1723 zero_on_left
= true;
1724 } else if (expr
->operands
[1]->is_zero()) {
1725 src_ir
= expr
->operands
[0];
1726 zero_on_left
= false;
1730 * (a < 0) T F F ( a < 0) T F F
1731 * (0 < a) F F T (-a < 0) F F T
1732 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1733 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1734 * (a > 0) F F T (-a < 0) F F T
1735 * (0 > a) T F F ( a < 0) T F F
1736 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1737 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1739 * Note that exchanging the order of 0 and 'a' in the comparison simply
1740 * means that the value of 'a' should be negated.
1743 switch (expr
->operation
) {
1745 switch_order
= false;
1746 negate
= zero_on_left
;
1749 case ir_binop_greater
:
1750 switch_order
= false;
1751 negate
= !zero_on_left
;
1754 case ir_binop_lequal
:
1755 switch_order
= true;
1756 negate
= !zero_on_left
;
1759 case ir_binop_gequal
:
1760 switch_order
= true;
1761 negate
= zero_on_left
;
1765 /* This isn't the right kind of comparison afterall, so make sure
1766 * the whole condition is visited.
1774 src_ir
->accept(this);
1776 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1777 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1778 * choose which value OPCODE_CMP produces without an extra instruction
1779 * computing the condition.
1782 this->result
.negate
= ~this->result
.negate
;
1784 return switch_order
;
1788 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1794 ir
->rhs
->accept(this);
1797 l
= get_assignment_lhs(ir
->lhs
, this);
1799 /* FINISHME: This should really set to the correct maximal writemask for each
1800 * FINISHME: component written (in the loops below). This case can only
1801 * FINISHME: occur for matrices, arrays, and structures.
1803 if (ir
->write_mask
== 0) {
1804 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1805 l
.writemask
= WRITEMASK_XYZW
;
1806 } else if (ir
->lhs
->type
->is_scalar()) {
1807 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1808 * FINISHME: W component of fragment shader output zero, work correctly.
1810 l
.writemask
= WRITEMASK_XYZW
;
1813 int first_enabled_chan
= 0;
1816 assert(ir
->lhs
->type
->is_vector());
1817 l
.writemask
= ir
->write_mask
;
1819 for (int i
= 0; i
< 4; i
++) {
1820 if (l
.writemask
& (1 << i
)) {
1821 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1826 /* Swizzle a small RHS vector into the channels being written.
1828 * glsl ir treats write_mask as dictating how many channels are
1829 * present on the RHS while Mesa IR treats write_mask as just
1830 * showing which channels of the vec4 RHS get written.
1832 for (int i
= 0; i
< 4; i
++) {
1833 if (l
.writemask
& (1 << i
))
1834 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1836 swizzles
[i
] = first_enabled_chan
;
1838 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1839 swizzles
[2], swizzles
[3]);
1842 assert(l
.file
!= PROGRAM_UNDEFINED
);
1843 assert(r
.file
!= PROGRAM_UNDEFINED
);
1845 if (ir
->condition
) {
1846 const bool switch_order
= this->process_move_condition(ir
->condition
);
1847 src_reg condition
= this->result
;
1849 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1851 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1853 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1860 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1861 emit(ir
, OPCODE_MOV
, l
, r
);
1870 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1873 GLfloat stack_vals
[4] = { 0 };
1874 GLfloat
*values
= stack_vals
;
1877 /* Unfortunately, 4 floats is all we can get into
1878 * _mesa_add_unnamed_constant. So, make a temp to store an
1879 * aggregate constant and move each constant value into it. If we
1880 * get lucky, copy propagation will eliminate the extra moves.
1883 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
1884 src_reg temp_base
= get_temp(ir
->type
);
1885 dst_reg temp
= dst_reg(temp_base
);
1887 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
1888 ir_constant
*field_value
= (ir_constant
*)iter
.get();
1889 int size
= type_size(field_value
->type
);
1893 field_value
->accept(this);
1896 for (i
= 0; i
< (unsigned int)size
; i
++) {
1897 emit(ir
, OPCODE_MOV
, temp
, src
);
1903 this->result
= temp_base
;
1907 if (ir
->type
->is_array()) {
1908 src_reg temp_base
= get_temp(ir
->type
);
1909 dst_reg temp
= dst_reg(temp_base
);
1910 int size
= type_size(ir
->type
->fields
.array
);
1914 for (i
= 0; i
< ir
->type
->length
; i
++) {
1915 ir
->array_elements
[i
]->accept(this);
1917 for (int j
= 0; j
< size
; j
++) {
1918 emit(ir
, OPCODE_MOV
, temp
, src
);
1924 this->result
= temp_base
;
1928 if (ir
->type
->is_matrix()) {
1929 src_reg mat
= get_temp(ir
->type
);
1930 dst_reg mat_column
= dst_reg(mat
);
1932 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1933 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1934 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1936 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1937 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1938 (gl_constant_value
*) values
,
1939 ir
->type
->vector_elements
,
1941 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1950 src
.file
= PROGRAM_CONSTANT
;
1951 switch (ir
->type
->base_type
) {
1952 case GLSL_TYPE_FLOAT
:
1953 values
= &ir
->value
.f
[0];
1955 case GLSL_TYPE_UINT
:
1956 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1957 values
[i
] = ir
->value
.u
[i
];
1961 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1962 values
[i
] = ir
->value
.i
[i
];
1965 case GLSL_TYPE_BOOL
:
1966 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1967 values
[i
] = ir
->value
.b
[i
];
1971 assert(!"Non-float/uint/int/bool constant");
1974 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1975 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1976 (gl_constant_value
*) values
,
1977 ir
->type
->vector_elements
,
1978 &this->result
.swizzle
);
1982 ir_to_mesa_visitor::get_function_signature(ir_function_signature
*sig
)
1984 function_entry
*entry
;
1986 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
1987 entry
= (function_entry
*)iter
.get();
1989 if (entry
->sig
== sig
)
1993 entry
= ralloc(mem_ctx
, function_entry
);
1995 entry
->sig_id
= this->next_signature_id
++;
1996 entry
->bgn_inst
= NULL
;
1998 /* Allocate storage for all the parameters. */
1999 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
2000 ir_variable
*param
= (ir_variable
*)iter
.get();
2001 variable_storage
*storage
;
2003 storage
= find_variable_storage(param
);
2006 storage
= new(mem_ctx
) variable_storage(param
, PROGRAM_TEMPORARY
,
2008 this->variables
.push_tail(storage
);
2010 this->next_temp
+= type_size(param
->type
);
2013 if (!sig
->return_type
->is_void()) {
2014 entry
->return_reg
= get_temp(sig
->return_type
);
2016 entry
->return_reg
= undef_src
;
2019 this->function_signatures
.push_tail(entry
);
2024 ir_to_mesa_visitor::visit(ir_call
*ir
)
2026 ir_to_mesa_instruction
*call_inst
;
2027 ir_function_signature
*sig
= ir
->get_callee();
2028 function_entry
*entry
= get_function_signature(sig
);
2031 /* Process in parameters. */
2032 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2033 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2034 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2035 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2037 if (param
->mode
== ir_var_in
||
2038 param
->mode
== ir_var_inout
) {
2039 variable_storage
*storage
= find_variable_storage(param
);
2042 param_rval
->accept(this);
2043 src_reg r
= this->result
;
2046 l
.file
= storage
->file
;
2047 l
.index
= storage
->index
;
2049 l
.writemask
= WRITEMASK_XYZW
;
2050 l
.cond_mask
= COND_TR
;
2052 for (i
= 0; i
< type_size(param
->type
); i
++) {
2053 emit(ir
, OPCODE_MOV
, l
, r
);
2061 assert(!sig_iter
.has_next());
2063 /* Emit call instruction */
2064 call_inst
= emit(ir
, OPCODE_CAL
);
2065 call_inst
->function
= entry
;
2067 /* Process out parameters. */
2068 sig_iter
= sig
->parameters
.iterator();
2069 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2070 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2071 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2073 if (param
->mode
== ir_var_out
||
2074 param
->mode
== ir_var_inout
) {
2075 variable_storage
*storage
= find_variable_storage(param
);
2079 r
.file
= storage
->file
;
2080 r
.index
= storage
->index
;
2082 r
.swizzle
= SWIZZLE_NOOP
;
2085 param_rval
->accept(this);
2086 dst_reg l
= dst_reg(this->result
);
2088 for (i
= 0; i
< type_size(param
->type
); i
++) {
2089 emit(ir
, OPCODE_MOV
, l
, r
);
2097 assert(!sig_iter
.has_next());
2099 /* Process return value. */
2100 this->result
= entry
->return_reg
;
2104 ir_to_mesa_visitor::visit(ir_texture
*ir
)
2106 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
2107 dst_reg result_dst
, coord_dst
;
2108 ir_to_mesa_instruction
*inst
= NULL
;
2109 prog_opcode opcode
= OPCODE_NOP
;
2111 if (ir
->op
== ir_txs
)
2112 this->result
= src_reg_for_float(0.0);
2114 ir
->coordinate
->accept(this);
2116 /* Put our coords in a temp. We'll need to modify them for shadow,
2117 * projection, or LOD, so the only case we'd use it as is is if
2118 * we're doing plain old texturing. Mesa IR optimization should
2119 * handle cleaning up our mess in that case.
2121 coord
= get_temp(glsl_type::vec4_type
);
2122 coord_dst
= dst_reg(coord
);
2123 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2125 if (ir
->projector
) {
2126 ir
->projector
->accept(this);
2127 projector
= this->result
;
2130 /* Storage for our result. Ideally for an assignment we'd be using
2131 * the actual storage for the result here, instead.
2133 result_src
= get_temp(glsl_type::vec4_type
);
2134 result_dst
= dst_reg(result_src
);
2139 opcode
= OPCODE_TEX
;
2142 opcode
= OPCODE_TXB
;
2143 ir
->lod_info
.bias
->accept(this);
2144 lod_info
= this->result
;
2147 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2149 opcode
= OPCODE_TXL
;
2150 ir
->lod_info
.lod
->accept(this);
2151 lod_info
= this->result
;
2154 opcode
= OPCODE_TXD
;
2155 ir
->lod_info
.grad
.dPdx
->accept(this);
2157 ir
->lod_info
.grad
.dPdy
->accept(this);
2162 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2164 if (ir
->projector
) {
2165 if (opcode
== OPCODE_TEX
) {
2166 /* Slot the projector in as the last component of the coord. */
2167 coord_dst
.writemask
= WRITEMASK_W
;
2168 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2169 coord_dst
.writemask
= WRITEMASK_XYZW
;
2170 opcode
= OPCODE_TXP
;
2172 src_reg coord_w
= coord
;
2173 coord_w
.swizzle
= SWIZZLE_WWWW
;
2175 /* For the other TEX opcodes there's no projective version
2176 * since the last slot is taken up by lod info. Do the
2177 * projective divide now.
2179 coord_dst
.writemask
= WRITEMASK_W
;
2180 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2182 /* In the case where we have to project the coordinates "by hand,"
2183 * the shadow comparitor value must also be projected.
2185 src_reg tmp_src
= coord
;
2186 if (ir
->shadow_comparitor
) {
2187 /* Slot the shadow value in as the second to last component of the
2190 ir
->shadow_comparitor
->accept(this);
2192 tmp_src
= get_temp(glsl_type::vec4_type
);
2193 dst_reg tmp_dst
= dst_reg(tmp_src
);
2195 /* Projective division not allowed for array samplers. */
2196 assert(!sampler_type
->sampler_array
);
2198 tmp_dst
.writemask
= WRITEMASK_Z
;
2199 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2201 tmp_dst
.writemask
= WRITEMASK_XY
;
2202 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2205 coord_dst
.writemask
= WRITEMASK_XYZ
;
2206 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2208 coord_dst
.writemask
= WRITEMASK_XYZW
;
2209 coord
.swizzle
= SWIZZLE_XYZW
;
2213 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2214 * comparitor was put in the correct place (and projected) by the code,
2215 * above, that handles by-hand projection.
2217 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2218 /* Slot the shadow value in as the second to last component of the
2221 ir
->shadow_comparitor
->accept(this);
2223 /* XXX This will need to be updated for cubemap array samplers. */
2224 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2225 sampler_type
->sampler_array
) {
2226 coord_dst
.writemask
= WRITEMASK_W
;
2228 coord_dst
.writemask
= WRITEMASK_Z
;
2231 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2232 coord_dst
.writemask
= WRITEMASK_XYZW
;
2235 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2236 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2237 coord_dst
.writemask
= WRITEMASK_W
;
2238 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2239 coord_dst
.writemask
= WRITEMASK_XYZW
;
2242 if (opcode
== OPCODE_TXD
)
2243 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2245 inst
= emit(ir
, opcode
, result_dst
, coord
);
2247 if (ir
->shadow_comparitor
)
2248 inst
->tex_shadow
= GL_TRUE
;
2250 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2251 this->shader_program
,
2254 switch (sampler_type
->sampler_dimensionality
) {
2255 case GLSL_SAMPLER_DIM_1D
:
2256 inst
->tex_target
= (sampler_type
->sampler_array
)
2257 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2259 case GLSL_SAMPLER_DIM_2D
:
2260 inst
->tex_target
= (sampler_type
->sampler_array
)
2261 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2263 case GLSL_SAMPLER_DIM_3D
:
2264 inst
->tex_target
= TEXTURE_3D_INDEX
;
2266 case GLSL_SAMPLER_DIM_CUBE
:
2267 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2269 case GLSL_SAMPLER_DIM_RECT
:
2270 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2272 case GLSL_SAMPLER_DIM_BUF
:
2273 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2276 assert(!"Should not get here.");
2279 this->result
= result_src
;
2283 ir_to_mesa_visitor::visit(ir_return
*ir
)
2285 if (ir
->get_value()) {
2289 assert(current_function
);
2291 ir
->get_value()->accept(this);
2292 src_reg r
= this->result
;
2294 l
= dst_reg(current_function
->return_reg
);
2296 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2297 emit(ir
, OPCODE_MOV
, l
, r
);
2303 emit(ir
, OPCODE_RET
);
2307 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2309 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
2311 if (ir
->condition
) {
2312 ir
->condition
->accept(this);
2313 this->result
.negate
= ~this->result
.negate
;
2314 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2316 emit(ir
, OPCODE_KIL_NV
);
2319 fp
->UsesKill
= GL_TRUE
;
2323 ir_to_mesa_visitor::visit(ir_if
*ir
)
2325 ir_to_mesa_instruction
*cond_inst
, *if_inst
;
2326 ir_to_mesa_instruction
*prev_inst
;
2328 prev_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2330 ir
->condition
->accept(this);
2331 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2333 if (this->options
->EmitCondCodes
) {
2334 cond_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2336 /* See if we actually generated any instruction for generating
2337 * the condition. If not, then cook up a move to a temp so we
2338 * have something to set cond_update on.
2340 if (cond_inst
== prev_inst
) {
2341 src_reg temp
= get_temp(glsl_type::bool_type
);
2342 cond_inst
= emit(ir
->condition
, OPCODE_MOV
, dst_reg(temp
), result
);
2344 cond_inst
->cond_update
= GL_TRUE
;
2346 if_inst
= emit(ir
->condition
, OPCODE_IF
);
2347 if_inst
->dst
.cond_mask
= COND_NE
;
2349 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2352 this->instructions
.push_tail(if_inst
);
2354 visit_exec_list(&ir
->then_instructions
, this);
2356 if (!ir
->else_instructions
.is_empty()) {
2357 emit(ir
->condition
, OPCODE_ELSE
);
2358 visit_exec_list(&ir
->else_instructions
, this);
2361 if_inst
= emit(ir
->condition
, OPCODE_ENDIF
);
2364 ir_to_mesa_visitor::ir_to_mesa_visitor()
2366 result
.file
= PROGRAM_UNDEFINED
;
2368 next_signature_id
= 1;
2369 current_function
= NULL
;
2370 mem_ctx
= ralloc_context(NULL
);
2373 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2375 ralloc_free(mem_ctx
);
2378 static struct prog_src_register
2379 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2381 struct prog_src_register mesa_reg
;
2383 mesa_reg
.File
= reg
.file
;
2384 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2385 mesa_reg
.Index
= reg
.index
;
2386 mesa_reg
.Swizzle
= reg
.swizzle
;
2387 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2388 mesa_reg
.Negate
= reg
.negate
;
2390 mesa_reg
.HasIndex2
= GL_FALSE
;
2391 mesa_reg
.RelAddr2
= 0;
2392 mesa_reg
.Index2
= 0;
2398 set_branchtargets(ir_to_mesa_visitor
*v
,
2399 struct prog_instruction
*mesa_instructions
,
2400 int num_instructions
)
2402 int if_count
= 0, loop_count
= 0;
2403 int *if_stack
, *loop_stack
;
2404 int if_stack_pos
= 0, loop_stack_pos
= 0;
2407 for (i
= 0; i
< num_instructions
; i
++) {
2408 switch (mesa_instructions
[i
].Opcode
) {
2412 case OPCODE_BGNLOOP
:
2417 mesa_instructions
[i
].BranchTarget
= -1;
2424 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2425 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2427 for (i
= 0; i
< num_instructions
; i
++) {
2428 switch (mesa_instructions
[i
].Opcode
) {
2430 if_stack
[if_stack_pos
] = i
;
2434 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2435 if_stack
[if_stack_pos
- 1] = i
;
2438 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2441 case OPCODE_BGNLOOP
:
2442 loop_stack
[loop_stack_pos
] = i
;
2445 case OPCODE_ENDLOOP
:
2447 /* Rewrite any breaks/conts at this nesting level (haven't
2448 * already had a BranchTarget assigned) to point to the end
2451 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2452 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2453 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2454 if (mesa_instructions
[j
].BranchTarget
== -1) {
2455 mesa_instructions
[j
].BranchTarget
= i
;
2459 /* The loop ends point at each other. */
2460 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2461 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2464 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
2465 function_entry
*entry
= (function_entry
*)iter
.get();
2467 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2468 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2480 print_program(struct prog_instruction
*mesa_instructions
,
2481 ir_instruction
**mesa_instruction_annotation
,
2482 int num_instructions
)
2484 ir_instruction
*last_ir
= NULL
;
2488 for (i
= 0; i
< num_instructions
; i
++) {
2489 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2490 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2492 fprintf(stdout
, "%3d: ", i
);
2494 if (last_ir
!= ir
&& ir
) {
2497 for (j
= 0; j
< indent
; j
++) {
2498 fprintf(stdout
, " ");
2504 fprintf(stdout
, " "); /* line number spacing. */
2507 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2508 PROG_PRINT_DEBUG
, NULL
);
2514 * Count resources used by the given gpu program (number of texture
2518 count_resources(struct gl_program
*prog
)
2522 prog
->SamplersUsed
= 0;
2524 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
2525 struct prog_instruction
*inst
= &prog
->Instructions
[i
];
2527 if (_mesa_is_tex_instruction(inst
->Opcode
)) {
2528 prog
->SamplerTargets
[inst
->TexSrcUnit
] =
2529 (gl_texture_index
)inst
->TexSrcTarget
;
2530 prog
->SamplersUsed
|= 1 << inst
->TexSrcUnit
;
2531 if (inst
->TexShadow
) {
2532 prog
->ShadowSamplers
|= 1 << inst
->TexSrcUnit
;
2537 _mesa_update_shader_textures_used(prog
);
2542 * Check if the given vertex/fragment/shader program is within the
2543 * resource limits of the context (number of texture units, etc).
2544 * If any of those checks fail, record a linker error.
2546 * XXX more checks are needed...
2549 check_resources(const struct gl_context
*ctx
,
2550 struct gl_shader_program
*shader_program
,
2551 struct gl_program
*prog
)
2553 switch (prog
->Target
) {
2554 case GL_VERTEX_PROGRAM_ARB
:
2555 if (_mesa_bitcount(prog
->SamplersUsed
) >
2556 ctx
->Const
.MaxVertexTextureImageUnits
) {
2557 linker_error(shader_program
,
2558 "Too many vertex shader texture samplers");
2560 if (prog
->Parameters
->NumParameters
> MAX_UNIFORMS
) {
2561 linker_error(shader_program
, "Too many vertex shader constants");
2564 case MESA_GEOMETRY_PROGRAM
:
2565 if (_mesa_bitcount(prog
->SamplersUsed
) >
2566 ctx
->Const
.MaxGeometryTextureImageUnits
) {
2567 linker_error(shader_program
,
2568 "Too many geometry shader texture samplers");
2570 if (prog
->Parameters
->NumParameters
>
2571 MAX_GEOMETRY_UNIFORM_COMPONENTS
/ 4) {
2572 linker_error(shader_program
, "Too many geometry shader constants");
2575 case GL_FRAGMENT_PROGRAM_ARB
:
2576 if (_mesa_bitcount(prog
->SamplersUsed
) >
2577 ctx
->Const
.MaxTextureImageUnits
) {
2578 linker_error(shader_program
,
2579 "Too many fragment shader texture samplers");
2581 if (prog
->Parameters
->NumParameters
> MAX_UNIFORMS
) {
2582 linker_error(shader_program
, "Too many fragment shader constants");
2586 _mesa_problem(ctx
, "unexpected program type in check_resources()");
2592 struct uniform_sort
{
2593 struct gl_uniform
*u
;
2597 /* The shader_program->Uniforms list is almost sorted in increasing
2598 * uniform->{Frag,Vert}Pos locations, but not quite when there are
2599 * uniforms shared between targets. We need to add parameters in
2600 * increasing order for the targets.
2603 sort_uniforms(const void *a
, const void *b
)
2605 struct uniform_sort
*u1
= (struct uniform_sort
*)a
;
2606 struct uniform_sort
*u2
= (struct uniform_sort
*)b
;
2608 return u1
->pos
- u2
->pos
;
2611 /* Add the uniforms to the parameters. The linker chose locations
2612 * in our parameters lists (which weren't created yet), which the
2613 * uniforms code will use to poke values into our parameters list
2614 * when uniforms are updated.
2617 add_uniforms_to_parameters_list(struct gl_shader_program
*shader_program
,
2618 struct gl_shader
*shader
,
2619 struct gl_program
*prog
)
2622 unsigned int next_sampler
= 0, num_uniforms
= 0;
2623 struct uniform_sort
*sorted_uniforms
;
2625 sorted_uniforms
= ralloc_array(NULL
, struct uniform_sort
,
2626 shader_program
->Uniforms
->NumUniforms
);
2628 for (i
= 0; i
< shader_program
->Uniforms
->NumUniforms
; i
++) {
2629 struct gl_uniform
*uniform
= shader_program
->Uniforms
->Uniforms
+ i
;
2630 int parameter_index
= -1;
2632 switch (shader
->Type
) {
2633 case GL_VERTEX_SHADER
:
2634 parameter_index
= uniform
->VertPos
;
2636 case GL_FRAGMENT_SHADER
:
2637 parameter_index
= uniform
->FragPos
;
2639 case GL_GEOMETRY_SHADER
:
2640 parameter_index
= uniform
->GeomPos
;
2644 /* Only add uniforms used in our target. */
2645 if (parameter_index
!= -1) {
2646 sorted_uniforms
[num_uniforms
].pos
= parameter_index
;
2647 sorted_uniforms
[num_uniforms
].u
= uniform
;
2652 qsort(sorted_uniforms
, num_uniforms
, sizeof(struct uniform_sort
),
2655 for (i
= 0; i
< num_uniforms
; i
++) {
2656 struct gl_uniform
*uniform
= sorted_uniforms
[i
].u
;
2657 int parameter_index
= sorted_uniforms
[i
].pos
;
2658 const glsl_type
*type
= uniform
->Type
;
2661 if (type
->is_vector() ||
2662 type
->is_scalar()) {
2663 size
= type
->vector_elements
;
2665 size
= type_size(type
) * 4;
2668 gl_register_file file
;
2669 if (type
->is_sampler() ||
2670 (type
->is_array() && type
->fields
.array
->is_sampler())) {
2671 file
= PROGRAM_SAMPLER
;
2673 file
= PROGRAM_UNIFORM
;
2676 GLint index
= _mesa_lookup_parameter_index(prog
->Parameters
, -1,
2680 index
= _mesa_add_parameter(prog
->Parameters
, file
,
2681 uniform
->Name
, size
, type
->gl_type
,
2684 /* Sampler uniform values are stored in prog->SamplerUnits,
2685 * and the entry in that array is selected by this index we
2686 * store in ParameterValues[].
2688 if (file
== PROGRAM_SAMPLER
) {
2689 for (unsigned int j
= 0; j
< size
/ 4; j
++)
2690 prog
->Parameters
->ParameterValues
[index
+ j
][0].f
= next_sampler
++;
2693 /* The location chosen in the Parameters list here (returned
2694 * from _mesa_add_uniform) has to match what the linker chose.
2696 if (index
!= parameter_index
) {
2697 linker_error(shader_program
,
2698 "Allocation of uniform `%s' to target failed "
2700 uniform
->Name
, index
, parameter_index
);
2705 ralloc_free(sorted_uniforms
);
2709 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
2710 struct gl_shader_program
*shader_program
,
2711 const char *name
, const glsl_type
*type
,
2714 if (type
->is_record()) {
2715 ir_constant
*field_constant
;
2717 field_constant
= (ir_constant
*)val
->components
.get_head();
2719 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2720 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
2721 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
2722 type
->fields
.structure
[i
].name
);
2723 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
2724 field_type
, field_constant
);
2725 field_constant
= (ir_constant
*)field_constant
->next
;
2730 int loc
= _mesa_get_uniform_location(ctx
, shader_program
, name
);
2733 linker_error(shader_program
,
2734 "Couldn't find uniform for initializer %s\n", name
);
2738 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
2739 ir_constant
*element
;
2740 const glsl_type
*element_type
;
2741 if (type
->is_array()) {
2742 element
= val
->array_elements
[i
];
2743 element_type
= type
->fields
.array
;
2746 element_type
= type
;
2751 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
2752 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
2753 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
2754 conv
[j
] = element
->value
.b
[j
];
2756 values
= (void *)conv
;
2757 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
2758 element_type
->vector_elements
,
2761 values
= &element
->value
;
2764 if (element_type
->is_matrix()) {
2765 _mesa_uniform_matrix(ctx
, shader_program
,
2766 element_type
->matrix_columns
,
2767 element_type
->vector_elements
,
2768 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
2769 loc
+= element_type
->matrix_columns
;
2771 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
2772 values
, element_type
->gl_type
);
2773 loc
+= type_size(element_type
);
2779 set_uniform_initializers(struct gl_context
*ctx
,
2780 struct gl_shader_program
*shader_program
)
2782 void *mem_ctx
= NULL
;
2784 for (unsigned int i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
2785 struct gl_shader
*shader
= shader_program
->_LinkedShaders
[i
];
2790 foreach_iter(exec_list_iterator
, iter
, *shader
->ir
) {
2791 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
2792 ir_variable
*var
= ir
->as_variable();
2794 if (!var
|| var
->mode
!= ir_var_uniform
|| !var
->constant_value
)
2798 mem_ctx
= ralloc_context(NULL
);
2800 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, var
->name
,
2801 var
->type
, var
->constant_value
);
2805 ralloc_free(mem_ctx
);
2809 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2810 * channels for copy propagation and updates following instructions to
2811 * use the original versions.
2813 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2814 * will occur. As an example, a TXP production before this pass:
2816 * 0: MOV TEMP[1], INPUT[4].xyyy;
2817 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2818 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2822 * 0: MOV TEMP[1], INPUT[4].xyyy;
2823 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2824 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2826 * which allows for dead code elimination on TEMP[1]'s writes.
2829 ir_to_mesa_visitor::copy_propagate(void)
2831 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2832 ir_to_mesa_instruction
*,
2833 this->next_temp
* 4);
2834 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2837 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
2838 ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
2840 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2841 || inst
->dst
.index
< this->next_temp
);
2843 /* First, do any copy propagation possible into the src regs. */
2844 for (int r
= 0; r
< 3; r
++) {
2845 ir_to_mesa_instruction
*first
= NULL
;
2847 int acp_base
= inst
->src
[r
].index
* 4;
2849 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2850 inst
->src
[r
].reladdr
)
2853 /* See if we can find entries in the ACP consisting of MOVs
2854 * from the same src register for all the swizzled channels
2855 * of this src register reference.
2857 for (int i
= 0; i
< 4; i
++) {
2858 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2859 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2866 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2871 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2872 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2880 /* We've now validated that we can copy-propagate to
2881 * replace this src register reference. Do it.
2883 inst
->src
[r
].file
= first
->src
[0].file
;
2884 inst
->src
[r
].index
= first
->src
[0].index
;
2887 for (int i
= 0; i
< 4; i
++) {
2888 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2889 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2890 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2893 inst
->src
[r
].swizzle
= swizzle
;
2898 case OPCODE_BGNLOOP
:
2899 case OPCODE_ENDLOOP
:
2900 /* End of a basic block, clear the ACP entirely. */
2901 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2910 /* Clear all channels written inside the block from the ACP, but
2911 * leaving those that were not touched.
2913 for (int r
= 0; r
< this->next_temp
; r
++) {
2914 for (int c
= 0; c
< 4; c
++) {
2915 if (!acp
[4 * r
+ c
])
2918 if (acp_level
[4 * r
+ c
] >= level
)
2919 acp
[4 * r
+ c
] = NULL
;
2922 if (inst
->op
== OPCODE_ENDIF
)
2927 /* Continuing the block, clear any written channels from
2930 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2931 /* Any temporary might be written, so no copy propagation
2932 * across this instruction.
2934 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2935 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2936 inst
->dst
.reladdr
) {
2937 /* Any output might be written, so no copy propagation
2938 * from outputs across this instruction.
2940 for (int r
= 0; r
< this->next_temp
; r
++) {
2941 for (int c
= 0; c
< 4; c
++) {
2942 if (!acp
[4 * r
+ c
])
2945 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2946 acp
[4 * r
+ c
] = NULL
;
2949 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2950 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2951 /* Clear where it's used as dst. */
2952 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2953 for (int c
= 0; c
< 4; c
++) {
2954 if (inst
->dst
.writemask
& (1 << c
)) {
2955 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2960 /* Clear where it's used as src. */
2961 for (int r
= 0; r
< this->next_temp
; r
++) {
2962 for (int c
= 0; c
< 4; c
++) {
2963 if (!acp
[4 * r
+ c
])
2966 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2968 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2969 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2970 inst
->dst
.writemask
& (1 << src_chan
))
2972 acp
[4 * r
+ c
] = NULL
;
2980 /* If this is a copy, add it to the ACP. */
2981 if (inst
->op
== OPCODE_MOV
&&
2982 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2983 !inst
->dst
.reladdr
&&
2985 !inst
->src
[0].reladdr
&&
2986 !inst
->src
[0].negate
) {
2987 for (int i
= 0; i
< 4; i
++) {
2988 if (inst
->dst
.writemask
& (1 << i
)) {
2989 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2990 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2996 ralloc_free(acp_level
);
3002 * Convert a shader's GLSL IR into a Mesa gl_program.
3004 static struct gl_program
*
3005 get_mesa_program(struct gl_context
*ctx
,
3006 struct gl_shader_program
*shader_program
,
3007 struct gl_shader
*shader
)
3009 ir_to_mesa_visitor v
;
3010 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
3011 ir_instruction
**mesa_instruction_annotation
;
3013 struct gl_program
*prog
;
3015 const char *target_string
;
3017 struct gl_shader_compiler_options
*options
=
3018 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
3020 switch (shader
->Type
) {
3021 case GL_VERTEX_SHADER
:
3022 target
= GL_VERTEX_PROGRAM_ARB
;
3023 target_string
= "vertex";
3025 case GL_FRAGMENT_SHADER
:
3026 target
= GL_FRAGMENT_PROGRAM_ARB
;
3027 target_string
= "fragment";
3029 case GL_GEOMETRY_SHADER
:
3030 target
= GL_GEOMETRY_PROGRAM_NV
;
3031 target_string
= "geometry";
3034 assert(!"should not be reached");
3038 validate_ir_tree(shader
->ir
);
3040 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
3043 prog
->Parameters
= _mesa_new_parameter_list();
3046 v
.shader_program
= shader_program
;
3047 v
.options
= options
;
3049 add_uniforms_to_parameters_list(shader_program
, shader
, prog
);
3051 /* Emit Mesa IR for main(). */
3052 visit_exec_list(shader
->ir
, &v
);
3053 v
.emit(NULL
, OPCODE_END
);
3055 /* Now emit bodies for any functions that were used. */
3057 progress
= GL_FALSE
;
3059 foreach_iter(exec_list_iterator
, iter
, v
.function_signatures
) {
3060 function_entry
*entry
= (function_entry
*)iter
.get();
3062 if (!entry
->bgn_inst
) {
3063 v
.current_function
= entry
;
3065 entry
->bgn_inst
= v
.emit(NULL
, OPCODE_BGNSUB
);
3066 entry
->bgn_inst
->function
= entry
;
3068 visit_exec_list(&entry
->sig
->body
, &v
);
3070 ir_to_mesa_instruction
*last
;
3071 last
= (ir_to_mesa_instruction
*)v
.instructions
.get_tail();
3072 if (last
->op
!= OPCODE_RET
)
3073 v
.emit(NULL
, OPCODE_RET
);
3075 ir_to_mesa_instruction
*end
;
3076 end
= v
.emit(NULL
, OPCODE_ENDSUB
);
3077 end
->function
= entry
;
3084 prog
->NumTemporaries
= v
.next_temp
;
3086 int num_instructions
= 0;
3087 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
3092 (struct prog_instruction
*)calloc(num_instructions
,
3093 sizeof(*mesa_instructions
));
3094 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
3099 /* Convert ir_mesa_instructions into prog_instructions.
3101 mesa_inst
= mesa_instructions
;
3103 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
3104 const ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
3106 mesa_inst
->Opcode
= inst
->op
;
3107 mesa_inst
->CondUpdate
= inst
->cond_update
;
3109 mesa_inst
->SaturateMode
= SATURATE_ZERO_ONE
;
3110 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
3111 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
3112 mesa_inst
->DstReg
.CondMask
= inst
->dst
.cond_mask
;
3113 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
3114 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
3115 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
3116 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
3117 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
3118 mesa_inst
->TexSrcUnit
= inst
->sampler
;
3119 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
3120 mesa_inst
->TexShadow
= inst
->tex_shadow
;
3121 mesa_instruction_annotation
[i
] = inst
->ir
;
3123 /* Set IndirectRegisterFiles. */
3124 if (mesa_inst
->DstReg
.RelAddr
)
3125 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
3127 /* Update program's bitmask of indirectly accessed register files */
3128 for (unsigned src
= 0; src
< 3; src
++)
3129 if (mesa_inst
->SrcReg
[src
].RelAddr
)
3130 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
3132 switch (mesa_inst
->Opcode
) {
3134 if (options
->MaxIfDepth
== 0) {
3135 linker_warning(shader_program
,
3136 "Couldn't flatten if-statement. "
3137 "This will likely result in software "
3138 "rasterization.\n");
3141 case OPCODE_BGNLOOP
:
3142 if (options
->EmitNoLoops
) {
3143 linker_warning(shader_program
,
3144 "Couldn't unroll loop. "
3145 "This will likely result in software "
3146 "rasterization.\n");
3150 if (options
->EmitNoCont
) {
3151 linker_warning(shader_program
,
3152 "Couldn't lower continue-statement. "
3153 "This will likely result in software "
3154 "rasterization.\n");
3158 inst
->function
->inst
= i
;
3159 mesa_inst
->Comment
= strdup(inst
->function
->sig
->function_name());
3162 mesa_inst
->Comment
= strdup(inst
->function
->sig
->function_name());
3165 mesa_inst
->BranchTarget
= inst
->function
->sig_id
; /* rewritten later */
3168 prog
->NumAddressRegs
= 1;
3177 if (!shader_program
->LinkStatus
)
3181 if (!shader_program
->LinkStatus
) {
3182 free(mesa_instructions
);
3183 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
3187 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
3189 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3191 printf("GLSL IR for linked %s program %d:\n", target_string
,
3192 shader_program
->Name
);
3193 _mesa_print_ir(shader
->ir
, NULL
);
3196 printf("Mesa IR for linked %s program %d:\n", target_string
,
3197 shader_program
->Name
);
3198 print_program(mesa_instructions
, mesa_instruction_annotation
,
3202 prog
->Instructions
= mesa_instructions
;
3203 prog
->NumInstructions
= num_instructions
;
3205 do_set_program_inouts(shader
->ir
, prog
);
3206 count_resources(prog
);
3208 check_resources(ctx
, shader_program
, prog
);
3210 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
3212 if ((ctx
->Shader
.Flags
& GLSL_NO_OPT
) == 0) {
3213 _mesa_optimize_program(ctx
, prog
);
3223 * Called via ctx->Driver.LinkShader()
3224 * This actually involves converting GLSL IR into Mesa gl_programs with
3225 * code lowering and other optimizations.
3228 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3230 assert(prog
->LinkStatus
);
3232 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
3233 if (prog
->_LinkedShaders
[i
] == NULL
)
3237 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3238 const struct gl_shader_compiler_options
*options
=
3239 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
3245 do_mat_op_to_vec(ir
);
3246 lower_instructions(ir
, (MOD_TO_FRACT
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3247 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3248 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3250 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
3252 progress
= do_common_optimization(ir
, true, options
->MaxUnrollIterations
) || progress
;
3254 progress
= lower_quadop_vector(ir
, true) || progress
;
3256 if (options
->MaxIfDepth
== 0)
3257 progress
= lower_discard(ir
) || progress
;
3259 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
3261 if (options
->EmitNoNoise
)
3262 progress
= lower_noise(ir
) || progress
;
3264 /* If there are forms of indirect addressing that the driver
3265 * cannot handle, perform the lowering pass.
3267 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3268 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3270 lower_variable_index_to_cond_assign(ir
,
3271 options
->EmitNoIndirectInput
,
3272 options
->EmitNoIndirectOutput
,
3273 options
->EmitNoIndirectTemp
,
3274 options
->EmitNoIndirectUniform
)
3277 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3280 validate_ir_tree(ir
);
3283 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
3284 struct gl_program
*linked_prog
;
3286 if (prog
->_LinkedShaders
[i
] == NULL
)
3289 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3292 static const GLenum targets
[] = {
3293 GL_VERTEX_PROGRAM_ARB
,
3294 GL_FRAGMENT_PROGRAM_ARB
,
3295 GL_GEOMETRY_PROGRAM_NV
3298 if (i
== MESA_SHADER_VERTEX
) {
3299 ((struct gl_vertex_program
*)linked_prog
)->UsesClipDistance
3300 = prog
->Vert
.UsesClipDistance
;
3303 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3305 if (!ctx
->Driver
.ProgramStringNotify(ctx
, targets
[i
], linked_prog
)) {
3310 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
3318 * Compile a GLSL shader. Called via glCompileShader().
3321 _mesa_glsl_compile_shader(struct gl_context
*ctx
, struct gl_shader
*shader
)
3323 struct _mesa_glsl_parse_state
*state
=
3324 new(shader
) _mesa_glsl_parse_state(ctx
, shader
->Type
, shader
);
3326 const char *source
= shader
->Source
;
3327 /* Check if the user called glCompileShader without first calling
3328 * glShaderSource. This should fail to compile, but not raise a GL_ERROR.
3330 if (source
== NULL
) {
3331 shader
->CompileStatus
= GL_FALSE
;
3335 state
->error
= preprocess(state
, &source
, &state
->info_log
,
3336 &ctx
->Extensions
, ctx
->API
);
3338 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3339 printf("GLSL source for %s shader %d:\n",
3340 _mesa_glsl_shader_target_name(state
->target
), shader
->Name
);
3341 printf("%s\n", shader
->Source
);
3344 if (!state
->error
) {
3345 _mesa_glsl_lexer_ctor(state
, source
);
3346 _mesa_glsl_parse(state
);
3347 _mesa_glsl_lexer_dtor(state
);
3350 ralloc_free(shader
->ir
);
3351 shader
->ir
= new(shader
) exec_list
;
3352 if (!state
->error
&& !state
->translation_unit
.is_empty())
3353 _mesa_ast_to_hir(shader
->ir
, state
);
3355 if (!state
->error
&& !shader
->ir
->is_empty()) {
3356 validate_ir_tree(shader
->ir
);
3358 /* Do some optimization at compile time to reduce shader IR size
3359 * and reduce later work if the same shader is linked multiple times
3361 while (do_common_optimization(shader
->ir
, false, 32))
3364 validate_ir_tree(shader
->ir
);
3367 shader
->symbols
= state
->symbols
;
3369 shader
->CompileStatus
= !state
->error
;
3370 shader
->InfoLog
= state
->info_log
;
3371 shader
->Version
= state
->language_version
;
3372 memcpy(shader
->builtins_to_link
, state
->builtins_to_link
,
3373 sizeof(shader
->builtins_to_link
[0]) * state
->num_builtins_to_link
);
3374 shader
->num_builtins_to_link
= state
->num_builtins_to_link
;
3376 if (ctx
->Shader
.Flags
& GLSL_LOG
) {
3377 _mesa_write_shader_to_file(shader
);
3380 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3381 if (shader
->CompileStatus
) {
3382 printf("GLSL IR for shader %d:\n", shader
->Name
);
3383 _mesa_print_ir(shader
->ir
, NULL
);
3386 printf("GLSL shader %d failed to compile.\n", shader
->Name
);
3388 if (shader
->InfoLog
&& shader
->InfoLog
[0] != 0) {
3389 printf("GLSL shader %d info log:\n", shader
->Name
);
3390 printf("%s\n", shader
->InfoLog
);
3394 /* Retain any live IR, but trash the rest. */
3395 reparent_ir(shader
->ir
, shader
->ir
);
3402 * Link a GLSL shader program. Called via glLinkProgram().
3405 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3409 _mesa_clear_shader_program_data(ctx
, prog
);
3411 prog
->LinkStatus
= GL_TRUE
;
3413 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3414 if (!prog
->Shaders
[i
]->CompileStatus
) {
3415 linker_error(prog
, "linking with uncompiled shader");
3416 prog
->LinkStatus
= GL_FALSE
;
3420 if (prog
->LinkStatus
) {
3421 link_shaders(ctx
, prog
);
3424 if (prog
->LinkStatus
) {
3425 if (!ctx
->Driver
.LinkShader(ctx
, prog
)) {
3426 prog
->LinkStatus
= GL_FALSE
;
3430 set_uniform_initializers(ctx
, prog
);
3432 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3433 if (!prog
->LinkStatus
) {
3434 printf("GLSL shader program %d failed to link\n", prog
->Name
);
3437 if (prog
->InfoLog
&& prog
->InfoLog
[0] != 0) {
3438 printf("GLSL shader program %d info log:\n", prog
->Name
);
3439 printf("%s\n", prog
->InfoLog
);