2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
34 #include "main/macros.h"
35 #include "main/mtypes.h"
36 #include "main/shaderapi.h"
37 #include "main/shaderobj.h"
38 #include "main/uniforms.h"
39 #include "compiler/glsl/ast.h"
40 #include "compiler/glsl/ir.h"
41 #include "compiler/glsl/ir_expression_flattening.h"
42 #include "compiler/glsl/ir_visitor.h"
43 #include "compiler/glsl/ir_optimization.h"
44 #include "compiler/glsl/ir_uniform.h"
45 #include "compiler/glsl/glsl_parser_extras.h"
46 #include "compiler/glsl_types.h"
47 #include "compiler/glsl/linker.h"
48 #include "compiler/glsl/program.h"
49 #include "compiler/glsl/shader_cache.h"
50 #include "program/prog_instruction.h"
51 #include "program/prog_optimize.h"
52 #include "program/prog_print.h"
53 #include "program/program.h"
54 #include "program/prog_parameter.h"
55 #include "util/string_to_uint_map.h"
58 static int swizzle_for_size(int size
);
66 * This struct is a corresponding struct to Mesa prog_src_register, with
71 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
75 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
76 this->swizzle
= swizzle_for_size(type
->vector_elements
);
78 this->swizzle
= SWIZZLE_XYZW
;
85 this->file
= PROGRAM_UNDEFINED
;
92 explicit src_reg(dst_reg reg
);
94 gl_register_file file
; /**< PROGRAM_* from Mesa */
95 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
96 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
97 int negate
; /**< NEGATE_XYZW mask from mesa */
98 /** Register index should be offset by the integer in this reg. */
104 dst_reg(gl_register_file file
, int writemask
)
108 this->writemask
= writemask
;
109 this->reladdr
= NULL
;
114 this->file
= PROGRAM_UNDEFINED
;
117 this->reladdr
= NULL
;
120 explicit dst_reg(src_reg reg
);
122 gl_register_file file
; /**< PROGRAM_* from Mesa */
123 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
124 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
125 /** Register index should be offset by the integer in this reg. */
129 } /* anonymous namespace */
131 src_reg::src_reg(dst_reg reg
)
133 this->file
= reg
.file
;
134 this->index
= reg
.index
;
135 this->swizzle
= SWIZZLE_XYZW
;
137 this->reladdr
= reg
.reladdr
;
140 dst_reg::dst_reg(src_reg reg
)
142 this->file
= reg
.file
;
143 this->index
= reg
.index
;
144 this->writemask
= WRITEMASK_XYZW
;
145 this->reladdr
= reg
.reladdr
;
150 class ir_to_mesa_instruction
: public exec_node
{
152 DECLARE_RALLOC_CXX_OPERATORS(ir_to_mesa_instruction
)
157 /** Pointer to the ir source this tree came from for debugging */
160 int sampler
; /**< sampler index */
161 int tex_target
; /**< One of TEXTURE_*_INDEX */
162 GLboolean tex_shadow
;
165 class variable_storage
: public exec_node
{
167 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
168 : file(file
), index(index
), var(var
)
173 gl_register_file file
;
175 ir_variable
*var
; /* variable that maps to this, if any */
178 class function_entry
: public exec_node
{
180 ir_function_signature
*sig
;
183 * identifier of this function signature used by the program.
185 * At the point that Mesa instructions for function calls are
186 * generated, we don't know the address of the first instruction of
187 * the function body. So we make the BranchTarget that is called a
188 * small integer and rewrite them during set_branchtargets().
193 * Pointer to first instruction of the function body.
195 * Set during function body emits after main() is processed.
197 ir_to_mesa_instruction
*bgn_inst
;
200 * Index of the first instruction of the function body in actual
203 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
207 /** Storage for the return value. */
211 class ir_to_mesa_visitor
: public ir_visitor
{
213 ir_to_mesa_visitor();
214 ~ir_to_mesa_visitor();
216 function_entry
*current_function
;
218 struct gl_context
*ctx
;
219 struct gl_program
*prog
;
220 struct gl_shader_program
*shader_program
;
221 struct gl_shader_compiler_options
*options
;
225 variable_storage
*find_variable_storage(const ir_variable
*var
);
227 src_reg
get_temp(const glsl_type
*type
);
228 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
230 src_reg
src_reg_for_float(float val
);
233 * \name Visit methods
235 * As typical for the visitor pattern, there must be one \c visit method for
236 * each concrete subclass of \c ir_instruction. Virtual base classes within
237 * the hierarchy should not have \c visit methods.
240 virtual void visit(ir_variable
*);
241 virtual void visit(ir_loop
*);
242 virtual void visit(ir_loop_jump
*);
243 virtual void visit(ir_function_signature
*);
244 virtual void visit(ir_function
*);
245 virtual void visit(ir_expression
*);
246 virtual void visit(ir_swizzle
*);
247 virtual void visit(ir_dereference_variable
*);
248 virtual void visit(ir_dereference_array
*);
249 virtual void visit(ir_dereference_record
*);
250 virtual void visit(ir_assignment
*);
251 virtual void visit(ir_constant
*);
252 virtual void visit(ir_call
*);
253 virtual void visit(ir_return
*);
254 virtual void visit(ir_discard
*);
255 virtual void visit(ir_texture
*);
256 virtual void visit(ir_if
*);
257 virtual void visit(ir_emit_vertex
*);
258 virtual void visit(ir_end_primitive
*);
259 virtual void visit(ir_barrier
*);
264 /** List of variable_storage */
267 /** List of function_entry */
268 exec_list function_signatures
;
269 int next_signature_id
;
271 /** List of ir_to_mesa_instruction */
272 exec_list instructions
;
274 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
276 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
277 dst_reg dst
, src_reg src0
);
279 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
280 dst_reg dst
, src_reg src0
, src_reg src1
);
282 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
284 src_reg src0
, src_reg src1
, src_reg src2
);
287 * Emit the correct dot-product instruction for the type of arguments
289 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
295 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
296 dst_reg dst
, src_reg src0
);
298 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
299 dst_reg dst
, src_reg src0
, src_reg src1
);
301 bool try_emit_mad(ir_expression
*ir
,
303 bool try_emit_mad_for_and_not(ir_expression
*ir
,
306 void emit_swz(ir_expression
*ir
);
308 void emit_equality_comparison(ir_expression
*ir
, enum prog_opcode op
,
310 const src_reg
&src0
, const src_reg
&src1
);
312 inline void emit_sne(ir_expression
*ir
, dst_reg dst
,
313 const src_reg
&src0
, const src_reg
&src1
)
315 emit_equality_comparison(ir
, OPCODE_SLT
, dst
, src0
, src1
);
318 inline void emit_seq(ir_expression
*ir
, dst_reg dst
,
319 const src_reg
&src0
, const src_reg
&src1
)
321 emit_equality_comparison(ir
, OPCODE_SGE
, dst
, src0
, src1
);
324 bool process_move_condition(ir_rvalue
*ir
);
326 void copy_propagate(void);
331 } /* anonymous namespace */
333 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
335 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
337 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
340 swizzle_for_size(int size
)
342 static const int size_swizzles
[4] = {
343 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
344 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
345 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
346 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
349 assert((size
>= 1) && (size
<= 4));
350 return size_swizzles
[size
- 1];
353 ir_to_mesa_instruction
*
354 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
356 src_reg src0
, src_reg src1
, src_reg src2
)
358 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
361 /* If we have to do relative addressing, we want to load the ARL
362 * reg directly for one of the regs, and preload the other reladdr
363 * sources into temps.
365 num_reladdr
+= dst
.reladdr
!= NULL
;
366 num_reladdr
+= src0
.reladdr
!= NULL
;
367 num_reladdr
+= src1
.reladdr
!= NULL
;
368 num_reladdr
+= src2
.reladdr
!= NULL
;
370 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
371 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
372 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
375 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
378 assert(num_reladdr
== 0);
387 this->instructions
.push_tail(inst
);
393 ir_to_mesa_instruction
*
394 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
395 dst_reg dst
, src_reg src0
, src_reg src1
)
397 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
400 ir_to_mesa_instruction
*
401 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
402 dst_reg dst
, src_reg src0
)
404 assert(dst
.writemask
!= 0);
405 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
408 ir_to_mesa_instruction
*
409 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
411 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
414 ir_to_mesa_instruction
*
415 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
416 dst_reg dst
, src_reg src0
, src_reg src1
,
419 static const enum prog_opcode dot_opcodes
[] = {
420 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
423 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
427 * Emits Mesa scalar opcodes to produce unique answers across channels.
429 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
430 * channel determines the result across all channels. So to do a vec4
431 * of this operation, we want to emit a scalar per source channel used
432 * to produce dest channels.
435 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
437 src_reg orig_src0
, src_reg orig_src1
)
440 int done_mask
= ~dst
.writemask
;
442 /* Mesa RCP is a scalar operation splatting results to all channels,
443 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
446 for (i
= 0; i
< 4; i
++) {
447 GLuint this_mask
= (1 << i
);
448 ir_to_mesa_instruction
*inst
;
449 src_reg src0
= orig_src0
;
450 src_reg src1
= orig_src1
;
452 if (done_mask
& this_mask
)
455 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
456 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
457 for (j
= i
+ 1; j
< 4; j
++) {
458 /* If there is another enabled component in the destination that is
459 * derived from the same inputs, generate its value on this pass as
462 if (!(done_mask
& (1 << j
)) &&
463 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
464 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
465 this_mask
|= (1 << j
);
468 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
469 src0_swiz
, src0_swiz
);
470 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
471 src1_swiz
, src1_swiz
);
473 inst
= emit(ir
, op
, dst
, src0
, src1
);
474 inst
->dst
.writemask
= this_mask
;
475 done_mask
|= this_mask
;
480 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
481 dst_reg dst
, src_reg src0
)
483 src_reg undef
= undef_src
;
485 undef
.swizzle
= SWIZZLE_XXXX
;
487 emit_scalar(ir
, op
, dst
, src0
, undef
);
491 ir_to_mesa_visitor::src_reg_for_float(float val
)
493 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
495 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
496 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
502 type_size(const struct glsl_type
*type
)
507 switch (type
->base_type
) {
510 case GLSL_TYPE_FLOAT
:
512 if (type
->is_matrix()) {
513 return type
->matrix_columns
;
515 /* Regardless of size of vector, it gets a vec4. This is bad
516 * packing for things like floats, but otherwise arrays become a
517 * mess. Hopefully a later pass over the code can pack scalars
518 * down if appropriate.
523 case GLSL_TYPE_DOUBLE
:
524 if (type
->is_matrix()) {
525 if (type
->vector_elements
> 2)
526 return type
->matrix_columns
* 2;
528 return type
->matrix_columns
;
530 if (type
->vector_elements
> 2)
536 case GLSL_TYPE_UINT64
:
537 case GLSL_TYPE_INT64
:
538 if (type
->vector_elements
> 2)
542 case GLSL_TYPE_ARRAY
:
543 assert(type
->length
> 0);
544 return type_size(type
->fields
.array
) * type
->length
;
545 case GLSL_TYPE_STRUCT
:
547 for (i
= 0; i
< type
->length
; i
++) {
548 size
+= type_size(type
->fields
.structure
[i
].type
);
551 case GLSL_TYPE_SAMPLER
:
552 case GLSL_TYPE_IMAGE
:
553 case GLSL_TYPE_SUBROUTINE
:
554 /* Samplers take up one slot in UNIFORMS[], but they're baked in
558 case GLSL_TYPE_ATOMIC_UINT
:
560 case GLSL_TYPE_ERROR
:
561 case GLSL_TYPE_INTERFACE
:
562 case GLSL_TYPE_FUNCTION
:
563 assert(!"Invalid type in type_size");
571 * In the initial pass of codegen, we assign temporary numbers to
572 * intermediate results. (not SSA -- variable assignments will reuse
573 * storage). Actual register allocation for the Mesa VM occurs in a
574 * pass over the Mesa IR later.
577 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
581 src
.file
= PROGRAM_TEMPORARY
;
582 src
.index
= next_temp
;
584 next_temp
+= type_size(type
);
586 if (type
->is_array() || type
->is_record()) {
587 src
.swizzle
= SWIZZLE_NOOP
;
589 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
597 ir_to_mesa_visitor::find_variable_storage(const ir_variable
*var
)
599 foreach_in_list(variable_storage
, entry
, &this->variables
) {
600 if (entry
->var
== var
)
608 ir_to_mesa_visitor::visit(ir_variable
*ir
)
610 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
611 this->prog
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
612 this->prog
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
615 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
617 const ir_state_slot
*const slots
= ir
->get_state_slots();
618 assert(slots
!= NULL
);
620 /* Check if this statevar's setup in the STATE file exactly
621 * matches how we'll want to reference it as a
622 * struct/array/whatever. If not, then we need to move it into
623 * temporary storage and hope that it'll get copy-propagated
626 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
627 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
632 variable_storage
*storage
;
634 if (i
== ir
->get_num_state_slots()) {
635 /* We'll set the index later. */
636 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
637 this->variables
.push_tail(storage
);
641 /* The variable_storage constructor allocates slots based on the size
642 * of the type. However, this had better match the number of state
643 * elements that we're going to copy into the new temporary.
645 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
647 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
649 this->variables
.push_tail(storage
);
650 this->next_temp
+= type_size(ir
->type
);
652 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
656 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
657 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
658 (gl_state_index
*)slots
[i
].tokens
);
660 if (storage
->file
== PROGRAM_STATE_VAR
) {
661 if (storage
->index
== -1) {
662 storage
->index
= index
;
664 assert(index
== storage
->index
+ (int)i
);
667 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
668 src
.swizzle
= slots
[i
].swizzle
;
669 emit(ir
, OPCODE_MOV
, dst
, src
);
670 /* even a float takes up a whole vec4 reg in a struct/array. */
675 if (storage
->file
== PROGRAM_TEMPORARY
&&
676 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
677 linker_error(this->shader_program
,
678 "failed to load builtin uniform `%s' "
679 "(%d/%d regs loaded)\n",
680 ir
->name
, dst
.index
- storage
->index
,
681 type_size(ir
->type
));
687 ir_to_mesa_visitor::visit(ir_loop
*ir
)
689 emit(NULL
, OPCODE_BGNLOOP
);
691 visit_exec_list(&ir
->body_instructions
, this);
693 emit(NULL
, OPCODE_ENDLOOP
);
697 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
700 case ir_loop_jump::jump_break
:
701 emit(NULL
, OPCODE_BRK
);
703 case ir_loop_jump::jump_continue
:
704 emit(NULL
, OPCODE_CONT
);
711 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
718 ir_to_mesa_visitor::visit(ir_function
*ir
)
720 /* Ignore function bodies other than main() -- we shouldn't see calls to
721 * them since they should all be inlined before we get to ir_to_mesa.
723 if (strcmp(ir
->name
, "main") == 0) {
724 const ir_function_signature
*sig
;
727 sig
= ir
->matching_signature(NULL
, &empty
, false);
731 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
738 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
740 int nonmul_operand
= 1 - mul_operand
;
743 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
744 if (!expr
|| expr
->operation
!= ir_binop_mul
)
747 expr
->operands
[0]->accept(this);
749 expr
->operands
[1]->accept(this);
751 ir
->operands
[nonmul_operand
]->accept(this);
754 this->result
= get_temp(ir
->type
);
755 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
761 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
763 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
764 * implemented using multiplication, and logical-or is implemented using
765 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
766 * As result, the logical expression (a & !b) can be rewritten as:
770 * - (a * 1) - (a * b)
774 * This final expression can be implemented as a single MAD(a, -b, a)
778 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
780 const int other_operand
= 1 - try_operand
;
783 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
784 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
787 ir
->operands
[other_operand
]->accept(this);
789 expr
->operands
[0]->accept(this);
792 b
.negate
= ~b
.negate
;
794 this->result
= get_temp(ir
->type
);
795 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
801 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
802 src_reg
*reg
, int *num_reladdr
)
807 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
809 if (*num_reladdr
!= 1) {
810 src_reg temp
= get_temp(glsl_type::vec4_type
);
812 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
820 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
822 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
823 * This means that each of the operands is either an immediate value of -1,
824 * 0, or 1, or is a component from one source register (possibly with
827 uint8_t components
[4] = { 0 };
828 bool negate
[4] = { false };
829 ir_variable
*var
= NULL
;
831 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
832 ir_rvalue
*op
= ir
->operands
[i
];
834 assert(op
->type
->is_scalar());
837 switch (op
->ir_type
) {
838 case ir_type_constant
: {
840 assert(op
->type
->is_scalar());
842 const ir_constant
*const c
= op
->as_constant();
844 components
[i
] = SWIZZLE_ONE
;
845 } else if (c
->is_zero()) {
846 components
[i
] = SWIZZLE_ZERO
;
847 } else if (c
->is_negative_one()) {
848 components
[i
] = SWIZZLE_ONE
;
851 assert(!"SWZ constant must be 0.0 or 1.0.");
858 case ir_type_dereference_variable
: {
859 ir_dereference_variable
*const deref
=
860 (ir_dereference_variable
*) op
;
862 assert((var
== NULL
) || (deref
->var
== var
));
863 components
[i
] = SWIZZLE_X
;
869 case ir_type_expression
: {
870 ir_expression
*const expr
= (ir_expression
*) op
;
872 assert(expr
->operation
== ir_unop_neg
);
875 op
= expr
->operands
[0];
879 case ir_type_swizzle
: {
880 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
882 components
[i
] = swiz
->mask
.x
;
888 assert(!"Should not get here.");
896 ir_dereference_variable
*const deref
=
897 new(mem_ctx
) ir_dereference_variable(var
);
899 this->result
.file
= PROGRAM_UNDEFINED
;
901 if (this->result
.file
== PROGRAM_UNDEFINED
) {
902 printf("Failed to get tree for expression operand:\n");
911 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
915 src
.negate
= ((unsigned(negate
[0]) << 0)
916 | (unsigned(negate
[1]) << 1)
917 | (unsigned(negate
[2]) << 2)
918 | (unsigned(negate
[3]) << 3));
920 /* Storage for our result. Ideally for an assignment we'd be using the
921 * actual storage for the result here, instead.
923 const src_reg result_src
= get_temp(ir
->type
);
924 dst_reg result_dst
= dst_reg(result_src
);
926 /* Limit writes to the channels that will be used by result_src later.
927 * This does limit this temp's use as a temporary for multi-instruction
930 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
932 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
933 this->result
= result_src
;
937 ir_to_mesa_visitor::emit_equality_comparison(ir_expression
*ir
,
944 src_reg abs_difference
= get_temp(glsl_type::vec4_type
);
945 const src_reg zero
= src_reg_for_float(0.0);
947 /* x == y is equivalent to -abs(x-y) >= 0. Since all of the code that
948 * consumes the generated IR is pretty dumb, take special care when one
949 * of the operands is zero.
951 * Similarly, x != y is equivalent to -abs(x-y) < 0.
953 if (src0
.file
== zero
.file
&&
954 src0
.index
== zero
.index
&&
955 src0
.swizzle
== zero
.swizzle
) {
957 } else if (src1
.file
== zero
.file
&&
958 src1
.index
== zero
.index
&&
959 src1
.swizzle
== zero
.swizzle
) {
962 difference
= get_temp(glsl_type::vec4_type
);
964 src_reg tmp_src
= src0
;
965 tmp_src
.negate
= ~tmp_src
.negate
;
967 emit(ir
, OPCODE_ADD
, dst_reg(difference
), tmp_src
, src1
);
970 emit(ir
, OPCODE_ABS
, dst_reg(abs_difference
), difference
);
972 abs_difference
.negate
= ~abs_difference
.negate
;
973 emit(ir
, op
, dst
, abs_difference
, zero
);
977 ir_to_mesa_visitor::visit(ir_expression
*ir
)
979 unsigned int operand
;
980 src_reg op
[ARRAY_SIZE(ir
->operands
)];
984 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
986 if (ir
->operation
== ir_binop_add
) {
987 if (try_emit_mad(ir
, 1))
989 if (try_emit_mad(ir
, 0))
993 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
995 if (ir
->operation
== ir_binop_logic_and
) {
996 if (try_emit_mad_for_and_not(ir
, 1))
998 if (try_emit_mad_for_and_not(ir
, 0))
1002 if (ir
->operation
== ir_quadop_vector
) {
1007 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1008 this->result
.file
= PROGRAM_UNDEFINED
;
1009 ir
->operands
[operand
]->accept(this);
1010 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1011 printf("Failed to get tree for expression operand:\n");
1012 ir
->operands
[operand
]->print();
1016 op
[operand
] = this->result
;
1018 /* Matrix expression operands should have been broken down to vector
1019 * operations already.
1021 assert(!ir
->operands
[operand
]->type
->is_matrix());
1024 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1025 if (ir
->operands
[1]) {
1026 vector_elements
= MAX2(vector_elements
,
1027 ir
->operands
[1]->type
->vector_elements
);
1030 this->result
.file
= PROGRAM_UNDEFINED
;
1032 /* Storage for our result. Ideally for an assignment we'd be using
1033 * the actual storage for the result here, instead.
1035 result_src
= get_temp(ir
->type
);
1036 /* convenience for the emit functions below. */
1037 result_dst
= dst_reg(result_src
);
1038 /* Limit writes to the channels that will be used by result_src later.
1039 * This does limit this temp's use as a temporary for multi-instruction
1042 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1044 switch (ir
->operation
) {
1045 case ir_unop_logic_not
:
1046 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1047 * older GPUs implement SEQ using multiple instructions (i915 uses two
1048 * SGE instructions and a MUL instruction). Since our logic values are
1049 * 0.0 and 1.0, 1-x also implements !x.
1051 op
[0].negate
= ~op
[0].negate
;
1052 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1055 op
[0].negate
= ~op
[0].negate
;
1059 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1062 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1065 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1069 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1072 assert(!"not reached: should be handled by exp_to_exp2");
1075 assert(!"not reached: should be handled by log_to_log2");
1078 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1081 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1084 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1088 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1091 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1094 case ir_unop_saturate
: {
1095 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_MOV
,
1097 inst
->saturate
= true;
1100 case ir_unop_noise
: {
1101 const enum prog_opcode opcode
=
1102 prog_opcode(OPCODE_NOISE1
1103 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1104 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1106 emit(ir
, opcode
, result_dst
, op
[0]);
1111 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1114 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1118 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1121 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1124 /* Floating point should be lowered by MOD_TO_FLOOR in the compiler. */
1125 assert(ir
->type
->is_integer());
1126 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1130 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1132 case ir_binop_greater
:
1133 /* Negating the operands (as opposed to switching the order of the
1134 * operands) produces the correct result when both are +/-Inf.
1136 op
[0].negate
= ~op
[0].negate
;
1137 op
[1].negate
= ~op
[1].negate
;
1138 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1140 case ir_binop_lequal
:
1141 /* Negating the operands (as opposed to switching the order of the
1142 * operands) produces the correct result when both are +/-Inf.
1144 op
[0].negate
= ~op
[0].negate
;
1145 op
[1].negate
= ~op
[1].negate
;
1146 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1148 case ir_binop_gequal
:
1149 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1151 case ir_binop_equal
:
1152 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1154 case ir_binop_nequal
:
1155 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1157 case ir_binop_all_equal
:
1158 /* "==" operator producing a scalar boolean. */
1159 if (ir
->operands
[0]->type
->is_vector() ||
1160 ir
->operands
[1]->type
->is_vector()) {
1161 src_reg temp
= get_temp(glsl_type::vec4_type
);
1162 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1164 /* After the dot-product, the value will be an integer on the
1165 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1167 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1169 /* Negating the result of the dot-product gives values on the range
1170 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1171 * achieved using SGE.
1173 src_reg sge_src
= result_src
;
1174 sge_src
.negate
= ~sge_src
.negate
;
1175 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1177 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1180 case ir_binop_any_nequal
:
1181 /* "!=" operator producing a scalar boolean. */
1182 if (ir
->operands
[0]->type
->is_vector() ||
1183 ir
->operands
[1]->type
->is_vector()) {
1184 src_reg temp
= get_temp(glsl_type::vec4_type
);
1185 if (ir
->operands
[0]->type
->is_boolean() &&
1186 ir
->operands
[1]->as_constant() &&
1187 ir
->operands
[1]->as_constant()->is_zero()) {
1190 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1193 /* After the dot-product, the value will be an integer on the
1194 * range [0,4]. Zero stays zero, and positive values become 1.0.
1196 ir_to_mesa_instruction
*const dp
=
1197 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1198 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1199 /* The clamping to [0,1] can be done for free in the fragment
1200 * shader with a saturate.
1202 dp
->saturate
= true;
1204 /* Negating the result of the dot-product gives values on the range
1205 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1206 * achieved using SLT.
1208 src_reg slt_src
= result_src
;
1209 slt_src
.negate
= ~slt_src
.negate
;
1210 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1213 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1217 case ir_binop_logic_xor
:
1218 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1221 case ir_binop_logic_or
: {
1222 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1223 /* After the addition, the value will be an integer on the
1224 * range [0,2]. Zero stays zero, and positive values become 1.0.
1226 ir_to_mesa_instruction
*add
=
1227 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1228 add
->saturate
= true;
1230 /* The Boolean arguments are stored as float 0.0 and 1.0. If either
1231 * value is 1.0, the result of the logcal-or should be 1.0. If both
1232 * values are 0.0, the result should be 0.0. This is exactly what
1235 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1240 case ir_binop_logic_and
:
1241 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1242 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1246 assert(ir
->operands
[0]->type
->is_vector());
1247 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1248 emit_dp(ir
, result_dst
, op
[0], op
[1],
1249 ir
->operands
[0]->type
->vector_elements
);
1253 /* sqrt(x) = x * rsq(x). */
1254 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1255 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1256 /* For incoming channels <= 0, set the result to 0. */
1257 op
[0].negate
= ~op
[0].negate
;
1258 emit(ir
, OPCODE_CMP
, result_dst
,
1259 op
[0], result_src
, src_reg_for_float(0.0));
1262 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1270 /* Mesa IR lacks types, ints are stored as truncated floats. */
1275 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1279 emit_sne(ir
, result_dst
, op
[0], src_reg_for_float(0.0));
1281 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1282 case ir_unop_bitcast_f2u
:
1283 case ir_unop_bitcast_i2f
:
1284 case ir_unop_bitcast_u2f
:
1287 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1290 op
[0].negate
= ~op
[0].negate
;
1291 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1292 result_src
.negate
= ~result_src
.negate
;
1295 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1298 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1300 case ir_unop_pack_snorm_2x16
:
1301 case ir_unop_pack_snorm_4x8
:
1302 case ir_unop_pack_unorm_2x16
:
1303 case ir_unop_pack_unorm_4x8
:
1304 case ir_unop_pack_half_2x16
:
1305 case ir_unop_pack_double_2x32
:
1306 case ir_unop_unpack_snorm_2x16
:
1307 case ir_unop_unpack_snorm_4x8
:
1308 case ir_unop_unpack_unorm_2x16
:
1309 case ir_unop_unpack_unorm_4x8
:
1310 case ir_unop_unpack_half_2x16
:
1311 case ir_unop_unpack_double_2x32
:
1312 case ir_unop_bitfield_reverse
:
1313 case ir_unop_bit_count
:
1314 case ir_unop_find_msb
:
1315 case ir_unop_find_lsb
:
1323 case ir_unop_frexp_sig
:
1324 case ir_unop_frexp_exp
:
1325 assert(!"not supported");
1328 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1331 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1334 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1337 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1338 * hardware backends have no way to avoid Mesa IR generation
1339 * even if they don't use it, we need to emit "something" and
1342 case ir_binop_lshift
:
1343 case ir_binop_rshift
:
1344 case ir_binop_bit_and
:
1345 case ir_binop_bit_xor
:
1346 case ir_binop_bit_or
:
1347 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1350 case ir_unop_bit_not
:
1351 case ir_unop_round_even
:
1352 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1355 case ir_binop_ubo_load
:
1356 assert(!"not supported");
1360 /* ir_triop_lrp operands are (x, y, a) while
1361 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1363 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1367 /* We assume that boolean true and false are 1.0 and 0.0. OPCODE_CMP
1368 * selects src1 if src0 is < 0, src2 otherwise.
1370 op
[0].negate
= ~op
[0].negate
;
1371 emit(ir
, OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1374 case ir_binop_vector_extract
:
1376 case ir_triop_bitfield_extract
:
1377 case ir_triop_vector_insert
:
1378 case ir_quadop_bitfield_insert
:
1379 case ir_binop_ldexp
:
1380 case ir_binop_carry
:
1381 case ir_binop_borrow
:
1382 case ir_binop_imul_high
:
1383 case ir_unop_interpolate_at_centroid
:
1384 case ir_binop_interpolate_at_offset
:
1385 case ir_binop_interpolate_at_sample
:
1386 case ir_unop_dFdx_coarse
:
1387 case ir_unop_dFdx_fine
:
1388 case ir_unop_dFdy_coarse
:
1389 case ir_unop_dFdy_fine
:
1390 case ir_unop_subroutine_to_int
:
1391 case ir_unop_get_buffer_size
:
1392 case ir_unop_vote_any
:
1393 case ir_unop_vote_all
:
1394 case ir_unop_vote_eq
:
1395 case ir_unop_bitcast_u642d
:
1396 case ir_unop_bitcast_i642d
:
1397 case ir_unop_bitcast_d2u64
:
1398 case ir_unop_bitcast_d2i64
:
1417 case ir_unop_u642i64
:
1418 case ir_unop_i642u64
:
1419 case ir_unop_pack_int_2x32
:
1420 case ir_unop_unpack_int_2x32
:
1421 case ir_unop_pack_uint_2x32
:
1422 case ir_unop_unpack_uint_2x32
:
1423 assert(!"not supported");
1426 case ir_unop_ssbo_unsized_array_length
:
1427 case ir_quadop_vector
:
1428 /* This operation should have already been handled.
1430 assert(!"Should not get here.");
1434 this->result
= result_src
;
1439 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1445 /* Note that this is only swizzles in expressions, not those on the left
1446 * hand side of an assignment, which do write masking. See ir_assignment
1450 ir
->val
->accept(this);
1452 assert(src
.file
!= PROGRAM_UNDEFINED
);
1453 assert(ir
->type
->vector_elements
> 0);
1455 for (i
= 0; i
< 4; i
++) {
1456 if (i
< ir
->type
->vector_elements
) {
1459 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1462 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1465 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1468 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1472 /* If the type is smaller than a vec4, replicate the last
1475 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1479 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1485 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1487 variable_storage
*entry
= find_variable_storage(ir
->var
);
1488 ir_variable
*var
= ir
->var
;
1491 switch (var
->data
.mode
) {
1492 case ir_var_uniform
:
1493 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1494 var
->data
.param_index
);
1495 this->variables
.push_tail(entry
);
1497 case ir_var_shader_in
:
1498 /* The linker assigns locations for varyings and attributes,
1499 * including deprecated builtins (like gl_Color),
1500 * user-assigned generic attributes (glBindVertexLocation),
1501 * and user-defined varyings.
1503 assert(var
->data
.location
!= -1);
1504 entry
= new(mem_ctx
) variable_storage(var
,
1506 var
->data
.location
);
1508 case ir_var_shader_out
:
1509 assert(var
->data
.location
!= -1);
1510 entry
= new(mem_ctx
) variable_storage(var
,
1512 var
->data
.location
);
1514 case ir_var_system_value
:
1515 entry
= new(mem_ctx
) variable_storage(var
,
1516 PROGRAM_SYSTEM_VALUE
,
1517 var
->data
.location
);
1520 case ir_var_temporary
:
1521 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1523 this->variables
.push_tail(entry
);
1525 next_temp
+= type_size(var
->type
);
1530 printf("Failed to make storage for %s\n", var
->name
);
1535 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1539 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1543 int element_size
= type_size(ir
->type
);
1545 index
= ir
->array_index
->constant_expression_value();
1547 ir
->array
->accept(this);
1551 src
.index
+= index
->value
.i
[0] * element_size
;
1553 /* Variable index array dereference. It eats the "vec4" of the
1554 * base of the array and an index that offsets the Mesa register
1557 ir
->array_index
->accept(this);
1561 if (element_size
== 1) {
1562 index_reg
= this->result
;
1564 index_reg
= get_temp(glsl_type::float_type
);
1566 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1567 this->result
, src_reg_for_float(element_size
));
1570 /* If there was already a relative address register involved, add the
1571 * new and the old together to get the new offset.
1573 if (src
.reladdr
!= NULL
) {
1574 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1576 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1577 index_reg
, *src
.reladdr
);
1579 index_reg
= accum_reg
;
1582 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1583 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1586 /* If the type is smaller than a vec4, replicate the last channel out. */
1587 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1588 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1590 src
.swizzle
= SWIZZLE_NOOP
;
1596 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1599 const glsl_type
*struct_type
= ir
->record
->type
;
1602 ir
->record
->accept(this);
1604 for (i
= 0; i
< struct_type
->length
; i
++) {
1605 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1607 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1610 /* If the type is smaller than a vec4, replicate the last channel out. */
1611 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1612 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1614 this->result
.swizzle
= SWIZZLE_NOOP
;
1616 this->result
.index
+= offset
;
1620 * We want to be careful in assignment setup to hit the actual storage
1621 * instead of potentially using a temporary like we might with the
1622 * ir_dereference handler.
1625 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1627 /* The LHS must be a dereference. If the LHS is a variable indexed array
1628 * access of a vector, it must be separated into a series conditional moves
1629 * before reaching this point (see ir_vec_index_to_cond_assign).
1631 assert(ir
->as_dereference());
1632 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1634 assert(!deref_array
->array
->type
->is_vector());
1637 /* Use the rvalue deref handler for the most part. We'll ignore
1638 * swizzles in it and write swizzles using writemask, though.
1641 return dst_reg(v
->result
);
1644 /* Calculate the sampler index and also calculate the base uniform location
1645 * for struct members.
1648 calc_sampler_offsets(struct gl_shader_program
*prog
, ir_dereference
*deref
,
1649 unsigned *offset
, unsigned *array_elements
,
1652 if (deref
->ir_type
== ir_type_dereference_variable
)
1655 switch (deref
->ir_type
) {
1656 case ir_type_dereference_array
: {
1657 ir_dereference_array
*deref_arr
= deref
->as_dereference_array();
1658 ir_constant
*array_index
=
1659 deref_arr
->array_index
->constant_expression_value();
1662 /* GLSL 1.10 and 1.20 allowed variable sampler array indices,
1663 * while GLSL 1.30 requires that the array indices be
1664 * constant integer expressions. We don't expect any driver
1665 * to actually work with a really variable array index, so
1666 * all that would work would be an unrolled loop counter that ends
1667 * up being constant above.
1669 ralloc_strcat(&prog
->data
->InfoLog
,
1670 "warning: Variable sampler array index unsupported.\n"
1671 "This feature of the language was removed in GLSL 1.20 "
1672 "and is unlikely to be supported for 1.10 in Mesa.\n");
1674 *offset
+= array_index
->value
.u
[0] * *array_elements
;
1677 *array_elements
*= deref_arr
->array
->type
->length
;
1679 calc_sampler_offsets(prog
, deref_arr
->array
->as_dereference(),
1680 offset
, array_elements
, location
);
1684 case ir_type_dereference_record
: {
1685 ir_dereference_record
*deref_record
= deref
->as_dereference_record();
1686 unsigned field_index
=
1687 deref_record
->record
->type
->field_index(deref_record
->field
);
1689 deref_record
->record
->type
->record_location_offset(field_index
);
1690 calc_sampler_offsets(prog
, deref_record
->record
->as_dereference(),
1691 offset
, array_elements
, location
);
1696 unreachable("Invalid deref type");
1702 get_sampler_uniform_value(class ir_dereference
*sampler
,
1703 struct gl_shader_program
*shader_program
,
1704 const struct gl_program
*prog
)
1706 GLuint shader
= _mesa_program_enum_to_shader_stage(prog
->Target
);
1707 ir_variable
*var
= sampler
->variable_referenced();
1708 unsigned location
= var
->data
.location
;
1709 unsigned array_elements
= 1;
1710 unsigned offset
= 0;
1712 calc_sampler_offsets(shader_program
, sampler
, &offset
, &array_elements
,
1715 assert(shader_program
->data
->UniformStorage
[location
].opaque
[shader
].active
);
1716 return shader_program
->data
->UniformStorage
[location
].opaque
[shader
].index
+
1721 * Process the condition of a conditional assignment
1723 * Examines the condition of a conditional assignment to generate the optimal
1724 * first operand of a \c CMP instruction. If the condition is a relational
1725 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1726 * used as the source for the \c CMP instruction. Otherwise the comparison
1727 * is processed to a boolean result, and the boolean result is used as the
1728 * operand to the CMP instruction.
1731 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1733 ir_rvalue
*src_ir
= ir
;
1735 bool switch_order
= false;
1737 ir_expression
*const expr
= ir
->as_expression();
1738 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
1739 bool zero_on_left
= false;
1741 if (expr
->operands
[0]->is_zero()) {
1742 src_ir
= expr
->operands
[1];
1743 zero_on_left
= true;
1744 } else if (expr
->operands
[1]->is_zero()) {
1745 src_ir
= expr
->operands
[0];
1746 zero_on_left
= false;
1750 * (a < 0) T F F ( a < 0) T F F
1751 * (0 < a) F F T (-a < 0) F F T
1752 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1753 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1754 * (a > 0) F F T (-a < 0) F F T
1755 * (0 > a) T F F ( a < 0) T F F
1756 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1757 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1759 * Note that exchanging the order of 0 and 'a' in the comparison simply
1760 * means that the value of 'a' should be negated.
1763 switch (expr
->operation
) {
1765 switch_order
= false;
1766 negate
= zero_on_left
;
1769 case ir_binop_greater
:
1770 switch_order
= false;
1771 negate
= !zero_on_left
;
1774 case ir_binop_lequal
:
1775 switch_order
= true;
1776 negate
= !zero_on_left
;
1779 case ir_binop_gequal
:
1780 switch_order
= true;
1781 negate
= zero_on_left
;
1785 /* This isn't the right kind of comparison afterall, so make sure
1786 * the whole condition is visited.
1794 src_ir
->accept(this);
1796 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1797 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1798 * choose which value OPCODE_CMP produces without an extra instruction
1799 * computing the condition.
1802 this->result
.negate
= ~this->result
.negate
;
1804 return switch_order
;
1808 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1814 ir
->rhs
->accept(this);
1817 l
= get_assignment_lhs(ir
->lhs
, this);
1819 /* FINISHME: This should really set to the correct maximal writemask for each
1820 * FINISHME: component written (in the loops below). This case can only
1821 * FINISHME: occur for matrices, arrays, and structures.
1823 if (ir
->write_mask
== 0) {
1824 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1825 l
.writemask
= WRITEMASK_XYZW
;
1826 } else if (ir
->lhs
->type
->is_scalar()) {
1827 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1828 * FINISHME: W component of fragment shader output zero, work correctly.
1830 l
.writemask
= WRITEMASK_XYZW
;
1833 int first_enabled_chan
= 0;
1836 assert(ir
->lhs
->type
->is_vector());
1837 l
.writemask
= ir
->write_mask
;
1839 for (int i
= 0; i
< 4; i
++) {
1840 if (l
.writemask
& (1 << i
)) {
1841 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1846 /* Swizzle a small RHS vector into the channels being written.
1848 * glsl ir treats write_mask as dictating how many channels are
1849 * present on the RHS while Mesa IR treats write_mask as just
1850 * showing which channels of the vec4 RHS get written.
1852 for (int i
= 0; i
< 4; i
++) {
1853 if (l
.writemask
& (1 << i
))
1854 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1856 swizzles
[i
] = first_enabled_chan
;
1858 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1859 swizzles
[2], swizzles
[3]);
1862 assert(l
.file
!= PROGRAM_UNDEFINED
);
1863 assert(r
.file
!= PROGRAM_UNDEFINED
);
1865 if (ir
->condition
) {
1866 const bool switch_order
= this->process_move_condition(ir
->condition
);
1867 src_reg condition
= this->result
;
1869 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1871 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1873 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1880 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1881 emit(ir
, OPCODE_MOV
, l
, r
);
1890 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1893 GLfloat stack_vals
[4] = { 0 };
1894 GLfloat
*values
= stack_vals
;
1897 /* Unfortunately, 4 floats is all we can get into
1898 * _mesa_add_unnamed_constant. So, make a temp to store an
1899 * aggregate constant and move each constant value into it. If we
1900 * get lucky, copy propagation will eliminate the extra moves.
1903 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
1904 src_reg temp_base
= get_temp(ir
->type
);
1905 dst_reg temp
= dst_reg(temp_base
);
1907 foreach_in_list(ir_constant
, field_value
, &ir
->components
) {
1908 int size
= type_size(field_value
->type
);
1912 field_value
->accept(this);
1915 for (i
= 0; i
< (unsigned int)size
; i
++) {
1916 emit(ir
, OPCODE_MOV
, temp
, src
);
1922 this->result
= temp_base
;
1926 if (ir
->type
->is_array()) {
1927 src_reg temp_base
= get_temp(ir
->type
);
1928 dst_reg temp
= dst_reg(temp_base
);
1929 int size
= type_size(ir
->type
->fields
.array
);
1933 for (i
= 0; i
< ir
->type
->length
; i
++) {
1934 ir
->array_elements
[i
]->accept(this);
1936 for (int j
= 0; j
< size
; j
++) {
1937 emit(ir
, OPCODE_MOV
, temp
, src
);
1943 this->result
= temp_base
;
1947 if (ir
->type
->is_matrix()) {
1948 src_reg mat
= get_temp(ir
->type
);
1949 dst_reg mat_column
= dst_reg(mat
);
1951 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1952 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1953 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1955 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1956 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1957 (gl_constant_value
*) values
,
1958 ir
->type
->vector_elements
,
1960 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1969 src
.file
= PROGRAM_CONSTANT
;
1970 switch (ir
->type
->base_type
) {
1971 case GLSL_TYPE_FLOAT
:
1972 values
= &ir
->value
.f
[0];
1974 case GLSL_TYPE_UINT
:
1975 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1976 values
[i
] = ir
->value
.u
[i
];
1980 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1981 values
[i
] = ir
->value
.i
[i
];
1984 case GLSL_TYPE_BOOL
:
1985 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1986 values
[i
] = ir
->value
.b
[i
];
1990 assert(!"Non-float/uint/int/bool constant");
1993 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1994 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1995 (gl_constant_value
*) values
,
1996 ir
->type
->vector_elements
,
1997 &this->result
.swizzle
);
2001 ir_to_mesa_visitor::visit(ir_call
*)
2003 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
2007 ir_to_mesa_visitor::visit(ir_texture
*ir
)
2009 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
2010 dst_reg result_dst
, coord_dst
;
2011 ir_to_mesa_instruction
*inst
= NULL
;
2012 prog_opcode opcode
= OPCODE_NOP
;
2014 if (ir
->op
== ir_txs
)
2015 this->result
= src_reg_for_float(0.0);
2017 ir
->coordinate
->accept(this);
2019 /* Put our coords in a temp. We'll need to modify them for shadow,
2020 * projection, or LOD, so the only case we'd use it as-is is if
2021 * we're doing plain old texturing. Mesa IR optimization should
2022 * handle cleaning up our mess in that case.
2024 coord
= get_temp(glsl_type::vec4_type
);
2025 coord_dst
= dst_reg(coord
);
2026 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2028 if (ir
->projector
) {
2029 ir
->projector
->accept(this);
2030 projector
= this->result
;
2033 /* Storage for our result. Ideally for an assignment we'd be using
2034 * the actual storage for the result here, instead.
2036 result_src
= get_temp(glsl_type::vec4_type
);
2037 result_dst
= dst_reg(result_src
);
2042 opcode
= OPCODE_TEX
;
2045 opcode
= OPCODE_TXB
;
2046 ir
->lod_info
.bias
->accept(this);
2047 lod_info
= this->result
;
2050 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2052 opcode
= OPCODE_TXL
;
2053 ir
->lod_info
.lod
->accept(this);
2054 lod_info
= this->result
;
2057 opcode
= OPCODE_TXD
;
2058 ir
->lod_info
.grad
.dPdx
->accept(this);
2060 ir
->lod_info
.grad
.dPdy
->accept(this);
2064 assert(!"Unexpected ir_txf_ms opcode");
2067 assert(!"Unexpected ir_lod opcode");
2070 assert(!"Unexpected ir_tg4 opcode");
2072 case ir_query_levels
:
2073 assert(!"Unexpected ir_query_levels opcode");
2075 case ir_samples_identical
:
2076 unreachable("Unexpected ir_samples_identical opcode");
2077 case ir_texture_samples
:
2078 unreachable("Unexpected ir_texture_samples opcode");
2081 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2083 if (ir
->projector
) {
2084 if (opcode
== OPCODE_TEX
) {
2085 /* Slot the projector in as the last component of the coord. */
2086 coord_dst
.writemask
= WRITEMASK_W
;
2087 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2088 coord_dst
.writemask
= WRITEMASK_XYZW
;
2089 opcode
= OPCODE_TXP
;
2091 src_reg coord_w
= coord
;
2092 coord_w
.swizzle
= SWIZZLE_WWWW
;
2094 /* For the other TEX opcodes there's no projective version
2095 * since the last slot is taken up by lod info. Do the
2096 * projective divide now.
2098 coord_dst
.writemask
= WRITEMASK_W
;
2099 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2101 /* In the case where we have to project the coordinates "by hand,"
2102 * the shadow comparator value must also be projected.
2104 src_reg tmp_src
= coord
;
2105 if (ir
->shadow_comparator
) {
2106 /* Slot the shadow value in as the second to last component of the
2109 ir
->shadow_comparator
->accept(this);
2111 tmp_src
= get_temp(glsl_type::vec4_type
);
2112 dst_reg tmp_dst
= dst_reg(tmp_src
);
2114 /* Projective division not allowed for array samplers. */
2115 assert(!sampler_type
->sampler_array
);
2117 tmp_dst
.writemask
= WRITEMASK_Z
;
2118 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2120 tmp_dst
.writemask
= WRITEMASK_XY
;
2121 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2124 coord_dst
.writemask
= WRITEMASK_XYZ
;
2125 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2127 coord_dst
.writemask
= WRITEMASK_XYZW
;
2128 coord
.swizzle
= SWIZZLE_XYZW
;
2132 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2133 * comparator was put in the correct place (and projected) by the code,
2134 * above, that handles by-hand projection.
2136 if (ir
->shadow_comparator
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2137 /* Slot the shadow value in as the second to last component of the
2140 ir
->shadow_comparator
->accept(this);
2142 /* XXX This will need to be updated for cubemap array samplers. */
2143 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2144 sampler_type
->sampler_array
) {
2145 coord_dst
.writemask
= WRITEMASK_W
;
2147 coord_dst
.writemask
= WRITEMASK_Z
;
2150 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2151 coord_dst
.writemask
= WRITEMASK_XYZW
;
2154 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2155 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2156 coord_dst
.writemask
= WRITEMASK_W
;
2157 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2158 coord_dst
.writemask
= WRITEMASK_XYZW
;
2161 if (opcode
== OPCODE_TXD
)
2162 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2164 inst
= emit(ir
, opcode
, result_dst
, coord
);
2166 if (ir
->shadow_comparator
)
2167 inst
->tex_shadow
= GL_TRUE
;
2169 inst
->sampler
= get_sampler_uniform_value(ir
->sampler
, shader_program
,
2172 switch (sampler_type
->sampler_dimensionality
) {
2173 case GLSL_SAMPLER_DIM_1D
:
2174 inst
->tex_target
= (sampler_type
->sampler_array
)
2175 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2177 case GLSL_SAMPLER_DIM_2D
:
2178 inst
->tex_target
= (sampler_type
->sampler_array
)
2179 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2181 case GLSL_SAMPLER_DIM_3D
:
2182 inst
->tex_target
= TEXTURE_3D_INDEX
;
2184 case GLSL_SAMPLER_DIM_CUBE
:
2185 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2187 case GLSL_SAMPLER_DIM_RECT
:
2188 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2190 case GLSL_SAMPLER_DIM_BUF
:
2191 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2193 case GLSL_SAMPLER_DIM_EXTERNAL
:
2194 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2197 assert(!"Should not get here.");
2200 this->result
= result_src
;
2204 ir_to_mesa_visitor::visit(ir_return
*ir
)
2206 /* Non-void functions should have been inlined. We may still emit RETs
2207 * from main() unless the EmitNoMainReturn option is set.
2209 assert(!ir
->get_value());
2210 emit(ir
, OPCODE_RET
);
2214 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2217 ir
->condition
= new(mem_ctx
) ir_constant(true);
2219 ir
->condition
->accept(this);
2220 this->result
.negate
= ~this->result
.negate
;
2221 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2225 ir_to_mesa_visitor::visit(ir_if
*ir
)
2227 ir_to_mesa_instruction
*if_inst
;
2229 ir
->condition
->accept(this);
2230 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2232 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2234 this->instructions
.push_tail(if_inst
);
2236 visit_exec_list(&ir
->then_instructions
, this);
2238 if (!ir
->else_instructions
.is_empty()) {
2239 emit(ir
->condition
, OPCODE_ELSE
);
2240 visit_exec_list(&ir
->else_instructions
, this);
2243 emit(ir
->condition
, OPCODE_ENDIF
);
2247 ir_to_mesa_visitor::visit(ir_emit_vertex
*)
2249 assert(!"Geometry shaders not supported.");
2253 ir_to_mesa_visitor::visit(ir_end_primitive
*)
2255 assert(!"Geometry shaders not supported.");
2259 ir_to_mesa_visitor::visit(ir_barrier
*)
2261 unreachable("GLSL barrier() not supported.");
2264 ir_to_mesa_visitor::ir_to_mesa_visitor()
2266 result
.file
= PROGRAM_UNDEFINED
;
2268 next_signature_id
= 1;
2269 current_function
= NULL
;
2270 mem_ctx
= ralloc_context(NULL
);
2273 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2275 ralloc_free(mem_ctx
);
2278 static struct prog_src_register
2279 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2281 struct prog_src_register mesa_reg
;
2283 mesa_reg
.File
= reg
.file
;
2284 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2285 mesa_reg
.Index
= reg
.index
;
2286 mesa_reg
.Swizzle
= reg
.swizzle
;
2287 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2288 mesa_reg
.Negate
= reg
.negate
;
2294 set_branchtargets(ir_to_mesa_visitor
*v
,
2295 struct prog_instruction
*mesa_instructions
,
2296 int num_instructions
)
2298 int if_count
= 0, loop_count
= 0;
2299 int *if_stack
, *loop_stack
;
2300 int if_stack_pos
= 0, loop_stack_pos
= 0;
2303 for (i
= 0; i
< num_instructions
; i
++) {
2304 switch (mesa_instructions
[i
].Opcode
) {
2308 case OPCODE_BGNLOOP
:
2313 mesa_instructions
[i
].BranchTarget
= -1;
2320 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2321 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2323 for (i
= 0; i
< num_instructions
; i
++) {
2324 switch (mesa_instructions
[i
].Opcode
) {
2326 if_stack
[if_stack_pos
] = i
;
2330 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2331 if_stack
[if_stack_pos
- 1] = i
;
2334 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2337 case OPCODE_BGNLOOP
:
2338 loop_stack
[loop_stack_pos
] = i
;
2341 case OPCODE_ENDLOOP
:
2343 /* Rewrite any breaks/conts at this nesting level (haven't
2344 * already had a BranchTarget assigned) to point to the end
2347 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2348 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2349 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2350 if (mesa_instructions
[j
].BranchTarget
== -1) {
2351 mesa_instructions
[j
].BranchTarget
= i
;
2355 /* The loop ends point at each other. */
2356 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2357 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2360 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
2361 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2362 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2374 print_program(struct prog_instruction
*mesa_instructions
,
2375 ir_instruction
**mesa_instruction_annotation
,
2376 int num_instructions
)
2378 ir_instruction
*last_ir
= NULL
;
2382 for (i
= 0; i
< num_instructions
; i
++) {
2383 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2384 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2386 fprintf(stdout
, "%3d: ", i
);
2388 if (last_ir
!= ir
&& ir
) {
2391 for (j
= 0; j
< indent
; j
++) {
2392 fprintf(stdout
, " ");
2398 fprintf(stdout
, " "); /* line number spacing. */
2401 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2402 PROG_PRINT_DEBUG
, NULL
);
2408 class add_uniform_to_shader
: public program_resource_visitor
{
2410 add_uniform_to_shader(struct gl_shader_program
*shader_program
,
2411 struct gl_program_parameter_list
*params
,
2412 gl_shader_stage shader_type
)
2413 : shader_program(shader_program
), params(params
), idx(-1),
2414 shader_type(shader_type
)
2419 void process(ir_variable
*var
)
2422 this->program_resource_visitor::process(var
);
2423 var
->data
.param_index
= this->idx
;
2427 virtual void visit_field(const glsl_type
*type
, const char *name
,
2428 bool row_major
, const glsl_type
*record_type
,
2429 const enum glsl_interface_packing packing
,
2432 struct gl_shader_program
*shader_program
;
2433 struct gl_program_parameter_list
*params
;
2435 gl_shader_stage shader_type
;
2438 } /* anonymous namespace */
2441 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2442 bool /* row_major */,
2443 const glsl_type
* /* record_type */,
2444 const enum glsl_interface_packing
,
2445 bool /* last_field */)
2449 /* atomics don't get real storage */
2450 if (type
->contains_atomic())
2453 if (type
->is_vector() || type
->is_scalar()) {
2454 size
= type
->vector_elements
;
2455 if (type
->is_64bit())
2458 size
= type_size(type
) * 4;
2461 gl_register_file file
;
2462 if (type
->without_array()->is_sampler()) {
2463 file
= PROGRAM_SAMPLER
;
2465 file
= PROGRAM_UNIFORM
;
2468 int index
= _mesa_lookup_parameter_index(params
, name
);
2470 index
= _mesa_add_parameter(params
, file
, name
, size
, type
->gl_type
,
2473 /* Sampler uniform values are stored in prog->SamplerUnits,
2474 * and the entry in that array is selected by this index we
2475 * store in ParameterValues[].
2477 if (file
== PROGRAM_SAMPLER
) {
2480 this->shader_program
->UniformHash
->get(location
,
2481 params
->Parameters
[index
].Name
);
2487 struct gl_uniform_storage
*storage
=
2488 &this->shader_program
->data
->UniformStorage
[location
];
2490 assert(storage
->type
->is_sampler() &&
2491 storage
->opaque
[shader_type
].active
);
2493 for (unsigned int j
= 0; j
< size
/ 4; j
++)
2494 params
->ParameterValues
[index
+ j
][0].f
=
2495 storage
->opaque
[shader_type
].index
+ j
;
2499 /* The first part of the uniform that's processed determines the base
2500 * location of the whole uniform (for structures).
2507 * Generate the program parameters list for the user uniforms in a shader
2509 * \param shader_program Linked shader program. This is only used to
2510 * emit possible link errors to the info log.
2511 * \param sh Shader whose uniforms are to be processed.
2512 * \param params Parameter list to be filled in.
2515 _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program
2517 struct gl_linked_shader
*sh
,
2518 struct gl_program_parameter_list
2521 add_uniform_to_shader
add(shader_program
, params
, sh
->Stage
);
2523 foreach_in_list(ir_instruction
, node
, sh
->ir
) {
2524 ir_variable
*var
= node
->as_variable();
2526 if ((var
== NULL
) || (var
->data
.mode
!= ir_var_uniform
)
2527 || var
->is_in_buffer_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2535 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2536 struct gl_shader_program
*shader_program
,
2537 struct gl_program_parameter_list
*params
,
2538 bool propagate_to_storage
)
2540 /* After adding each uniform to the parameter list, connect the storage for
2541 * the parameter with the tracking structure used by the API for the
2544 unsigned last_location
= unsigned(~0);
2545 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2546 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2551 shader_program
->UniformHash
->get(location
, params
->Parameters
[i
].Name
);
2557 struct gl_uniform_storage
*storage
=
2558 &shader_program
->data
->UniformStorage
[location
];
2560 /* Do not associate any uniform storage to built-in uniforms */
2561 if (storage
->builtin
)
2564 if (location
!= last_location
) {
2565 enum gl_uniform_driver_format format
= uniform_native
;
2567 unsigned columns
= 0;
2568 int dmul
= 4 * sizeof(float);
2569 switch (storage
->type
->base_type
) {
2570 case GLSL_TYPE_UINT64
:
2571 if (storage
->type
->vector_elements
> 2)
2574 case GLSL_TYPE_UINT
:
2575 assert(ctx
->Const
.NativeIntegers
);
2576 format
= uniform_native
;
2579 case GLSL_TYPE_INT64
:
2580 if (storage
->type
->vector_elements
> 2)
2585 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2589 case GLSL_TYPE_DOUBLE
:
2590 if (storage
->type
->vector_elements
> 2)
2593 case GLSL_TYPE_FLOAT
:
2594 format
= uniform_native
;
2595 columns
= storage
->type
->matrix_columns
;
2597 case GLSL_TYPE_BOOL
:
2598 format
= uniform_native
;
2601 case GLSL_TYPE_SAMPLER
:
2602 case GLSL_TYPE_IMAGE
:
2603 case GLSL_TYPE_SUBROUTINE
:
2604 format
= uniform_native
;
2607 case GLSL_TYPE_ATOMIC_UINT
:
2608 case GLSL_TYPE_ARRAY
:
2609 case GLSL_TYPE_VOID
:
2610 case GLSL_TYPE_STRUCT
:
2611 case GLSL_TYPE_ERROR
:
2612 case GLSL_TYPE_INTERFACE
:
2613 case GLSL_TYPE_FUNCTION
:
2614 assert(!"Should not get here.");
2618 _mesa_uniform_attach_driver_storage(storage
,
2622 ¶ms
->ParameterValues
[i
]);
2624 /* After attaching the driver's storage to the uniform, propagate any
2625 * data from the linker's backing store. This will cause values from
2626 * initializers in the source code to be copied over.
2628 if (propagate_to_storage
) {
2629 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2630 _mesa_propagate_uniforms_to_driver_storage(storage
, 0,
2634 last_location
= location
;
2640 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2641 * channels for copy propagation and updates following instructions to
2642 * use the original versions.
2644 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2645 * will occur. As an example, a TXP production before this pass:
2647 * 0: MOV TEMP[1], INPUT[4].xyyy;
2648 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2649 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2653 * 0: MOV TEMP[1], INPUT[4].xyyy;
2654 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2655 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2657 * which allows for dead code elimination on TEMP[1]'s writes.
2660 ir_to_mesa_visitor::copy_propagate(void)
2662 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2663 ir_to_mesa_instruction
*,
2664 this->next_temp
* 4);
2665 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2668 foreach_in_list(ir_to_mesa_instruction
, inst
, &this->instructions
) {
2669 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2670 || inst
->dst
.index
< this->next_temp
);
2672 /* First, do any copy propagation possible into the src regs. */
2673 for (int r
= 0; r
< 3; r
++) {
2674 ir_to_mesa_instruction
*first
= NULL
;
2676 int acp_base
= inst
->src
[r
].index
* 4;
2678 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2679 inst
->src
[r
].reladdr
)
2682 /* See if we can find entries in the ACP consisting of MOVs
2683 * from the same src register for all the swizzled channels
2684 * of this src register reference.
2686 for (int i
= 0; i
< 4; i
++) {
2687 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2688 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2695 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2700 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2701 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2709 /* We've now validated that we can copy-propagate to
2710 * replace this src register reference. Do it.
2712 inst
->src
[r
].file
= first
->src
[0].file
;
2713 inst
->src
[r
].index
= first
->src
[0].index
;
2716 for (int i
= 0; i
< 4; i
++) {
2717 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2718 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2719 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2722 inst
->src
[r
].swizzle
= swizzle
;
2727 case OPCODE_BGNLOOP
:
2728 case OPCODE_ENDLOOP
:
2729 /* End of a basic block, clear the ACP entirely. */
2730 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2739 /* Clear all channels written inside the block from the ACP, but
2740 * leaving those that were not touched.
2742 for (int r
= 0; r
< this->next_temp
; r
++) {
2743 for (int c
= 0; c
< 4; c
++) {
2744 if (!acp
[4 * r
+ c
])
2747 if (acp_level
[4 * r
+ c
] >= level
)
2748 acp
[4 * r
+ c
] = NULL
;
2751 if (inst
->op
== OPCODE_ENDIF
)
2756 /* Continuing the block, clear any written channels from
2759 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2760 /* Any temporary might be written, so no copy propagation
2761 * across this instruction.
2763 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2764 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2765 inst
->dst
.reladdr
) {
2766 /* Any output might be written, so no copy propagation
2767 * from outputs across this instruction.
2769 for (int r
= 0; r
< this->next_temp
; r
++) {
2770 for (int c
= 0; c
< 4; c
++) {
2771 if (!acp
[4 * r
+ c
])
2774 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2775 acp
[4 * r
+ c
] = NULL
;
2778 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2779 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2780 /* Clear where it's used as dst. */
2781 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2782 for (int c
= 0; c
< 4; c
++) {
2783 if (inst
->dst
.writemask
& (1 << c
)) {
2784 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2789 /* Clear where it's used as src. */
2790 for (int r
= 0; r
< this->next_temp
; r
++) {
2791 for (int c
= 0; c
< 4; c
++) {
2792 if (!acp
[4 * r
+ c
])
2795 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2797 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2798 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2799 inst
->dst
.writemask
& (1 << src_chan
))
2801 acp
[4 * r
+ c
] = NULL
;
2809 /* If this is a copy, add it to the ACP. */
2810 if (inst
->op
== OPCODE_MOV
&&
2811 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2812 !(inst
->dst
.file
== inst
->src
[0].file
&&
2813 inst
->dst
.index
== inst
->src
[0].index
) &&
2814 !inst
->dst
.reladdr
&&
2816 !inst
->src
[0].reladdr
&&
2817 !inst
->src
[0].negate
) {
2818 for (int i
= 0; i
< 4; i
++) {
2819 if (inst
->dst
.writemask
& (1 << i
)) {
2820 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2821 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2827 ralloc_free(acp_level
);
2833 * Convert a shader's GLSL IR into a Mesa gl_program.
2835 static struct gl_program
*
2836 get_mesa_program(struct gl_context
*ctx
,
2837 struct gl_shader_program
*shader_program
,
2838 struct gl_linked_shader
*shader
)
2840 ir_to_mesa_visitor v
;
2841 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2842 ir_instruction
**mesa_instruction_annotation
;
2844 struct gl_program
*prog
;
2845 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
2846 const char *target_string
= _mesa_shader_stage_to_string(shader
->Stage
);
2847 struct gl_shader_compiler_options
*options
=
2848 &ctx
->Const
.ShaderCompilerOptions
[shader
->Stage
];
2850 validate_ir_tree(shader
->ir
);
2852 prog
= shader
->Program
;
2853 prog
->Parameters
= _mesa_new_parameter_list();
2856 v
.shader_program
= shader_program
;
2857 v
.options
= options
;
2859 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
2862 /* Emit Mesa IR for main(). */
2863 visit_exec_list(shader
->ir
, &v
);
2864 v
.emit(NULL
, OPCODE_END
);
2866 prog
->arb
.NumTemporaries
= v
.next_temp
;
2868 unsigned num_instructions
= v
.instructions
.length();
2870 mesa_instructions
= rzalloc_array(prog
, struct prog_instruction
,
2872 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2877 /* Convert ir_mesa_instructions into prog_instructions.
2879 mesa_inst
= mesa_instructions
;
2881 foreach_in_list(const ir_to_mesa_instruction
, inst
, &v
.instructions
) {
2882 mesa_inst
->Opcode
= inst
->op
;
2884 mesa_inst
->Saturate
= GL_TRUE
;
2885 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2886 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2887 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2888 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2889 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2890 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2891 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2892 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2893 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2894 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2895 mesa_instruction_annotation
[i
] = inst
->ir
;
2897 /* Set IndirectRegisterFiles. */
2898 if (mesa_inst
->DstReg
.RelAddr
)
2899 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2901 /* Update program's bitmask of indirectly accessed register files */
2902 for (unsigned src
= 0; src
< 3; src
++)
2903 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2904 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2906 switch (mesa_inst
->Opcode
) {
2908 if (options
->MaxIfDepth
== 0) {
2909 linker_warning(shader_program
,
2910 "Couldn't flatten if-statement. "
2911 "This will likely result in software "
2912 "rasterization.\n");
2915 case OPCODE_BGNLOOP
:
2916 if (options
->EmitNoLoops
) {
2917 linker_warning(shader_program
,
2918 "Couldn't unroll loop. "
2919 "This will likely result in software "
2920 "rasterization.\n");
2924 if (options
->EmitNoCont
) {
2925 linker_warning(shader_program
,
2926 "Couldn't lower continue-statement. "
2927 "This will likely result in software "
2928 "rasterization.\n");
2932 prog
->arb
.NumAddressRegs
= 1;
2941 if (!shader_program
->data
->LinkStatus
)
2945 if (!shader_program
->data
->LinkStatus
) {
2949 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2951 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
2952 fprintf(stderr
, "\n");
2953 fprintf(stderr
, "GLSL IR for linked %s program %d:\n", target_string
,
2954 shader_program
->Name
);
2955 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
2956 fprintf(stderr
, "\n");
2957 fprintf(stderr
, "\n");
2958 fprintf(stderr
, "Mesa IR for linked %s program %d:\n", target_string
,
2959 shader_program
->Name
);
2960 print_program(mesa_instructions
, mesa_instruction_annotation
,
2965 prog
->arb
.Instructions
= mesa_instructions
;
2966 prog
->arb
.NumInstructions
= num_instructions
;
2968 /* Setting this to NULL prevents a possible double free in the fail_exit
2971 mesa_instructions
= NULL
;
2973 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
2975 prog
->ShadowSamplers
= shader
->shadow_samplers
;
2976 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
2977 _mesa_update_shader_textures_used(shader_program
, prog
);
2979 /* Set the gl_FragDepth layout. */
2980 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
2981 prog
->info
.fs
.depth_layout
= shader_program
->FragDepthLayout
;
2984 _mesa_optimize_program(ctx
, prog
, prog
);
2986 /* This has to be done last. Any operation that can cause
2987 * prog->ParameterValues to get reallocated (e.g., anything that adds a
2988 * program constant) has to happen before creating this linkage.
2990 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
,
2992 if (!shader_program
->data
->LinkStatus
) {
2999 ralloc_free(mesa_instructions
);
3000 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
3008 * Called via ctx->Driver.LinkShader()
3009 * This actually involves converting GLSL IR into Mesa gl_programs with
3010 * code lowering and other optimizations.
3013 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3015 assert(prog
->data
->LinkStatus
);
3017 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3018 if (prog
->_LinkedShaders
[i
] == NULL
)
3022 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3023 const struct gl_shader_compiler_options
*options
=
3024 &ctx
->Const
.ShaderCompilerOptions
[prog
->_LinkedShaders
[i
]->Stage
];
3030 do_mat_op_to_vec(ir
);
3031 lower_instructions(ir
, (MOD_TO_FLOOR
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3032 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3033 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3035 progress
= do_common_optimization(ir
, true, true,
3036 options
, ctx
->Const
.NativeIntegers
)
3039 progress
= lower_quadop_vector(ir
, true) || progress
;
3041 if (options
->MaxIfDepth
== 0)
3042 progress
= lower_discard(ir
) || progress
;
3044 progress
= lower_if_to_cond_assign((gl_shader_stage
)i
, ir
,
3045 options
->MaxIfDepth
) || progress
;
3047 progress
= lower_noise(ir
) || progress
;
3049 /* If there are forms of indirect addressing that the driver
3050 * cannot handle, perform the lowering pass.
3052 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3053 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3055 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
3056 options
->EmitNoIndirectInput
,
3057 options
->EmitNoIndirectOutput
,
3058 options
->EmitNoIndirectTemp
,
3059 options
->EmitNoIndirectUniform
)
3062 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3063 progress
= lower_vector_insert(ir
, true) || progress
;
3066 validate_ir_tree(ir
);
3069 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3070 struct gl_program
*linked_prog
;
3072 if (prog
->_LinkedShaders
[i
] == NULL
)
3075 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3078 _mesa_copy_linked_program_data(prog
, prog
->_LinkedShaders
[i
]);
3080 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
3081 _mesa_shader_stage_to_program(i
),
3083 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3090 build_program_resource_list(ctx
, prog
);
3091 return prog
->data
->LinkStatus
;
3095 * Link a GLSL shader program. Called via glLinkProgram().
3098 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3102 _mesa_clear_shader_program_data(ctx
, prog
);
3104 prog
->data
->LinkStatus
= linking_success
;
3106 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3107 if (!prog
->Shaders
[i
]->CompileStatus
) {
3108 linker_error(prog
, "linking with uncompiled shader");
3112 if (prog
->data
->LinkStatus
) {
3113 link_shaders(ctx
, prog
);
3116 if (prog
->data
->LinkStatus
) {
3117 if (!ctx
->Driver
.LinkShader(ctx
, prog
)) {
3118 prog
->data
->LinkStatus
= linking_failure
;
3122 /* Return early if we are loading the shader from on-disk cache */
3123 if (prog
->data
->LinkStatus
== linking_skipped
)
3126 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
3127 if (!prog
->data
->LinkStatus
) {
3128 fprintf(stderr
, "GLSL shader program %d failed to link\n", prog
->Name
);
3131 if (prog
->data
->InfoLog
&& prog
->data
->InfoLog
[0] != 0) {
3132 fprintf(stderr
, "GLSL shader program %d info log:\n", prog
->Name
);
3133 fprintf(stderr
, "%s\n", prog
->data
->InfoLog
);
3137 #ifdef ENABLE_SHADER_CACHE
3138 if (prog
->data
->LinkStatus
)
3139 shader_cache_write_program_metadata(ctx
, prog
);