2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
34 #include "main/macros.h"
35 #include "main/mtypes.h"
36 #include "main/shaderapi.h"
37 #include "main/shaderobj.h"
38 #include "main/uniforms.h"
39 #include "compiler/glsl/ast.h"
40 #include "compiler/glsl/ir.h"
41 #include "compiler/glsl/ir_expression_flattening.h"
42 #include "compiler/glsl/ir_visitor.h"
43 #include "compiler/glsl/ir_optimization.h"
44 #include "compiler/glsl/ir_uniform.h"
45 #include "compiler/glsl/glsl_parser_extras.h"
46 #include "compiler/glsl_types.h"
47 #include "compiler/glsl/linker.h"
48 #include "compiler/glsl/program.h"
49 #include "program/hash_table.h"
50 #include "program/prog_instruction.h"
51 #include "program/prog_optimize.h"
52 #include "program/prog_print.h"
53 #include "program/program.h"
54 #include "program/prog_parameter.h"
57 static int swizzle_for_size(int size
);
65 * This struct is a corresponding struct to Mesa prog_src_register, with
70 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
74 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
75 this->swizzle
= swizzle_for_size(type
->vector_elements
);
77 this->swizzle
= SWIZZLE_XYZW
;
84 this->file
= PROGRAM_UNDEFINED
;
91 explicit src_reg(dst_reg reg
);
93 gl_register_file file
; /**< PROGRAM_* from Mesa */
94 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
95 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
96 int negate
; /**< NEGATE_XYZW mask from mesa */
97 /** Register index should be offset by the integer in this reg. */
103 dst_reg(gl_register_file file
, int writemask
)
107 this->writemask
= writemask
;
108 this->reladdr
= NULL
;
113 this->file
= PROGRAM_UNDEFINED
;
116 this->reladdr
= NULL
;
119 explicit dst_reg(src_reg reg
);
121 gl_register_file file
; /**< PROGRAM_* from Mesa */
122 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
123 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
124 /** Register index should be offset by the integer in this reg. */
128 } /* anonymous namespace */
130 src_reg::src_reg(dst_reg reg
)
132 this->file
= reg
.file
;
133 this->index
= reg
.index
;
134 this->swizzle
= SWIZZLE_XYZW
;
136 this->reladdr
= reg
.reladdr
;
139 dst_reg::dst_reg(src_reg reg
)
141 this->file
= reg
.file
;
142 this->index
= reg
.index
;
143 this->writemask
= WRITEMASK_XYZW
;
144 this->reladdr
= reg
.reladdr
;
149 class ir_to_mesa_instruction
: public exec_node
{
151 DECLARE_RALLOC_CXX_OPERATORS(ir_to_mesa_instruction
)
156 /** Pointer to the ir source this tree came from for debugging */
159 int sampler
; /**< sampler index */
160 int tex_target
; /**< One of TEXTURE_*_INDEX */
161 GLboolean tex_shadow
;
164 class variable_storage
: public exec_node
{
166 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
167 : file(file
), index(index
), var(var
)
172 gl_register_file file
;
174 ir_variable
*var
; /* variable that maps to this, if any */
177 class function_entry
: public exec_node
{
179 ir_function_signature
*sig
;
182 * identifier of this function signature used by the program.
184 * At the point that Mesa instructions for function calls are
185 * generated, we don't know the address of the first instruction of
186 * the function body. So we make the BranchTarget that is called a
187 * small integer and rewrite them during set_branchtargets().
192 * Pointer to first instruction of the function body.
194 * Set during function body emits after main() is processed.
196 ir_to_mesa_instruction
*bgn_inst
;
199 * Index of the first instruction of the function body in actual
202 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
206 /** Storage for the return value. */
210 class ir_to_mesa_visitor
: public ir_visitor
{
212 ir_to_mesa_visitor();
213 ~ir_to_mesa_visitor();
215 function_entry
*current_function
;
217 struct gl_context
*ctx
;
218 struct gl_program
*prog
;
219 struct gl_shader_program
*shader_program
;
220 struct gl_shader_compiler_options
*options
;
224 variable_storage
*find_variable_storage(const ir_variable
*var
);
226 src_reg
get_temp(const glsl_type
*type
);
227 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
229 src_reg
src_reg_for_float(float val
);
232 * \name Visit methods
234 * As typical for the visitor pattern, there must be one \c visit method for
235 * each concrete subclass of \c ir_instruction. Virtual base classes within
236 * the hierarchy should not have \c visit methods.
239 virtual void visit(ir_variable
*);
240 virtual void visit(ir_loop
*);
241 virtual void visit(ir_loop_jump
*);
242 virtual void visit(ir_function_signature
*);
243 virtual void visit(ir_function
*);
244 virtual void visit(ir_expression
*);
245 virtual void visit(ir_swizzle
*);
246 virtual void visit(ir_dereference_variable
*);
247 virtual void visit(ir_dereference_array
*);
248 virtual void visit(ir_dereference_record
*);
249 virtual void visit(ir_assignment
*);
250 virtual void visit(ir_constant
*);
251 virtual void visit(ir_call
*);
252 virtual void visit(ir_return
*);
253 virtual void visit(ir_discard
*);
254 virtual void visit(ir_texture
*);
255 virtual void visit(ir_if
*);
256 virtual void visit(ir_emit_vertex
*);
257 virtual void visit(ir_end_primitive
*);
258 virtual void visit(ir_barrier
*);
263 /** List of variable_storage */
266 /** List of function_entry */
267 exec_list function_signatures
;
268 int next_signature_id
;
270 /** List of ir_to_mesa_instruction */
271 exec_list instructions
;
273 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
275 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
276 dst_reg dst
, src_reg src0
);
278 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
279 dst_reg dst
, src_reg src0
, src_reg src1
);
281 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
283 src_reg src0
, src_reg src1
, src_reg src2
);
286 * Emit the correct dot-product instruction for the type of arguments
288 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
294 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
295 dst_reg dst
, src_reg src0
);
297 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
298 dst_reg dst
, src_reg src0
, src_reg src1
);
300 bool try_emit_mad(ir_expression
*ir
,
302 bool try_emit_mad_for_and_not(ir_expression
*ir
,
305 void emit_swz(ir_expression
*ir
);
307 void emit_equality_comparison(ir_expression
*ir
, enum prog_opcode op
,
309 const src_reg
&src0
, const src_reg
&src1
);
311 inline void emit_sne(ir_expression
*ir
, dst_reg dst
,
312 const src_reg
&src0
, const src_reg
&src1
)
314 emit_equality_comparison(ir
, OPCODE_SLT
, dst
, src0
, src1
);
317 inline void emit_seq(ir_expression
*ir
, dst_reg dst
,
318 const src_reg
&src0
, const src_reg
&src1
)
320 emit_equality_comparison(ir
, OPCODE_SGE
, dst
, src0
, src1
);
323 bool process_move_condition(ir_rvalue
*ir
);
325 void copy_propagate(void);
330 } /* anonymous namespace */
332 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
334 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
336 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
339 swizzle_for_size(int size
)
341 static const int size_swizzles
[4] = {
342 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
343 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
344 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
345 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
348 assert((size
>= 1) && (size
<= 4));
349 return size_swizzles
[size
- 1];
352 ir_to_mesa_instruction
*
353 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
355 src_reg src0
, src_reg src1
, src_reg src2
)
357 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
360 /* If we have to do relative addressing, we want to load the ARL
361 * reg directly for one of the regs, and preload the other reladdr
362 * sources into temps.
364 num_reladdr
+= dst
.reladdr
!= NULL
;
365 num_reladdr
+= src0
.reladdr
!= NULL
;
366 num_reladdr
+= src1
.reladdr
!= NULL
;
367 num_reladdr
+= src2
.reladdr
!= NULL
;
369 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
370 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
371 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
374 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
377 assert(num_reladdr
== 0);
386 this->instructions
.push_tail(inst
);
392 ir_to_mesa_instruction
*
393 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
394 dst_reg dst
, src_reg src0
, src_reg src1
)
396 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
399 ir_to_mesa_instruction
*
400 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
401 dst_reg dst
, src_reg src0
)
403 assert(dst
.writemask
!= 0);
404 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
407 ir_to_mesa_instruction
*
408 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
410 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
413 ir_to_mesa_instruction
*
414 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
415 dst_reg dst
, src_reg src0
, src_reg src1
,
418 static const enum prog_opcode dot_opcodes
[] = {
419 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
422 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
426 * Emits Mesa scalar opcodes to produce unique answers across channels.
428 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
429 * channel determines the result across all channels. So to do a vec4
430 * of this operation, we want to emit a scalar per source channel used
431 * to produce dest channels.
434 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
436 src_reg orig_src0
, src_reg orig_src1
)
439 int done_mask
= ~dst
.writemask
;
441 /* Mesa RCP is a scalar operation splatting results to all channels,
442 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
445 for (i
= 0; i
< 4; i
++) {
446 GLuint this_mask
= (1 << i
);
447 ir_to_mesa_instruction
*inst
;
448 src_reg src0
= orig_src0
;
449 src_reg src1
= orig_src1
;
451 if (done_mask
& this_mask
)
454 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
455 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
456 for (j
= i
+ 1; j
< 4; j
++) {
457 /* If there is another enabled component in the destination that is
458 * derived from the same inputs, generate its value on this pass as
461 if (!(done_mask
& (1 << j
)) &&
462 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
463 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
464 this_mask
|= (1 << j
);
467 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
468 src0_swiz
, src0_swiz
);
469 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
470 src1_swiz
, src1_swiz
);
472 inst
= emit(ir
, op
, dst
, src0
, src1
);
473 inst
->dst
.writemask
= this_mask
;
474 done_mask
|= this_mask
;
479 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
480 dst_reg dst
, src_reg src0
)
482 src_reg undef
= undef_src
;
484 undef
.swizzle
= SWIZZLE_XXXX
;
486 emit_scalar(ir
, op
, dst
, src0
, undef
);
490 ir_to_mesa_visitor::src_reg_for_float(float val
)
492 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
494 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
495 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
501 type_size(const struct glsl_type
*type
)
506 switch (type
->base_type
) {
509 case GLSL_TYPE_FLOAT
:
511 if (type
->is_matrix()) {
512 return type
->matrix_columns
;
514 /* Regardless of size of vector, it gets a vec4. This is bad
515 * packing for things like floats, but otherwise arrays become a
516 * mess. Hopefully a later pass over the code can pack scalars
517 * down if appropriate.
522 case GLSL_TYPE_DOUBLE
:
523 if (type
->is_matrix()) {
524 if (type
->vector_elements
> 2)
525 return type
->matrix_columns
* 2;
527 return type
->matrix_columns
;
529 if (type
->vector_elements
> 2)
535 case GLSL_TYPE_ARRAY
:
536 assert(type
->length
> 0);
537 return type_size(type
->fields
.array
) * type
->length
;
538 case GLSL_TYPE_STRUCT
:
540 for (i
= 0; i
< type
->length
; i
++) {
541 size
+= type_size(type
->fields
.structure
[i
].type
);
544 case GLSL_TYPE_SAMPLER
:
545 case GLSL_TYPE_IMAGE
:
546 case GLSL_TYPE_SUBROUTINE
:
547 /* Samplers take up one slot in UNIFORMS[], but they're baked in
551 case GLSL_TYPE_ATOMIC_UINT
:
553 case GLSL_TYPE_ERROR
:
554 case GLSL_TYPE_INTERFACE
:
555 case GLSL_TYPE_FUNCTION
:
556 assert(!"Invalid type in type_size");
564 * In the initial pass of codegen, we assign temporary numbers to
565 * intermediate results. (not SSA -- variable assignments will reuse
566 * storage). Actual register allocation for the Mesa VM occurs in a
567 * pass over the Mesa IR later.
570 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
574 src
.file
= PROGRAM_TEMPORARY
;
575 src
.index
= next_temp
;
577 next_temp
+= type_size(type
);
579 if (type
->is_array() || type
->is_record()) {
580 src
.swizzle
= SWIZZLE_NOOP
;
582 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
590 ir_to_mesa_visitor::find_variable_storage(const ir_variable
*var
)
592 foreach_in_list(variable_storage
, entry
, &this->variables
) {
593 if (entry
->var
== var
)
601 ir_to_mesa_visitor::visit(ir_variable
*ir
)
603 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
604 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
606 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
607 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
610 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
612 const ir_state_slot
*const slots
= ir
->get_state_slots();
613 assert(slots
!= NULL
);
615 /* Check if this statevar's setup in the STATE file exactly
616 * matches how we'll want to reference it as a
617 * struct/array/whatever. If not, then we need to move it into
618 * temporary storage and hope that it'll get copy-propagated
621 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
622 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
627 variable_storage
*storage
;
629 if (i
== ir
->get_num_state_slots()) {
630 /* We'll set the index later. */
631 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
632 this->variables
.push_tail(storage
);
636 /* The variable_storage constructor allocates slots based on the size
637 * of the type. However, this had better match the number of state
638 * elements that we're going to copy into the new temporary.
640 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
642 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
644 this->variables
.push_tail(storage
);
645 this->next_temp
+= type_size(ir
->type
);
647 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
651 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
652 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
653 (gl_state_index
*)slots
[i
].tokens
);
655 if (storage
->file
== PROGRAM_STATE_VAR
) {
656 if (storage
->index
== -1) {
657 storage
->index
= index
;
659 assert(index
== storage
->index
+ (int)i
);
662 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
663 src
.swizzle
= slots
[i
].swizzle
;
664 emit(ir
, OPCODE_MOV
, dst
, src
);
665 /* even a float takes up a whole vec4 reg in a struct/array. */
670 if (storage
->file
== PROGRAM_TEMPORARY
&&
671 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
672 linker_error(this->shader_program
,
673 "failed to load builtin uniform `%s' "
674 "(%d/%d regs loaded)\n",
675 ir
->name
, dst
.index
- storage
->index
,
676 type_size(ir
->type
));
682 ir_to_mesa_visitor::visit(ir_loop
*ir
)
684 emit(NULL
, OPCODE_BGNLOOP
);
686 visit_exec_list(&ir
->body_instructions
, this);
688 emit(NULL
, OPCODE_ENDLOOP
);
692 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
695 case ir_loop_jump::jump_break
:
696 emit(NULL
, OPCODE_BRK
);
698 case ir_loop_jump::jump_continue
:
699 emit(NULL
, OPCODE_CONT
);
706 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
713 ir_to_mesa_visitor::visit(ir_function
*ir
)
715 /* Ignore function bodies other than main() -- we shouldn't see calls to
716 * them since they should all be inlined before we get to ir_to_mesa.
718 if (strcmp(ir
->name
, "main") == 0) {
719 const ir_function_signature
*sig
;
722 sig
= ir
->matching_signature(NULL
, &empty
, false);
726 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
733 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
735 int nonmul_operand
= 1 - mul_operand
;
738 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
739 if (!expr
|| expr
->operation
!= ir_binop_mul
)
742 expr
->operands
[0]->accept(this);
744 expr
->operands
[1]->accept(this);
746 ir
->operands
[nonmul_operand
]->accept(this);
749 this->result
= get_temp(ir
->type
);
750 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
756 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
758 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
759 * implemented using multiplication, and logical-or is implemented using
760 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
761 * As result, the logical expression (a & !b) can be rewritten as:
765 * - (a * 1) - (a * b)
769 * This final expression can be implemented as a single MAD(a, -b, a)
773 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
775 const int other_operand
= 1 - try_operand
;
778 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
779 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
782 ir
->operands
[other_operand
]->accept(this);
784 expr
->operands
[0]->accept(this);
787 b
.negate
= ~b
.negate
;
789 this->result
= get_temp(ir
->type
);
790 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
796 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
797 src_reg
*reg
, int *num_reladdr
)
802 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
804 if (*num_reladdr
!= 1) {
805 src_reg temp
= get_temp(glsl_type::vec4_type
);
807 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
815 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
817 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
818 * This means that each of the operands is either an immediate value of -1,
819 * 0, or 1, or is a component from one source register (possibly with
822 uint8_t components
[4] = { 0 };
823 bool negate
[4] = { false };
824 ir_variable
*var
= NULL
;
826 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
827 ir_rvalue
*op
= ir
->operands
[i
];
829 assert(op
->type
->is_scalar());
832 switch (op
->ir_type
) {
833 case ir_type_constant
: {
835 assert(op
->type
->is_scalar());
837 const ir_constant
*const c
= op
->as_constant();
839 components
[i
] = SWIZZLE_ONE
;
840 } else if (c
->is_zero()) {
841 components
[i
] = SWIZZLE_ZERO
;
842 } else if (c
->is_negative_one()) {
843 components
[i
] = SWIZZLE_ONE
;
846 assert(!"SWZ constant must be 0.0 or 1.0.");
853 case ir_type_dereference_variable
: {
854 ir_dereference_variable
*const deref
=
855 (ir_dereference_variable
*) op
;
857 assert((var
== NULL
) || (deref
->var
== var
));
858 components
[i
] = SWIZZLE_X
;
864 case ir_type_expression
: {
865 ir_expression
*const expr
= (ir_expression
*) op
;
867 assert(expr
->operation
== ir_unop_neg
);
870 op
= expr
->operands
[0];
874 case ir_type_swizzle
: {
875 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
877 components
[i
] = swiz
->mask
.x
;
883 assert(!"Should not get here.");
891 ir_dereference_variable
*const deref
=
892 new(mem_ctx
) ir_dereference_variable(var
);
894 this->result
.file
= PROGRAM_UNDEFINED
;
896 if (this->result
.file
== PROGRAM_UNDEFINED
) {
897 printf("Failed to get tree for expression operand:\n");
906 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
910 src
.negate
= ((unsigned(negate
[0]) << 0)
911 | (unsigned(negate
[1]) << 1)
912 | (unsigned(negate
[2]) << 2)
913 | (unsigned(negate
[3]) << 3));
915 /* Storage for our result. Ideally for an assignment we'd be using the
916 * actual storage for the result here, instead.
918 const src_reg result_src
= get_temp(ir
->type
);
919 dst_reg result_dst
= dst_reg(result_src
);
921 /* Limit writes to the channels that will be used by result_src later.
922 * This does limit this temp's use as a temporary for multi-instruction
925 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
927 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
928 this->result
= result_src
;
932 ir_to_mesa_visitor::emit_equality_comparison(ir_expression
*ir
,
939 src_reg abs_difference
= get_temp(glsl_type::vec4_type
);
940 const src_reg zero
= src_reg_for_float(0.0);
942 /* x == y is equivalent to -abs(x-y) >= 0. Since all of the code that
943 * consumes the generated IR is pretty dumb, take special care when one
944 * of the operands is zero.
946 * Similarly, x != y is equivalent to -abs(x-y) < 0.
948 if (src0
.file
== zero
.file
&&
949 src0
.index
== zero
.index
&&
950 src0
.swizzle
== zero
.swizzle
) {
952 } else if (src1
.file
== zero
.file
&&
953 src1
.index
== zero
.index
&&
954 src1
.swizzle
== zero
.swizzle
) {
957 difference
= get_temp(glsl_type::vec4_type
);
959 src_reg tmp_src
= src0
;
960 tmp_src
.negate
= ~tmp_src
.negate
;
962 emit(ir
, OPCODE_ADD
, dst_reg(difference
), tmp_src
, src1
);
965 emit(ir
, OPCODE_ABS
, dst_reg(abs_difference
), difference
);
967 abs_difference
.negate
= ~abs_difference
.negate
;
968 emit(ir
, op
, dst
, abs_difference
, zero
);
972 ir_to_mesa_visitor::visit(ir_expression
*ir
)
974 unsigned int operand
;
975 src_reg op
[ARRAY_SIZE(ir
->operands
)];
979 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
981 if (ir
->operation
== ir_binop_add
) {
982 if (try_emit_mad(ir
, 1))
984 if (try_emit_mad(ir
, 0))
988 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
990 if (ir
->operation
== ir_binop_logic_and
) {
991 if (try_emit_mad_for_and_not(ir
, 1))
993 if (try_emit_mad_for_and_not(ir
, 0))
997 if (ir
->operation
== ir_quadop_vector
) {
1002 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1003 this->result
.file
= PROGRAM_UNDEFINED
;
1004 ir
->operands
[operand
]->accept(this);
1005 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1006 printf("Failed to get tree for expression operand:\n");
1007 ir
->operands
[operand
]->print();
1011 op
[operand
] = this->result
;
1013 /* Matrix expression operands should have been broken down to vector
1014 * operations already.
1016 assert(!ir
->operands
[operand
]->type
->is_matrix());
1019 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1020 if (ir
->operands
[1]) {
1021 vector_elements
= MAX2(vector_elements
,
1022 ir
->operands
[1]->type
->vector_elements
);
1025 this->result
.file
= PROGRAM_UNDEFINED
;
1027 /* Storage for our result. Ideally for an assignment we'd be using
1028 * the actual storage for the result here, instead.
1030 result_src
= get_temp(ir
->type
);
1031 /* convenience for the emit functions below. */
1032 result_dst
= dst_reg(result_src
);
1033 /* Limit writes to the channels that will be used by result_src later.
1034 * This does limit this temp's use as a temporary for multi-instruction
1037 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1039 switch (ir
->operation
) {
1040 case ir_unop_logic_not
:
1041 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1042 * older GPUs implement SEQ using multiple instructions (i915 uses two
1043 * SGE instructions and a MUL instruction). Since our logic values are
1044 * 0.0 and 1.0, 1-x also implements !x.
1046 op
[0].negate
= ~op
[0].negate
;
1047 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1050 op
[0].negate
= ~op
[0].negate
;
1054 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1057 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1060 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1064 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1068 assert(!"not reached: should be handled by ir_explog_to_explog2");
1071 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1074 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1077 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1081 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1084 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1087 case ir_unop_saturate
: {
1088 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_MOV
,
1090 inst
->saturate
= true;
1093 case ir_unop_noise
: {
1094 const enum prog_opcode opcode
=
1095 prog_opcode(OPCODE_NOISE1
1096 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1097 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1099 emit(ir
, opcode
, result_dst
, op
[0]);
1104 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1107 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1111 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1114 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1117 /* Floating point should be lowered by MOD_TO_FLOOR in the compiler. */
1118 assert(ir
->type
->is_integer());
1119 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1123 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1125 case ir_binop_greater
:
1126 /* Negating the operands (as opposed to switching the order of the
1127 * operands) produces the correct result when both are +/-Inf.
1129 op
[0].negate
= ~op
[0].negate
;
1130 op
[1].negate
= ~op
[1].negate
;
1131 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1133 case ir_binop_lequal
:
1134 /* Negating the operands (as opposed to switching the order of the
1135 * operands) produces the correct result when both are +/-Inf.
1137 op
[0].negate
= ~op
[0].negate
;
1138 op
[1].negate
= ~op
[1].negate
;
1139 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1141 case ir_binop_gequal
:
1142 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1144 case ir_binop_equal
:
1145 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1147 case ir_binop_nequal
:
1148 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1150 case ir_binop_all_equal
:
1151 /* "==" operator producing a scalar boolean. */
1152 if (ir
->operands
[0]->type
->is_vector() ||
1153 ir
->operands
[1]->type
->is_vector()) {
1154 src_reg temp
= get_temp(glsl_type::vec4_type
);
1155 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1157 /* After the dot-product, the value will be an integer on the
1158 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1160 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1162 /* Negating the result of the dot-product gives values on the range
1163 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1164 * achieved using SGE.
1166 src_reg sge_src
= result_src
;
1167 sge_src
.negate
= ~sge_src
.negate
;
1168 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1170 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1173 case ir_binop_any_nequal
:
1174 /* "!=" operator producing a scalar boolean. */
1175 if (ir
->operands
[0]->type
->is_vector() ||
1176 ir
->operands
[1]->type
->is_vector()) {
1177 src_reg temp
= get_temp(glsl_type::vec4_type
);
1178 if (ir
->operands
[0]->type
->is_boolean() &&
1179 ir
->operands
[1]->as_constant() &&
1180 ir
->operands
[1]->as_constant()->is_zero()) {
1183 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1186 /* After the dot-product, the value will be an integer on the
1187 * range [0,4]. Zero stays zero, and positive values become 1.0.
1189 ir_to_mesa_instruction
*const dp
=
1190 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1191 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1192 /* The clamping to [0,1] can be done for free in the fragment
1193 * shader with a saturate.
1195 dp
->saturate
= true;
1197 /* Negating the result of the dot-product gives values on the range
1198 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1199 * achieved using SLT.
1201 src_reg slt_src
= result_src
;
1202 slt_src
.negate
= ~slt_src
.negate
;
1203 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1206 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1210 case ir_binop_logic_xor
:
1211 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1214 case ir_binop_logic_or
: {
1215 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1216 /* After the addition, the value will be an integer on the
1217 * range [0,2]. Zero stays zero, and positive values become 1.0.
1219 ir_to_mesa_instruction
*add
=
1220 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1221 add
->saturate
= true;
1223 /* The Boolean arguments are stored as float 0.0 and 1.0. If either
1224 * value is 1.0, the result of the logcal-or should be 1.0. If both
1225 * values are 0.0, the result should be 0.0. This is exactly what
1228 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1233 case ir_binop_logic_and
:
1234 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1235 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1239 assert(ir
->operands
[0]->type
->is_vector());
1240 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1241 emit_dp(ir
, result_dst
, op
[0], op
[1],
1242 ir
->operands
[0]->type
->vector_elements
);
1246 /* sqrt(x) = x * rsq(x). */
1247 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1248 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1249 /* For incoming channels <= 0, set the result to 0. */
1250 op
[0].negate
= ~op
[0].negate
;
1251 emit(ir
, OPCODE_CMP
, result_dst
,
1252 op
[0], result_src
, src_reg_for_float(0.0));
1255 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1263 /* Mesa IR lacks types, ints are stored as truncated floats. */
1268 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1272 emit_sne(ir
, result_dst
, op
[0], src_reg_for_float(0.0));
1274 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1275 case ir_unop_bitcast_f2u
:
1276 case ir_unop_bitcast_i2f
:
1277 case ir_unop_bitcast_u2f
:
1280 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1283 op
[0].negate
= ~op
[0].negate
;
1284 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1285 result_src
.negate
= ~result_src
.negate
;
1288 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1291 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1293 case ir_unop_pack_snorm_2x16
:
1294 case ir_unop_pack_snorm_4x8
:
1295 case ir_unop_pack_unorm_2x16
:
1296 case ir_unop_pack_unorm_4x8
:
1297 case ir_unop_pack_half_2x16
:
1298 case ir_unop_pack_double_2x32
:
1299 case ir_unop_unpack_snorm_2x16
:
1300 case ir_unop_unpack_snorm_4x8
:
1301 case ir_unop_unpack_unorm_2x16
:
1302 case ir_unop_unpack_unorm_4x8
:
1303 case ir_unop_unpack_half_2x16
:
1304 case ir_unop_unpack_double_2x32
:
1305 case ir_unop_bitfield_reverse
:
1306 case ir_unop_bit_count
:
1307 case ir_unop_find_msb
:
1308 case ir_unop_find_lsb
:
1316 case ir_unop_frexp_sig
:
1317 case ir_unop_frexp_exp
:
1318 assert(!"not supported");
1321 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1324 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1327 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1330 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1331 * hardware backends have no way to avoid Mesa IR generation
1332 * even if they don't use it, we need to emit "something" and
1335 case ir_binop_lshift
:
1336 case ir_binop_rshift
:
1337 case ir_binop_bit_and
:
1338 case ir_binop_bit_xor
:
1339 case ir_binop_bit_or
:
1340 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1343 case ir_unop_bit_not
:
1344 case ir_unop_round_even
:
1345 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1348 case ir_binop_ubo_load
:
1349 assert(!"not supported");
1353 /* ir_triop_lrp operands are (x, y, a) while
1354 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1356 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1359 case ir_binop_vector_extract
:
1361 case ir_triop_bitfield_extract
:
1362 case ir_triop_vector_insert
:
1363 case ir_quadop_bitfield_insert
:
1364 case ir_binop_ldexp
:
1366 case ir_binop_carry
:
1367 case ir_binop_borrow
:
1368 case ir_binop_imul_high
:
1369 case ir_unop_interpolate_at_centroid
:
1370 case ir_binop_interpolate_at_offset
:
1371 case ir_binop_interpolate_at_sample
:
1372 case ir_unop_dFdx_coarse
:
1373 case ir_unop_dFdx_fine
:
1374 case ir_unop_dFdy_coarse
:
1375 case ir_unop_dFdy_fine
:
1376 case ir_unop_subroutine_to_int
:
1377 case ir_unop_get_buffer_size
:
1378 case ir_unop_vote_any
:
1379 case ir_unop_vote_all
:
1380 case ir_unop_vote_eq
:
1381 assert(!"not supported");
1384 case ir_unop_ssbo_unsized_array_length
:
1385 case ir_quadop_vector
:
1386 /* This operation should have already been handled.
1388 assert(!"Should not get here.");
1392 this->result
= result_src
;
1397 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1403 /* Note that this is only swizzles in expressions, not those on the left
1404 * hand side of an assignment, which do write masking. See ir_assignment
1408 ir
->val
->accept(this);
1410 assert(src
.file
!= PROGRAM_UNDEFINED
);
1411 assert(ir
->type
->vector_elements
> 0);
1413 for (i
= 0; i
< 4; i
++) {
1414 if (i
< ir
->type
->vector_elements
) {
1417 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1420 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1423 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1426 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1430 /* If the type is smaller than a vec4, replicate the last
1433 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1437 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1443 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1445 variable_storage
*entry
= find_variable_storage(ir
->var
);
1446 ir_variable
*var
= ir
->var
;
1449 switch (var
->data
.mode
) {
1450 case ir_var_uniform
:
1451 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1452 var
->data
.param_index
);
1453 this->variables
.push_tail(entry
);
1455 case ir_var_shader_in
:
1456 /* The linker assigns locations for varyings and attributes,
1457 * including deprecated builtins (like gl_Color),
1458 * user-assigned generic attributes (glBindVertexLocation),
1459 * and user-defined varyings.
1461 assert(var
->data
.location
!= -1);
1462 entry
= new(mem_ctx
) variable_storage(var
,
1464 var
->data
.location
);
1466 case ir_var_shader_out
:
1467 assert(var
->data
.location
!= -1);
1468 entry
= new(mem_ctx
) variable_storage(var
,
1470 var
->data
.location
);
1472 case ir_var_system_value
:
1473 entry
= new(mem_ctx
) variable_storage(var
,
1474 PROGRAM_SYSTEM_VALUE
,
1475 var
->data
.location
);
1478 case ir_var_temporary
:
1479 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1481 this->variables
.push_tail(entry
);
1483 next_temp
+= type_size(var
->type
);
1488 printf("Failed to make storage for %s\n", var
->name
);
1493 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1497 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1501 int element_size
= type_size(ir
->type
);
1503 index
= ir
->array_index
->constant_expression_value();
1505 ir
->array
->accept(this);
1509 src
.index
+= index
->value
.i
[0] * element_size
;
1511 /* Variable index array dereference. It eats the "vec4" of the
1512 * base of the array and an index that offsets the Mesa register
1515 ir
->array_index
->accept(this);
1519 if (element_size
== 1) {
1520 index_reg
= this->result
;
1522 index_reg
= get_temp(glsl_type::float_type
);
1524 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1525 this->result
, src_reg_for_float(element_size
));
1528 /* If there was already a relative address register involved, add the
1529 * new and the old together to get the new offset.
1531 if (src
.reladdr
!= NULL
) {
1532 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1534 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1535 index_reg
, *src
.reladdr
);
1537 index_reg
= accum_reg
;
1540 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1541 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1544 /* If the type is smaller than a vec4, replicate the last channel out. */
1545 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1546 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1548 src
.swizzle
= SWIZZLE_NOOP
;
1554 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1557 const glsl_type
*struct_type
= ir
->record
->type
;
1560 ir
->record
->accept(this);
1562 for (i
= 0; i
< struct_type
->length
; i
++) {
1563 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1565 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1568 /* If the type is smaller than a vec4, replicate the last channel out. */
1569 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1570 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1572 this->result
.swizzle
= SWIZZLE_NOOP
;
1574 this->result
.index
+= offset
;
1578 * We want to be careful in assignment setup to hit the actual storage
1579 * instead of potentially using a temporary like we might with the
1580 * ir_dereference handler.
1583 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1585 /* The LHS must be a dereference. If the LHS is a variable indexed array
1586 * access of a vector, it must be separated into a series conditional moves
1587 * before reaching this point (see ir_vec_index_to_cond_assign).
1589 assert(ir
->as_dereference());
1590 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1592 assert(!deref_array
->array
->type
->is_vector());
1595 /* Use the rvalue deref handler for the most part. We'll ignore
1596 * swizzles in it and write swizzles using writemask, though.
1599 return dst_reg(v
->result
);
1602 /* Calculate the sampler index and also calculate the base uniform location
1603 * for struct members.
1606 calc_sampler_offsets(struct gl_shader_program
*prog
, ir_dereference
*deref
,
1607 unsigned *offset
, unsigned *array_elements
,
1610 if (deref
->ir_type
== ir_type_dereference_variable
)
1613 switch (deref
->ir_type
) {
1614 case ir_type_dereference_array
: {
1615 ir_dereference_array
*deref_arr
= deref
->as_dereference_array();
1616 ir_constant
*array_index
=
1617 deref_arr
->array_index
->constant_expression_value();
1620 /* GLSL 1.10 and 1.20 allowed variable sampler array indices,
1621 * while GLSL 1.30 requires that the array indices be
1622 * constant integer expressions. We don't expect any driver
1623 * to actually work with a really variable array index, so
1624 * all that would work would be an unrolled loop counter that ends
1625 * up being constant above.
1627 ralloc_strcat(&prog
->InfoLog
,
1628 "warning: Variable sampler array index unsupported.\n"
1629 "This feature of the language was removed in GLSL 1.20 "
1630 "and is unlikely to be supported for 1.10 in Mesa.\n");
1632 *offset
+= array_index
->value
.u
[0] * *array_elements
;
1635 *array_elements
*= deref_arr
->array
->type
->length
;
1637 calc_sampler_offsets(prog
, deref_arr
->array
->as_dereference(),
1638 offset
, array_elements
, location
);
1642 case ir_type_dereference_record
: {
1643 ir_dereference_record
*deref_record
= deref
->as_dereference_record();
1644 unsigned field_index
=
1645 deref_record
->record
->type
->field_index(deref_record
->field
);
1647 deref_record
->record
->type
->record_location_offset(field_index
);
1648 calc_sampler_offsets(prog
, deref_record
->record
->as_dereference(),
1649 offset
, array_elements
, location
);
1654 unreachable("Invalid deref type");
1660 get_sampler_uniform_value(class ir_dereference
*sampler
,
1661 struct gl_shader_program
*shader_program
,
1662 const struct gl_program
*prog
)
1664 GLuint shader
= _mesa_program_enum_to_shader_stage(prog
->Target
);
1665 ir_variable
*var
= sampler
->variable_referenced();
1666 unsigned location
= var
->data
.location
;
1667 unsigned array_elements
= 1;
1668 unsigned offset
= 0;
1670 calc_sampler_offsets(shader_program
, sampler
, &offset
, &array_elements
,
1673 assert(shader_program
->UniformStorage
[location
].opaque
[shader
].active
);
1674 return shader_program
->UniformStorage
[location
].opaque
[shader
].index
+
1679 * Process the condition of a conditional assignment
1681 * Examines the condition of a conditional assignment to generate the optimal
1682 * first operand of a \c CMP instruction. If the condition is a relational
1683 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1684 * used as the source for the \c CMP instruction. Otherwise the comparison
1685 * is processed to a boolean result, and the boolean result is used as the
1686 * operand to the CMP instruction.
1689 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1691 ir_rvalue
*src_ir
= ir
;
1693 bool switch_order
= false;
1695 ir_expression
*const expr
= ir
->as_expression();
1696 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
1697 bool zero_on_left
= false;
1699 if (expr
->operands
[0]->is_zero()) {
1700 src_ir
= expr
->operands
[1];
1701 zero_on_left
= true;
1702 } else if (expr
->operands
[1]->is_zero()) {
1703 src_ir
= expr
->operands
[0];
1704 zero_on_left
= false;
1708 * (a < 0) T F F ( a < 0) T F F
1709 * (0 < a) F F T (-a < 0) F F T
1710 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1711 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1712 * (a > 0) F F T (-a < 0) F F T
1713 * (0 > a) T F F ( a < 0) T F F
1714 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1715 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1717 * Note that exchanging the order of 0 and 'a' in the comparison simply
1718 * means that the value of 'a' should be negated.
1721 switch (expr
->operation
) {
1723 switch_order
= false;
1724 negate
= zero_on_left
;
1727 case ir_binop_greater
:
1728 switch_order
= false;
1729 negate
= !zero_on_left
;
1732 case ir_binop_lequal
:
1733 switch_order
= true;
1734 negate
= !zero_on_left
;
1737 case ir_binop_gequal
:
1738 switch_order
= true;
1739 negate
= zero_on_left
;
1743 /* This isn't the right kind of comparison afterall, so make sure
1744 * the whole condition is visited.
1752 src_ir
->accept(this);
1754 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1755 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1756 * choose which value OPCODE_CMP produces without an extra instruction
1757 * computing the condition.
1760 this->result
.negate
= ~this->result
.negate
;
1762 return switch_order
;
1766 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1772 ir
->rhs
->accept(this);
1775 l
= get_assignment_lhs(ir
->lhs
, this);
1777 /* FINISHME: This should really set to the correct maximal writemask for each
1778 * FINISHME: component written (in the loops below). This case can only
1779 * FINISHME: occur for matrices, arrays, and structures.
1781 if (ir
->write_mask
== 0) {
1782 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1783 l
.writemask
= WRITEMASK_XYZW
;
1784 } else if (ir
->lhs
->type
->is_scalar()) {
1785 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1786 * FINISHME: W component of fragment shader output zero, work correctly.
1788 l
.writemask
= WRITEMASK_XYZW
;
1791 int first_enabled_chan
= 0;
1794 assert(ir
->lhs
->type
->is_vector());
1795 l
.writemask
= ir
->write_mask
;
1797 for (int i
= 0; i
< 4; i
++) {
1798 if (l
.writemask
& (1 << i
)) {
1799 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1804 /* Swizzle a small RHS vector into the channels being written.
1806 * glsl ir treats write_mask as dictating how many channels are
1807 * present on the RHS while Mesa IR treats write_mask as just
1808 * showing which channels of the vec4 RHS get written.
1810 for (int i
= 0; i
< 4; i
++) {
1811 if (l
.writemask
& (1 << i
))
1812 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1814 swizzles
[i
] = first_enabled_chan
;
1816 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1817 swizzles
[2], swizzles
[3]);
1820 assert(l
.file
!= PROGRAM_UNDEFINED
);
1821 assert(r
.file
!= PROGRAM_UNDEFINED
);
1823 if (ir
->condition
) {
1824 const bool switch_order
= this->process_move_condition(ir
->condition
);
1825 src_reg condition
= this->result
;
1827 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1829 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1831 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1838 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1839 emit(ir
, OPCODE_MOV
, l
, r
);
1848 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1851 GLfloat stack_vals
[4] = { 0 };
1852 GLfloat
*values
= stack_vals
;
1855 /* Unfortunately, 4 floats is all we can get into
1856 * _mesa_add_unnamed_constant. So, make a temp to store an
1857 * aggregate constant and move each constant value into it. If we
1858 * get lucky, copy propagation will eliminate the extra moves.
1861 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
1862 src_reg temp_base
= get_temp(ir
->type
);
1863 dst_reg temp
= dst_reg(temp_base
);
1865 foreach_in_list(ir_constant
, field_value
, &ir
->components
) {
1866 int size
= type_size(field_value
->type
);
1870 field_value
->accept(this);
1873 for (i
= 0; i
< (unsigned int)size
; i
++) {
1874 emit(ir
, OPCODE_MOV
, temp
, src
);
1880 this->result
= temp_base
;
1884 if (ir
->type
->is_array()) {
1885 src_reg temp_base
= get_temp(ir
->type
);
1886 dst_reg temp
= dst_reg(temp_base
);
1887 int size
= type_size(ir
->type
->fields
.array
);
1891 for (i
= 0; i
< ir
->type
->length
; i
++) {
1892 ir
->array_elements
[i
]->accept(this);
1894 for (int j
= 0; j
< size
; j
++) {
1895 emit(ir
, OPCODE_MOV
, temp
, src
);
1901 this->result
= temp_base
;
1905 if (ir
->type
->is_matrix()) {
1906 src_reg mat
= get_temp(ir
->type
);
1907 dst_reg mat_column
= dst_reg(mat
);
1909 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1910 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1911 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1913 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1914 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1915 (gl_constant_value
*) values
,
1916 ir
->type
->vector_elements
,
1918 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1927 src
.file
= PROGRAM_CONSTANT
;
1928 switch (ir
->type
->base_type
) {
1929 case GLSL_TYPE_FLOAT
:
1930 values
= &ir
->value
.f
[0];
1932 case GLSL_TYPE_UINT
:
1933 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1934 values
[i
] = ir
->value
.u
[i
];
1938 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1939 values
[i
] = ir
->value
.i
[i
];
1942 case GLSL_TYPE_BOOL
:
1943 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1944 values
[i
] = ir
->value
.b
[i
];
1948 assert(!"Non-float/uint/int/bool constant");
1951 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1952 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1953 (gl_constant_value
*) values
,
1954 ir
->type
->vector_elements
,
1955 &this->result
.swizzle
);
1959 ir_to_mesa_visitor::visit(ir_call
*)
1961 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
1965 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1967 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
1968 dst_reg result_dst
, coord_dst
;
1969 ir_to_mesa_instruction
*inst
= NULL
;
1970 prog_opcode opcode
= OPCODE_NOP
;
1972 if (ir
->op
== ir_txs
)
1973 this->result
= src_reg_for_float(0.0);
1975 ir
->coordinate
->accept(this);
1977 /* Put our coords in a temp. We'll need to modify them for shadow,
1978 * projection, or LOD, so the only case we'd use it as-is is if
1979 * we're doing plain old texturing. Mesa IR optimization should
1980 * handle cleaning up our mess in that case.
1982 coord
= get_temp(glsl_type::vec4_type
);
1983 coord_dst
= dst_reg(coord
);
1984 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
1986 if (ir
->projector
) {
1987 ir
->projector
->accept(this);
1988 projector
= this->result
;
1991 /* Storage for our result. Ideally for an assignment we'd be using
1992 * the actual storage for the result here, instead.
1994 result_src
= get_temp(glsl_type::vec4_type
);
1995 result_dst
= dst_reg(result_src
);
2000 opcode
= OPCODE_TEX
;
2003 opcode
= OPCODE_TXB
;
2004 ir
->lod_info
.bias
->accept(this);
2005 lod_info
= this->result
;
2008 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2010 opcode
= OPCODE_TXL
;
2011 ir
->lod_info
.lod
->accept(this);
2012 lod_info
= this->result
;
2015 opcode
= OPCODE_TXD
;
2016 ir
->lod_info
.grad
.dPdx
->accept(this);
2018 ir
->lod_info
.grad
.dPdy
->accept(this);
2022 assert(!"Unexpected ir_txf_ms opcode");
2025 assert(!"Unexpected ir_lod opcode");
2028 assert(!"Unexpected ir_tg4 opcode");
2030 case ir_query_levels
:
2031 assert(!"Unexpected ir_query_levels opcode");
2033 case ir_samples_identical
:
2034 unreachable("Unexpected ir_samples_identical opcode");
2035 case ir_texture_samples
:
2036 unreachable("Unexpected ir_texture_samples opcode");
2039 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2041 if (ir
->projector
) {
2042 if (opcode
== OPCODE_TEX
) {
2043 /* Slot the projector in as the last component of the coord. */
2044 coord_dst
.writemask
= WRITEMASK_W
;
2045 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2046 coord_dst
.writemask
= WRITEMASK_XYZW
;
2047 opcode
= OPCODE_TXP
;
2049 src_reg coord_w
= coord
;
2050 coord_w
.swizzle
= SWIZZLE_WWWW
;
2052 /* For the other TEX opcodes there's no projective version
2053 * since the last slot is taken up by lod info. Do the
2054 * projective divide now.
2056 coord_dst
.writemask
= WRITEMASK_W
;
2057 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2059 /* In the case where we have to project the coordinates "by hand,"
2060 * the shadow comparitor value must also be projected.
2062 src_reg tmp_src
= coord
;
2063 if (ir
->shadow_comparitor
) {
2064 /* Slot the shadow value in as the second to last component of the
2067 ir
->shadow_comparitor
->accept(this);
2069 tmp_src
= get_temp(glsl_type::vec4_type
);
2070 dst_reg tmp_dst
= dst_reg(tmp_src
);
2072 /* Projective division not allowed for array samplers. */
2073 assert(!sampler_type
->sampler_array
);
2075 tmp_dst
.writemask
= WRITEMASK_Z
;
2076 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2078 tmp_dst
.writemask
= WRITEMASK_XY
;
2079 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2082 coord_dst
.writemask
= WRITEMASK_XYZ
;
2083 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2085 coord_dst
.writemask
= WRITEMASK_XYZW
;
2086 coord
.swizzle
= SWIZZLE_XYZW
;
2090 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2091 * comparitor was put in the correct place (and projected) by the code,
2092 * above, that handles by-hand projection.
2094 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2095 /* Slot the shadow value in as the second to last component of the
2098 ir
->shadow_comparitor
->accept(this);
2100 /* XXX This will need to be updated for cubemap array samplers. */
2101 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2102 sampler_type
->sampler_array
) {
2103 coord_dst
.writemask
= WRITEMASK_W
;
2105 coord_dst
.writemask
= WRITEMASK_Z
;
2108 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2109 coord_dst
.writemask
= WRITEMASK_XYZW
;
2112 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2113 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2114 coord_dst
.writemask
= WRITEMASK_W
;
2115 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2116 coord_dst
.writemask
= WRITEMASK_XYZW
;
2119 if (opcode
== OPCODE_TXD
)
2120 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2122 inst
= emit(ir
, opcode
, result_dst
, coord
);
2124 if (ir
->shadow_comparitor
)
2125 inst
->tex_shadow
= GL_TRUE
;
2127 inst
->sampler
= get_sampler_uniform_value(ir
->sampler
, shader_program
,
2130 switch (sampler_type
->sampler_dimensionality
) {
2131 case GLSL_SAMPLER_DIM_1D
:
2132 inst
->tex_target
= (sampler_type
->sampler_array
)
2133 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2135 case GLSL_SAMPLER_DIM_2D
:
2136 inst
->tex_target
= (sampler_type
->sampler_array
)
2137 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2139 case GLSL_SAMPLER_DIM_3D
:
2140 inst
->tex_target
= TEXTURE_3D_INDEX
;
2142 case GLSL_SAMPLER_DIM_CUBE
:
2143 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2145 case GLSL_SAMPLER_DIM_RECT
:
2146 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2148 case GLSL_SAMPLER_DIM_BUF
:
2149 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2151 case GLSL_SAMPLER_DIM_EXTERNAL
:
2152 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2155 assert(!"Should not get here.");
2158 this->result
= result_src
;
2162 ir_to_mesa_visitor::visit(ir_return
*ir
)
2164 /* Non-void functions should have been inlined. We may still emit RETs
2165 * from main() unless the EmitNoMainReturn option is set.
2167 assert(!ir
->get_value());
2168 emit(ir
, OPCODE_RET
);
2172 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2175 ir
->condition
= new(mem_ctx
) ir_constant(true);
2177 ir
->condition
->accept(this);
2178 this->result
.negate
= ~this->result
.negate
;
2179 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2183 ir_to_mesa_visitor::visit(ir_if
*ir
)
2185 ir_to_mesa_instruction
*if_inst
;
2187 ir
->condition
->accept(this);
2188 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2190 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2192 this->instructions
.push_tail(if_inst
);
2194 visit_exec_list(&ir
->then_instructions
, this);
2196 if (!ir
->else_instructions
.is_empty()) {
2197 emit(ir
->condition
, OPCODE_ELSE
);
2198 visit_exec_list(&ir
->else_instructions
, this);
2201 emit(ir
->condition
, OPCODE_ENDIF
);
2205 ir_to_mesa_visitor::visit(ir_emit_vertex
*)
2207 assert(!"Geometry shaders not supported.");
2211 ir_to_mesa_visitor::visit(ir_end_primitive
*)
2213 assert(!"Geometry shaders not supported.");
2217 ir_to_mesa_visitor::visit(ir_barrier
*)
2219 unreachable("GLSL barrier() not supported.");
2222 ir_to_mesa_visitor::ir_to_mesa_visitor()
2224 result
.file
= PROGRAM_UNDEFINED
;
2226 next_signature_id
= 1;
2227 current_function
= NULL
;
2228 mem_ctx
= ralloc_context(NULL
);
2231 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2233 ralloc_free(mem_ctx
);
2236 static struct prog_src_register
2237 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2239 struct prog_src_register mesa_reg
;
2241 mesa_reg
.File
= reg
.file
;
2242 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2243 mesa_reg
.Index
= reg
.index
;
2244 mesa_reg
.Swizzle
= reg
.swizzle
;
2245 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2246 mesa_reg
.Negate
= reg
.negate
;
2252 set_branchtargets(ir_to_mesa_visitor
*v
,
2253 struct prog_instruction
*mesa_instructions
,
2254 int num_instructions
)
2256 int if_count
= 0, loop_count
= 0;
2257 int *if_stack
, *loop_stack
;
2258 int if_stack_pos
= 0, loop_stack_pos
= 0;
2261 for (i
= 0; i
< num_instructions
; i
++) {
2262 switch (mesa_instructions
[i
].Opcode
) {
2266 case OPCODE_BGNLOOP
:
2271 mesa_instructions
[i
].BranchTarget
= -1;
2278 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2279 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2281 for (i
= 0; i
< num_instructions
; i
++) {
2282 switch (mesa_instructions
[i
].Opcode
) {
2284 if_stack
[if_stack_pos
] = i
;
2288 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2289 if_stack
[if_stack_pos
- 1] = i
;
2292 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2295 case OPCODE_BGNLOOP
:
2296 loop_stack
[loop_stack_pos
] = i
;
2299 case OPCODE_ENDLOOP
:
2301 /* Rewrite any breaks/conts at this nesting level (haven't
2302 * already had a BranchTarget assigned) to point to the end
2305 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2306 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2307 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2308 if (mesa_instructions
[j
].BranchTarget
== -1) {
2309 mesa_instructions
[j
].BranchTarget
= i
;
2313 /* The loop ends point at each other. */
2314 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2315 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2318 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
2319 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2320 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2332 print_program(struct prog_instruction
*mesa_instructions
,
2333 ir_instruction
**mesa_instruction_annotation
,
2334 int num_instructions
)
2336 ir_instruction
*last_ir
= NULL
;
2340 for (i
= 0; i
< num_instructions
; i
++) {
2341 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2342 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2344 fprintf(stdout
, "%3d: ", i
);
2346 if (last_ir
!= ir
&& ir
) {
2349 for (j
= 0; j
< indent
; j
++) {
2350 fprintf(stdout
, " ");
2356 fprintf(stdout
, " "); /* line number spacing. */
2359 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2360 PROG_PRINT_DEBUG
, NULL
);
2366 class add_uniform_to_shader
: public program_resource_visitor
{
2368 add_uniform_to_shader(struct gl_shader_program
*shader_program
,
2369 struct gl_program_parameter_list
*params
,
2370 gl_shader_stage shader_type
)
2371 : shader_program(shader_program
), params(params
), idx(-1),
2372 shader_type(shader_type
)
2377 void process(ir_variable
*var
)
2380 this->program_resource_visitor::process(var
);
2381 var
->data
.param_index
= this->idx
;
2385 virtual void visit_field(const glsl_type
*type
, const char *name
,
2388 struct gl_shader_program
*shader_program
;
2389 struct gl_program_parameter_list
*params
;
2391 gl_shader_stage shader_type
;
2394 } /* anonymous namespace */
2397 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2404 /* atomics don't get real storage */
2405 if (type
->contains_atomic())
2408 if (type
->is_vector() || type
->is_scalar()) {
2409 size
= type
->vector_elements
;
2410 if (type
->is_64bit())
2413 size
= type_size(type
) * 4;
2416 gl_register_file file
;
2417 if (type
->without_array()->is_sampler()) {
2418 file
= PROGRAM_SAMPLER
;
2420 file
= PROGRAM_UNIFORM
;
2423 int index
= _mesa_lookup_parameter_index(params
, name
);
2425 index
= _mesa_add_parameter(params
, file
, name
, size
, type
->gl_type
,
2428 /* Sampler uniform values are stored in prog->SamplerUnits,
2429 * and the entry in that array is selected by this index we
2430 * store in ParameterValues[].
2432 if (file
== PROGRAM_SAMPLER
) {
2435 this->shader_program
->UniformHash
->get(location
,
2436 params
->Parameters
[index
].Name
);
2442 struct gl_uniform_storage
*storage
=
2443 &this->shader_program
->UniformStorage
[location
];
2445 assert(storage
->type
->is_sampler() &&
2446 storage
->opaque
[shader_type
].active
);
2448 for (unsigned int j
= 0; j
< size
/ 4; j
++)
2449 params
->ParameterValues
[index
+ j
][0].f
=
2450 storage
->opaque
[shader_type
].index
+ j
;
2454 /* The first part of the uniform that's processed determines the base
2455 * location of the whole uniform (for structures).
2462 * Generate the program parameters list for the user uniforms in a shader
2464 * \param shader_program Linked shader program. This is only used to
2465 * emit possible link errors to the info log.
2466 * \param sh Shader whose uniforms are to be processed.
2467 * \param params Parameter list to be filled in.
2470 _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program
2472 struct gl_shader
*sh
,
2473 struct gl_program_parameter_list
2476 add_uniform_to_shader
add(shader_program
, params
, sh
->Stage
);
2478 foreach_in_list(ir_instruction
, node
, sh
->ir
) {
2479 ir_variable
*var
= node
->as_variable();
2481 if ((var
== NULL
) || (var
->data
.mode
!= ir_var_uniform
)
2482 || var
->is_in_buffer_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2490 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2491 struct gl_shader_program
*shader_program
,
2492 struct gl_program_parameter_list
*params
)
2494 /* After adding each uniform to the parameter list, connect the storage for
2495 * the parameter with the tracking structure used by the API for the
2498 unsigned last_location
= unsigned(~0);
2499 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2500 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2505 shader_program
->UniformHash
->get(location
, params
->Parameters
[i
].Name
);
2511 struct gl_uniform_storage
*storage
=
2512 &shader_program
->UniformStorage
[location
];
2514 /* Do not associate any uniform storage to built-in uniforms */
2515 if (storage
->builtin
)
2518 if (location
!= last_location
) {
2519 enum gl_uniform_driver_format format
= uniform_native
;
2521 unsigned columns
= 0;
2522 int dmul
= 4 * sizeof(float);
2523 switch (storage
->type
->base_type
) {
2524 case GLSL_TYPE_UINT
:
2525 assert(ctx
->Const
.NativeIntegers
);
2526 format
= uniform_native
;
2531 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2535 case GLSL_TYPE_DOUBLE
:
2536 if (storage
->type
->vector_elements
> 2)
2539 case GLSL_TYPE_FLOAT
:
2540 format
= uniform_native
;
2541 columns
= storage
->type
->matrix_columns
;
2543 case GLSL_TYPE_BOOL
:
2544 format
= uniform_native
;
2547 case GLSL_TYPE_SAMPLER
:
2548 case GLSL_TYPE_IMAGE
:
2549 case GLSL_TYPE_SUBROUTINE
:
2550 format
= uniform_native
;
2553 case GLSL_TYPE_ATOMIC_UINT
:
2554 case GLSL_TYPE_ARRAY
:
2555 case GLSL_TYPE_VOID
:
2556 case GLSL_TYPE_STRUCT
:
2557 case GLSL_TYPE_ERROR
:
2558 case GLSL_TYPE_INTERFACE
:
2559 case GLSL_TYPE_FUNCTION
:
2560 assert(!"Should not get here.");
2564 _mesa_uniform_attach_driver_storage(storage
,
2568 ¶ms
->ParameterValues
[i
]);
2570 /* After attaching the driver's storage to the uniform, propagate any
2571 * data from the linker's backing store. This will cause values from
2572 * initializers in the source code to be copied over.
2574 _mesa_propagate_uniforms_to_driver_storage(storage
,
2576 MAX2(1, storage
->array_elements
));
2578 last_location
= location
;
2584 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2585 * channels for copy propagation and updates following instructions to
2586 * use the original versions.
2588 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2589 * will occur. As an example, a TXP production before this pass:
2591 * 0: MOV TEMP[1], INPUT[4].xyyy;
2592 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2593 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2597 * 0: MOV TEMP[1], INPUT[4].xyyy;
2598 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2599 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2601 * which allows for dead code elimination on TEMP[1]'s writes.
2604 ir_to_mesa_visitor::copy_propagate(void)
2606 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2607 ir_to_mesa_instruction
*,
2608 this->next_temp
* 4);
2609 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2612 foreach_in_list(ir_to_mesa_instruction
, inst
, &this->instructions
) {
2613 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2614 || inst
->dst
.index
< this->next_temp
);
2616 /* First, do any copy propagation possible into the src regs. */
2617 for (int r
= 0; r
< 3; r
++) {
2618 ir_to_mesa_instruction
*first
= NULL
;
2620 int acp_base
= inst
->src
[r
].index
* 4;
2622 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2623 inst
->src
[r
].reladdr
)
2626 /* See if we can find entries in the ACP consisting of MOVs
2627 * from the same src register for all the swizzled channels
2628 * of this src register reference.
2630 for (int i
= 0; i
< 4; i
++) {
2631 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2632 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2639 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2644 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2645 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2653 /* We've now validated that we can copy-propagate to
2654 * replace this src register reference. Do it.
2656 inst
->src
[r
].file
= first
->src
[0].file
;
2657 inst
->src
[r
].index
= first
->src
[0].index
;
2660 for (int i
= 0; i
< 4; i
++) {
2661 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2662 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2663 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2666 inst
->src
[r
].swizzle
= swizzle
;
2671 case OPCODE_BGNLOOP
:
2672 case OPCODE_ENDLOOP
:
2673 /* End of a basic block, clear the ACP entirely. */
2674 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2683 /* Clear all channels written inside the block from the ACP, but
2684 * leaving those that were not touched.
2686 for (int r
= 0; r
< this->next_temp
; r
++) {
2687 for (int c
= 0; c
< 4; c
++) {
2688 if (!acp
[4 * r
+ c
])
2691 if (acp_level
[4 * r
+ c
] >= level
)
2692 acp
[4 * r
+ c
] = NULL
;
2695 if (inst
->op
== OPCODE_ENDIF
)
2700 /* Continuing the block, clear any written channels from
2703 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2704 /* Any temporary might be written, so no copy propagation
2705 * across this instruction.
2707 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2708 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2709 inst
->dst
.reladdr
) {
2710 /* Any output might be written, so no copy propagation
2711 * from outputs across this instruction.
2713 for (int r
= 0; r
< this->next_temp
; r
++) {
2714 for (int c
= 0; c
< 4; c
++) {
2715 if (!acp
[4 * r
+ c
])
2718 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2719 acp
[4 * r
+ c
] = NULL
;
2722 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2723 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2724 /* Clear where it's used as dst. */
2725 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2726 for (int c
= 0; c
< 4; c
++) {
2727 if (inst
->dst
.writemask
& (1 << c
)) {
2728 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2733 /* Clear where it's used as src. */
2734 for (int r
= 0; r
< this->next_temp
; r
++) {
2735 for (int c
= 0; c
< 4; c
++) {
2736 if (!acp
[4 * r
+ c
])
2739 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2741 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2742 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2743 inst
->dst
.writemask
& (1 << src_chan
))
2745 acp
[4 * r
+ c
] = NULL
;
2753 /* If this is a copy, add it to the ACP. */
2754 if (inst
->op
== OPCODE_MOV
&&
2755 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2756 !(inst
->dst
.file
== inst
->src
[0].file
&&
2757 inst
->dst
.index
== inst
->src
[0].index
) &&
2758 !inst
->dst
.reladdr
&&
2760 !inst
->src
[0].reladdr
&&
2761 !inst
->src
[0].negate
) {
2762 for (int i
= 0; i
< 4; i
++) {
2763 if (inst
->dst
.writemask
& (1 << i
)) {
2764 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2765 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2771 ralloc_free(acp_level
);
2777 * Convert a shader's GLSL IR into a Mesa gl_program.
2779 static struct gl_program
*
2780 get_mesa_program(struct gl_context
*ctx
,
2781 struct gl_shader_program
*shader_program
,
2782 struct gl_shader
*shader
)
2784 ir_to_mesa_visitor v
;
2785 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2786 ir_instruction
**mesa_instruction_annotation
;
2788 struct gl_program
*prog
;
2789 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
2790 const char *target_string
= _mesa_shader_stage_to_string(shader
->Stage
);
2791 struct gl_shader_compiler_options
*options
=
2792 &ctx
->Const
.ShaderCompilerOptions
[shader
->Stage
];
2794 validate_ir_tree(shader
->ir
);
2796 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
2799 prog
->Parameters
= _mesa_new_parameter_list();
2802 v
.shader_program
= shader_program
;
2803 v
.options
= options
;
2805 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
2808 /* Emit Mesa IR for main(). */
2809 visit_exec_list(shader
->ir
, &v
);
2810 v
.emit(NULL
, OPCODE_END
);
2812 prog
->NumTemporaries
= v
.next_temp
;
2814 unsigned num_instructions
= v
.instructions
.length();
2817 (struct prog_instruction
*)calloc(num_instructions
,
2818 sizeof(*mesa_instructions
));
2819 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2824 /* Convert ir_mesa_instructions into prog_instructions.
2826 mesa_inst
= mesa_instructions
;
2828 foreach_in_list(const ir_to_mesa_instruction
, inst
, &v
.instructions
) {
2829 mesa_inst
->Opcode
= inst
->op
;
2831 mesa_inst
->Saturate
= GL_TRUE
;
2832 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2833 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2834 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2835 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2836 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2837 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2838 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2839 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2840 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2841 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2842 mesa_instruction_annotation
[i
] = inst
->ir
;
2844 /* Set IndirectRegisterFiles. */
2845 if (mesa_inst
->DstReg
.RelAddr
)
2846 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2848 /* Update program's bitmask of indirectly accessed register files */
2849 for (unsigned src
= 0; src
< 3; src
++)
2850 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2851 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2853 switch (mesa_inst
->Opcode
) {
2855 if (options
->MaxIfDepth
== 0) {
2856 linker_warning(shader_program
,
2857 "Couldn't flatten if-statement. "
2858 "This will likely result in software "
2859 "rasterization.\n");
2862 case OPCODE_BGNLOOP
:
2863 if (options
->EmitNoLoops
) {
2864 linker_warning(shader_program
,
2865 "Couldn't unroll loop. "
2866 "This will likely result in software "
2867 "rasterization.\n");
2871 if (options
->EmitNoCont
) {
2872 linker_warning(shader_program
,
2873 "Couldn't lower continue-statement. "
2874 "This will likely result in software "
2875 "rasterization.\n");
2879 prog
->NumAddressRegs
= 1;
2888 if (!shader_program
->LinkStatus
)
2892 if (!shader_program
->LinkStatus
) {
2896 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2898 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
2899 fprintf(stderr
, "\n");
2900 fprintf(stderr
, "GLSL IR for linked %s program %d:\n", target_string
,
2901 shader_program
->Name
);
2902 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
2903 fprintf(stderr
, "\n");
2904 fprintf(stderr
, "\n");
2905 fprintf(stderr
, "Mesa IR for linked %s program %d:\n", target_string
,
2906 shader_program
->Name
);
2907 print_program(mesa_instructions
, mesa_instruction_annotation
,
2912 prog
->Instructions
= mesa_instructions
;
2913 prog
->NumInstructions
= num_instructions
;
2915 /* Setting this to NULL prevents a possible double free in the fail_exit
2918 mesa_instructions
= NULL
;
2920 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
2922 prog
->SamplersUsed
= shader
->active_samplers
;
2923 prog
->ShadowSamplers
= shader
->shadow_samplers
;
2924 _mesa_update_shader_textures_used(shader_program
, prog
);
2926 /* Set the gl_FragDepth layout. */
2927 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
2928 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)prog
;
2929 fp
->FragDepthLayout
= shader_program
->FragDepthLayout
;
2932 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
2934 if ((ctx
->_Shader
->Flags
& GLSL_NO_OPT
) == 0) {
2935 _mesa_optimize_program(ctx
, prog
);
2938 /* This has to be done last. Any operation that can cause
2939 * prog->ParameterValues to get reallocated (e.g., anything that adds a
2940 * program constant) has to happen before creating this linkage.
2942 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
2943 if (!shader_program
->LinkStatus
) {
2950 free(mesa_instructions
);
2951 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
2959 * Called via ctx->Driver.LinkShader()
2960 * This actually involves converting GLSL IR into Mesa gl_programs with
2961 * code lowering and other optimizations.
2964 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
2966 assert(prog
->LinkStatus
);
2968 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
2969 if (prog
->_LinkedShaders
[i
] == NULL
)
2973 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
2974 const struct gl_shader_compiler_options
*options
=
2975 &ctx
->Const
.ShaderCompilerOptions
[prog
->_LinkedShaders
[i
]->Stage
];
2981 do_mat_op_to_vec(ir
);
2982 lower_instructions(ir
, (MOD_TO_FLOOR
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
2983 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
2984 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
2986 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
2988 progress
= do_common_optimization(ir
, true, true,
2989 options
, ctx
->Const
.NativeIntegers
)
2992 progress
= lower_quadop_vector(ir
, true) || progress
;
2994 if (options
->MaxIfDepth
== 0)
2995 progress
= lower_discard(ir
) || progress
;
2997 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
2999 if (options
->EmitNoNoise
)
3000 progress
= lower_noise(ir
) || progress
;
3002 /* If there are forms of indirect addressing that the driver
3003 * cannot handle, perform the lowering pass.
3005 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3006 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3008 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
3009 options
->EmitNoIndirectInput
,
3010 options
->EmitNoIndirectOutput
,
3011 options
->EmitNoIndirectTemp
,
3012 options
->EmitNoIndirectUniform
)
3015 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3016 progress
= lower_vector_insert(ir
, true) || progress
;
3019 validate_ir_tree(ir
);
3022 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3023 struct gl_program
*linked_prog
;
3025 if (prog
->_LinkedShaders
[i
] == NULL
)
3028 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3031 _mesa_copy_linked_program_data((gl_shader_stage
) i
, prog
, linked_prog
);
3033 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
3034 _mesa_shader_stage_to_program(i
),
3040 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
3043 build_program_resource_list(ctx
, prog
);
3044 return prog
->LinkStatus
;
3048 * Link a GLSL shader program. Called via glLinkProgram().
3051 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3055 _mesa_clear_shader_program_data(prog
);
3057 prog
->LinkStatus
= GL_TRUE
;
3059 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3060 if (!prog
->Shaders
[i
]->CompileStatus
) {
3061 linker_error(prog
, "linking with uncompiled shader");
3065 if (prog
->LinkStatus
) {
3066 link_shaders(ctx
, prog
);
3069 if (prog
->LinkStatus
) {
3070 if (!ctx
->Driver
.LinkShader(ctx
, prog
)) {
3071 prog
->LinkStatus
= GL_FALSE
;
3075 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
3076 if (!prog
->LinkStatus
) {
3077 fprintf(stderr
, "GLSL shader program %d failed to link\n", prog
->Name
);
3080 if (prog
->InfoLog
&& prog
->InfoLog
[0] != 0) {
3081 fprintf(stderr
, "GLSL shader program %d info log:\n", prog
->Name
);
3082 fprintf(stderr
, "%s\n", prog
->InfoLog
);