2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
34 #include "main/mtypes.h"
35 #include "main/shaderapi.h"
36 #include "main/shaderobj.h"
37 #include "main/uniforms.h"
38 #include "compiler/glsl/ast.h"
39 #include "compiler/glsl/ir.h"
40 #include "compiler/glsl/ir_expression_flattening.h"
41 #include "compiler/glsl/ir_visitor.h"
42 #include "compiler/glsl/ir_optimization.h"
43 #include "compiler/glsl/ir_uniform.h"
44 #include "compiler/glsl/glsl_parser_extras.h"
45 #include "compiler/glsl_types.h"
46 #include "compiler/glsl/linker.h"
47 #include "compiler/glsl/program.h"
48 #include "program/hash_table.h"
49 #include "program/prog_instruction.h"
50 #include "program/prog_optimize.h"
51 #include "program/prog_print.h"
52 #include "program/program.h"
53 #include "program/prog_parameter.h"
56 static int swizzle_for_size(int size
);
64 * This struct is a corresponding struct to Mesa prog_src_register, with
69 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
73 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
74 this->swizzle
= swizzle_for_size(type
->vector_elements
);
76 this->swizzle
= SWIZZLE_XYZW
;
83 this->file
= PROGRAM_UNDEFINED
;
90 explicit src_reg(dst_reg reg
);
92 gl_register_file file
; /**< PROGRAM_* from Mesa */
93 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
94 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
95 int negate
; /**< NEGATE_XYZW mask from mesa */
96 /** Register index should be offset by the integer in this reg. */
102 dst_reg(gl_register_file file
, int writemask
)
106 this->writemask
= writemask
;
107 this->cond_mask
= COND_TR
;
108 this->reladdr
= NULL
;
113 this->file
= PROGRAM_UNDEFINED
;
116 this->cond_mask
= COND_TR
;
117 this->reladdr
= NULL
;
120 explicit dst_reg(src_reg reg
);
122 gl_register_file file
; /**< PROGRAM_* from Mesa */
123 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
124 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
126 /** Register index should be offset by the integer in this reg. */
130 } /* anonymous namespace */
132 src_reg::src_reg(dst_reg reg
)
134 this->file
= reg
.file
;
135 this->index
= reg
.index
;
136 this->swizzle
= SWIZZLE_XYZW
;
138 this->reladdr
= reg
.reladdr
;
141 dst_reg::dst_reg(src_reg reg
)
143 this->file
= reg
.file
;
144 this->index
= reg
.index
;
145 this->writemask
= WRITEMASK_XYZW
;
146 this->cond_mask
= COND_TR
;
147 this->reladdr
= reg
.reladdr
;
152 class ir_to_mesa_instruction
: public exec_node
{
154 DECLARE_RALLOC_CXX_OPERATORS(ir_to_mesa_instruction
)
159 /** Pointer to the ir source this tree came from for debugging */
161 GLboolean cond_update
;
163 int sampler
; /**< sampler index */
164 int tex_target
; /**< One of TEXTURE_*_INDEX */
165 GLboolean tex_shadow
;
168 class variable_storage
: public exec_node
{
170 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
171 : file(file
), index(index
), var(var
)
176 gl_register_file file
;
178 ir_variable
*var
; /* variable that maps to this, if any */
181 class function_entry
: public exec_node
{
183 ir_function_signature
*sig
;
186 * identifier of this function signature used by the program.
188 * At the point that Mesa instructions for function calls are
189 * generated, we don't know the address of the first instruction of
190 * the function body. So we make the BranchTarget that is called a
191 * small integer and rewrite them during set_branchtargets().
196 * Pointer to first instruction of the function body.
198 * Set during function body emits after main() is processed.
200 ir_to_mesa_instruction
*bgn_inst
;
203 * Index of the first instruction of the function body in actual
206 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
210 /** Storage for the return value. */
214 class ir_to_mesa_visitor
: public ir_visitor
{
216 ir_to_mesa_visitor();
217 ~ir_to_mesa_visitor();
219 function_entry
*current_function
;
221 struct gl_context
*ctx
;
222 struct gl_program
*prog
;
223 struct gl_shader_program
*shader_program
;
224 struct gl_shader_compiler_options
*options
;
228 variable_storage
*find_variable_storage(const ir_variable
*var
);
230 src_reg
get_temp(const glsl_type
*type
);
231 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
233 src_reg
src_reg_for_float(float val
);
236 * \name Visit methods
238 * As typical for the visitor pattern, there must be one \c visit method for
239 * each concrete subclass of \c ir_instruction. Virtual base classes within
240 * the hierarchy should not have \c visit methods.
243 virtual void visit(ir_variable
*);
244 virtual void visit(ir_loop
*);
245 virtual void visit(ir_loop_jump
*);
246 virtual void visit(ir_function_signature
*);
247 virtual void visit(ir_function
*);
248 virtual void visit(ir_expression
*);
249 virtual void visit(ir_swizzle
*);
250 virtual void visit(ir_dereference_variable
*);
251 virtual void visit(ir_dereference_array
*);
252 virtual void visit(ir_dereference_record
*);
253 virtual void visit(ir_assignment
*);
254 virtual void visit(ir_constant
*);
255 virtual void visit(ir_call
*);
256 virtual void visit(ir_return
*);
257 virtual void visit(ir_discard
*);
258 virtual void visit(ir_texture
*);
259 virtual void visit(ir_if
*);
260 virtual void visit(ir_emit_vertex
*);
261 virtual void visit(ir_end_primitive
*);
262 virtual void visit(ir_barrier
*);
267 /** List of variable_storage */
270 /** List of function_entry */
271 exec_list function_signatures
;
272 int next_signature_id
;
274 /** List of ir_to_mesa_instruction */
275 exec_list instructions
;
277 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
279 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
280 dst_reg dst
, src_reg src0
);
282 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
283 dst_reg dst
, src_reg src0
, src_reg src1
);
285 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
287 src_reg src0
, src_reg src1
, src_reg src2
);
290 * Emit the correct dot-product instruction for the type of arguments
292 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
298 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
299 dst_reg dst
, src_reg src0
);
301 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
302 dst_reg dst
, src_reg src0
, src_reg src1
);
304 bool try_emit_mad(ir_expression
*ir
,
306 bool try_emit_mad_for_and_not(ir_expression
*ir
,
309 void emit_swz(ir_expression
*ir
);
311 bool process_move_condition(ir_rvalue
*ir
);
313 void copy_propagate(void);
318 } /* anonymous namespace */
320 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
322 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
324 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
327 swizzle_for_size(int size
)
329 static const int size_swizzles
[4] = {
330 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
331 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
332 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
333 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
336 assert((size
>= 1) && (size
<= 4));
337 return size_swizzles
[size
- 1];
340 ir_to_mesa_instruction
*
341 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
343 src_reg src0
, src_reg src1
, src_reg src2
)
345 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
348 /* If we have to do relative addressing, we want to load the ARL
349 * reg directly for one of the regs, and preload the other reladdr
350 * sources into temps.
352 num_reladdr
+= dst
.reladdr
!= NULL
;
353 num_reladdr
+= src0
.reladdr
!= NULL
;
354 num_reladdr
+= src1
.reladdr
!= NULL
;
355 num_reladdr
+= src2
.reladdr
!= NULL
;
357 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
358 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
359 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
362 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
365 assert(num_reladdr
== 0);
374 this->instructions
.push_tail(inst
);
380 ir_to_mesa_instruction
*
381 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
382 dst_reg dst
, src_reg src0
, src_reg src1
)
384 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
387 ir_to_mesa_instruction
*
388 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
389 dst_reg dst
, src_reg src0
)
391 assert(dst
.writemask
!= 0);
392 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
395 ir_to_mesa_instruction
*
396 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
398 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
401 ir_to_mesa_instruction
*
402 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
403 dst_reg dst
, src_reg src0
, src_reg src1
,
406 static const enum prog_opcode dot_opcodes
[] = {
407 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
410 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
414 * Emits Mesa scalar opcodes to produce unique answers across channels.
416 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
417 * channel determines the result across all channels. So to do a vec4
418 * of this operation, we want to emit a scalar per source channel used
419 * to produce dest channels.
422 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
424 src_reg orig_src0
, src_reg orig_src1
)
427 int done_mask
= ~dst
.writemask
;
429 /* Mesa RCP is a scalar operation splatting results to all channels,
430 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
433 for (i
= 0; i
< 4; i
++) {
434 GLuint this_mask
= (1 << i
);
435 ir_to_mesa_instruction
*inst
;
436 src_reg src0
= orig_src0
;
437 src_reg src1
= orig_src1
;
439 if (done_mask
& this_mask
)
442 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
443 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
444 for (j
= i
+ 1; j
< 4; j
++) {
445 /* If there is another enabled component in the destination that is
446 * derived from the same inputs, generate its value on this pass as
449 if (!(done_mask
& (1 << j
)) &&
450 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
451 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
452 this_mask
|= (1 << j
);
455 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
456 src0_swiz
, src0_swiz
);
457 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
458 src1_swiz
, src1_swiz
);
460 inst
= emit(ir
, op
, dst
, src0
, src1
);
461 inst
->dst
.writemask
= this_mask
;
462 done_mask
|= this_mask
;
467 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
468 dst_reg dst
, src_reg src0
)
470 src_reg undef
= undef_src
;
472 undef
.swizzle
= SWIZZLE_XXXX
;
474 emit_scalar(ir
, op
, dst
, src0
, undef
);
478 ir_to_mesa_visitor::src_reg_for_float(float val
)
480 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
482 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
483 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
489 type_size(const struct glsl_type
*type
)
494 switch (type
->base_type
) {
497 case GLSL_TYPE_FLOAT
:
499 if (type
->is_matrix()) {
500 return type
->matrix_columns
;
502 /* Regardless of size of vector, it gets a vec4. This is bad
503 * packing for things like floats, but otherwise arrays become a
504 * mess. Hopefully a later pass over the code can pack scalars
505 * down if appropriate.
510 case GLSL_TYPE_DOUBLE
:
511 if (type
->is_matrix()) {
512 if (type
->vector_elements
> 2)
513 return type
->matrix_columns
* 2;
515 return type
->matrix_columns
;
517 if (type
->vector_elements
> 2)
523 case GLSL_TYPE_ARRAY
:
524 assert(type
->length
> 0);
525 return type_size(type
->fields
.array
) * type
->length
;
526 case GLSL_TYPE_STRUCT
:
528 for (i
= 0; i
< type
->length
; i
++) {
529 size
+= type_size(type
->fields
.structure
[i
].type
);
532 case GLSL_TYPE_SAMPLER
:
533 case GLSL_TYPE_IMAGE
:
534 case GLSL_TYPE_SUBROUTINE
:
535 /* Samplers take up one slot in UNIFORMS[], but they're baked in
539 case GLSL_TYPE_ATOMIC_UINT
:
541 case GLSL_TYPE_ERROR
:
542 case GLSL_TYPE_INTERFACE
:
543 assert(!"Invalid type in type_size");
551 * In the initial pass of codegen, we assign temporary numbers to
552 * intermediate results. (not SSA -- variable assignments will reuse
553 * storage). Actual register allocation for the Mesa VM occurs in a
554 * pass over the Mesa IR later.
557 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
561 src
.file
= PROGRAM_TEMPORARY
;
562 src
.index
= next_temp
;
564 next_temp
+= type_size(type
);
566 if (type
->is_array() || type
->is_record()) {
567 src
.swizzle
= SWIZZLE_NOOP
;
569 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
577 ir_to_mesa_visitor::find_variable_storage(const ir_variable
*var
)
579 foreach_in_list(variable_storage
, entry
, &this->variables
) {
580 if (entry
->var
== var
)
588 ir_to_mesa_visitor::visit(ir_variable
*ir
)
590 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
591 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
593 fp
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
594 fp
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
597 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
599 const ir_state_slot
*const slots
= ir
->get_state_slots();
600 assert(slots
!= NULL
);
602 /* Check if this statevar's setup in the STATE file exactly
603 * matches how we'll want to reference it as a
604 * struct/array/whatever. If not, then we need to move it into
605 * temporary storage and hope that it'll get copy-propagated
608 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
609 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
614 variable_storage
*storage
;
616 if (i
== ir
->get_num_state_slots()) {
617 /* We'll set the index later. */
618 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
619 this->variables
.push_tail(storage
);
623 /* The variable_storage constructor allocates slots based on the size
624 * of the type. However, this had better match the number of state
625 * elements that we're going to copy into the new temporary.
627 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
629 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
631 this->variables
.push_tail(storage
);
632 this->next_temp
+= type_size(ir
->type
);
634 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
638 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
639 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
640 (gl_state_index
*)slots
[i
].tokens
);
642 if (storage
->file
== PROGRAM_STATE_VAR
) {
643 if (storage
->index
== -1) {
644 storage
->index
= index
;
646 assert(index
== storage
->index
+ (int)i
);
649 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
650 src
.swizzle
= slots
[i
].swizzle
;
651 emit(ir
, OPCODE_MOV
, dst
, src
);
652 /* even a float takes up a whole vec4 reg in a struct/array. */
657 if (storage
->file
== PROGRAM_TEMPORARY
&&
658 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
659 linker_error(this->shader_program
,
660 "failed to load builtin uniform `%s' "
661 "(%d/%d regs loaded)\n",
662 ir
->name
, dst
.index
- storage
->index
,
663 type_size(ir
->type
));
669 ir_to_mesa_visitor::visit(ir_loop
*ir
)
671 emit(NULL
, OPCODE_BGNLOOP
);
673 visit_exec_list(&ir
->body_instructions
, this);
675 emit(NULL
, OPCODE_ENDLOOP
);
679 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
682 case ir_loop_jump::jump_break
:
683 emit(NULL
, OPCODE_BRK
);
685 case ir_loop_jump::jump_continue
:
686 emit(NULL
, OPCODE_CONT
);
693 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
700 ir_to_mesa_visitor::visit(ir_function
*ir
)
702 /* Ignore function bodies other than main() -- we shouldn't see calls to
703 * them since they should all be inlined before we get to ir_to_mesa.
705 if (strcmp(ir
->name
, "main") == 0) {
706 const ir_function_signature
*sig
;
709 sig
= ir
->matching_signature(NULL
, &empty
, false);
713 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
720 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
722 int nonmul_operand
= 1 - mul_operand
;
725 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
726 if (!expr
|| expr
->operation
!= ir_binop_mul
)
729 expr
->operands
[0]->accept(this);
731 expr
->operands
[1]->accept(this);
733 ir
->operands
[nonmul_operand
]->accept(this);
736 this->result
= get_temp(ir
->type
);
737 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
743 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
745 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
746 * implemented using multiplication, and logical-or is implemented using
747 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
748 * As result, the logical expression (a & !b) can be rewritten as:
752 * - (a * 1) - (a * b)
756 * This final expression can be implemented as a single MAD(a, -b, a)
760 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
762 const int other_operand
= 1 - try_operand
;
765 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
766 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
769 ir
->operands
[other_operand
]->accept(this);
771 expr
->operands
[0]->accept(this);
774 b
.negate
= ~b
.negate
;
776 this->result
= get_temp(ir
->type
);
777 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
783 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
784 src_reg
*reg
, int *num_reladdr
)
789 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
791 if (*num_reladdr
!= 1) {
792 src_reg temp
= get_temp(glsl_type::vec4_type
);
794 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
802 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
804 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
805 * This means that each of the operands is either an immediate value of -1,
806 * 0, or 1, or is a component from one source register (possibly with
809 uint8_t components
[4] = { 0 };
810 bool negate
[4] = { false };
811 ir_variable
*var
= NULL
;
813 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
814 ir_rvalue
*op
= ir
->operands
[i
];
816 assert(op
->type
->is_scalar());
819 switch (op
->ir_type
) {
820 case ir_type_constant
: {
822 assert(op
->type
->is_scalar());
824 const ir_constant
*const c
= op
->as_constant();
826 components
[i
] = SWIZZLE_ONE
;
827 } else if (c
->is_zero()) {
828 components
[i
] = SWIZZLE_ZERO
;
829 } else if (c
->is_negative_one()) {
830 components
[i
] = SWIZZLE_ONE
;
833 assert(!"SWZ constant must be 0.0 or 1.0.");
840 case ir_type_dereference_variable
: {
841 ir_dereference_variable
*const deref
=
842 (ir_dereference_variable
*) op
;
844 assert((var
== NULL
) || (deref
->var
== var
));
845 components
[i
] = SWIZZLE_X
;
851 case ir_type_expression
: {
852 ir_expression
*const expr
= (ir_expression
*) op
;
854 assert(expr
->operation
== ir_unop_neg
);
857 op
= expr
->operands
[0];
861 case ir_type_swizzle
: {
862 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
864 components
[i
] = swiz
->mask
.x
;
870 assert(!"Should not get here.");
878 ir_dereference_variable
*const deref
=
879 new(mem_ctx
) ir_dereference_variable(var
);
881 this->result
.file
= PROGRAM_UNDEFINED
;
883 if (this->result
.file
== PROGRAM_UNDEFINED
) {
884 printf("Failed to get tree for expression operand:\n");
893 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
897 src
.negate
= ((unsigned(negate
[0]) << 0)
898 | (unsigned(negate
[1]) << 1)
899 | (unsigned(negate
[2]) << 2)
900 | (unsigned(negate
[3]) << 3));
902 /* Storage for our result. Ideally for an assignment we'd be using the
903 * actual storage for the result here, instead.
905 const src_reg result_src
= get_temp(ir
->type
);
906 dst_reg result_dst
= dst_reg(result_src
);
908 /* Limit writes to the channels that will be used by result_src later.
909 * This does limit this temp's use as a temporary for multi-instruction
912 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
914 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
915 this->result
= result_src
;
919 ir_to_mesa_visitor::visit(ir_expression
*ir
)
921 unsigned int operand
;
922 src_reg op
[ARRAY_SIZE(ir
->operands
)];
926 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
928 if (ir
->operation
== ir_binop_add
) {
929 if (try_emit_mad(ir
, 1))
931 if (try_emit_mad(ir
, 0))
935 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
937 if (ir
->operation
== ir_binop_logic_and
) {
938 if (try_emit_mad_for_and_not(ir
, 1))
940 if (try_emit_mad_for_and_not(ir
, 0))
944 if (ir
->operation
== ir_quadop_vector
) {
949 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
950 this->result
.file
= PROGRAM_UNDEFINED
;
951 ir
->operands
[operand
]->accept(this);
952 if (this->result
.file
== PROGRAM_UNDEFINED
) {
953 printf("Failed to get tree for expression operand:\n");
954 ir
->operands
[operand
]->print();
958 op
[operand
] = this->result
;
960 /* Matrix expression operands should have been broken down to vector
961 * operations already.
963 assert(!ir
->operands
[operand
]->type
->is_matrix());
966 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
967 if (ir
->operands
[1]) {
968 vector_elements
= MAX2(vector_elements
,
969 ir
->operands
[1]->type
->vector_elements
);
972 this->result
.file
= PROGRAM_UNDEFINED
;
974 /* Storage for our result. Ideally for an assignment we'd be using
975 * the actual storage for the result here, instead.
977 result_src
= get_temp(ir
->type
);
978 /* convenience for the emit functions below. */
979 result_dst
= dst_reg(result_src
);
980 /* Limit writes to the channels that will be used by result_src later.
981 * This does limit this temp's use as a temporary for multi-instruction
984 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
986 switch (ir
->operation
) {
987 case ir_unop_logic_not
:
988 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
989 * older GPUs implement SEQ using multiple instructions (i915 uses two
990 * SGE instructions and a MUL instruction). Since our logic values are
991 * 0.0 and 1.0, 1-x also implements !x.
993 op
[0].negate
= ~op
[0].negate
;
994 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
997 op
[0].negate
= ~op
[0].negate
;
1001 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1004 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1007 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1011 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1015 assert(!"not reached: should be handled by ir_explog_to_explog2");
1018 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1021 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1024 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1028 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1031 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1034 case ir_unop_saturate
: {
1035 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_MOV
,
1037 inst
->saturate
= true;
1040 case ir_unop_noise
: {
1041 const enum prog_opcode opcode
=
1042 prog_opcode(OPCODE_NOISE1
1043 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1044 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1046 emit(ir
, opcode
, result_dst
, op
[0]);
1051 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1054 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1058 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1061 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1064 /* Floating point should be lowered by MOD_TO_FLOOR in the compiler. */
1065 assert(ir
->type
->is_integer());
1066 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1070 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1072 case ir_binop_greater
:
1073 emit(ir
, OPCODE_SGT
, result_dst
, op
[0], op
[1]);
1075 case ir_binop_lequal
:
1076 emit(ir
, OPCODE_SLE
, result_dst
, op
[0], op
[1]);
1078 case ir_binop_gequal
:
1079 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1081 case ir_binop_equal
:
1082 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1084 case ir_binop_nequal
:
1085 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1087 case ir_binop_all_equal
:
1088 /* "==" operator producing a scalar boolean. */
1089 if (ir
->operands
[0]->type
->is_vector() ||
1090 ir
->operands
[1]->type
->is_vector()) {
1091 src_reg temp
= get_temp(glsl_type::vec4_type
);
1092 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1094 /* After the dot-product, the value will be an integer on the
1095 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1097 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1099 /* Negating the result of the dot-product gives values on the range
1100 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1101 * achieved using SGE.
1103 src_reg sge_src
= result_src
;
1104 sge_src
.negate
= ~sge_src
.negate
;
1105 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1107 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1110 case ir_binop_any_nequal
:
1111 /* "!=" operator producing a scalar boolean. */
1112 if (ir
->operands
[0]->type
->is_vector() ||
1113 ir
->operands
[1]->type
->is_vector()) {
1114 src_reg temp
= get_temp(glsl_type::vec4_type
);
1115 if (ir
->operands
[0]->type
->is_boolean() &&
1116 ir
->operands
[1]->as_constant() &&
1117 ir
->operands
[1]->as_constant()->is_zero()) {
1120 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1123 /* After the dot-product, the value will be an integer on the
1124 * range [0,4]. Zero stays zero, and positive values become 1.0.
1126 ir_to_mesa_instruction
*const dp
=
1127 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1128 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1129 /* The clamping to [0,1] can be done for free in the fragment
1130 * shader with a saturate.
1132 dp
->saturate
= true;
1134 /* Negating the result of the dot-product gives values on the range
1135 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1136 * achieved using SLT.
1138 src_reg slt_src
= result_src
;
1139 slt_src
.negate
= ~slt_src
.negate
;
1140 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1143 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1147 case ir_binop_logic_xor
:
1148 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1151 case ir_binop_logic_or
: {
1152 /* After the addition, the value will be an integer on the
1153 * range [0,2]. Zero stays zero, and positive values become 1.0.
1155 ir_to_mesa_instruction
*add
=
1156 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1157 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1158 /* The clamping to [0,1] can be done for free in the fragment
1159 * shader with a saturate.
1161 add
->saturate
= true;
1163 /* Negating the result of the addition gives values on the range
1164 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1165 * is achieved using SLT.
1167 src_reg slt_src
= result_src
;
1168 slt_src
.negate
= ~slt_src
.negate
;
1169 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1174 case ir_binop_logic_and
:
1175 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1176 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1180 assert(ir
->operands
[0]->type
->is_vector());
1181 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1182 emit_dp(ir
, result_dst
, op
[0], op
[1],
1183 ir
->operands
[0]->type
->vector_elements
);
1187 /* sqrt(x) = x * rsq(x). */
1188 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1189 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1190 /* For incoming channels <= 0, set the result to 0. */
1191 op
[0].negate
= ~op
[0].negate
;
1192 emit(ir
, OPCODE_CMP
, result_dst
,
1193 op
[0], result_src
, src_reg_for_float(0.0));
1196 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1204 /* Mesa IR lacks types, ints are stored as truncated floats. */
1209 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1213 emit(ir
, OPCODE_SNE
, result_dst
,
1214 op
[0], src_reg_for_float(0.0));
1216 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1217 case ir_unop_bitcast_f2u
:
1218 case ir_unop_bitcast_i2f
:
1219 case ir_unop_bitcast_u2f
:
1222 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1225 op
[0].negate
= ~op
[0].negate
;
1226 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1227 result_src
.negate
= ~result_src
.negate
;
1230 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1233 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1235 case ir_unop_pack_snorm_2x16
:
1236 case ir_unop_pack_snorm_4x8
:
1237 case ir_unop_pack_unorm_2x16
:
1238 case ir_unop_pack_unorm_4x8
:
1239 case ir_unop_pack_half_2x16
:
1240 case ir_unop_pack_double_2x32
:
1241 case ir_unop_unpack_snorm_2x16
:
1242 case ir_unop_unpack_snorm_4x8
:
1243 case ir_unop_unpack_unorm_2x16
:
1244 case ir_unop_unpack_unorm_4x8
:
1245 case ir_unop_unpack_half_2x16
:
1246 case ir_unop_unpack_double_2x32
:
1247 case ir_unop_bitfield_reverse
:
1248 case ir_unop_bit_count
:
1249 case ir_unop_find_msb
:
1250 case ir_unop_find_lsb
:
1258 case ir_unop_frexp_sig
:
1259 case ir_unop_frexp_exp
:
1260 assert(!"not supported");
1263 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1266 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1269 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1272 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1273 * hardware backends have no way to avoid Mesa IR generation
1274 * even if they don't use it, we need to emit "something" and
1277 case ir_binop_lshift
:
1278 case ir_binop_rshift
:
1279 case ir_binop_bit_and
:
1280 case ir_binop_bit_xor
:
1281 case ir_binop_bit_or
:
1282 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1285 case ir_unop_bit_not
:
1286 case ir_unop_round_even
:
1287 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1290 case ir_binop_ubo_load
:
1291 assert(!"not supported");
1295 /* ir_triop_lrp operands are (x, y, a) while
1296 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1298 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1301 case ir_binop_vector_extract
:
1303 case ir_triop_bitfield_extract
:
1304 case ir_triop_vector_insert
:
1305 case ir_quadop_bitfield_insert
:
1306 case ir_binop_ldexp
:
1308 case ir_binop_carry
:
1309 case ir_binop_borrow
:
1310 case ir_binop_imul_high
:
1311 case ir_unop_interpolate_at_centroid
:
1312 case ir_binop_interpolate_at_offset
:
1313 case ir_binop_interpolate_at_sample
:
1314 case ir_unop_dFdx_coarse
:
1315 case ir_unop_dFdx_fine
:
1316 case ir_unop_dFdy_coarse
:
1317 case ir_unop_dFdy_fine
:
1318 case ir_unop_subroutine_to_int
:
1319 case ir_unop_get_buffer_size
:
1320 assert(!"not supported");
1323 case ir_unop_ssbo_unsized_array_length
:
1324 case ir_quadop_vector
:
1325 /* This operation should have already been handled.
1327 assert(!"Should not get here.");
1331 this->result
= result_src
;
1336 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1342 /* Note that this is only swizzles in expressions, not those on the left
1343 * hand side of an assignment, which do write masking. See ir_assignment
1347 ir
->val
->accept(this);
1349 assert(src
.file
!= PROGRAM_UNDEFINED
);
1350 assert(ir
->type
->vector_elements
> 0);
1352 for (i
= 0; i
< 4; i
++) {
1353 if (i
< ir
->type
->vector_elements
) {
1356 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1359 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1362 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1365 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1369 /* If the type is smaller than a vec4, replicate the last
1372 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1376 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1382 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1384 variable_storage
*entry
= find_variable_storage(ir
->var
);
1385 ir_variable
*var
= ir
->var
;
1388 switch (var
->data
.mode
) {
1389 case ir_var_uniform
:
1390 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1391 var
->data
.param_index
);
1392 this->variables
.push_tail(entry
);
1394 case ir_var_shader_in
:
1395 /* The linker assigns locations for varyings and attributes,
1396 * including deprecated builtins (like gl_Color),
1397 * user-assigned generic attributes (glBindVertexLocation),
1398 * and user-defined varyings.
1400 assert(var
->data
.location
!= -1);
1401 entry
= new(mem_ctx
) variable_storage(var
,
1403 var
->data
.location
);
1405 case ir_var_shader_out
:
1406 assert(var
->data
.location
!= -1);
1407 entry
= new(mem_ctx
) variable_storage(var
,
1409 var
->data
.location
);
1411 case ir_var_system_value
:
1412 entry
= new(mem_ctx
) variable_storage(var
,
1413 PROGRAM_SYSTEM_VALUE
,
1414 var
->data
.location
);
1417 case ir_var_temporary
:
1418 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1420 this->variables
.push_tail(entry
);
1422 next_temp
+= type_size(var
->type
);
1427 printf("Failed to make storage for %s\n", var
->name
);
1432 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1436 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1440 int element_size
= type_size(ir
->type
);
1442 index
= ir
->array_index
->constant_expression_value();
1444 ir
->array
->accept(this);
1448 src
.index
+= index
->value
.i
[0] * element_size
;
1450 /* Variable index array dereference. It eats the "vec4" of the
1451 * base of the array and an index that offsets the Mesa register
1454 ir
->array_index
->accept(this);
1458 if (element_size
== 1) {
1459 index_reg
= this->result
;
1461 index_reg
= get_temp(glsl_type::float_type
);
1463 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1464 this->result
, src_reg_for_float(element_size
));
1467 /* If there was already a relative address register involved, add the
1468 * new and the old together to get the new offset.
1470 if (src
.reladdr
!= NULL
) {
1471 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1473 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1474 index_reg
, *src
.reladdr
);
1476 index_reg
= accum_reg
;
1479 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1480 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1483 /* If the type is smaller than a vec4, replicate the last channel out. */
1484 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1485 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1487 src
.swizzle
= SWIZZLE_NOOP
;
1493 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1496 const glsl_type
*struct_type
= ir
->record
->type
;
1499 ir
->record
->accept(this);
1501 for (i
= 0; i
< struct_type
->length
; i
++) {
1502 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1504 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1507 /* If the type is smaller than a vec4, replicate the last channel out. */
1508 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1509 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1511 this->result
.swizzle
= SWIZZLE_NOOP
;
1513 this->result
.index
+= offset
;
1517 * We want to be careful in assignment setup to hit the actual storage
1518 * instead of potentially using a temporary like we might with the
1519 * ir_dereference handler.
1522 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1524 /* The LHS must be a dereference. If the LHS is a variable indexed array
1525 * access of a vector, it must be separated into a series conditional moves
1526 * before reaching this point (see ir_vec_index_to_cond_assign).
1528 assert(ir
->as_dereference());
1529 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1531 assert(!deref_array
->array
->type
->is_vector());
1534 /* Use the rvalue deref handler for the most part. We'll ignore
1535 * swizzles in it and write swizzles using writemask, though.
1538 return dst_reg(v
->result
);
1541 /* Calculate the sampler index and also calculate the base uniform location
1542 * for struct members.
1545 calc_sampler_offsets(struct gl_shader_program
*prog
, ir_dereference
*deref
,
1546 unsigned *offset
, unsigned *array_elements
,
1549 if (deref
->ir_type
== ir_type_dereference_variable
)
1552 switch (deref
->ir_type
) {
1553 case ir_type_dereference_array
: {
1554 ir_dereference_array
*deref_arr
= deref
->as_dereference_array();
1555 ir_constant
*array_index
=
1556 deref_arr
->array_index
->constant_expression_value();
1559 /* GLSL 1.10 and 1.20 allowed variable sampler array indices,
1560 * while GLSL 1.30 requires that the array indices be
1561 * constant integer expressions. We don't expect any driver
1562 * to actually work with a really variable array index, so
1563 * all that would work would be an unrolled loop counter that ends
1564 * up being constant above.
1566 ralloc_strcat(&prog
->InfoLog
,
1567 "warning: Variable sampler array index unsupported.\n"
1568 "This feature of the language was removed in GLSL 1.20 "
1569 "and is unlikely to be supported for 1.10 in Mesa.\n");
1571 *offset
+= array_index
->value
.u
[0] * *array_elements
;
1574 *array_elements
*= deref_arr
->array
->type
->length
;
1576 calc_sampler_offsets(prog
, deref_arr
->array
->as_dereference(),
1577 offset
, array_elements
, location
);
1581 case ir_type_dereference_record
: {
1582 ir_dereference_record
*deref_record
= deref
->as_dereference_record();
1583 unsigned field_index
=
1584 deref_record
->record
->type
->field_index(deref_record
->field
);
1586 deref_record
->record
->type
->record_location_offset(field_index
);
1587 calc_sampler_offsets(prog
, deref_record
->record
->as_dereference(),
1588 offset
, array_elements
, location
);
1593 unreachable("Invalid deref type");
1599 get_sampler_uniform_value(class ir_dereference
*sampler
,
1600 struct gl_shader_program
*shader_program
,
1601 const struct gl_program
*prog
)
1603 GLuint shader
= _mesa_program_enum_to_shader_stage(prog
->Target
);
1604 ir_variable
*var
= sampler
->variable_referenced();
1605 unsigned location
= var
->data
.location
;
1606 unsigned array_elements
= 1;
1607 unsigned offset
= 0;
1609 calc_sampler_offsets(shader_program
, sampler
, &offset
, &array_elements
,
1612 assert(shader_program
->UniformStorage
[location
].opaque
[shader
].active
);
1613 return shader_program
->UniformStorage
[location
].opaque
[shader
].index
+
1618 * Process the condition of a conditional assignment
1620 * Examines the condition of a conditional assignment to generate the optimal
1621 * first operand of a \c CMP instruction. If the condition is a relational
1622 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1623 * used as the source for the \c CMP instruction. Otherwise the comparison
1624 * is processed to a boolean result, and the boolean result is used as the
1625 * operand to the CMP instruction.
1628 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1630 ir_rvalue
*src_ir
= ir
;
1632 bool switch_order
= false;
1634 ir_expression
*const expr
= ir
->as_expression();
1635 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
1636 bool zero_on_left
= false;
1638 if (expr
->operands
[0]->is_zero()) {
1639 src_ir
= expr
->operands
[1];
1640 zero_on_left
= true;
1641 } else if (expr
->operands
[1]->is_zero()) {
1642 src_ir
= expr
->operands
[0];
1643 zero_on_left
= false;
1647 * (a < 0) T F F ( a < 0) T F F
1648 * (0 < a) F F T (-a < 0) F F T
1649 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1650 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1651 * (a > 0) F F T (-a < 0) F F T
1652 * (0 > a) T F F ( a < 0) T F F
1653 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1654 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1656 * Note that exchanging the order of 0 and 'a' in the comparison simply
1657 * means that the value of 'a' should be negated.
1660 switch (expr
->operation
) {
1662 switch_order
= false;
1663 negate
= zero_on_left
;
1666 case ir_binop_greater
:
1667 switch_order
= false;
1668 negate
= !zero_on_left
;
1671 case ir_binop_lequal
:
1672 switch_order
= true;
1673 negate
= !zero_on_left
;
1676 case ir_binop_gequal
:
1677 switch_order
= true;
1678 negate
= zero_on_left
;
1682 /* This isn't the right kind of comparison afterall, so make sure
1683 * the whole condition is visited.
1691 src_ir
->accept(this);
1693 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1694 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1695 * choose which value OPCODE_CMP produces without an extra instruction
1696 * computing the condition.
1699 this->result
.negate
= ~this->result
.negate
;
1701 return switch_order
;
1705 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1711 ir
->rhs
->accept(this);
1714 l
= get_assignment_lhs(ir
->lhs
, this);
1716 /* FINISHME: This should really set to the correct maximal writemask for each
1717 * FINISHME: component written (in the loops below). This case can only
1718 * FINISHME: occur for matrices, arrays, and structures.
1720 if (ir
->write_mask
== 0) {
1721 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1722 l
.writemask
= WRITEMASK_XYZW
;
1723 } else if (ir
->lhs
->type
->is_scalar()) {
1724 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1725 * FINISHME: W component of fragment shader output zero, work correctly.
1727 l
.writemask
= WRITEMASK_XYZW
;
1730 int first_enabled_chan
= 0;
1733 assert(ir
->lhs
->type
->is_vector());
1734 l
.writemask
= ir
->write_mask
;
1736 for (int i
= 0; i
< 4; i
++) {
1737 if (l
.writemask
& (1 << i
)) {
1738 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1743 /* Swizzle a small RHS vector into the channels being written.
1745 * glsl ir treats write_mask as dictating how many channels are
1746 * present on the RHS while Mesa IR treats write_mask as just
1747 * showing which channels of the vec4 RHS get written.
1749 for (int i
= 0; i
< 4; i
++) {
1750 if (l
.writemask
& (1 << i
))
1751 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1753 swizzles
[i
] = first_enabled_chan
;
1755 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1756 swizzles
[2], swizzles
[3]);
1759 assert(l
.file
!= PROGRAM_UNDEFINED
);
1760 assert(r
.file
!= PROGRAM_UNDEFINED
);
1762 if (ir
->condition
) {
1763 const bool switch_order
= this->process_move_condition(ir
->condition
);
1764 src_reg condition
= this->result
;
1766 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1768 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1770 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1777 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1778 emit(ir
, OPCODE_MOV
, l
, r
);
1787 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1790 GLfloat stack_vals
[4] = { 0 };
1791 GLfloat
*values
= stack_vals
;
1794 /* Unfortunately, 4 floats is all we can get into
1795 * _mesa_add_unnamed_constant. So, make a temp to store an
1796 * aggregate constant and move each constant value into it. If we
1797 * get lucky, copy propagation will eliminate the extra moves.
1800 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
1801 src_reg temp_base
= get_temp(ir
->type
);
1802 dst_reg temp
= dst_reg(temp_base
);
1804 foreach_in_list(ir_constant
, field_value
, &ir
->components
) {
1805 int size
= type_size(field_value
->type
);
1809 field_value
->accept(this);
1812 for (i
= 0; i
< (unsigned int)size
; i
++) {
1813 emit(ir
, OPCODE_MOV
, temp
, src
);
1819 this->result
= temp_base
;
1823 if (ir
->type
->is_array()) {
1824 src_reg temp_base
= get_temp(ir
->type
);
1825 dst_reg temp
= dst_reg(temp_base
);
1826 int size
= type_size(ir
->type
->fields
.array
);
1830 for (i
= 0; i
< ir
->type
->length
; i
++) {
1831 ir
->array_elements
[i
]->accept(this);
1833 for (int j
= 0; j
< size
; j
++) {
1834 emit(ir
, OPCODE_MOV
, temp
, src
);
1840 this->result
= temp_base
;
1844 if (ir
->type
->is_matrix()) {
1845 src_reg mat
= get_temp(ir
->type
);
1846 dst_reg mat_column
= dst_reg(mat
);
1848 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1849 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1850 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1852 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1853 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1854 (gl_constant_value
*) values
,
1855 ir
->type
->vector_elements
,
1857 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1866 src
.file
= PROGRAM_CONSTANT
;
1867 switch (ir
->type
->base_type
) {
1868 case GLSL_TYPE_FLOAT
:
1869 values
= &ir
->value
.f
[0];
1871 case GLSL_TYPE_UINT
:
1872 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1873 values
[i
] = ir
->value
.u
[i
];
1877 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1878 values
[i
] = ir
->value
.i
[i
];
1881 case GLSL_TYPE_BOOL
:
1882 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1883 values
[i
] = ir
->value
.b
[i
];
1887 assert(!"Non-float/uint/int/bool constant");
1890 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1891 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1892 (gl_constant_value
*) values
,
1893 ir
->type
->vector_elements
,
1894 &this->result
.swizzle
);
1898 ir_to_mesa_visitor::visit(ir_call
*)
1900 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
1904 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1906 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
1907 dst_reg result_dst
, coord_dst
;
1908 ir_to_mesa_instruction
*inst
= NULL
;
1909 prog_opcode opcode
= OPCODE_NOP
;
1911 if (ir
->op
== ir_txs
)
1912 this->result
= src_reg_for_float(0.0);
1914 ir
->coordinate
->accept(this);
1916 /* Put our coords in a temp. We'll need to modify them for shadow,
1917 * projection, or LOD, so the only case we'd use it as is is if
1918 * we're doing plain old texturing. Mesa IR optimization should
1919 * handle cleaning up our mess in that case.
1921 coord
= get_temp(glsl_type::vec4_type
);
1922 coord_dst
= dst_reg(coord
);
1923 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
1925 if (ir
->projector
) {
1926 ir
->projector
->accept(this);
1927 projector
= this->result
;
1930 /* Storage for our result. Ideally for an assignment we'd be using
1931 * the actual storage for the result here, instead.
1933 result_src
= get_temp(glsl_type::vec4_type
);
1934 result_dst
= dst_reg(result_src
);
1939 opcode
= OPCODE_TEX
;
1942 opcode
= OPCODE_TXB
;
1943 ir
->lod_info
.bias
->accept(this);
1944 lod_info
= this->result
;
1947 /* Pretend to be TXL so the sampler, coordinate, lod are available */
1949 opcode
= OPCODE_TXL
;
1950 ir
->lod_info
.lod
->accept(this);
1951 lod_info
= this->result
;
1954 opcode
= OPCODE_TXD
;
1955 ir
->lod_info
.grad
.dPdx
->accept(this);
1957 ir
->lod_info
.grad
.dPdy
->accept(this);
1961 assert(!"Unexpected ir_txf_ms opcode");
1964 assert(!"Unexpected ir_lod opcode");
1967 assert(!"Unexpected ir_tg4 opcode");
1969 case ir_query_levels
:
1970 assert(!"Unexpected ir_query_levels opcode");
1972 case ir_samples_identical
:
1973 unreachable("Unexpected ir_samples_identical opcode");
1974 case ir_texture_samples
:
1975 unreachable("Unexpected ir_texture_samples opcode");
1978 const glsl_type
*sampler_type
= ir
->sampler
->type
;
1980 if (ir
->projector
) {
1981 if (opcode
== OPCODE_TEX
) {
1982 /* Slot the projector in as the last component of the coord. */
1983 coord_dst
.writemask
= WRITEMASK_W
;
1984 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
1985 coord_dst
.writemask
= WRITEMASK_XYZW
;
1986 opcode
= OPCODE_TXP
;
1988 src_reg coord_w
= coord
;
1989 coord_w
.swizzle
= SWIZZLE_WWWW
;
1991 /* For the other TEX opcodes there's no projective version
1992 * since the last slot is taken up by lod info. Do the
1993 * projective divide now.
1995 coord_dst
.writemask
= WRITEMASK_W
;
1996 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
1998 /* In the case where we have to project the coordinates "by hand,"
1999 * the shadow comparitor value must also be projected.
2001 src_reg tmp_src
= coord
;
2002 if (ir
->shadow_comparitor
) {
2003 /* Slot the shadow value in as the second to last component of the
2006 ir
->shadow_comparitor
->accept(this);
2008 tmp_src
= get_temp(glsl_type::vec4_type
);
2009 dst_reg tmp_dst
= dst_reg(tmp_src
);
2011 /* Projective division not allowed for array samplers. */
2012 assert(!sampler_type
->sampler_array
);
2014 tmp_dst
.writemask
= WRITEMASK_Z
;
2015 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2017 tmp_dst
.writemask
= WRITEMASK_XY
;
2018 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2021 coord_dst
.writemask
= WRITEMASK_XYZ
;
2022 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2024 coord_dst
.writemask
= WRITEMASK_XYZW
;
2025 coord
.swizzle
= SWIZZLE_XYZW
;
2029 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2030 * comparitor was put in the correct place (and projected) by the code,
2031 * above, that handles by-hand projection.
2033 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2034 /* Slot the shadow value in as the second to last component of the
2037 ir
->shadow_comparitor
->accept(this);
2039 /* XXX This will need to be updated for cubemap array samplers. */
2040 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2041 sampler_type
->sampler_array
) {
2042 coord_dst
.writemask
= WRITEMASK_W
;
2044 coord_dst
.writemask
= WRITEMASK_Z
;
2047 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2048 coord_dst
.writemask
= WRITEMASK_XYZW
;
2051 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2052 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2053 coord_dst
.writemask
= WRITEMASK_W
;
2054 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2055 coord_dst
.writemask
= WRITEMASK_XYZW
;
2058 if (opcode
== OPCODE_TXD
)
2059 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2061 inst
= emit(ir
, opcode
, result_dst
, coord
);
2063 if (ir
->shadow_comparitor
)
2064 inst
->tex_shadow
= GL_TRUE
;
2066 inst
->sampler
= get_sampler_uniform_value(ir
->sampler
, shader_program
,
2069 switch (sampler_type
->sampler_dimensionality
) {
2070 case GLSL_SAMPLER_DIM_1D
:
2071 inst
->tex_target
= (sampler_type
->sampler_array
)
2072 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2074 case GLSL_SAMPLER_DIM_2D
:
2075 inst
->tex_target
= (sampler_type
->sampler_array
)
2076 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2078 case GLSL_SAMPLER_DIM_3D
:
2079 inst
->tex_target
= TEXTURE_3D_INDEX
;
2081 case GLSL_SAMPLER_DIM_CUBE
:
2082 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2084 case GLSL_SAMPLER_DIM_RECT
:
2085 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2087 case GLSL_SAMPLER_DIM_BUF
:
2088 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2090 case GLSL_SAMPLER_DIM_EXTERNAL
:
2091 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2094 assert(!"Should not get here.");
2097 this->result
= result_src
;
2101 ir_to_mesa_visitor::visit(ir_return
*ir
)
2103 /* Non-void functions should have been inlined. We may still emit RETs
2104 * from main() unless the EmitNoMainReturn option is set.
2106 assert(!ir
->get_value());
2107 emit(ir
, OPCODE_RET
);
2111 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2113 if (ir
->condition
) {
2114 ir
->condition
->accept(this);
2115 this->result
.negate
= ~this->result
.negate
;
2116 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2118 emit(ir
, OPCODE_KIL_NV
);
2123 ir_to_mesa_visitor::visit(ir_if
*ir
)
2125 ir_to_mesa_instruction
*cond_inst
, *if_inst
;
2126 ir_to_mesa_instruction
*prev_inst
;
2128 prev_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2130 ir
->condition
->accept(this);
2131 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2133 if (this->options
->EmitCondCodes
) {
2134 cond_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2136 /* See if we actually generated any instruction for generating
2137 * the condition. If not, then cook up a move to a temp so we
2138 * have something to set cond_update on.
2140 if (cond_inst
== prev_inst
) {
2141 src_reg temp
= get_temp(glsl_type::bool_type
);
2142 cond_inst
= emit(ir
->condition
, OPCODE_MOV
, dst_reg(temp
), result
);
2144 cond_inst
->cond_update
= GL_TRUE
;
2146 if_inst
= emit(ir
->condition
, OPCODE_IF
);
2147 if_inst
->dst
.cond_mask
= COND_NE
;
2149 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2152 this->instructions
.push_tail(if_inst
);
2154 visit_exec_list(&ir
->then_instructions
, this);
2156 if (!ir
->else_instructions
.is_empty()) {
2157 emit(ir
->condition
, OPCODE_ELSE
);
2158 visit_exec_list(&ir
->else_instructions
, this);
2161 emit(ir
->condition
, OPCODE_ENDIF
);
2165 ir_to_mesa_visitor::visit(ir_emit_vertex
*)
2167 assert(!"Geometry shaders not supported.");
2171 ir_to_mesa_visitor::visit(ir_end_primitive
*)
2173 assert(!"Geometry shaders not supported.");
2177 ir_to_mesa_visitor::visit(ir_barrier
*)
2179 unreachable("GLSL barrier() not supported.");
2182 ir_to_mesa_visitor::ir_to_mesa_visitor()
2184 result
.file
= PROGRAM_UNDEFINED
;
2186 next_signature_id
= 1;
2187 current_function
= NULL
;
2188 mem_ctx
= ralloc_context(NULL
);
2191 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2193 ralloc_free(mem_ctx
);
2196 static struct prog_src_register
2197 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2199 struct prog_src_register mesa_reg
;
2201 mesa_reg
.File
= reg
.file
;
2202 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2203 mesa_reg
.Index
= reg
.index
;
2204 mesa_reg
.Swizzle
= reg
.swizzle
;
2205 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2206 mesa_reg
.Negate
= reg
.negate
;
2208 mesa_reg
.HasIndex2
= GL_FALSE
;
2209 mesa_reg
.RelAddr2
= 0;
2210 mesa_reg
.Index2
= 0;
2216 set_branchtargets(ir_to_mesa_visitor
*v
,
2217 struct prog_instruction
*mesa_instructions
,
2218 int num_instructions
)
2220 int if_count
= 0, loop_count
= 0;
2221 int *if_stack
, *loop_stack
;
2222 int if_stack_pos
= 0, loop_stack_pos
= 0;
2225 for (i
= 0; i
< num_instructions
; i
++) {
2226 switch (mesa_instructions
[i
].Opcode
) {
2230 case OPCODE_BGNLOOP
:
2235 mesa_instructions
[i
].BranchTarget
= -1;
2242 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2243 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2245 for (i
= 0; i
< num_instructions
; i
++) {
2246 switch (mesa_instructions
[i
].Opcode
) {
2248 if_stack
[if_stack_pos
] = i
;
2252 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2253 if_stack
[if_stack_pos
- 1] = i
;
2256 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2259 case OPCODE_BGNLOOP
:
2260 loop_stack
[loop_stack_pos
] = i
;
2263 case OPCODE_ENDLOOP
:
2265 /* Rewrite any breaks/conts at this nesting level (haven't
2266 * already had a BranchTarget assigned) to point to the end
2269 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2270 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2271 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2272 if (mesa_instructions
[j
].BranchTarget
== -1) {
2273 mesa_instructions
[j
].BranchTarget
= i
;
2277 /* The loop ends point at each other. */
2278 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2279 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2282 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
2283 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2284 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2296 print_program(struct prog_instruction
*mesa_instructions
,
2297 ir_instruction
**mesa_instruction_annotation
,
2298 int num_instructions
)
2300 ir_instruction
*last_ir
= NULL
;
2304 for (i
= 0; i
< num_instructions
; i
++) {
2305 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2306 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2308 fprintf(stdout
, "%3d: ", i
);
2310 if (last_ir
!= ir
&& ir
) {
2313 for (j
= 0; j
< indent
; j
++) {
2314 fprintf(stdout
, " ");
2320 fprintf(stdout
, " "); /* line number spacing. */
2323 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2324 PROG_PRINT_DEBUG
, NULL
);
2330 class add_uniform_to_shader
: public program_resource_visitor
{
2332 add_uniform_to_shader(struct gl_shader_program
*shader_program
,
2333 struct gl_program_parameter_list
*params
,
2334 gl_shader_stage shader_type
)
2335 : shader_program(shader_program
), params(params
), idx(-1),
2336 shader_type(shader_type
)
2341 void process(ir_variable
*var
)
2344 this->program_resource_visitor::process(var
);
2345 var
->data
.param_index
= this->idx
;
2349 virtual void visit_field(const glsl_type
*type
, const char *name
,
2352 struct gl_shader_program
*shader_program
;
2353 struct gl_program_parameter_list
*params
;
2355 gl_shader_stage shader_type
;
2358 } /* anonymous namespace */
2361 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2368 /* atomics don't get real storage */
2369 if (type
->contains_atomic())
2372 if (type
->is_vector() || type
->is_scalar()) {
2373 size
= type
->vector_elements
;
2374 if (type
->is_double())
2377 size
= type_size(type
) * 4;
2380 gl_register_file file
;
2381 if (type
->without_array()->is_sampler()) {
2382 file
= PROGRAM_SAMPLER
;
2384 file
= PROGRAM_UNIFORM
;
2387 int index
= _mesa_lookup_parameter_index(params
, -1, name
);
2389 index
= _mesa_add_parameter(params
, file
, name
, size
, type
->gl_type
,
2392 /* Sampler uniform values are stored in prog->SamplerUnits,
2393 * and the entry in that array is selected by this index we
2394 * store in ParameterValues[].
2396 if (file
== PROGRAM_SAMPLER
) {
2399 this->shader_program
->UniformHash
->get(location
,
2400 params
->Parameters
[index
].Name
);
2406 struct gl_uniform_storage
*storage
=
2407 &this->shader_program
->UniformStorage
[location
];
2409 assert(storage
->type
->is_sampler() &&
2410 storage
->opaque
[shader_type
].active
);
2412 for (unsigned int j
= 0; j
< size
/ 4; j
++)
2413 params
->ParameterValues
[index
+ j
][0].f
=
2414 storage
->opaque
[shader_type
].index
+ j
;
2418 /* The first part of the uniform that's processed determines the base
2419 * location of the whole uniform (for structures).
2426 * Generate the program parameters list for the user uniforms in a shader
2428 * \param shader_program Linked shader program. This is only used to
2429 * emit possible link errors to the info log.
2430 * \param sh Shader whose uniforms are to be processed.
2431 * \param params Parameter list to be filled in.
2434 _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program
2436 struct gl_shader
*sh
,
2437 struct gl_program_parameter_list
2440 add_uniform_to_shader
add(shader_program
, params
, sh
->Stage
);
2442 foreach_in_list(ir_instruction
, node
, sh
->ir
) {
2443 ir_variable
*var
= node
->as_variable();
2445 if ((var
== NULL
) || (var
->data
.mode
!= ir_var_uniform
)
2446 || var
->is_in_buffer_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2454 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2455 struct gl_shader_program
*shader_program
,
2456 struct gl_program_parameter_list
*params
)
2458 /* After adding each uniform to the parameter list, connect the storage for
2459 * the parameter with the tracking structure used by the API for the
2462 unsigned last_location
= unsigned(~0);
2463 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2464 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2469 shader_program
->UniformHash
->get(location
, params
->Parameters
[i
].Name
);
2475 struct gl_uniform_storage
*storage
=
2476 &shader_program
->UniformStorage
[location
];
2478 /* Do not associate any uniform storage to built-in uniforms */
2479 if (storage
->builtin
)
2482 if (location
!= last_location
) {
2483 enum gl_uniform_driver_format format
= uniform_native
;
2485 unsigned columns
= 0;
2486 int dmul
= 4 * sizeof(float);
2487 switch (storage
->type
->base_type
) {
2488 case GLSL_TYPE_UINT
:
2489 assert(ctx
->Const
.NativeIntegers
);
2490 format
= uniform_native
;
2495 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2499 case GLSL_TYPE_DOUBLE
:
2500 if (storage
->type
->vector_elements
> 2)
2503 case GLSL_TYPE_FLOAT
:
2504 format
= uniform_native
;
2505 columns
= storage
->type
->matrix_columns
;
2507 case GLSL_TYPE_BOOL
:
2508 format
= uniform_native
;
2511 case GLSL_TYPE_SAMPLER
:
2512 case GLSL_TYPE_IMAGE
:
2513 case GLSL_TYPE_SUBROUTINE
:
2514 format
= uniform_native
;
2517 case GLSL_TYPE_ATOMIC_UINT
:
2518 case GLSL_TYPE_ARRAY
:
2519 case GLSL_TYPE_VOID
:
2520 case GLSL_TYPE_STRUCT
:
2521 case GLSL_TYPE_ERROR
:
2522 case GLSL_TYPE_INTERFACE
:
2523 assert(!"Should not get here.");
2527 _mesa_uniform_attach_driver_storage(storage
,
2531 ¶ms
->ParameterValues
[i
]);
2533 /* After attaching the driver's storage to the uniform, propagate any
2534 * data from the linker's backing store. This will cause values from
2535 * initializers in the source code to be copied over.
2537 _mesa_propagate_uniforms_to_driver_storage(storage
,
2539 MAX2(1, storage
->array_elements
));
2541 last_location
= location
;
2547 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2548 * channels for copy propagation and updates following instructions to
2549 * use the original versions.
2551 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2552 * will occur. As an example, a TXP production before this pass:
2554 * 0: MOV TEMP[1], INPUT[4].xyyy;
2555 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2556 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2560 * 0: MOV TEMP[1], INPUT[4].xyyy;
2561 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2562 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2564 * which allows for dead code elimination on TEMP[1]'s writes.
2567 ir_to_mesa_visitor::copy_propagate(void)
2569 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2570 ir_to_mesa_instruction
*,
2571 this->next_temp
* 4);
2572 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2575 foreach_in_list(ir_to_mesa_instruction
, inst
, &this->instructions
) {
2576 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2577 || inst
->dst
.index
< this->next_temp
);
2579 /* First, do any copy propagation possible into the src regs. */
2580 for (int r
= 0; r
< 3; r
++) {
2581 ir_to_mesa_instruction
*first
= NULL
;
2583 int acp_base
= inst
->src
[r
].index
* 4;
2585 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2586 inst
->src
[r
].reladdr
)
2589 /* See if we can find entries in the ACP consisting of MOVs
2590 * from the same src register for all the swizzled channels
2591 * of this src register reference.
2593 for (int i
= 0; i
< 4; i
++) {
2594 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2595 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2602 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2607 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2608 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2616 /* We've now validated that we can copy-propagate to
2617 * replace this src register reference. Do it.
2619 inst
->src
[r
].file
= first
->src
[0].file
;
2620 inst
->src
[r
].index
= first
->src
[0].index
;
2623 for (int i
= 0; i
< 4; i
++) {
2624 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2625 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2626 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2629 inst
->src
[r
].swizzle
= swizzle
;
2634 case OPCODE_BGNLOOP
:
2635 case OPCODE_ENDLOOP
:
2636 /* End of a basic block, clear the ACP entirely. */
2637 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2646 /* Clear all channels written inside the block from the ACP, but
2647 * leaving those that were not touched.
2649 for (int r
= 0; r
< this->next_temp
; r
++) {
2650 for (int c
= 0; c
< 4; c
++) {
2651 if (!acp
[4 * r
+ c
])
2654 if (acp_level
[4 * r
+ c
] >= level
)
2655 acp
[4 * r
+ c
] = NULL
;
2658 if (inst
->op
== OPCODE_ENDIF
)
2663 /* Continuing the block, clear any written channels from
2666 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2667 /* Any temporary might be written, so no copy propagation
2668 * across this instruction.
2670 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2671 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2672 inst
->dst
.reladdr
) {
2673 /* Any output might be written, so no copy propagation
2674 * from outputs across this instruction.
2676 for (int r
= 0; r
< this->next_temp
; r
++) {
2677 for (int c
= 0; c
< 4; c
++) {
2678 if (!acp
[4 * r
+ c
])
2681 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2682 acp
[4 * r
+ c
] = NULL
;
2685 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2686 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2687 /* Clear where it's used as dst. */
2688 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2689 for (int c
= 0; c
< 4; c
++) {
2690 if (inst
->dst
.writemask
& (1 << c
)) {
2691 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2696 /* Clear where it's used as src. */
2697 for (int r
= 0; r
< this->next_temp
; r
++) {
2698 for (int c
= 0; c
< 4; c
++) {
2699 if (!acp
[4 * r
+ c
])
2702 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2704 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2705 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2706 inst
->dst
.writemask
& (1 << src_chan
))
2708 acp
[4 * r
+ c
] = NULL
;
2716 /* If this is a copy, add it to the ACP. */
2717 if (inst
->op
== OPCODE_MOV
&&
2718 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2719 !(inst
->dst
.file
== inst
->src
[0].file
&&
2720 inst
->dst
.index
== inst
->src
[0].index
) &&
2721 !inst
->dst
.reladdr
&&
2723 !inst
->src
[0].reladdr
&&
2724 !inst
->src
[0].negate
) {
2725 for (int i
= 0; i
< 4; i
++) {
2726 if (inst
->dst
.writemask
& (1 << i
)) {
2727 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2728 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2734 ralloc_free(acp_level
);
2740 * Convert a shader's GLSL IR into a Mesa gl_program.
2742 static struct gl_program
*
2743 get_mesa_program(struct gl_context
*ctx
,
2744 struct gl_shader_program
*shader_program
,
2745 struct gl_shader
*shader
)
2747 ir_to_mesa_visitor v
;
2748 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2749 ir_instruction
**mesa_instruction_annotation
;
2751 struct gl_program
*prog
;
2752 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
2753 const char *target_string
= _mesa_shader_stage_to_string(shader
->Stage
);
2754 struct gl_shader_compiler_options
*options
=
2755 &ctx
->Const
.ShaderCompilerOptions
[shader
->Stage
];
2757 validate_ir_tree(shader
->ir
);
2759 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
2762 prog
->Parameters
= _mesa_new_parameter_list();
2765 v
.shader_program
= shader_program
;
2766 v
.options
= options
;
2768 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
2771 /* Emit Mesa IR for main(). */
2772 visit_exec_list(shader
->ir
, &v
);
2773 v
.emit(NULL
, OPCODE_END
);
2775 prog
->NumTemporaries
= v
.next_temp
;
2777 unsigned num_instructions
= v
.instructions
.length();
2780 (struct prog_instruction
*)calloc(num_instructions
,
2781 sizeof(*mesa_instructions
));
2782 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2787 /* Convert ir_mesa_instructions into prog_instructions.
2789 mesa_inst
= mesa_instructions
;
2791 foreach_in_list(const ir_to_mesa_instruction
, inst
, &v
.instructions
) {
2792 mesa_inst
->Opcode
= inst
->op
;
2793 mesa_inst
->CondUpdate
= inst
->cond_update
;
2795 mesa_inst
->Saturate
= GL_TRUE
;
2796 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2797 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2798 mesa_inst
->DstReg
.CondMask
= inst
->dst
.cond_mask
;
2799 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2800 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2801 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2802 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2803 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2804 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2805 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2806 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2807 mesa_instruction_annotation
[i
] = inst
->ir
;
2809 /* Set IndirectRegisterFiles. */
2810 if (mesa_inst
->DstReg
.RelAddr
)
2811 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2813 /* Update program's bitmask of indirectly accessed register files */
2814 for (unsigned src
= 0; src
< 3; src
++)
2815 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2816 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2818 switch (mesa_inst
->Opcode
) {
2820 if (options
->MaxIfDepth
== 0) {
2821 linker_warning(shader_program
,
2822 "Couldn't flatten if-statement. "
2823 "This will likely result in software "
2824 "rasterization.\n");
2827 case OPCODE_BGNLOOP
:
2828 if (options
->EmitNoLoops
) {
2829 linker_warning(shader_program
,
2830 "Couldn't unroll loop. "
2831 "This will likely result in software "
2832 "rasterization.\n");
2836 if (options
->EmitNoCont
) {
2837 linker_warning(shader_program
,
2838 "Couldn't lower continue-statement. "
2839 "This will likely result in software "
2840 "rasterization.\n");
2844 prog
->NumAddressRegs
= 1;
2853 if (!shader_program
->LinkStatus
)
2857 if (!shader_program
->LinkStatus
) {
2861 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2863 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
2864 fprintf(stderr
, "\n");
2865 fprintf(stderr
, "GLSL IR for linked %s program %d:\n", target_string
,
2866 shader_program
->Name
);
2867 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
2868 fprintf(stderr
, "\n");
2869 fprintf(stderr
, "\n");
2870 fprintf(stderr
, "Mesa IR for linked %s program %d:\n", target_string
,
2871 shader_program
->Name
);
2872 print_program(mesa_instructions
, mesa_instruction_annotation
,
2877 prog
->Instructions
= mesa_instructions
;
2878 prog
->NumInstructions
= num_instructions
;
2880 /* Setting this to NULL prevents a possible double free in the fail_exit
2883 mesa_instructions
= NULL
;
2885 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
2887 prog
->SamplersUsed
= shader
->active_samplers
;
2888 prog
->ShadowSamplers
= shader
->shadow_samplers
;
2889 _mesa_update_shader_textures_used(shader_program
, prog
);
2891 /* Set the gl_FragDepth layout. */
2892 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
2893 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)prog
;
2894 fp
->FragDepthLayout
= shader_program
->FragDepthLayout
;
2897 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
2899 if ((ctx
->_Shader
->Flags
& GLSL_NO_OPT
) == 0) {
2900 _mesa_optimize_program(ctx
, prog
);
2903 /* This has to be done last. Any operation that can cause
2904 * prog->ParameterValues to get reallocated (e.g., anything that adds a
2905 * program constant) has to happen before creating this linkage.
2907 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
2908 if (!shader_program
->LinkStatus
) {
2915 free(mesa_instructions
);
2916 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
2924 * Called via ctx->Driver.LinkShader()
2925 * This actually involves converting GLSL IR into Mesa gl_programs with
2926 * code lowering and other optimizations.
2929 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
2931 assert(prog
->LinkStatus
);
2933 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
2934 if (prog
->_LinkedShaders
[i
] == NULL
)
2938 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
2939 const struct gl_shader_compiler_options
*options
=
2940 &ctx
->Const
.ShaderCompilerOptions
[prog
->_LinkedShaders
[i
]->Stage
];
2946 do_mat_op_to_vec(ir
);
2947 lower_instructions(ir
, (MOD_TO_FLOOR
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
2948 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
2949 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
2951 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
2953 progress
= do_common_optimization(ir
, true, true,
2954 options
, ctx
->Const
.NativeIntegers
)
2957 progress
= lower_quadop_vector(ir
, true) || progress
;
2959 if (options
->MaxIfDepth
== 0)
2960 progress
= lower_discard(ir
) || progress
;
2962 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
2964 if (options
->EmitNoNoise
)
2965 progress
= lower_noise(ir
) || progress
;
2967 /* If there are forms of indirect addressing that the driver
2968 * cannot handle, perform the lowering pass.
2970 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
2971 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
2973 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
2974 options
->EmitNoIndirectInput
,
2975 options
->EmitNoIndirectOutput
,
2976 options
->EmitNoIndirectTemp
,
2977 options
->EmitNoIndirectUniform
)
2980 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
2981 progress
= lower_vector_insert(ir
, true) || progress
;
2984 validate_ir_tree(ir
);
2987 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
2988 struct gl_program
*linked_prog
;
2990 if (prog
->_LinkedShaders
[i
] == NULL
)
2993 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
2996 _mesa_copy_linked_program_data((gl_shader_stage
) i
, prog
, linked_prog
);
2998 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3000 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
3001 _mesa_shader_stage_to_program(i
),
3007 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
3010 return prog
->LinkStatus
;
3014 * Link a GLSL shader program. Called via glLinkProgram().
3017 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3021 _mesa_clear_shader_program_data(prog
);
3023 prog
->LinkStatus
= GL_TRUE
;
3025 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3026 if (!prog
->Shaders
[i
]->CompileStatus
) {
3027 linker_error(prog
, "linking with uncompiled shader");
3031 if (prog
->LinkStatus
) {
3032 link_shaders(ctx
, prog
);
3035 if (prog
->LinkStatus
) {
3036 if (!ctx
->Driver
.LinkShader(ctx
, prog
)) {
3037 prog
->LinkStatus
= GL_FALSE
;
3039 build_program_resource_list(prog
);
3043 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
3044 if (!prog
->LinkStatus
) {
3045 fprintf(stderr
, "GLSL shader program %d failed to link\n", prog
->Name
);
3048 if (prog
->InfoLog
&& prog
->InfoLog
[0] != 0) {
3049 fprintf(stderr
, "GLSL shader program %d info log:\n", prog
->Name
);
3050 fprintf(stderr
, "%s\n", prog
->InfoLog
);