2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "ir_uniform.h"
39 #include "glsl_types.h"
40 #include "glsl_parser_extras.h"
41 #include "../glsl/program.h"
42 #include "ir_optimization.h"
46 #include "main/mtypes.h"
47 #include "main/shaderobj.h"
48 #include "program/hash_table.h"
51 #include "main/shaderapi.h"
52 #include "main/uniforms.h"
53 #include "program/prog_instruction.h"
54 #include "program/prog_optimize.h"
55 #include "program/prog_print.h"
56 #include "program/program.h"
57 #include "program/prog_parameter.h"
58 #include "program/sampler.h"
64 static int swizzle_for_size(int size
);
67 * This struct is a corresponding struct to Mesa prog_src_register, with
72 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
76 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
77 this->swizzle
= swizzle_for_size(type
->vector_elements
);
79 this->swizzle
= SWIZZLE_XYZW
;
86 this->file
= PROGRAM_UNDEFINED
;
93 explicit src_reg(dst_reg reg
);
95 gl_register_file file
; /**< PROGRAM_* from Mesa */
96 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
97 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
98 int negate
; /**< NEGATE_XYZW mask from mesa */
99 /** Register index should be offset by the integer in this reg. */
105 dst_reg(gl_register_file file
, int writemask
)
109 this->writemask
= writemask
;
110 this->cond_mask
= COND_TR
;
111 this->reladdr
= NULL
;
116 this->file
= PROGRAM_UNDEFINED
;
119 this->cond_mask
= COND_TR
;
120 this->reladdr
= NULL
;
123 explicit dst_reg(src_reg reg
);
125 gl_register_file file
; /**< PROGRAM_* from Mesa */
126 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
127 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
129 /** Register index should be offset by the integer in this reg. */
133 src_reg::src_reg(dst_reg reg
)
135 this->file
= reg
.file
;
136 this->index
= reg
.index
;
137 this->swizzle
= SWIZZLE_XYZW
;
139 this->reladdr
= reg
.reladdr
;
142 dst_reg::dst_reg(src_reg reg
)
144 this->file
= reg
.file
;
145 this->index
= reg
.index
;
146 this->writemask
= WRITEMASK_XYZW
;
147 this->cond_mask
= COND_TR
;
148 this->reladdr
= reg
.reladdr
;
151 class ir_to_mesa_instruction
: public exec_node
{
153 /* Callers of this ralloc-based new need not call delete. It's
154 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
155 static void* operator new(size_t size
, void *ctx
)
159 node
= rzalloc_size(ctx
, size
);
160 assert(node
!= NULL
);
168 /** Pointer to the ir source this tree came from for debugging */
170 GLboolean cond_update
;
172 int sampler
; /**< sampler index */
173 int tex_target
; /**< One of TEXTURE_*_INDEX */
174 GLboolean tex_shadow
;
177 class variable_storage
: public exec_node
{
179 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
180 : file(file
), index(index
), var(var
)
185 gl_register_file file
;
187 ir_variable
*var
; /* variable that maps to this, if any */
190 class function_entry
: public exec_node
{
192 ir_function_signature
*sig
;
195 * identifier of this function signature used by the program.
197 * At the point that Mesa instructions for function calls are
198 * generated, we don't know the address of the first instruction of
199 * the function body. So we make the BranchTarget that is called a
200 * small integer and rewrite them during set_branchtargets().
205 * Pointer to first instruction of the function body.
207 * Set during function body emits after main() is processed.
209 ir_to_mesa_instruction
*bgn_inst
;
212 * Index of the first instruction of the function body in actual
215 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
219 /** Storage for the return value. */
223 class ir_to_mesa_visitor
: public ir_visitor
{
225 ir_to_mesa_visitor();
226 ~ir_to_mesa_visitor();
228 function_entry
*current_function
;
230 struct gl_context
*ctx
;
231 struct gl_program
*prog
;
232 struct gl_shader_program
*shader_program
;
233 struct gl_shader_compiler_options
*options
;
237 variable_storage
*find_variable_storage(ir_variable
*var
);
239 src_reg
get_temp(const glsl_type
*type
);
240 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
242 src_reg
src_reg_for_float(float val
);
245 * \name Visit methods
247 * As typical for the visitor pattern, there must be one \c visit method for
248 * each concrete subclass of \c ir_instruction. Virtual base classes within
249 * the hierarchy should not have \c visit methods.
252 virtual void visit(ir_variable
*);
253 virtual void visit(ir_loop
*);
254 virtual void visit(ir_loop_jump
*);
255 virtual void visit(ir_function_signature
*);
256 virtual void visit(ir_function
*);
257 virtual void visit(ir_expression
*);
258 virtual void visit(ir_swizzle
*);
259 virtual void visit(ir_dereference_variable
*);
260 virtual void visit(ir_dereference_array
*);
261 virtual void visit(ir_dereference_record
*);
262 virtual void visit(ir_assignment
*);
263 virtual void visit(ir_constant
*);
264 virtual void visit(ir_call
*);
265 virtual void visit(ir_return
*);
266 virtual void visit(ir_discard
*);
267 virtual void visit(ir_texture
*);
268 virtual void visit(ir_if
*);
273 /** List of variable_storage */
276 /** List of function_entry */
277 exec_list function_signatures
;
278 int next_signature_id
;
280 /** List of ir_to_mesa_instruction */
281 exec_list instructions
;
283 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
285 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
286 dst_reg dst
, src_reg src0
);
288 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
289 dst_reg dst
, src_reg src0
, src_reg src1
);
291 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
293 src_reg src0
, src_reg src1
, src_reg src2
);
296 * Emit the correct dot-product instruction for the type of arguments
298 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
304 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
305 dst_reg dst
, src_reg src0
);
307 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
308 dst_reg dst
, src_reg src0
, src_reg src1
);
310 void emit_scs(ir_instruction
*ir
, enum prog_opcode op
,
311 dst_reg dst
, const src_reg
&src
);
313 bool try_emit_mad(ir_expression
*ir
,
315 bool try_emit_mad_for_and_not(ir_expression
*ir
,
317 bool try_emit_sat(ir_expression
*ir
);
319 void emit_swz(ir_expression
*ir
);
321 bool process_move_condition(ir_rvalue
*ir
);
323 void copy_propagate(void);
328 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
330 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
332 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
335 swizzle_for_size(int size
)
337 static const int size_swizzles
[4] = {
338 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
339 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
340 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
341 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
344 assert((size
>= 1) && (size
<= 4));
345 return size_swizzles
[size
- 1];
348 ir_to_mesa_instruction
*
349 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
351 src_reg src0
, src_reg src1
, src_reg src2
)
353 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
356 /* If we have to do relative addressing, we want to load the ARL
357 * reg directly for one of the regs, and preload the other reladdr
358 * sources into temps.
360 num_reladdr
+= dst
.reladdr
!= NULL
;
361 num_reladdr
+= src0
.reladdr
!= NULL
;
362 num_reladdr
+= src1
.reladdr
!= NULL
;
363 num_reladdr
+= src2
.reladdr
!= NULL
;
365 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
366 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
367 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
370 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
373 assert(num_reladdr
== 0);
382 this->instructions
.push_tail(inst
);
388 ir_to_mesa_instruction
*
389 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
390 dst_reg dst
, src_reg src0
, src_reg src1
)
392 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
395 ir_to_mesa_instruction
*
396 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
397 dst_reg dst
, src_reg src0
)
399 assert(dst
.writemask
!= 0);
400 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
403 ir_to_mesa_instruction
*
404 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
406 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
409 ir_to_mesa_instruction
*
410 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
411 dst_reg dst
, src_reg src0
, src_reg src1
,
414 static const gl_inst_opcode dot_opcodes
[] = {
415 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
418 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
422 * Emits Mesa scalar opcodes to produce unique answers across channels.
424 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
425 * channel determines the result across all channels. So to do a vec4
426 * of this operation, we want to emit a scalar per source channel used
427 * to produce dest channels.
430 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
432 src_reg orig_src0
, src_reg orig_src1
)
435 int done_mask
= ~dst
.writemask
;
437 /* Mesa RCP is a scalar operation splatting results to all channels,
438 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
441 for (i
= 0; i
< 4; i
++) {
442 GLuint this_mask
= (1 << i
);
443 ir_to_mesa_instruction
*inst
;
444 src_reg src0
= orig_src0
;
445 src_reg src1
= orig_src1
;
447 if (done_mask
& this_mask
)
450 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
451 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
452 for (j
= i
+ 1; j
< 4; j
++) {
453 /* If there is another enabled component in the destination that is
454 * derived from the same inputs, generate its value on this pass as
457 if (!(done_mask
& (1 << j
)) &&
458 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
459 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
460 this_mask
|= (1 << j
);
463 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
464 src0_swiz
, src0_swiz
);
465 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
466 src1_swiz
, src1_swiz
);
468 inst
= emit(ir
, op
, dst
, src0
, src1
);
469 inst
->dst
.writemask
= this_mask
;
470 done_mask
|= this_mask
;
475 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
476 dst_reg dst
, src_reg src0
)
478 src_reg undef
= undef_src
;
480 undef
.swizzle
= SWIZZLE_XXXX
;
482 emit_scalar(ir
, op
, dst
, src0
, undef
);
486 * Emit an OPCODE_SCS instruction
488 * The \c SCS opcode functions a bit differently than the other Mesa (or
489 * ARB_fragment_program) opcodes. Instead of splatting its result across all
490 * four components of the destination, it writes one value to the \c x
491 * component and another value to the \c y component.
493 * \param ir IR instruction being processed
494 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
496 * \param dst Destination register
497 * \param src Source register
500 ir_to_mesa_visitor::emit_scs(ir_instruction
*ir
, enum prog_opcode op
,
504 /* Vertex programs cannot use the SCS opcode.
506 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
507 emit_scalar(ir
, op
, dst
, src
);
511 const unsigned component
= (op
== OPCODE_SIN
) ? 0 : 1;
512 const unsigned scs_mask
= (1U << component
);
513 int done_mask
= ~dst
.writemask
;
516 assert(op
== OPCODE_SIN
|| op
== OPCODE_COS
);
518 /* If there are compnents in the destination that differ from the component
519 * that will be written by the SCS instrution, we'll need a temporary.
521 if (scs_mask
!= unsigned(dst
.writemask
)) {
522 tmp
= get_temp(glsl_type::vec4_type
);
525 for (unsigned i
= 0; i
< 4; i
++) {
526 unsigned this_mask
= (1U << i
);
529 if ((done_mask
& this_mask
) != 0)
532 /* The source swizzle specified which component of the source generates
533 * sine / cosine for the current component in the destination. The SCS
534 * instruction requires that this value be swizzle to the X component.
535 * Replace the current swizzle with a swizzle that puts the source in
538 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
540 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
541 src0_swiz
, src0_swiz
);
542 for (unsigned j
= i
+ 1; j
< 4; j
++) {
543 /* If there is another enabled component in the destination that is
544 * derived from the same inputs, generate its value on this pass as
547 if (!(done_mask
& (1 << j
)) &&
548 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
549 this_mask
|= (1 << j
);
553 if (this_mask
!= scs_mask
) {
554 ir_to_mesa_instruction
*inst
;
555 dst_reg tmp_dst
= dst_reg(tmp
);
557 /* Emit the SCS instruction.
559 inst
= emit(ir
, OPCODE_SCS
, tmp_dst
, src0
);
560 inst
->dst
.writemask
= scs_mask
;
562 /* Move the result of the SCS instruction to the desired location in
565 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
566 component
, component
);
567 inst
= emit(ir
, OPCODE_SCS
, dst
, tmp
);
568 inst
->dst
.writemask
= this_mask
;
570 /* Emit the SCS instruction to write directly to the destination.
572 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_SCS
, dst
, src0
);
573 inst
->dst
.writemask
= scs_mask
;
576 done_mask
|= this_mask
;
581 ir_to_mesa_visitor::src_reg_for_float(float val
)
583 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
585 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
586 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
592 type_size(const struct glsl_type
*type
)
597 switch (type
->base_type
) {
600 case GLSL_TYPE_FLOAT
:
602 if (type
->is_matrix()) {
603 return type
->matrix_columns
;
605 /* Regardless of size of vector, it gets a vec4. This is bad
606 * packing for things like floats, but otherwise arrays become a
607 * mess. Hopefully a later pass over the code can pack scalars
608 * down if appropriate.
612 case GLSL_TYPE_ARRAY
:
613 assert(type
->length
> 0);
614 return type_size(type
->fields
.array
) * type
->length
;
615 case GLSL_TYPE_STRUCT
:
617 for (i
= 0; i
< type
->length
; i
++) {
618 size
+= type_size(type
->fields
.structure
[i
].type
);
621 case GLSL_TYPE_SAMPLER
:
622 /* Samplers take up one slot in UNIFORMS[], but they're baked in
627 case GLSL_TYPE_ERROR
:
628 case GLSL_TYPE_INTERFACE
:
629 assert(!"Invalid type in type_size");
637 * In the initial pass of codegen, we assign temporary numbers to
638 * intermediate results. (not SSA -- variable assignments will reuse
639 * storage). Actual register allocation for the Mesa VM occurs in a
640 * pass over the Mesa IR later.
643 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
647 src
.file
= PROGRAM_TEMPORARY
;
648 src
.index
= next_temp
;
650 next_temp
+= type_size(type
);
652 if (type
->is_array() || type
->is_record()) {
653 src
.swizzle
= SWIZZLE_NOOP
;
655 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
663 ir_to_mesa_visitor::find_variable_storage(ir_variable
*var
)
666 variable_storage
*entry
;
668 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
669 entry
= (variable_storage
*)iter
.get();
671 if (entry
->var
== var
)
679 ir_to_mesa_visitor::visit(ir_variable
*ir
)
681 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
682 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
684 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
685 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
688 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
690 const ir_state_slot
*const slots
= ir
->state_slots
;
691 assert(ir
->state_slots
!= NULL
);
693 /* Check if this statevar's setup in the STATE file exactly
694 * matches how we'll want to reference it as a
695 * struct/array/whatever. If not, then we need to move it into
696 * temporary storage and hope that it'll get copy-propagated
699 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
700 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
705 variable_storage
*storage
;
707 if (i
== ir
->num_state_slots
) {
708 /* We'll set the index later. */
709 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
710 this->variables
.push_tail(storage
);
714 /* The variable_storage constructor allocates slots based on the size
715 * of the type. However, this had better match the number of state
716 * elements that we're going to copy into the new temporary.
718 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
720 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
722 this->variables
.push_tail(storage
);
723 this->next_temp
+= type_size(ir
->type
);
725 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
729 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
730 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
731 (gl_state_index
*)slots
[i
].tokens
);
733 if (storage
->file
== PROGRAM_STATE_VAR
) {
734 if (storage
->index
== -1) {
735 storage
->index
= index
;
737 assert(index
== storage
->index
+ (int)i
);
740 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
741 src
.swizzle
= slots
[i
].swizzle
;
742 emit(ir
, OPCODE_MOV
, dst
, src
);
743 /* even a float takes up a whole vec4 reg in a struct/array. */
748 if (storage
->file
== PROGRAM_TEMPORARY
&&
749 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
750 linker_error(this->shader_program
,
751 "failed to load builtin uniform `%s' "
752 "(%d/%d regs loaded)\n",
753 ir
->name
, dst
.index
- storage
->index
,
754 type_size(ir
->type
));
760 ir_to_mesa_visitor::visit(ir_loop
*ir
)
762 ir_dereference_variable
*counter
= NULL
;
764 if (ir
->counter
!= NULL
)
765 counter
= new(mem_ctx
) ir_dereference_variable(ir
->counter
);
767 if (ir
->from
!= NULL
) {
768 assert(ir
->counter
!= NULL
);
771 new(mem_ctx
) ir_assignment(counter
, ir
->from
, NULL
);
776 emit(NULL
, OPCODE_BGNLOOP
);
780 new(mem_ctx
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
782 ir_if
*if_stmt
= new(mem_ctx
) ir_if(e
);
785 new(mem_ctx
) ir_loop_jump(ir_loop_jump::jump_break
);
787 if_stmt
->then_instructions
.push_tail(brk
);
789 if_stmt
->accept(this);
792 visit_exec_list(&ir
->body_instructions
, this);
796 new(mem_ctx
) ir_expression(ir_binop_add
, counter
->type
,
797 counter
, ir
->increment
);
800 new(mem_ctx
) ir_assignment(counter
, e
, NULL
);
805 emit(NULL
, OPCODE_ENDLOOP
);
809 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
812 case ir_loop_jump::jump_break
:
813 emit(NULL
, OPCODE_BRK
);
815 case ir_loop_jump::jump_continue
:
816 emit(NULL
, OPCODE_CONT
);
823 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
830 ir_to_mesa_visitor::visit(ir_function
*ir
)
832 /* Ignore function bodies other than main() -- we shouldn't see calls to
833 * them since they should all be inlined before we get to ir_to_mesa.
835 if (strcmp(ir
->name
, "main") == 0) {
836 const ir_function_signature
*sig
;
839 sig
= ir
->matching_signature(&empty
);
843 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
844 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
852 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
854 int nonmul_operand
= 1 - mul_operand
;
857 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
858 if (!expr
|| expr
->operation
!= ir_binop_mul
)
861 expr
->operands
[0]->accept(this);
863 expr
->operands
[1]->accept(this);
865 ir
->operands
[nonmul_operand
]->accept(this);
868 this->result
= get_temp(ir
->type
);
869 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
875 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
877 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
878 * implemented using multiplication, and logical-or is implemented using
879 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
880 * As result, the logical expression (a & !b) can be rewritten as:
884 * - (a * 1) - (a * b)
888 * This final expression can be implemented as a single MAD(a, -b, a)
892 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
894 const int other_operand
= 1 - try_operand
;
897 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
898 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
901 ir
->operands
[other_operand
]->accept(this);
903 expr
->operands
[0]->accept(this);
906 b
.negate
= ~b
.negate
;
908 this->result
= get_temp(ir
->type
);
909 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
915 ir_to_mesa_visitor::try_emit_sat(ir_expression
*ir
)
917 /* Saturates were only introduced to vertex programs in
918 * NV_vertex_program3, so don't give them to drivers in the VP.
920 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
)
923 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
927 sat_src
->accept(this);
928 src_reg src
= this->result
;
930 /* If we generated an expression instruction into a temporary in
931 * processing the saturate's operand, apply the saturate to that
932 * instruction. Otherwise, generate a MOV to do the saturate.
934 * Note that we have to be careful to only do this optimization if
935 * the instruction in question was what generated src->result. For
936 * example, ir_dereference_array might generate a MUL instruction
937 * to create the reladdr, and return us a src reg using that
938 * reladdr. That MUL result is not the value we're trying to
941 ir_expression
*sat_src_expr
= sat_src
->as_expression();
942 ir_to_mesa_instruction
*new_inst
;
943 new_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
944 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
945 sat_src_expr
->operation
== ir_binop_add
||
946 sat_src_expr
->operation
== ir_binop_dot
)) {
947 new_inst
->saturate
= true;
949 this->result
= get_temp(ir
->type
);
950 ir_to_mesa_instruction
*inst
;
951 inst
= emit(ir
, OPCODE_MOV
, dst_reg(this->result
), src
);
952 inst
->saturate
= true;
959 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
960 src_reg
*reg
, int *num_reladdr
)
965 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
967 if (*num_reladdr
!= 1) {
968 src_reg temp
= get_temp(glsl_type::vec4_type
);
970 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
978 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
980 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
981 * This means that each of the operands is either an immediate value of -1,
982 * 0, or 1, or is a component from one source register (possibly with
985 uint8_t components
[4] = { 0 };
986 bool negate
[4] = { false };
987 ir_variable
*var
= NULL
;
989 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
990 ir_rvalue
*op
= ir
->operands
[i
];
992 assert(op
->type
->is_scalar());
995 switch (op
->ir_type
) {
996 case ir_type_constant
: {
998 assert(op
->type
->is_scalar());
1000 const ir_constant
*const c
= op
->as_constant();
1002 components
[i
] = SWIZZLE_ONE
;
1003 } else if (c
->is_zero()) {
1004 components
[i
] = SWIZZLE_ZERO
;
1005 } else if (c
->is_negative_one()) {
1006 components
[i
] = SWIZZLE_ONE
;
1009 assert(!"SWZ constant must be 0.0 or 1.0.");
1016 case ir_type_dereference_variable
: {
1017 ir_dereference_variable
*const deref
=
1018 (ir_dereference_variable
*) op
;
1020 assert((var
== NULL
) || (deref
->var
== var
));
1021 components
[i
] = SWIZZLE_X
;
1027 case ir_type_expression
: {
1028 ir_expression
*const expr
= (ir_expression
*) op
;
1030 assert(expr
->operation
== ir_unop_neg
);
1033 op
= expr
->operands
[0];
1037 case ir_type_swizzle
: {
1038 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
1040 components
[i
] = swiz
->mask
.x
;
1046 assert(!"Should not get here.");
1052 assert(var
!= NULL
);
1054 ir_dereference_variable
*const deref
=
1055 new(mem_ctx
) ir_dereference_variable(var
);
1057 this->result
.file
= PROGRAM_UNDEFINED
;
1058 deref
->accept(this);
1059 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1061 printf("Failed to get tree for expression operand:\n");
1069 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
1073 src
.negate
= ((unsigned(negate
[0]) << 0)
1074 | (unsigned(negate
[1]) << 1)
1075 | (unsigned(negate
[2]) << 2)
1076 | (unsigned(negate
[3]) << 3));
1078 /* Storage for our result. Ideally for an assignment we'd be using the
1079 * actual storage for the result here, instead.
1081 const src_reg result_src
= get_temp(ir
->type
);
1082 dst_reg result_dst
= dst_reg(result_src
);
1084 /* Limit writes to the channels that will be used by result_src later.
1085 * This does limit this temp's use as a temporary for multi-instruction
1088 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1090 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
1091 this->result
= result_src
;
1095 ir_to_mesa_visitor::visit(ir_expression
*ir
)
1097 unsigned int operand
;
1098 src_reg op
[Elements(ir
->operands
)];
1102 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1104 if (ir
->operation
== ir_binop_add
) {
1105 if (try_emit_mad(ir
, 1))
1107 if (try_emit_mad(ir
, 0))
1111 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1113 if (ir
->operation
== ir_binop_logic_and
) {
1114 if (try_emit_mad_for_and_not(ir
, 1))
1116 if (try_emit_mad_for_and_not(ir
, 0))
1120 if (try_emit_sat(ir
))
1123 if (ir
->operation
== ir_quadop_vector
) {
1128 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1129 this->result
.file
= PROGRAM_UNDEFINED
;
1130 ir
->operands
[operand
]->accept(this);
1131 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1133 printf("Failed to get tree for expression operand:\n");
1134 ir
->operands
[operand
]->accept(&v
);
1137 op
[operand
] = this->result
;
1139 /* Matrix expression operands should have been broken down to vector
1140 * operations already.
1142 assert(!ir
->operands
[operand
]->type
->is_matrix());
1145 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1146 if (ir
->operands
[1]) {
1147 vector_elements
= MAX2(vector_elements
,
1148 ir
->operands
[1]->type
->vector_elements
);
1151 this->result
.file
= PROGRAM_UNDEFINED
;
1153 /* Storage for our result. Ideally for an assignment we'd be using
1154 * the actual storage for the result here, instead.
1156 result_src
= get_temp(ir
->type
);
1157 /* convenience for the emit functions below. */
1158 result_dst
= dst_reg(result_src
);
1159 /* Limit writes to the channels that will be used by result_src later.
1160 * This does limit this temp's use as a temporary for multi-instruction
1163 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1165 switch (ir
->operation
) {
1166 case ir_unop_logic_not
:
1167 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1168 * older GPUs implement SEQ using multiple instructions (i915 uses two
1169 * SGE instructions and a MUL instruction). Since our logic values are
1170 * 0.0 and 1.0, 1-x also implements !x.
1172 op
[0].negate
= ~op
[0].negate
;
1173 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1176 op
[0].negate
= ~op
[0].negate
;
1180 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1183 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1186 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1190 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1194 assert(!"not reached: should be handled by ir_explog_to_explog2");
1197 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1200 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1203 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1205 case ir_unop_sin_reduced
:
1206 emit_scs(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1208 case ir_unop_cos_reduced
:
1209 emit_scs(ir
, OPCODE_COS
, result_dst
, op
[0]);
1213 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1216 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1219 case ir_unop_noise
: {
1220 const enum prog_opcode opcode
=
1221 prog_opcode(OPCODE_NOISE1
1222 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1223 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1225 emit(ir
, opcode
, result_dst
, op
[0]);
1230 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1233 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1237 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1240 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1243 /* Floating point should be lowered by MOD_TO_FRACT in the compiler. */
1244 assert(ir
->type
->is_integer());
1245 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1249 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1251 case ir_binop_greater
:
1252 emit(ir
, OPCODE_SGT
, result_dst
, op
[0], op
[1]);
1254 case ir_binop_lequal
:
1255 emit(ir
, OPCODE_SLE
, result_dst
, op
[0], op
[1]);
1257 case ir_binop_gequal
:
1258 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1260 case ir_binop_equal
:
1261 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1263 case ir_binop_nequal
:
1264 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1266 case ir_binop_all_equal
:
1267 /* "==" operator producing a scalar boolean. */
1268 if (ir
->operands
[0]->type
->is_vector() ||
1269 ir
->operands
[1]->type
->is_vector()) {
1270 src_reg temp
= get_temp(glsl_type::vec4_type
);
1271 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1273 /* After the dot-product, the value will be an integer on the
1274 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1276 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1278 /* Negating the result of the dot-product gives values on the range
1279 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1280 * achieved using SGE.
1282 src_reg sge_src
= result_src
;
1283 sge_src
.negate
= ~sge_src
.negate
;
1284 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1286 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1289 case ir_binop_any_nequal
:
1290 /* "!=" operator producing a scalar boolean. */
1291 if (ir
->operands
[0]->type
->is_vector() ||
1292 ir
->operands
[1]->type
->is_vector()) {
1293 src_reg temp
= get_temp(glsl_type::vec4_type
);
1294 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1296 /* After the dot-product, the value will be an integer on the
1297 * range [0,4]. Zero stays zero, and positive values become 1.0.
1299 ir_to_mesa_instruction
*const dp
=
1300 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1301 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1302 /* The clamping to [0,1] can be done for free in the fragment
1303 * shader with a saturate.
1305 dp
->saturate
= true;
1307 /* Negating the result of the dot-product gives values on the range
1308 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1309 * achieved using SLT.
1311 src_reg slt_src
= result_src
;
1312 slt_src
.negate
= ~slt_src
.negate
;
1313 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1316 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1321 assert(ir
->operands
[0]->type
->is_vector());
1323 /* After the dot-product, the value will be an integer on the
1324 * range [0,4]. Zero stays zero, and positive values become 1.0.
1326 ir_to_mesa_instruction
*const dp
=
1327 emit_dp(ir
, result_dst
, op
[0], op
[0],
1328 ir
->operands
[0]->type
->vector_elements
);
1329 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1330 /* The clamping to [0,1] can be done for free in the fragment
1331 * shader with a saturate.
1333 dp
->saturate
= true;
1335 /* Negating the result of the dot-product gives values on the range
1336 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1337 * is achieved using SLT.
1339 src_reg slt_src
= result_src
;
1340 slt_src
.negate
= ~slt_src
.negate
;
1341 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1346 case ir_binop_logic_xor
:
1347 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1350 case ir_binop_logic_or
: {
1351 /* After the addition, the value will be an integer on the
1352 * range [0,2]. Zero stays zero, and positive values become 1.0.
1354 ir_to_mesa_instruction
*add
=
1355 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1356 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1357 /* The clamping to [0,1] can be done for free in the fragment
1358 * shader with a saturate.
1360 add
->saturate
= true;
1362 /* Negating the result of the addition gives values on the range
1363 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1364 * is achieved using SLT.
1366 src_reg slt_src
= result_src
;
1367 slt_src
.negate
= ~slt_src
.negate
;
1368 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1373 case ir_binop_logic_and
:
1374 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1375 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1379 assert(ir
->operands
[0]->type
->is_vector());
1380 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1381 emit_dp(ir
, result_dst
, op
[0], op
[1],
1382 ir
->operands
[0]->type
->vector_elements
);
1386 /* sqrt(x) = x * rsq(x). */
1387 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1388 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1389 /* For incoming channels <= 0, set the result to 0. */
1390 op
[0].negate
= ~op
[0].negate
;
1391 emit(ir
, OPCODE_CMP
, result_dst
,
1392 op
[0], result_src
, src_reg_for_float(0.0));
1395 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1403 /* Mesa IR lacks types, ints are stored as truncated floats. */
1408 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1412 emit(ir
, OPCODE_SNE
, result_dst
,
1413 op
[0], src_reg_for_float(0.0));
1415 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1416 case ir_unop_bitcast_f2u
:
1417 case ir_unop_bitcast_i2f
:
1418 case ir_unop_bitcast_u2f
:
1421 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1424 op
[0].negate
= ~op
[0].negate
;
1425 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1426 result_src
.negate
= ~result_src
.negate
;
1429 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1432 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1434 case ir_unop_pack_snorm_2x16
:
1435 case ir_unop_pack_snorm_4x8
:
1436 case ir_unop_pack_unorm_2x16
:
1437 case ir_unop_pack_unorm_4x8
:
1438 case ir_unop_pack_half_2x16
:
1439 case ir_unop_unpack_snorm_2x16
:
1440 case ir_unop_unpack_snorm_4x8
:
1441 case ir_unop_unpack_unorm_2x16
:
1442 case ir_unop_unpack_unorm_4x8
:
1443 case ir_unop_unpack_half_2x16
:
1444 case ir_unop_unpack_half_2x16_split_x
:
1445 case ir_unop_unpack_half_2x16_split_y
:
1446 case ir_binop_pack_half_2x16_split
:
1447 case ir_unop_bitfield_reverse
:
1448 case ir_unop_bit_count
:
1449 case ir_unop_find_msb
:
1450 case ir_unop_find_lsb
:
1451 assert(!"not supported");
1454 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1457 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1460 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1463 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1464 * hardware backends have no way to avoid Mesa IR generation
1465 * even if they don't use it, we need to emit "something" and
1468 case ir_binop_lshift
:
1469 case ir_binop_rshift
:
1470 case ir_binop_bit_and
:
1471 case ir_binop_bit_xor
:
1472 case ir_binop_bit_or
:
1473 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1476 case ir_unop_bit_not
:
1477 case ir_unop_round_even
:
1478 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1481 case ir_binop_ubo_load
:
1482 assert(!"not supported");
1486 /* ir_triop_lrp operands are (x, y, a) while
1487 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1489 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1494 case ir_triop_bitfield_extract
:
1495 case ir_quadop_bitfield_insert
:
1496 assert(!"not supported");
1499 case ir_quadop_vector
:
1500 /* This operation should have already been handled.
1502 assert(!"Should not get here.");
1506 this->result
= result_src
;
1511 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1517 /* Note that this is only swizzles in expressions, not those on the left
1518 * hand side of an assignment, which do write masking. See ir_assignment
1522 ir
->val
->accept(this);
1524 assert(src
.file
!= PROGRAM_UNDEFINED
);
1526 for (i
= 0; i
< 4; i
++) {
1527 if (i
< ir
->type
->vector_elements
) {
1530 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1533 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1536 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1539 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1543 /* If the type is smaller than a vec4, replicate the last
1546 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1550 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1556 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1558 variable_storage
*entry
= find_variable_storage(ir
->var
);
1559 ir_variable
*var
= ir
->var
;
1562 switch (var
->mode
) {
1563 case ir_var_uniform
:
1564 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1566 this->variables
.push_tail(entry
);
1568 case ir_var_shader_in
:
1569 /* The linker assigns locations for varyings and attributes,
1570 * including deprecated builtins (like gl_Color),
1571 * user-assigned generic attributes (glBindVertexLocation),
1572 * and user-defined varyings.
1574 assert(var
->location
!= -1);
1575 entry
= new(mem_ctx
) variable_storage(var
,
1579 case ir_var_shader_out
:
1580 assert(var
->location
!= -1);
1581 entry
= new(mem_ctx
) variable_storage(var
,
1585 case ir_var_system_value
:
1586 entry
= new(mem_ctx
) variable_storage(var
,
1587 PROGRAM_SYSTEM_VALUE
,
1591 case ir_var_temporary
:
1592 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1594 this->variables
.push_tail(entry
);
1596 next_temp
+= type_size(var
->type
);
1601 printf("Failed to make storage for %s\n", var
->name
);
1606 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1610 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1614 int element_size
= type_size(ir
->type
);
1616 index
= ir
->array_index
->constant_expression_value();
1618 ir
->array
->accept(this);
1622 src
.index
+= index
->value
.i
[0] * element_size
;
1624 /* Variable index array dereference. It eats the "vec4" of the
1625 * base of the array and an index that offsets the Mesa register
1628 ir
->array_index
->accept(this);
1632 if (element_size
== 1) {
1633 index_reg
= this->result
;
1635 index_reg
= get_temp(glsl_type::float_type
);
1637 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1638 this->result
, src_reg_for_float(element_size
));
1641 /* If there was already a relative address register involved, add the
1642 * new and the old together to get the new offset.
1644 if (src
.reladdr
!= NULL
) {
1645 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1647 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1648 index_reg
, *src
.reladdr
);
1650 index_reg
= accum_reg
;
1653 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1654 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1657 /* If the type is smaller than a vec4, replicate the last channel out. */
1658 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1659 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1661 src
.swizzle
= SWIZZLE_NOOP
;
1667 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1670 const glsl_type
*struct_type
= ir
->record
->type
;
1673 ir
->record
->accept(this);
1675 for (i
= 0; i
< struct_type
->length
; i
++) {
1676 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1678 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1681 /* If the type is smaller than a vec4, replicate the last channel out. */
1682 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1683 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1685 this->result
.swizzle
= SWIZZLE_NOOP
;
1687 this->result
.index
+= offset
;
1691 * We want to be careful in assignment setup to hit the actual storage
1692 * instead of potentially using a temporary like we might with the
1693 * ir_dereference handler.
1696 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1698 /* The LHS must be a dereference. If the LHS is a variable indexed array
1699 * access of a vector, it must be separated into a series conditional moves
1700 * before reaching this point (see ir_vec_index_to_cond_assign).
1702 assert(ir
->as_dereference());
1703 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1705 assert(!deref_array
->array
->type
->is_vector());
1708 /* Use the rvalue deref handler for the most part. We'll ignore
1709 * swizzles in it and write swizzles using writemask, though.
1712 return dst_reg(v
->result
);
1716 * Process the condition of a conditional assignment
1718 * Examines the condition of a conditional assignment to generate the optimal
1719 * first operand of a \c CMP instruction. If the condition is a relational
1720 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1721 * used as the source for the \c CMP instruction. Otherwise the comparison
1722 * is processed to a boolean result, and the boolean result is used as the
1723 * operand to the CMP instruction.
1726 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1728 ir_rvalue
*src_ir
= ir
;
1730 bool switch_order
= false;
1732 ir_expression
*const expr
= ir
->as_expression();
1733 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
1734 bool zero_on_left
= false;
1736 if (expr
->operands
[0]->is_zero()) {
1737 src_ir
= expr
->operands
[1];
1738 zero_on_left
= true;
1739 } else if (expr
->operands
[1]->is_zero()) {
1740 src_ir
= expr
->operands
[0];
1741 zero_on_left
= false;
1745 * (a < 0) T F F ( a < 0) T F F
1746 * (0 < a) F F T (-a < 0) F F T
1747 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1748 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1749 * (a > 0) F F T (-a < 0) F F T
1750 * (0 > a) T F F ( a < 0) T F F
1751 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1752 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1754 * Note that exchanging the order of 0 and 'a' in the comparison simply
1755 * means that the value of 'a' should be negated.
1758 switch (expr
->operation
) {
1760 switch_order
= false;
1761 negate
= zero_on_left
;
1764 case ir_binop_greater
:
1765 switch_order
= false;
1766 negate
= !zero_on_left
;
1769 case ir_binop_lequal
:
1770 switch_order
= true;
1771 negate
= !zero_on_left
;
1774 case ir_binop_gequal
:
1775 switch_order
= true;
1776 negate
= zero_on_left
;
1780 /* This isn't the right kind of comparison afterall, so make sure
1781 * the whole condition is visited.
1789 src_ir
->accept(this);
1791 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1792 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1793 * choose which value OPCODE_CMP produces without an extra instruction
1794 * computing the condition.
1797 this->result
.negate
= ~this->result
.negate
;
1799 return switch_order
;
1803 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1809 ir
->rhs
->accept(this);
1812 l
= get_assignment_lhs(ir
->lhs
, this);
1814 /* FINISHME: This should really set to the correct maximal writemask for each
1815 * FINISHME: component written (in the loops below). This case can only
1816 * FINISHME: occur for matrices, arrays, and structures.
1818 if (ir
->write_mask
== 0) {
1819 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1820 l
.writemask
= WRITEMASK_XYZW
;
1821 } else if (ir
->lhs
->type
->is_scalar()) {
1822 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1823 * FINISHME: W component of fragment shader output zero, work correctly.
1825 l
.writemask
= WRITEMASK_XYZW
;
1828 int first_enabled_chan
= 0;
1831 assert(ir
->lhs
->type
->is_vector());
1832 l
.writemask
= ir
->write_mask
;
1834 for (int i
= 0; i
< 4; i
++) {
1835 if (l
.writemask
& (1 << i
)) {
1836 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1841 /* Swizzle a small RHS vector into the channels being written.
1843 * glsl ir treats write_mask as dictating how many channels are
1844 * present on the RHS while Mesa IR treats write_mask as just
1845 * showing which channels of the vec4 RHS get written.
1847 for (int i
= 0; i
< 4; i
++) {
1848 if (l
.writemask
& (1 << i
))
1849 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1851 swizzles
[i
] = first_enabled_chan
;
1853 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1854 swizzles
[2], swizzles
[3]);
1857 assert(l
.file
!= PROGRAM_UNDEFINED
);
1858 assert(r
.file
!= PROGRAM_UNDEFINED
);
1860 if (ir
->condition
) {
1861 const bool switch_order
= this->process_move_condition(ir
->condition
);
1862 src_reg condition
= this->result
;
1864 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1866 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1868 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1875 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1876 emit(ir
, OPCODE_MOV
, l
, r
);
1885 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1888 GLfloat stack_vals
[4] = { 0 };
1889 GLfloat
*values
= stack_vals
;
1892 /* Unfortunately, 4 floats is all we can get into
1893 * _mesa_add_unnamed_constant. So, make a temp to store an
1894 * aggregate constant and move each constant value into it. If we
1895 * get lucky, copy propagation will eliminate the extra moves.
1898 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
1899 src_reg temp_base
= get_temp(ir
->type
);
1900 dst_reg temp
= dst_reg(temp_base
);
1902 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
1903 ir_constant
*field_value
= (ir_constant
*)iter
.get();
1904 int size
= type_size(field_value
->type
);
1908 field_value
->accept(this);
1911 for (i
= 0; i
< (unsigned int)size
; i
++) {
1912 emit(ir
, OPCODE_MOV
, temp
, src
);
1918 this->result
= temp_base
;
1922 if (ir
->type
->is_array()) {
1923 src_reg temp_base
= get_temp(ir
->type
);
1924 dst_reg temp
= dst_reg(temp_base
);
1925 int size
= type_size(ir
->type
->fields
.array
);
1929 for (i
= 0; i
< ir
->type
->length
; i
++) {
1930 ir
->array_elements
[i
]->accept(this);
1932 for (int j
= 0; j
< size
; j
++) {
1933 emit(ir
, OPCODE_MOV
, temp
, src
);
1939 this->result
= temp_base
;
1943 if (ir
->type
->is_matrix()) {
1944 src_reg mat
= get_temp(ir
->type
);
1945 dst_reg mat_column
= dst_reg(mat
);
1947 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1948 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1949 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1951 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1952 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1953 (gl_constant_value
*) values
,
1954 ir
->type
->vector_elements
,
1956 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1965 src
.file
= PROGRAM_CONSTANT
;
1966 switch (ir
->type
->base_type
) {
1967 case GLSL_TYPE_FLOAT
:
1968 values
= &ir
->value
.f
[0];
1970 case GLSL_TYPE_UINT
:
1971 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1972 values
[i
] = ir
->value
.u
[i
];
1976 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1977 values
[i
] = ir
->value
.i
[i
];
1980 case GLSL_TYPE_BOOL
:
1981 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1982 values
[i
] = ir
->value
.b
[i
];
1986 assert(!"Non-float/uint/int/bool constant");
1989 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1990 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1991 (gl_constant_value
*) values
,
1992 ir
->type
->vector_elements
,
1993 &this->result
.swizzle
);
1997 ir_to_mesa_visitor::visit(ir_call
*ir
)
1999 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
2003 ir_to_mesa_visitor::visit(ir_texture
*ir
)
2005 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
2006 dst_reg result_dst
, coord_dst
;
2007 ir_to_mesa_instruction
*inst
= NULL
;
2008 prog_opcode opcode
= OPCODE_NOP
;
2010 if (ir
->op
== ir_txs
)
2011 this->result
= src_reg_for_float(0.0);
2013 ir
->coordinate
->accept(this);
2015 /* Put our coords in a temp. We'll need to modify them for shadow,
2016 * projection, or LOD, so the only case we'd use it as is is if
2017 * we're doing plain old texturing. Mesa IR optimization should
2018 * handle cleaning up our mess in that case.
2020 coord
= get_temp(glsl_type::vec4_type
);
2021 coord_dst
= dst_reg(coord
);
2022 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2024 if (ir
->projector
) {
2025 ir
->projector
->accept(this);
2026 projector
= this->result
;
2029 /* Storage for our result. Ideally for an assignment we'd be using
2030 * the actual storage for the result here, instead.
2032 result_src
= get_temp(glsl_type::vec4_type
);
2033 result_dst
= dst_reg(result_src
);
2038 opcode
= OPCODE_TEX
;
2041 opcode
= OPCODE_TXB
;
2042 ir
->lod_info
.bias
->accept(this);
2043 lod_info
= this->result
;
2046 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2048 opcode
= OPCODE_TXL
;
2049 ir
->lod_info
.lod
->accept(this);
2050 lod_info
= this->result
;
2053 opcode
= OPCODE_TXD
;
2054 ir
->lod_info
.grad
.dPdx
->accept(this);
2056 ir
->lod_info
.grad
.dPdy
->accept(this);
2060 assert(!"Unexpected ir_txf_ms opcode");
2063 assert(!"Unexpected ir_lod opcode");
2067 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2069 if (ir
->projector
) {
2070 if (opcode
== OPCODE_TEX
) {
2071 /* Slot the projector in as the last component of the coord. */
2072 coord_dst
.writemask
= WRITEMASK_W
;
2073 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2074 coord_dst
.writemask
= WRITEMASK_XYZW
;
2075 opcode
= OPCODE_TXP
;
2077 src_reg coord_w
= coord
;
2078 coord_w
.swizzle
= SWIZZLE_WWWW
;
2080 /* For the other TEX opcodes there's no projective version
2081 * since the last slot is taken up by lod info. Do the
2082 * projective divide now.
2084 coord_dst
.writemask
= WRITEMASK_W
;
2085 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2087 /* In the case where we have to project the coordinates "by hand,"
2088 * the shadow comparitor value must also be projected.
2090 src_reg tmp_src
= coord
;
2091 if (ir
->shadow_comparitor
) {
2092 /* Slot the shadow value in as the second to last component of the
2095 ir
->shadow_comparitor
->accept(this);
2097 tmp_src
= get_temp(glsl_type::vec4_type
);
2098 dst_reg tmp_dst
= dst_reg(tmp_src
);
2100 /* Projective division not allowed for array samplers. */
2101 assert(!sampler_type
->sampler_array
);
2103 tmp_dst
.writemask
= WRITEMASK_Z
;
2104 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2106 tmp_dst
.writemask
= WRITEMASK_XY
;
2107 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2110 coord_dst
.writemask
= WRITEMASK_XYZ
;
2111 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2113 coord_dst
.writemask
= WRITEMASK_XYZW
;
2114 coord
.swizzle
= SWIZZLE_XYZW
;
2118 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2119 * comparitor was put in the correct place (and projected) by the code,
2120 * above, that handles by-hand projection.
2122 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2123 /* Slot the shadow value in as the second to last component of the
2126 ir
->shadow_comparitor
->accept(this);
2128 /* XXX This will need to be updated for cubemap array samplers. */
2129 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2130 sampler_type
->sampler_array
) {
2131 coord_dst
.writemask
= WRITEMASK_W
;
2133 coord_dst
.writemask
= WRITEMASK_Z
;
2136 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2137 coord_dst
.writemask
= WRITEMASK_XYZW
;
2140 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2141 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2142 coord_dst
.writemask
= WRITEMASK_W
;
2143 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2144 coord_dst
.writemask
= WRITEMASK_XYZW
;
2147 if (opcode
== OPCODE_TXD
)
2148 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2150 inst
= emit(ir
, opcode
, result_dst
, coord
);
2152 if (ir
->shadow_comparitor
)
2153 inst
->tex_shadow
= GL_TRUE
;
2155 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2156 this->shader_program
,
2159 switch (sampler_type
->sampler_dimensionality
) {
2160 case GLSL_SAMPLER_DIM_1D
:
2161 inst
->tex_target
= (sampler_type
->sampler_array
)
2162 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2164 case GLSL_SAMPLER_DIM_2D
:
2165 inst
->tex_target
= (sampler_type
->sampler_array
)
2166 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2168 case GLSL_SAMPLER_DIM_3D
:
2169 inst
->tex_target
= TEXTURE_3D_INDEX
;
2171 case GLSL_SAMPLER_DIM_CUBE
:
2172 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2174 case GLSL_SAMPLER_DIM_RECT
:
2175 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2177 case GLSL_SAMPLER_DIM_BUF
:
2178 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2180 case GLSL_SAMPLER_DIM_EXTERNAL
:
2181 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2184 assert(!"Should not get here.");
2187 this->result
= result_src
;
2191 ir_to_mesa_visitor::visit(ir_return
*ir
)
2193 /* Non-void functions should have been inlined. We may still emit RETs
2194 * from main() unless the EmitNoMainReturn option is set.
2196 assert(!ir
->get_value());
2197 emit(ir
, OPCODE_RET
);
2201 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2203 if (ir
->condition
) {
2204 ir
->condition
->accept(this);
2205 this->result
.negate
= ~this->result
.negate
;
2206 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2208 emit(ir
, OPCODE_KIL_NV
);
2213 ir_to_mesa_visitor::visit(ir_if
*ir
)
2215 ir_to_mesa_instruction
*cond_inst
, *if_inst
;
2216 ir_to_mesa_instruction
*prev_inst
;
2218 prev_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2220 ir
->condition
->accept(this);
2221 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2223 if (this->options
->EmitCondCodes
) {
2224 cond_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2226 /* See if we actually generated any instruction for generating
2227 * the condition. If not, then cook up a move to a temp so we
2228 * have something to set cond_update on.
2230 if (cond_inst
== prev_inst
) {
2231 src_reg temp
= get_temp(glsl_type::bool_type
);
2232 cond_inst
= emit(ir
->condition
, OPCODE_MOV
, dst_reg(temp
), result
);
2234 cond_inst
->cond_update
= GL_TRUE
;
2236 if_inst
= emit(ir
->condition
, OPCODE_IF
);
2237 if_inst
->dst
.cond_mask
= COND_NE
;
2239 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2242 this->instructions
.push_tail(if_inst
);
2244 visit_exec_list(&ir
->then_instructions
, this);
2246 if (!ir
->else_instructions
.is_empty()) {
2247 emit(ir
->condition
, OPCODE_ELSE
);
2248 visit_exec_list(&ir
->else_instructions
, this);
2251 if_inst
= emit(ir
->condition
, OPCODE_ENDIF
);
2254 ir_to_mesa_visitor::ir_to_mesa_visitor()
2256 result
.file
= PROGRAM_UNDEFINED
;
2258 next_signature_id
= 1;
2259 current_function
= NULL
;
2260 mem_ctx
= ralloc_context(NULL
);
2263 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2265 ralloc_free(mem_ctx
);
2268 static struct prog_src_register
2269 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2271 struct prog_src_register mesa_reg
;
2273 mesa_reg
.File
= reg
.file
;
2274 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2275 mesa_reg
.Index
= reg
.index
;
2276 mesa_reg
.Swizzle
= reg
.swizzle
;
2277 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2278 mesa_reg
.Negate
= reg
.negate
;
2280 mesa_reg
.HasIndex2
= GL_FALSE
;
2281 mesa_reg
.RelAddr2
= 0;
2282 mesa_reg
.Index2
= 0;
2288 set_branchtargets(ir_to_mesa_visitor
*v
,
2289 struct prog_instruction
*mesa_instructions
,
2290 int num_instructions
)
2292 int if_count
= 0, loop_count
= 0;
2293 int *if_stack
, *loop_stack
;
2294 int if_stack_pos
= 0, loop_stack_pos
= 0;
2297 for (i
= 0; i
< num_instructions
; i
++) {
2298 switch (mesa_instructions
[i
].Opcode
) {
2302 case OPCODE_BGNLOOP
:
2307 mesa_instructions
[i
].BranchTarget
= -1;
2314 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2315 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2317 for (i
= 0; i
< num_instructions
; i
++) {
2318 switch (mesa_instructions
[i
].Opcode
) {
2320 if_stack
[if_stack_pos
] = i
;
2324 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2325 if_stack
[if_stack_pos
- 1] = i
;
2328 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2331 case OPCODE_BGNLOOP
:
2332 loop_stack
[loop_stack_pos
] = i
;
2335 case OPCODE_ENDLOOP
:
2337 /* Rewrite any breaks/conts at this nesting level (haven't
2338 * already had a BranchTarget assigned) to point to the end
2341 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2342 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2343 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2344 if (mesa_instructions
[j
].BranchTarget
== -1) {
2345 mesa_instructions
[j
].BranchTarget
= i
;
2349 /* The loop ends point at each other. */
2350 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2351 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2354 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
2355 function_entry
*entry
= (function_entry
*)iter
.get();
2357 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2358 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2370 print_program(struct prog_instruction
*mesa_instructions
,
2371 ir_instruction
**mesa_instruction_annotation
,
2372 int num_instructions
)
2374 ir_instruction
*last_ir
= NULL
;
2378 for (i
= 0; i
< num_instructions
; i
++) {
2379 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2380 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2382 fprintf(stdout
, "%3d: ", i
);
2384 if (last_ir
!= ir
&& ir
) {
2387 for (j
= 0; j
< indent
; j
++) {
2388 fprintf(stdout
, " ");
2394 fprintf(stdout
, " "); /* line number spacing. */
2397 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2398 PROG_PRINT_DEBUG
, NULL
);
2402 class add_uniform_to_shader
: public program_resource_visitor
{
2404 add_uniform_to_shader(struct gl_shader_program
*shader_program
,
2405 struct gl_program_parameter_list
*params
)
2406 : shader_program(shader_program
), params(params
), idx(-1)
2411 void process(ir_variable
*var
)
2414 this->program_resource_visitor::process(var
);
2416 var
->location
= this->idx
;
2420 virtual void visit_field(const glsl_type
*type
, const char *name
,
2423 struct gl_shader_program
*shader_program
;
2424 struct gl_program_parameter_list
*params
;
2429 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2436 if (type
->is_vector() || type
->is_scalar()) {
2437 size
= type
->vector_elements
;
2439 size
= type_size(type
) * 4;
2442 gl_register_file file
;
2443 if (type
->is_sampler() ||
2444 (type
->is_array() && type
->fields
.array
->is_sampler())) {
2445 file
= PROGRAM_SAMPLER
;
2447 file
= PROGRAM_UNIFORM
;
2450 int index
= _mesa_lookup_parameter_index(params
, -1, name
);
2452 index
= _mesa_add_parameter(params
, file
, name
, size
, type
->gl_type
,
2455 /* Sampler uniform values are stored in prog->SamplerUnits,
2456 * and the entry in that array is selected by this index we
2457 * store in ParameterValues[].
2459 if (file
== PROGRAM_SAMPLER
) {
2462 this->shader_program
->UniformHash
->get(location
,
2463 params
->Parameters
[index
].Name
);
2469 struct gl_uniform_storage
*storage
=
2470 &this->shader_program
->UniformStorage
[location
];
2472 for (unsigned int j
= 0; j
< size
/ 4; j
++)
2473 params
->ParameterValues
[index
+ j
][0].f
= storage
->sampler
+ j
;
2477 /* The first part of the uniform that's processed determines the base
2478 * location of the whole uniform (for structures).
2485 * Generate the program parameters list for the user uniforms in a shader
2487 * \param shader_program Linked shader program. This is only used to
2488 * emit possible link errors to the info log.
2489 * \param sh Shader whose uniforms are to be processed.
2490 * \param params Parameter list to be filled in.
2493 _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program
2495 struct gl_shader
*sh
,
2496 struct gl_program_parameter_list
2499 add_uniform_to_shader
add(shader_program
, params
);
2501 foreach_list(node
, sh
->ir
) {
2502 ir_variable
*var
= ((ir_instruction
*) node
)->as_variable();
2504 if ((var
== NULL
) || (var
->mode
!= ir_var_uniform
)
2505 || var
->is_in_uniform_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2513 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2514 struct gl_shader_program
*shader_program
,
2515 struct gl_program_parameter_list
*params
)
2517 /* After adding each uniform to the parameter list, connect the storage for
2518 * the parameter with the tracking structure used by the API for the
2521 unsigned last_location
= unsigned(~0);
2522 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2523 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2528 shader_program
->UniformHash
->get(location
, params
->Parameters
[i
].Name
);
2534 if (location
!= last_location
) {
2535 struct gl_uniform_storage
*storage
=
2536 &shader_program
->UniformStorage
[location
];
2537 enum gl_uniform_driver_format format
= uniform_native
;
2539 unsigned columns
= 0;
2540 switch (storage
->type
->base_type
) {
2541 case GLSL_TYPE_UINT
:
2542 assert(ctx
->Const
.NativeIntegers
);
2543 format
= uniform_native
;
2548 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2551 case GLSL_TYPE_FLOAT
:
2552 format
= uniform_native
;
2553 columns
= storage
->type
->matrix_columns
;
2555 case GLSL_TYPE_BOOL
:
2556 if (ctx
->Const
.NativeIntegers
) {
2557 format
= (ctx
->Const
.UniformBooleanTrue
== 1)
2558 ? uniform_bool_int_0_1
: uniform_bool_int_0_not0
;
2560 format
= uniform_bool_float
;
2564 case GLSL_TYPE_SAMPLER
:
2565 format
= uniform_native
;
2568 case GLSL_TYPE_ARRAY
:
2569 case GLSL_TYPE_VOID
:
2570 case GLSL_TYPE_STRUCT
:
2571 case GLSL_TYPE_ERROR
:
2572 case GLSL_TYPE_INTERFACE
:
2573 assert(!"Should not get here.");
2577 _mesa_uniform_attach_driver_storage(storage
,
2578 4 * sizeof(float) * columns
,
2581 ¶ms
->ParameterValues
[i
]);
2583 /* After attaching the driver's storage to the uniform, propagate any
2584 * data from the linker's backing store. This will cause values from
2585 * initializers in the source code to be copied over.
2587 _mesa_propagate_uniforms_to_driver_storage(storage
,
2589 MAX2(1, storage
->array_elements
));
2591 last_location
= location
;
2597 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2598 * channels for copy propagation and updates following instructions to
2599 * use the original versions.
2601 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2602 * will occur. As an example, a TXP production before this pass:
2604 * 0: MOV TEMP[1], INPUT[4].xyyy;
2605 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2606 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2610 * 0: MOV TEMP[1], INPUT[4].xyyy;
2611 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2612 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2614 * which allows for dead code elimination on TEMP[1]'s writes.
2617 ir_to_mesa_visitor::copy_propagate(void)
2619 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2620 ir_to_mesa_instruction
*,
2621 this->next_temp
* 4);
2622 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2625 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
2626 ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
2628 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2629 || inst
->dst
.index
< this->next_temp
);
2631 /* First, do any copy propagation possible into the src regs. */
2632 for (int r
= 0; r
< 3; r
++) {
2633 ir_to_mesa_instruction
*first
= NULL
;
2635 int acp_base
= inst
->src
[r
].index
* 4;
2637 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2638 inst
->src
[r
].reladdr
)
2641 /* See if we can find entries in the ACP consisting of MOVs
2642 * from the same src register for all the swizzled channels
2643 * of this src register reference.
2645 for (int i
= 0; i
< 4; i
++) {
2646 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2647 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2654 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2659 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2660 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2668 /* We've now validated that we can copy-propagate to
2669 * replace this src register reference. Do it.
2671 inst
->src
[r
].file
= first
->src
[0].file
;
2672 inst
->src
[r
].index
= first
->src
[0].index
;
2675 for (int i
= 0; i
< 4; i
++) {
2676 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2677 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2678 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2681 inst
->src
[r
].swizzle
= swizzle
;
2686 case OPCODE_BGNLOOP
:
2687 case OPCODE_ENDLOOP
:
2688 /* End of a basic block, clear the ACP entirely. */
2689 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2698 /* Clear all channels written inside the block from the ACP, but
2699 * leaving those that were not touched.
2701 for (int r
= 0; r
< this->next_temp
; r
++) {
2702 for (int c
= 0; c
< 4; c
++) {
2703 if (!acp
[4 * r
+ c
])
2706 if (acp_level
[4 * r
+ c
] >= level
)
2707 acp
[4 * r
+ c
] = NULL
;
2710 if (inst
->op
== OPCODE_ENDIF
)
2715 /* Continuing the block, clear any written channels from
2718 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2719 /* Any temporary might be written, so no copy propagation
2720 * across this instruction.
2722 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2723 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2724 inst
->dst
.reladdr
) {
2725 /* Any output might be written, so no copy propagation
2726 * from outputs across this instruction.
2728 for (int r
= 0; r
< this->next_temp
; r
++) {
2729 for (int c
= 0; c
< 4; c
++) {
2730 if (!acp
[4 * r
+ c
])
2733 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2734 acp
[4 * r
+ c
] = NULL
;
2737 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2738 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2739 /* Clear where it's used as dst. */
2740 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2741 for (int c
= 0; c
< 4; c
++) {
2742 if (inst
->dst
.writemask
& (1 << c
)) {
2743 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2748 /* Clear where it's used as src. */
2749 for (int r
= 0; r
< this->next_temp
; r
++) {
2750 for (int c
= 0; c
< 4; c
++) {
2751 if (!acp
[4 * r
+ c
])
2754 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2756 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2757 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2758 inst
->dst
.writemask
& (1 << src_chan
))
2760 acp
[4 * r
+ c
] = NULL
;
2768 /* If this is a copy, add it to the ACP. */
2769 if (inst
->op
== OPCODE_MOV
&&
2770 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2771 !(inst
->dst
.file
== inst
->src
[0].file
&&
2772 inst
->dst
.index
== inst
->src
[0].index
) &&
2773 !inst
->dst
.reladdr
&&
2775 !inst
->src
[0].reladdr
&&
2776 !inst
->src
[0].negate
) {
2777 for (int i
= 0; i
< 4; i
++) {
2778 if (inst
->dst
.writemask
& (1 << i
)) {
2779 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2780 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2786 ralloc_free(acp_level
);
2792 * Convert a shader's GLSL IR into a Mesa gl_program.
2794 static struct gl_program
*
2795 get_mesa_program(struct gl_context
*ctx
,
2796 struct gl_shader_program
*shader_program
,
2797 struct gl_shader
*shader
)
2799 ir_to_mesa_visitor v
;
2800 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2801 ir_instruction
**mesa_instruction_annotation
;
2803 struct gl_program
*prog
;
2805 const char *target_string
;
2806 struct gl_shader_compiler_options
*options
=
2807 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
2809 switch (shader
->Type
) {
2810 case GL_VERTEX_SHADER
:
2811 target
= GL_VERTEX_PROGRAM_ARB
;
2812 target_string
= "vertex";
2814 case GL_FRAGMENT_SHADER
:
2815 target
= GL_FRAGMENT_PROGRAM_ARB
;
2816 target_string
= "fragment";
2818 case GL_GEOMETRY_SHADER
:
2819 target
= GL_GEOMETRY_PROGRAM_NV
;
2820 target_string
= "geometry";
2823 assert(!"should not be reached");
2827 validate_ir_tree(shader
->ir
);
2829 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
2832 prog
->Parameters
= _mesa_new_parameter_list();
2835 v
.shader_program
= shader_program
;
2836 v
.options
= options
;
2838 _mesa_generate_parameters_list_for_uniforms(shader_program
, shader
,
2841 /* Emit Mesa IR for main(). */
2842 visit_exec_list(shader
->ir
, &v
);
2843 v
.emit(NULL
, OPCODE_END
);
2845 prog
->NumTemporaries
= v
.next_temp
;
2847 int num_instructions
= 0;
2848 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
2853 (struct prog_instruction
*)calloc(num_instructions
,
2854 sizeof(*mesa_instructions
));
2855 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2860 /* Convert ir_mesa_instructions into prog_instructions.
2862 mesa_inst
= mesa_instructions
;
2864 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
2865 const ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
2867 mesa_inst
->Opcode
= inst
->op
;
2868 mesa_inst
->CondUpdate
= inst
->cond_update
;
2870 mesa_inst
->SaturateMode
= SATURATE_ZERO_ONE
;
2871 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2872 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2873 mesa_inst
->DstReg
.CondMask
= inst
->dst
.cond_mask
;
2874 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2875 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2876 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2877 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2878 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2879 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2880 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2881 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2882 mesa_instruction_annotation
[i
] = inst
->ir
;
2884 /* Set IndirectRegisterFiles. */
2885 if (mesa_inst
->DstReg
.RelAddr
)
2886 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2888 /* Update program's bitmask of indirectly accessed register files */
2889 for (unsigned src
= 0; src
< 3; src
++)
2890 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2891 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2893 switch (mesa_inst
->Opcode
) {
2895 if (options
->MaxIfDepth
== 0) {
2896 linker_warning(shader_program
,
2897 "Couldn't flatten if-statement. "
2898 "This will likely result in software "
2899 "rasterization.\n");
2902 case OPCODE_BGNLOOP
:
2903 if (options
->EmitNoLoops
) {
2904 linker_warning(shader_program
,
2905 "Couldn't unroll loop. "
2906 "This will likely result in software "
2907 "rasterization.\n");
2911 if (options
->EmitNoCont
) {
2912 linker_warning(shader_program
,
2913 "Couldn't lower continue-statement. "
2914 "This will likely result in software "
2915 "rasterization.\n");
2919 prog
->NumAddressRegs
= 1;
2928 if (!shader_program
->LinkStatus
)
2932 if (!shader_program
->LinkStatus
) {
2936 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2938 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
2940 printf("GLSL IR for linked %s program %d:\n", target_string
,
2941 shader_program
->Name
);
2942 _mesa_print_ir(shader
->ir
, NULL
);
2945 printf("Mesa IR for linked %s program %d:\n", target_string
,
2946 shader_program
->Name
);
2947 print_program(mesa_instructions
, mesa_instruction_annotation
,
2951 prog
->Instructions
= mesa_instructions
;
2952 prog
->NumInstructions
= num_instructions
;
2954 /* Setting this to NULL prevents a possible double free in the fail_exit
2957 mesa_instructions
= NULL
;
2959 do_set_program_inouts(shader
->ir
, prog
, shader
->Type
== GL_FRAGMENT_SHADER
);
2961 prog
->SamplersUsed
= shader
->active_samplers
;
2962 prog
->ShadowSamplers
= shader
->shadow_samplers
;
2963 _mesa_update_shader_textures_used(shader_program
, prog
);
2965 /* Set the gl_FragDepth layout. */
2966 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
2967 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)prog
;
2968 fp
->FragDepthLayout
= shader_program
->FragDepthLayout
;
2971 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
2973 if ((ctx
->Shader
.Flags
& GLSL_NO_OPT
) == 0) {
2974 _mesa_optimize_program(ctx
, prog
);
2977 /* This has to be done last. Any operation that can cause
2978 * prog->ParameterValues to get reallocated (e.g., anything that adds a
2979 * program constant) has to happen before creating this linkage.
2981 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
->Parameters
);
2982 if (!shader_program
->LinkStatus
) {
2989 free(mesa_instructions
);
2990 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
2998 * Called via ctx->Driver.LinkShader()
2999 * This actually involves converting GLSL IR into Mesa gl_programs with
3000 * code lowering and other optimizations.
3003 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3005 assert(prog
->LinkStatus
);
3007 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
3008 if (prog
->_LinkedShaders
[i
] == NULL
)
3012 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3013 const struct gl_shader_compiler_options
*options
=
3014 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
3020 do_mat_op_to_vec(ir
);
3021 lower_instructions(ir
, (MOD_TO_FRACT
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3022 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3023 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3025 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
3027 progress
= do_common_optimization(ir
, true, true,
3028 options
->MaxUnrollIterations
)
3031 progress
= lower_quadop_vector(ir
, true) || progress
;
3033 if (options
->MaxIfDepth
== 0)
3034 progress
= lower_discard(ir
) || progress
;
3036 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
3038 if (options
->EmitNoNoise
)
3039 progress
= lower_noise(ir
) || progress
;
3041 /* If there are forms of indirect addressing that the driver
3042 * cannot handle, perform the lowering pass.
3044 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3045 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3047 lower_variable_index_to_cond_assign(ir
,
3048 options
->EmitNoIndirectInput
,
3049 options
->EmitNoIndirectOutput
,
3050 options
->EmitNoIndirectTemp
,
3051 options
->EmitNoIndirectUniform
)
3054 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3057 validate_ir_tree(ir
);
3060 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
3061 struct gl_program
*linked_prog
;
3063 if (prog
->_LinkedShaders
[i
] == NULL
)
3066 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3069 static const GLenum targets
[] = {
3070 GL_VERTEX_PROGRAM_ARB
,
3071 GL_FRAGMENT_PROGRAM_ARB
,
3072 GL_GEOMETRY_PROGRAM_NV
3075 if (i
== MESA_SHADER_VERTEX
) {
3076 ((struct gl_vertex_program
*)linked_prog
)->UsesClipDistance
3077 = prog
->Vert
.UsesClipDistance
;
3080 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3082 if (!ctx
->Driver
.ProgramStringNotify(ctx
, targets
[i
], linked_prog
)) {
3087 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
3090 return prog
->LinkStatus
;
3095 * Compile a GLSL shader. Called via glCompileShader().
3098 _mesa_glsl_compile_shader(struct gl_context
*ctx
, struct gl_shader
*shader
)
3100 struct _mesa_glsl_parse_state
*state
=
3101 new(shader
) _mesa_glsl_parse_state(ctx
, shader
->Type
, shader
);
3103 const char *source
= shader
->Source
;
3104 /* Check if the user called glCompileShader without first calling
3105 * glShaderSource. This should fail to compile, but not raise a GL_ERROR.
3107 if (source
== NULL
) {
3108 shader
->CompileStatus
= GL_FALSE
;
3112 state
->error
= glcpp_preprocess(state
, &source
, &state
->info_log
,
3113 &ctx
->Extensions
, ctx
);
3115 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3116 printf("GLSL source for %s shader %d:\n",
3117 _mesa_glsl_shader_target_name(state
->target
), shader
->Name
);
3118 printf("%s\n", shader
->Source
);
3121 if (!state
->error
) {
3122 _mesa_glsl_lexer_ctor(state
, source
);
3123 _mesa_glsl_parse(state
);
3124 _mesa_glsl_lexer_dtor(state
);
3127 ralloc_free(shader
->ir
);
3128 shader
->ir
= new(shader
) exec_list
;
3129 if (!state
->error
&& !state
->translation_unit
.is_empty())
3130 _mesa_ast_to_hir(shader
->ir
, state
);
3132 if (!state
->error
&& !shader
->ir
->is_empty()) {
3133 validate_ir_tree(shader
->ir
);
3135 /* Do some optimization at compile time to reduce shader IR size
3136 * and reduce later work if the same shader is linked multiple times
3138 while (do_common_optimization(shader
->ir
, false, false, 32))
3141 validate_ir_tree(shader
->ir
);
3144 shader
->symbols
= state
->symbols
;
3146 shader
->CompileStatus
= !state
->error
;
3147 shader
->InfoLog
= state
->info_log
;
3148 shader
->Version
= state
->language_version
;
3149 memcpy(shader
->builtins_to_link
, state
->builtins_to_link
,
3150 sizeof(shader
->builtins_to_link
[0]) * state
->num_builtins_to_link
);
3151 shader
->num_builtins_to_link
= state
->num_builtins_to_link
;
3153 if (ctx
->Shader
.Flags
& GLSL_LOG
) {
3154 _mesa_write_shader_to_file(shader
);
3157 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3158 if (shader
->CompileStatus
) {
3159 printf("GLSL IR for shader %d:\n", shader
->Name
);
3160 _mesa_print_ir(shader
->ir
, NULL
);
3163 printf("GLSL shader %d failed to compile.\n", shader
->Name
);
3165 if (shader
->InfoLog
&& shader
->InfoLog
[0] != 0) {
3166 printf("GLSL shader %d info log:\n", shader
->Name
);
3167 printf("%s\n", shader
->InfoLog
);
3171 if (shader
->UniformBlocks
)
3172 ralloc_free(shader
->UniformBlocks
);
3173 shader
->NumUniformBlocks
= state
->num_uniform_blocks
;
3174 shader
->UniformBlocks
= state
->uniform_blocks
;
3175 ralloc_steal(shader
, shader
->UniformBlocks
);
3177 /* Retain any live IR, but trash the rest. */
3178 reparent_ir(shader
->ir
, shader
->ir
);
3185 * Link a GLSL shader program. Called via glLinkProgram().
3188 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3192 _mesa_clear_shader_program_data(ctx
, prog
);
3194 prog
->LinkStatus
= GL_TRUE
;
3196 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3197 if (!prog
->Shaders
[i
]->CompileStatus
) {
3198 linker_error(prog
, "linking with uncompiled shader");
3199 prog
->LinkStatus
= GL_FALSE
;
3203 if (prog
->LinkStatus
) {
3204 link_shaders(ctx
, prog
);
3207 if (prog
->LinkStatus
) {
3208 if (!ctx
->Driver
.LinkShader(ctx
, prog
)) {
3209 prog
->LinkStatus
= GL_FALSE
;
3213 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3214 if (!prog
->LinkStatus
) {
3215 printf("GLSL shader program %d failed to link\n", prog
->Name
);
3218 if (prog
->InfoLog
&& prog
->InfoLog
[0] != 0) {
3219 printf("GLSL shader program %d info log:\n", prog
->Name
);
3220 printf("%s\n", prog
->InfoLog
);