2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
45 #include "main/mtypes.h"
46 #include "main/shaderapi.h"
47 #include "main/shaderobj.h"
48 #include "main/uniforms.h"
49 #include "program/hash_table.h"
50 #include "program/prog_instruction.h"
51 #include "program/prog_optimize.h"
52 #include "program/prog_print.h"
53 #include "program/program.h"
54 #include "program/prog_uniform.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
62 static int swizzle_for_size(int size
);
65 * This struct is a corresponding struct to Mesa prog_src_register, with
70 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
74 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
75 this->swizzle
= swizzle_for_size(type
->vector_elements
);
77 this->swizzle
= SWIZZLE_XYZW
;
84 this->file
= PROGRAM_UNDEFINED
;
91 explicit src_reg(dst_reg reg
);
93 gl_register_file file
; /**< PROGRAM_* from Mesa */
94 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
95 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
96 int negate
; /**< NEGATE_XYZW mask from mesa */
97 /** Register index should be offset by the integer in this reg. */
103 dst_reg(gl_register_file file
, int writemask
)
107 this->writemask
= writemask
;
108 this->cond_mask
= COND_TR
;
109 this->reladdr
= NULL
;
114 this->file
= PROGRAM_UNDEFINED
;
117 this->cond_mask
= COND_TR
;
118 this->reladdr
= NULL
;
121 explicit dst_reg(src_reg reg
);
123 gl_register_file file
; /**< PROGRAM_* from Mesa */
124 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
125 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
127 /** Register index should be offset by the integer in this reg. */
131 src_reg::src_reg(dst_reg reg
)
133 this->file
= reg
.file
;
134 this->index
= reg
.index
;
135 this->swizzle
= SWIZZLE_XYZW
;
137 this->reladdr
= reg
.reladdr
;
140 dst_reg::dst_reg(src_reg reg
)
142 this->file
= reg
.file
;
143 this->index
= reg
.index
;
144 this->writemask
= WRITEMASK_XYZW
;
145 this->cond_mask
= COND_TR
;
146 this->reladdr
= reg
.reladdr
;
149 class ir_to_mesa_instruction
: public exec_node
{
151 /* Callers of this ralloc-based new need not call delete. It's
152 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
153 static void* operator new(size_t size
, void *ctx
)
157 node
= rzalloc_size(ctx
, size
);
158 assert(node
!= NULL
);
166 /** Pointer to the ir source this tree came from for debugging */
168 GLboolean cond_update
;
170 int sampler
; /**< sampler index */
171 int tex_target
; /**< One of TEXTURE_*_INDEX */
172 GLboolean tex_shadow
;
174 class function_entry
*function
; /* Set on OPCODE_CAL or OPCODE_BGNSUB */
177 class variable_storage
: public exec_node
{
179 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
180 : file(file
), index(index
), var(var
)
185 gl_register_file file
;
187 ir_variable
*var
; /* variable that maps to this, if any */
190 class function_entry
: public exec_node
{
192 ir_function_signature
*sig
;
195 * identifier of this function signature used by the program.
197 * At the point that Mesa instructions for function calls are
198 * generated, we don't know the address of the first instruction of
199 * the function body. So we make the BranchTarget that is called a
200 * small integer and rewrite them during set_branchtargets().
205 * Pointer to first instruction of the function body.
207 * Set during function body emits after main() is processed.
209 ir_to_mesa_instruction
*bgn_inst
;
212 * Index of the first instruction of the function body in actual
215 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
219 /** Storage for the return value. */
223 class ir_to_mesa_visitor
: public ir_visitor
{
225 ir_to_mesa_visitor();
226 ~ir_to_mesa_visitor();
228 function_entry
*current_function
;
230 struct gl_context
*ctx
;
231 struct gl_program
*prog
;
232 struct gl_shader_program
*shader_program
;
233 struct gl_shader_compiler_options
*options
;
237 variable_storage
*find_variable_storage(ir_variable
*var
);
239 function_entry
*get_function_signature(ir_function_signature
*sig
);
241 src_reg
get_temp(const glsl_type
*type
);
242 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
244 src_reg
src_reg_for_float(float val
);
247 * \name Visit methods
249 * As typical for the visitor pattern, there must be one \c visit method for
250 * each concrete subclass of \c ir_instruction. Virtual base classes within
251 * the hierarchy should not have \c visit methods.
254 virtual void visit(ir_variable
*);
255 virtual void visit(ir_loop
*);
256 virtual void visit(ir_loop_jump
*);
257 virtual void visit(ir_function_signature
*);
258 virtual void visit(ir_function
*);
259 virtual void visit(ir_expression
*);
260 virtual void visit(ir_swizzle
*);
261 virtual void visit(ir_dereference_variable
*);
262 virtual void visit(ir_dereference_array
*);
263 virtual void visit(ir_dereference_record
*);
264 virtual void visit(ir_assignment
*);
265 virtual void visit(ir_constant
*);
266 virtual void visit(ir_call
*);
267 virtual void visit(ir_return
*);
268 virtual void visit(ir_discard
*);
269 virtual void visit(ir_texture
*);
270 virtual void visit(ir_if
*);
275 /** List of variable_storage */
278 /** List of function_entry */
279 exec_list function_signatures
;
280 int next_signature_id
;
282 /** List of ir_to_mesa_instruction */
283 exec_list instructions
;
285 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
287 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
288 dst_reg dst
, src_reg src0
);
290 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
291 dst_reg dst
, src_reg src0
, src_reg src1
);
293 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
295 src_reg src0
, src_reg src1
, src_reg src2
);
298 * Emit the correct dot-product instruction for the type of arguments
300 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
306 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
307 dst_reg dst
, src_reg src0
);
309 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
310 dst_reg dst
, src_reg src0
, src_reg src1
);
312 void emit_scs(ir_instruction
*ir
, enum prog_opcode op
,
313 dst_reg dst
, const src_reg
&src
);
315 bool try_emit_mad(ir_expression
*ir
,
317 bool try_emit_mad_for_and_not(ir_expression
*ir
,
319 bool try_emit_sat(ir_expression
*ir
);
321 void emit_swz(ir_expression
*ir
);
323 bool process_move_condition(ir_rvalue
*ir
);
325 void copy_propagate(void);
330 src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
332 dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
334 dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
337 swizzle_for_size(int size
)
339 int size_swizzles
[4] = {
340 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
341 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
342 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
343 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
346 assert((size
>= 1) && (size
<= 4));
347 return size_swizzles
[size
- 1];
350 ir_to_mesa_instruction
*
351 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
353 src_reg src0
, src_reg src1
, src_reg src2
)
355 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
358 /* If we have to do relative addressing, we want to load the ARL
359 * reg directly for one of the regs, and preload the other reladdr
360 * sources into temps.
362 num_reladdr
+= dst
.reladdr
!= NULL
;
363 num_reladdr
+= src0
.reladdr
!= NULL
;
364 num_reladdr
+= src1
.reladdr
!= NULL
;
365 num_reladdr
+= src2
.reladdr
!= NULL
;
367 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
368 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
369 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
372 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
375 assert(num_reladdr
== 0);
384 inst
->function
= NULL
;
386 this->instructions
.push_tail(inst
);
392 ir_to_mesa_instruction
*
393 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
394 dst_reg dst
, src_reg src0
, src_reg src1
)
396 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
399 ir_to_mesa_instruction
*
400 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
401 dst_reg dst
, src_reg src0
)
403 assert(dst
.writemask
!= 0);
404 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
407 ir_to_mesa_instruction
*
408 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
410 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
413 ir_to_mesa_instruction
*
414 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
415 dst_reg dst
, src_reg src0
, src_reg src1
,
418 static const gl_inst_opcode dot_opcodes
[] = {
419 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
422 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
426 * Emits Mesa scalar opcodes to produce unique answers across channels.
428 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
429 * channel determines the result across all channels. So to do a vec4
430 * of this operation, we want to emit a scalar per source channel used
431 * to produce dest channels.
434 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
436 src_reg orig_src0
, src_reg orig_src1
)
439 int done_mask
= ~dst
.writemask
;
441 /* Mesa RCP is a scalar operation splatting results to all channels,
442 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
445 for (i
= 0; i
< 4; i
++) {
446 GLuint this_mask
= (1 << i
);
447 ir_to_mesa_instruction
*inst
;
448 src_reg src0
= orig_src0
;
449 src_reg src1
= orig_src1
;
451 if (done_mask
& this_mask
)
454 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
455 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
456 for (j
= i
+ 1; j
< 4; j
++) {
457 /* If there is another enabled component in the destination that is
458 * derived from the same inputs, generate its value on this pass as
461 if (!(done_mask
& (1 << j
)) &&
462 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
463 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
464 this_mask
|= (1 << j
);
467 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
468 src0_swiz
, src0_swiz
);
469 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
470 src1_swiz
, src1_swiz
);
472 inst
= emit(ir
, op
, dst
, src0
, src1
);
473 inst
->dst
.writemask
= this_mask
;
474 done_mask
|= this_mask
;
479 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
480 dst_reg dst
, src_reg src0
)
482 src_reg undef
= undef_src
;
484 undef
.swizzle
= SWIZZLE_XXXX
;
486 emit_scalar(ir
, op
, dst
, src0
, undef
);
490 * Emit an OPCODE_SCS instruction
492 * The \c SCS opcode functions a bit differently than the other Mesa (or
493 * ARB_fragment_program) opcodes. Instead of splatting its result across all
494 * four components of the destination, it writes one value to the \c x
495 * component and another value to the \c y component.
497 * \param ir IR instruction being processed
498 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
500 * \param dst Destination register
501 * \param src Source register
504 ir_to_mesa_visitor::emit_scs(ir_instruction
*ir
, enum prog_opcode op
,
508 /* Vertex programs cannot use the SCS opcode.
510 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
511 emit_scalar(ir
, op
, dst
, src
);
515 const unsigned component
= (op
== OPCODE_SIN
) ? 0 : 1;
516 const unsigned scs_mask
= (1U << component
);
517 int done_mask
= ~dst
.writemask
;
520 assert(op
== OPCODE_SIN
|| op
== OPCODE_COS
);
522 /* If there are compnents in the destination that differ from the component
523 * that will be written by the SCS instrution, we'll need a temporary.
525 if (scs_mask
!= unsigned(dst
.writemask
)) {
526 tmp
= get_temp(glsl_type::vec4_type
);
529 for (unsigned i
= 0; i
< 4; i
++) {
530 unsigned this_mask
= (1U << i
);
533 if ((done_mask
& this_mask
) != 0)
536 /* The source swizzle specified which component of the source generates
537 * sine / cosine for the current component in the destination. The SCS
538 * instruction requires that this value be swizzle to the X component.
539 * Replace the current swizzle with a swizzle that puts the source in
542 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
544 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
545 src0_swiz
, src0_swiz
);
546 for (unsigned j
= i
+ 1; j
< 4; j
++) {
547 /* If there is another enabled component in the destination that is
548 * derived from the same inputs, generate its value on this pass as
551 if (!(done_mask
& (1 << j
)) &&
552 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
553 this_mask
|= (1 << j
);
557 if (this_mask
!= scs_mask
) {
558 ir_to_mesa_instruction
*inst
;
559 dst_reg tmp_dst
= dst_reg(tmp
);
561 /* Emit the SCS instruction.
563 inst
= emit(ir
, OPCODE_SCS
, tmp_dst
, src0
);
564 inst
->dst
.writemask
= scs_mask
;
566 /* Move the result of the SCS instruction to the desired location in
569 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
570 component
, component
);
571 inst
= emit(ir
, OPCODE_SCS
, dst
, tmp
);
572 inst
->dst
.writemask
= this_mask
;
574 /* Emit the SCS instruction to write directly to the destination.
576 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_SCS
, dst
, src0
);
577 inst
->dst
.writemask
= scs_mask
;
580 done_mask
|= this_mask
;
585 ir_to_mesa_visitor::src_reg_for_float(float val
)
587 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
589 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
590 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
596 type_size(const struct glsl_type
*type
)
601 switch (type
->base_type
) {
604 case GLSL_TYPE_FLOAT
:
606 if (type
->is_matrix()) {
607 return type
->matrix_columns
;
609 /* Regardless of size of vector, it gets a vec4. This is bad
610 * packing for things like floats, but otherwise arrays become a
611 * mess. Hopefully a later pass over the code can pack scalars
612 * down if appropriate.
616 case GLSL_TYPE_ARRAY
:
617 assert(type
->length
> 0);
618 return type_size(type
->fields
.array
) * type
->length
;
619 case GLSL_TYPE_STRUCT
:
621 for (i
= 0; i
< type
->length
; i
++) {
622 size
+= type_size(type
->fields
.structure
[i
].type
);
625 case GLSL_TYPE_SAMPLER
:
626 /* Samplers take up one slot in UNIFORMS[], but they're baked in
637 * In the initial pass of codegen, we assign temporary numbers to
638 * intermediate results. (not SSA -- variable assignments will reuse
639 * storage). Actual register allocation for the Mesa VM occurs in a
640 * pass over the Mesa IR later.
643 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
647 src
.file
= PROGRAM_TEMPORARY
;
648 src
.index
= next_temp
;
650 next_temp
+= type_size(type
);
652 if (type
->is_array() || type
->is_record()) {
653 src
.swizzle
= SWIZZLE_NOOP
;
655 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
663 ir_to_mesa_visitor::find_variable_storage(ir_variable
*var
)
666 variable_storage
*entry
;
668 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
669 entry
= (variable_storage
*)iter
.get();
671 if (entry
->var
== var
)
679 ir_to_mesa_visitor::visit(ir_variable
*ir
)
681 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
682 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
684 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
685 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
687 } else if (strcmp(ir
->name
, "gl_FragDepth") == 0) {
688 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
689 switch (ir
->depth_layout
) {
690 case ir_depth_layout_none
:
691 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_NONE
;
693 case ir_depth_layout_any
:
694 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_ANY
;
696 case ir_depth_layout_greater
:
697 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_GREATER
;
699 case ir_depth_layout_less
:
700 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_LESS
;
702 case ir_depth_layout_unchanged
:
703 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_UNCHANGED
;
711 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
713 const ir_state_slot
*const slots
= ir
->state_slots
;
714 assert(ir
->state_slots
!= NULL
);
716 /* Check if this statevar's setup in the STATE file exactly
717 * matches how we'll want to reference it as a
718 * struct/array/whatever. If not, then we need to move it into
719 * temporary storage and hope that it'll get copy-propagated
722 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
723 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
728 variable_storage
*storage
;
730 if (i
== ir
->num_state_slots
) {
731 /* We'll set the index later. */
732 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
733 this->variables
.push_tail(storage
);
737 /* The variable_storage constructor allocates slots based on the size
738 * of the type. However, this had better match the number of state
739 * elements that we're going to copy into the new temporary.
741 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
743 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
745 this->variables
.push_tail(storage
);
746 this->next_temp
+= type_size(ir
->type
);
748 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
752 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
753 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
754 (gl_state_index
*)slots
[i
].tokens
);
756 if (storage
->file
== PROGRAM_STATE_VAR
) {
757 if (storage
->index
== -1) {
758 storage
->index
= index
;
760 assert(index
== storage
->index
+ (int)i
);
763 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
764 src
.swizzle
= slots
[i
].swizzle
;
765 emit(ir
, OPCODE_MOV
, dst
, src
);
766 /* even a float takes up a whole vec4 reg in a struct/array. */
771 if (storage
->file
== PROGRAM_TEMPORARY
&&
772 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
773 linker_error(this->shader_program
,
774 "failed to load builtin uniform `%s' "
775 "(%d/%d regs loaded)\n",
776 ir
->name
, dst
.index
- storage
->index
,
777 type_size(ir
->type
));
783 ir_to_mesa_visitor::visit(ir_loop
*ir
)
785 ir_dereference_variable
*counter
= NULL
;
787 if (ir
->counter
!= NULL
)
788 counter
= new(mem_ctx
) ir_dereference_variable(ir
->counter
);
790 if (ir
->from
!= NULL
) {
791 assert(ir
->counter
!= NULL
);
794 new(mem_ctx
) ir_assignment(counter
, ir
->from
, NULL
);
799 emit(NULL
, OPCODE_BGNLOOP
);
803 new(mem_ctx
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
805 ir_if
*if_stmt
= new(mem_ctx
) ir_if(e
);
808 new(mem_ctx
) ir_loop_jump(ir_loop_jump::jump_break
);
810 if_stmt
->then_instructions
.push_tail(brk
);
812 if_stmt
->accept(this);
815 visit_exec_list(&ir
->body_instructions
, this);
819 new(mem_ctx
) ir_expression(ir_binop_add
, counter
->type
,
820 counter
, ir
->increment
);
823 new(mem_ctx
) ir_assignment(counter
, e
, NULL
);
828 emit(NULL
, OPCODE_ENDLOOP
);
832 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
835 case ir_loop_jump::jump_break
:
836 emit(NULL
, OPCODE_BRK
);
838 case ir_loop_jump::jump_continue
:
839 emit(NULL
, OPCODE_CONT
);
846 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
853 ir_to_mesa_visitor::visit(ir_function
*ir
)
855 /* Ignore function bodies other than main() -- we shouldn't see calls to
856 * them since they should all be inlined before we get to ir_to_mesa.
858 if (strcmp(ir
->name
, "main") == 0) {
859 const ir_function_signature
*sig
;
862 sig
= ir
->matching_signature(&empty
);
866 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
867 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
875 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
877 int nonmul_operand
= 1 - mul_operand
;
880 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
881 if (!expr
|| expr
->operation
!= ir_binop_mul
)
884 expr
->operands
[0]->accept(this);
886 expr
->operands
[1]->accept(this);
888 ir
->operands
[nonmul_operand
]->accept(this);
891 this->result
= get_temp(ir
->type
);
892 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
898 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
900 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
901 * implemented using multiplication, and logical-or is implemented using
902 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
903 * As result, the logical expression (a & !b) can be rewritten as:
907 * - (a * 1) - (a * b)
911 * This final expression can be implemented as a single MAD(a, -b, a)
915 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
917 const int other_operand
= 1 - try_operand
;
920 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
921 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
924 ir
->operands
[other_operand
]->accept(this);
926 expr
->operands
[0]->accept(this);
929 b
.negate
= ~b
.negate
;
931 this->result
= get_temp(ir
->type
);
932 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
938 ir_to_mesa_visitor::try_emit_sat(ir_expression
*ir
)
940 /* Saturates were only introduced to vertex programs in
941 * NV_vertex_program3, so don't give them to drivers in the VP.
943 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
)
946 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
950 sat_src
->accept(this);
951 src_reg src
= this->result
;
953 /* If we generated an expression instruction into a temporary in
954 * processing the saturate's operand, apply the saturate to that
955 * instruction. Otherwise, generate a MOV to do the saturate.
957 * Note that we have to be careful to only do this optimization if
958 * the instruction in question was what generated src->result. For
959 * example, ir_dereference_array might generate a MUL instruction
960 * to create the reladdr, and return us a src reg using that
961 * reladdr. That MUL result is not the value we're trying to
964 ir_expression
*sat_src_expr
= sat_src
->as_expression();
965 ir_to_mesa_instruction
*new_inst
;
966 new_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
967 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
968 sat_src_expr
->operation
== ir_binop_add
||
969 sat_src_expr
->operation
== ir_binop_dot
)) {
970 new_inst
->saturate
= true;
972 this->result
= get_temp(ir
->type
);
973 ir_to_mesa_instruction
*inst
;
974 inst
= emit(ir
, OPCODE_MOV
, dst_reg(this->result
), src
);
975 inst
->saturate
= true;
982 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
983 src_reg
*reg
, int *num_reladdr
)
988 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
990 if (*num_reladdr
!= 1) {
991 src_reg temp
= get_temp(glsl_type::vec4_type
);
993 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
1001 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
1003 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
1004 * This means that each of the operands is either an immediate value of -1,
1005 * 0, or 1, or is a component from one source register (possibly with
1008 uint8_t components
[4] = { 0 };
1009 bool negate
[4] = { false };
1010 ir_variable
*var
= NULL
;
1012 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1013 ir_rvalue
*op
= ir
->operands
[i
];
1015 assert(op
->type
->is_scalar());
1017 while (op
!= NULL
) {
1018 switch (op
->ir_type
) {
1019 case ir_type_constant
: {
1021 assert(op
->type
->is_scalar());
1023 const ir_constant
*const c
= op
->as_constant();
1025 components
[i
] = SWIZZLE_ONE
;
1026 } else if (c
->is_zero()) {
1027 components
[i
] = SWIZZLE_ZERO
;
1028 } else if (c
->is_negative_one()) {
1029 components
[i
] = SWIZZLE_ONE
;
1032 assert(!"SWZ constant must be 0.0 or 1.0.");
1039 case ir_type_dereference_variable
: {
1040 ir_dereference_variable
*const deref
=
1041 (ir_dereference_variable
*) op
;
1043 assert((var
== NULL
) || (deref
->var
== var
));
1044 components
[i
] = SWIZZLE_X
;
1050 case ir_type_expression
: {
1051 ir_expression
*const expr
= (ir_expression
*) op
;
1053 assert(expr
->operation
== ir_unop_neg
);
1056 op
= expr
->operands
[0];
1060 case ir_type_swizzle
: {
1061 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
1063 components
[i
] = swiz
->mask
.x
;
1069 assert(!"Should not get here.");
1075 assert(var
!= NULL
);
1077 ir_dereference_variable
*const deref
=
1078 new(mem_ctx
) ir_dereference_variable(var
);
1080 this->result
.file
= PROGRAM_UNDEFINED
;
1081 deref
->accept(this);
1082 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1084 printf("Failed to get tree for expression operand:\n");
1092 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
1096 src
.negate
= ((unsigned(negate
[0]) << 0)
1097 | (unsigned(negate
[1]) << 1)
1098 | (unsigned(negate
[2]) << 2)
1099 | (unsigned(negate
[3]) << 3));
1101 /* Storage for our result. Ideally for an assignment we'd be using the
1102 * actual storage for the result here, instead.
1104 const src_reg result_src
= get_temp(ir
->type
);
1105 dst_reg result_dst
= dst_reg(result_src
);
1107 /* Limit writes to the channels that will be used by result_src later.
1108 * This does limit this temp's use as a temporary for multi-instruction
1111 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1113 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
1114 this->result
= result_src
;
1118 ir_to_mesa_visitor::visit(ir_expression
*ir
)
1120 unsigned int operand
;
1121 src_reg op
[Elements(ir
->operands
)];
1125 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1127 if (ir
->operation
== ir_binop_add
) {
1128 if (try_emit_mad(ir
, 1))
1130 if (try_emit_mad(ir
, 0))
1134 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1136 if (ir
->operation
== ir_binop_logic_and
) {
1137 if (try_emit_mad_for_and_not(ir
, 1))
1139 if (try_emit_mad_for_and_not(ir
, 0))
1143 if (try_emit_sat(ir
))
1146 if (ir
->operation
== ir_quadop_vector
) {
1151 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1152 this->result
.file
= PROGRAM_UNDEFINED
;
1153 ir
->operands
[operand
]->accept(this);
1154 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1156 printf("Failed to get tree for expression operand:\n");
1157 ir
->operands
[operand
]->accept(&v
);
1160 op
[operand
] = this->result
;
1162 /* Matrix expression operands should have been broken down to vector
1163 * operations already.
1165 assert(!ir
->operands
[operand
]->type
->is_matrix());
1168 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1169 if (ir
->operands
[1]) {
1170 vector_elements
= MAX2(vector_elements
,
1171 ir
->operands
[1]->type
->vector_elements
);
1174 this->result
.file
= PROGRAM_UNDEFINED
;
1176 /* Storage for our result. Ideally for an assignment we'd be using
1177 * the actual storage for the result here, instead.
1179 result_src
= get_temp(ir
->type
);
1180 /* convenience for the emit functions below. */
1181 result_dst
= dst_reg(result_src
);
1182 /* Limit writes to the channels that will be used by result_src later.
1183 * This does limit this temp's use as a temporary for multi-instruction
1186 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1188 switch (ir
->operation
) {
1189 case ir_unop_logic_not
:
1190 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1191 * older GPUs implement SEQ using multiple instructions (i915 uses two
1192 * SGE instructions and a MUL instruction). Since our logic values are
1193 * 0.0 and 1.0, 1-x also implements !x.
1195 op
[0].negate
= ~op
[0].negate
;
1196 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1199 op
[0].negate
= ~op
[0].negate
;
1203 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1206 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1209 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1213 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1217 assert(!"not reached: should be handled by ir_explog_to_explog2");
1220 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1223 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1226 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1228 case ir_unop_sin_reduced
:
1229 emit_scs(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1231 case ir_unop_cos_reduced
:
1232 emit_scs(ir
, OPCODE_COS
, result_dst
, op
[0]);
1236 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1239 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1242 case ir_unop_noise
: {
1243 const enum prog_opcode opcode
=
1244 prog_opcode(OPCODE_NOISE1
1245 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1246 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1248 emit(ir
, opcode
, result_dst
, op
[0]);
1253 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1256 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1260 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1263 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1266 /* Floating point should be lowered by MOD_TO_FRACT in the compiler. */
1267 assert(ir
->type
->is_integer());
1268 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1272 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1274 case ir_binop_greater
:
1275 emit(ir
, OPCODE_SGT
, result_dst
, op
[0], op
[1]);
1277 case ir_binop_lequal
:
1278 emit(ir
, OPCODE_SLE
, result_dst
, op
[0], op
[1]);
1280 case ir_binop_gequal
:
1281 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1283 case ir_binop_equal
:
1284 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1286 case ir_binop_nequal
:
1287 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1289 case ir_binop_all_equal
:
1290 /* "==" operator producing a scalar boolean. */
1291 if (ir
->operands
[0]->type
->is_vector() ||
1292 ir
->operands
[1]->type
->is_vector()) {
1293 src_reg temp
= get_temp(glsl_type::vec4_type
);
1294 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1296 /* After the dot-product, the value will be an integer on the
1297 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1299 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1301 /* Negating the result of the dot-product gives values on the range
1302 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1303 * achieved using SGE.
1305 src_reg sge_src
= result_src
;
1306 sge_src
.negate
= ~sge_src
.negate
;
1307 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1309 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1312 case ir_binop_any_nequal
:
1313 /* "!=" operator producing a scalar boolean. */
1314 if (ir
->operands
[0]->type
->is_vector() ||
1315 ir
->operands
[1]->type
->is_vector()) {
1316 src_reg temp
= get_temp(glsl_type::vec4_type
);
1317 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1319 /* After the dot-product, the value will be an integer on the
1320 * range [0,4]. Zero stays zero, and positive values become 1.0.
1322 ir_to_mesa_instruction
*const dp
=
1323 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1324 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1325 /* The clamping to [0,1] can be done for free in the fragment
1326 * shader with a saturate.
1328 dp
->saturate
= true;
1330 /* Negating the result of the dot-product gives values on the range
1331 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1332 * achieved using SLT.
1334 src_reg slt_src
= result_src
;
1335 slt_src
.negate
= ~slt_src
.negate
;
1336 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1339 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1344 assert(ir
->operands
[0]->type
->is_vector());
1346 /* After the dot-product, the value will be an integer on the
1347 * range [0,4]. Zero stays zero, and positive values become 1.0.
1349 ir_to_mesa_instruction
*const dp
=
1350 emit_dp(ir
, result_dst
, op
[0], op
[0],
1351 ir
->operands
[0]->type
->vector_elements
);
1352 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1353 /* The clamping to [0,1] can be done for free in the fragment
1354 * shader with a saturate.
1356 dp
->saturate
= true;
1358 /* Negating the result of the dot-product gives values on the range
1359 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1360 * is achieved using SLT.
1362 src_reg slt_src
= result_src
;
1363 slt_src
.negate
= ~slt_src
.negate
;
1364 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1369 case ir_binop_logic_xor
:
1370 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1373 case ir_binop_logic_or
: {
1374 /* After the addition, the value will be an integer on the
1375 * range [0,2]. Zero stays zero, and positive values become 1.0.
1377 ir_to_mesa_instruction
*add
=
1378 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1379 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1380 /* The clamping to [0,1] can be done for free in the fragment
1381 * shader with a saturate.
1383 add
->saturate
= true;
1385 /* Negating the result of the addition gives values on the range
1386 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1387 * is achieved using SLT.
1389 src_reg slt_src
= result_src
;
1390 slt_src
.negate
= ~slt_src
.negate
;
1391 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1396 case ir_binop_logic_and
:
1397 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1398 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1402 assert(ir
->operands
[0]->type
->is_vector());
1403 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1404 emit_dp(ir
, result_dst
, op
[0], op
[1],
1405 ir
->operands
[0]->type
->vector_elements
);
1409 /* sqrt(x) = x * rsq(x). */
1410 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1411 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1412 /* For incoming channels <= 0, set the result to 0. */
1413 op
[0].negate
= ~op
[0].negate
;
1414 emit(ir
, OPCODE_CMP
, result_dst
,
1415 op
[0], result_src
, src_reg_for_float(0.0));
1418 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1426 /* Mesa IR lacks types, ints are stored as truncated floats. */
1430 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1434 emit(ir
, OPCODE_SNE
, result_dst
,
1435 op
[0], src_reg_for_float(0.0));
1438 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1441 op
[0].negate
= ~op
[0].negate
;
1442 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1443 result_src
.negate
= ~result_src
.negate
;
1446 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1449 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1453 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1456 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1459 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1462 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1463 * hardware backends have no way to avoid Mesa IR generation
1464 * even if they don't use it, we need to emit "something" and
1467 case ir_binop_lshift
:
1468 case ir_binop_rshift
:
1469 case ir_binop_bit_and
:
1470 case ir_binop_bit_xor
:
1471 case ir_binop_bit_or
:
1472 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1475 case ir_unop_bit_not
:
1476 case ir_unop_round_even
:
1477 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1480 case ir_quadop_vector
:
1481 /* This operation should have already been handled.
1483 assert(!"Should not get here.");
1487 this->result
= result_src
;
1492 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1498 /* Note that this is only swizzles in expressions, not those on the left
1499 * hand side of an assignment, which do write masking. See ir_assignment
1503 ir
->val
->accept(this);
1505 assert(src
.file
!= PROGRAM_UNDEFINED
);
1507 for (i
= 0; i
< 4; i
++) {
1508 if (i
< ir
->type
->vector_elements
) {
1511 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1514 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1517 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1520 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1524 /* If the type is smaller than a vec4, replicate the last
1527 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1531 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1537 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1539 variable_storage
*entry
= find_variable_storage(ir
->var
);
1540 ir_variable
*var
= ir
->var
;
1543 switch (var
->mode
) {
1544 case ir_var_uniform
:
1545 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1547 this->variables
.push_tail(entry
);
1551 /* The linker assigns locations for varyings and attributes,
1552 * including deprecated builtins (like gl_Color),
1553 * user-assigned generic attributes (glBindVertexLocation),
1554 * and user-defined varyings.
1556 * FINISHME: We would hit this path for function arguments. Fix!
1558 assert(var
->location
!= -1);
1559 entry
= new(mem_ctx
) variable_storage(var
,
1564 assert(var
->location
!= -1);
1565 entry
= new(mem_ctx
) variable_storage(var
,
1569 case ir_var_system_value
:
1570 entry
= new(mem_ctx
) variable_storage(var
,
1571 PROGRAM_SYSTEM_VALUE
,
1575 case ir_var_temporary
:
1576 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1578 this->variables
.push_tail(entry
);
1580 next_temp
+= type_size(var
->type
);
1585 printf("Failed to make storage for %s\n", var
->name
);
1590 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1594 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1598 int element_size
= type_size(ir
->type
);
1600 index
= ir
->array_index
->constant_expression_value();
1602 ir
->array
->accept(this);
1606 src
.index
+= index
->value
.i
[0] * element_size
;
1608 /* Variable index array dereference. It eats the "vec4" of the
1609 * base of the array and an index that offsets the Mesa register
1612 ir
->array_index
->accept(this);
1616 if (element_size
== 1) {
1617 index_reg
= this->result
;
1619 index_reg
= get_temp(glsl_type::float_type
);
1621 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1622 this->result
, src_reg_for_float(element_size
));
1625 /* If there was already a relative address register involved, add the
1626 * new and the old together to get the new offset.
1628 if (src
.reladdr
!= NULL
) {
1629 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1631 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1632 index_reg
, *src
.reladdr
);
1634 index_reg
= accum_reg
;
1637 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1638 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1641 /* If the type is smaller than a vec4, replicate the last channel out. */
1642 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1643 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1645 src
.swizzle
= SWIZZLE_NOOP
;
1651 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1654 const glsl_type
*struct_type
= ir
->record
->type
;
1657 ir
->record
->accept(this);
1659 for (i
= 0; i
< struct_type
->length
; i
++) {
1660 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1662 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1665 /* If the type is smaller than a vec4, replicate the last channel out. */
1666 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1667 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1669 this->result
.swizzle
= SWIZZLE_NOOP
;
1671 this->result
.index
+= offset
;
1675 * We want to be careful in assignment setup to hit the actual storage
1676 * instead of potentially using a temporary like we might with the
1677 * ir_dereference handler.
1680 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1682 /* The LHS must be a dereference. If the LHS is a variable indexed array
1683 * access of a vector, it must be separated into a series conditional moves
1684 * before reaching this point (see ir_vec_index_to_cond_assign).
1686 assert(ir
->as_dereference());
1687 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1689 assert(!deref_array
->array
->type
->is_vector());
1692 /* Use the rvalue deref handler for the most part. We'll ignore
1693 * swizzles in it and write swizzles using writemask, though.
1696 return dst_reg(v
->result
);
1700 * Process the condition of a conditional assignment
1702 * Examines the condition of a conditional assignment to generate the optimal
1703 * first operand of a \c CMP instruction. If the condition is a relational
1704 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1705 * used as the source for the \c CMP instruction. Otherwise the comparison
1706 * is processed to a boolean result, and the boolean result is used as the
1707 * operand to the CMP instruction.
1710 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1712 ir_rvalue
*src_ir
= ir
;
1714 bool switch_order
= false;
1716 ir_expression
*const expr
= ir
->as_expression();
1717 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
1718 bool zero_on_left
= false;
1720 if (expr
->operands
[0]->is_zero()) {
1721 src_ir
= expr
->operands
[1];
1722 zero_on_left
= true;
1723 } else if (expr
->operands
[1]->is_zero()) {
1724 src_ir
= expr
->operands
[0];
1725 zero_on_left
= false;
1729 * (a < 0) T F F ( a < 0) T F F
1730 * (0 < a) F F T (-a < 0) F F T
1731 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1732 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1733 * (a > 0) F F T (-a < 0) F F T
1734 * (0 > a) T F F ( a < 0) T F F
1735 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1736 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1738 * Note that exchanging the order of 0 and 'a' in the comparison simply
1739 * means that the value of 'a' should be negated.
1742 switch (expr
->operation
) {
1744 switch_order
= false;
1745 negate
= zero_on_left
;
1748 case ir_binop_greater
:
1749 switch_order
= false;
1750 negate
= !zero_on_left
;
1753 case ir_binop_lequal
:
1754 switch_order
= true;
1755 negate
= !zero_on_left
;
1758 case ir_binop_gequal
:
1759 switch_order
= true;
1760 negate
= zero_on_left
;
1764 /* This isn't the right kind of comparison afterall, so make sure
1765 * the whole condition is visited.
1773 src_ir
->accept(this);
1775 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1776 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1777 * choose which value OPCODE_CMP produces without an extra instruction
1778 * computing the condition.
1781 this->result
.negate
= ~this->result
.negate
;
1783 return switch_order
;
1787 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1793 ir
->rhs
->accept(this);
1796 l
= get_assignment_lhs(ir
->lhs
, this);
1798 /* FINISHME: This should really set to the correct maximal writemask for each
1799 * FINISHME: component written (in the loops below). This case can only
1800 * FINISHME: occur for matrices, arrays, and structures.
1802 if (ir
->write_mask
== 0) {
1803 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1804 l
.writemask
= WRITEMASK_XYZW
;
1805 } else if (ir
->lhs
->type
->is_scalar()) {
1806 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1807 * FINISHME: W component of fragment shader output zero, work correctly.
1809 l
.writemask
= WRITEMASK_XYZW
;
1812 int first_enabled_chan
= 0;
1815 assert(ir
->lhs
->type
->is_vector());
1816 l
.writemask
= ir
->write_mask
;
1818 for (int i
= 0; i
< 4; i
++) {
1819 if (l
.writemask
& (1 << i
)) {
1820 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1825 /* Swizzle a small RHS vector into the channels being written.
1827 * glsl ir treats write_mask as dictating how many channels are
1828 * present on the RHS while Mesa IR treats write_mask as just
1829 * showing which channels of the vec4 RHS get written.
1831 for (int i
= 0; i
< 4; i
++) {
1832 if (l
.writemask
& (1 << i
))
1833 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1835 swizzles
[i
] = first_enabled_chan
;
1837 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1838 swizzles
[2], swizzles
[3]);
1841 assert(l
.file
!= PROGRAM_UNDEFINED
);
1842 assert(r
.file
!= PROGRAM_UNDEFINED
);
1844 if (ir
->condition
) {
1845 const bool switch_order
= this->process_move_condition(ir
->condition
);
1846 src_reg condition
= this->result
;
1848 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1850 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1852 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1859 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1860 emit(ir
, OPCODE_MOV
, l
, r
);
1869 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1872 GLfloat stack_vals
[4] = { 0 };
1873 GLfloat
*values
= stack_vals
;
1876 /* Unfortunately, 4 floats is all we can get into
1877 * _mesa_add_unnamed_constant. So, make a temp to store an
1878 * aggregate constant and move each constant value into it. If we
1879 * get lucky, copy propagation will eliminate the extra moves.
1882 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
1883 src_reg temp_base
= get_temp(ir
->type
);
1884 dst_reg temp
= dst_reg(temp_base
);
1886 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
1887 ir_constant
*field_value
= (ir_constant
*)iter
.get();
1888 int size
= type_size(field_value
->type
);
1892 field_value
->accept(this);
1895 for (i
= 0; i
< (unsigned int)size
; i
++) {
1896 emit(ir
, OPCODE_MOV
, temp
, src
);
1902 this->result
= temp_base
;
1906 if (ir
->type
->is_array()) {
1907 src_reg temp_base
= get_temp(ir
->type
);
1908 dst_reg temp
= dst_reg(temp_base
);
1909 int size
= type_size(ir
->type
->fields
.array
);
1913 for (i
= 0; i
< ir
->type
->length
; i
++) {
1914 ir
->array_elements
[i
]->accept(this);
1916 for (int j
= 0; j
< size
; j
++) {
1917 emit(ir
, OPCODE_MOV
, temp
, src
);
1923 this->result
= temp_base
;
1927 if (ir
->type
->is_matrix()) {
1928 src_reg mat
= get_temp(ir
->type
);
1929 dst_reg mat_column
= dst_reg(mat
);
1931 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1932 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1933 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1935 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1936 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1937 (gl_constant_value
*) values
,
1938 ir
->type
->vector_elements
,
1940 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1949 src
.file
= PROGRAM_CONSTANT
;
1950 switch (ir
->type
->base_type
) {
1951 case GLSL_TYPE_FLOAT
:
1952 values
= &ir
->value
.f
[0];
1954 case GLSL_TYPE_UINT
:
1955 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1956 values
[i
] = ir
->value
.u
[i
];
1960 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1961 values
[i
] = ir
->value
.i
[i
];
1964 case GLSL_TYPE_BOOL
:
1965 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1966 values
[i
] = ir
->value
.b
[i
];
1970 assert(!"Non-float/uint/int/bool constant");
1973 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1974 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1975 (gl_constant_value
*) values
,
1976 ir
->type
->vector_elements
,
1977 &this->result
.swizzle
);
1981 ir_to_mesa_visitor::get_function_signature(ir_function_signature
*sig
)
1983 function_entry
*entry
;
1985 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
1986 entry
= (function_entry
*)iter
.get();
1988 if (entry
->sig
== sig
)
1992 entry
= ralloc(mem_ctx
, function_entry
);
1994 entry
->sig_id
= this->next_signature_id
++;
1995 entry
->bgn_inst
= NULL
;
1997 /* Allocate storage for all the parameters. */
1998 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
1999 ir_variable
*param
= (ir_variable
*)iter
.get();
2000 variable_storage
*storage
;
2002 storage
= find_variable_storage(param
);
2005 storage
= new(mem_ctx
) variable_storage(param
, PROGRAM_TEMPORARY
,
2007 this->variables
.push_tail(storage
);
2009 this->next_temp
+= type_size(param
->type
);
2012 if (!sig
->return_type
->is_void()) {
2013 entry
->return_reg
= get_temp(sig
->return_type
);
2015 entry
->return_reg
= undef_src
;
2018 this->function_signatures
.push_tail(entry
);
2023 ir_to_mesa_visitor::visit(ir_call
*ir
)
2025 ir_to_mesa_instruction
*call_inst
;
2026 ir_function_signature
*sig
= ir
->get_callee();
2027 function_entry
*entry
= get_function_signature(sig
);
2030 /* Process in parameters. */
2031 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2032 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2033 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2034 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2036 if (param
->mode
== ir_var_in
||
2037 param
->mode
== ir_var_inout
) {
2038 variable_storage
*storage
= find_variable_storage(param
);
2041 param_rval
->accept(this);
2042 src_reg r
= this->result
;
2045 l
.file
= storage
->file
;
2046 l
.index
= storage
->index
;
2048 l
.writemask
= WRITEMASK_XYZW
;
2049 l
.cond_mask
= COND_TR
;
2051 for (i
= 0; i
< type_size(param
->type
); i
++) {
2052 emit(ir
, OPCODE_MOV
, l
, r
);
2060 assert(!sig_iter
.has_next());
2062 /* Emit call instruction */
2063 call_inst
= emit(ir
, OPCODE_CAL
);
2064 call_inst
->function
= entry
;
2066 /* Process out parameters. */
2067 sig_iter
= sig
->parameters
.iterator();
2068 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2069 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2070 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2072 if (param
->mode
== ir_var_out
||
2073 param
->mode
== ir_var_inout
) {
2074 variable_storage
*storage
= find_variable_storage(param
);
2078 r
.file
= storage
->file
;
2079 r
.index
= storage
->index
;
2081 r
.swizzle
= SWIZZLE_NOOP
;
2084 param_rval
->accept(this);
2085 dst_reg l
= dst_reg(this->result
);
2087 for (i
= 0; i
< type_size(param
->type
); i
++) {
2088 emit(ir
, OPCODE_MOV
, l
, r
);
2096 assert(!sig_iter
.has_next());
2098 /* Process return value. */
2099 this->result
= entry
->return_reg
;
2103 ir_to_mesa_visitor::visit(ir_texture
*ir
)
2105 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
2106 dst_reg result_dst
, coord_dst
;
2107 ir_to_mesa_instruction
*inst
= NULL
;
2108 prog_opcode opcode
= OPCODE_NOP
;
2110 if (ir
->op
== ir_txs
)
2111 this->result
= src_reg_for_float(0.0);
2113 ir
->coordinate
->accept(this);
2115 /* Put our coords in a temp. We'll need to modify them for shadow,
2116 * projection, or LOD, so the only case we'd use it as is is if
2117 * we're doing plain old texturing. Mesa IR optimization should
2118 * handle cleaning up our mess in that case.
2120 coord
= get_temp(glsl_type::vec4_type
);
2121 coord_dst
= dst_reg(coord
);
2122 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2124 if (ir
->projector
) {
2125 ir
->projector
->accept(this);
2126 projector
= this->result
;
2129 /* Storage for our result. Ideally for an assignment we'd be using
2130 * the actual storage for the result here, instead.
2132 result_src
= get_temp(glsl_type::vec4_type
);
2133 result_dst
= dst_reg(result_src
);
2138 opcode
= OPCODE_TEX
;
2141 opcode
= OPCODE_TXB
;
2142 ir
->lod_info
.bias
->accept(this);
2143 lod_info
= this->result
;
2146 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2148 opcode
= OPCODE_TXL
;
2149 ir
->lod_info
.lod
->accept(this);
2150 lod_info
= this->result
;
2153 opcode
= OPCODE_TXD
;
2154 ir
->lod_info
.grad
.dPdx
->accept(this);
2156 ir
->lod_info
.grad
.dPdy
->accept(this);
2161 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2163 if (ir
->projector
) {
2164 if (opcode
== OPCODE_TEX
) {
2165 /* Slot the projector in as the last component of the coord. */
2166 coord_dst
.writemask
= WRITEMASK_W
;
2167 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2168 coord_dst
.writemask
= WRITEMASK_XYZW
;
2169 opcode
= OPCODE_TXP
;
2171 src_reg coord_w
= coord
;
2172 coord_w
.swizzle
= SWIZZLE_WWWW
;
2174 /* For the other TEX opcodes there's no projective version
2175 * since the last slot is taken up by lod info. Do the
2176 * projective divide now.
2178 coord_dst
.writemask
= WRITEMASK_W
;
2179 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2181 /* In the case where we have to project the coordinates "by hand,"
2182 * the shadow comparitor value must also be projected.
2184 src_reg tmp_src
= coord
;
2185 if (ir
->shadow_comparitor
) {
2186 /* Slot the shadow value in as the second to last component of the
2189 ir
->shadow_comparitor
->accept(this);
2191 tmp_src
= get_temp(glsl_type::vec4_type
);
2192 dst_reg tmp_dst
= dst_reg(tmp_src
);
2194 /* Projective division not allowed for array samplers. */
2195 assert(!sampler_type
->sampler_array
);
2197 tmp_dst
.writemask
= WRITEMASK_Z
;
2198 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2200 tmp_dst
.writemask
= WRITEMASK_XY
;
2201 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2204 coord_dst
.writemask
= WRITEMASK_XYZ
;
2205 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2207 coord_dst
.writemask
= WRITEMASK_XYZW
;
2208 coord
.swizzle
= SWIZZLE_XYZW
;
2212 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2213 * comparitor was put in the correct place (and projected) by the code,
2214 * above, that handles by-hand projection.
2216 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2217 /* Slot the shadow value in as the second to last component of the
2220 ir
->shadow_comparitor
->accept(this);
2222 /* XXX This will need to be updated for cubemap array samplers. */
2223 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2224 sampler_type
->sampler_array
) {
2225 coord_dst
.writemask
= WRITEMASK_W
;
2227 coord_dst
.writemask
= WRITEMASK_Z
;
2230 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2231 coord_dst
.writemask
= WRITEMASK_XYZW
;
2234 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2235 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2236 coord_dst
.writemask
= WRITEMASK_W
;
2237 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2238 coord_dst
.writemask
= WRITEMASK_XYZW
;
2241 if (opcode
== OPCODE_TXD
)
2242 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2244 inst
= emit(ir
, opcode
, result_dst
, coord
);
2246 if (ir
->shadow_comparitor
)
2247 inst
->tex_shadow
= GL_TRUE
;
2249 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2250 this->shader_program
,
2253 switch (sampler_type
->sampler_dimensionality
) {
2254 case GLSL_SAMPLER_DIM_1D
:
2255 inst
->tex_target
= (sampler_type
->sampler_array
)
2256 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2258 case GLSL_SAMPLER_DIM_2D
:
2259 inst
->tex_target
= (sampler_type
->sampler_array
)
2260 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2262 case GLSL_SAMPLER_DIM_3D
:
2263 inst
->tex_target
= TEXTURE_3D_INDEX
;
2265 case GLSL_SAMPLER_DIM_CUBE
:
2266 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2268 case GLSL_SAMPLER_DIM_RECT
:
2269 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2271 case GLSL_SAMPLER_DIM_BUF
:
2272 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2275 assert(!"Should not get here.");
2278 this->result
= result_src
;
2282 ir_to_mesa_visitor::visit(ir_return
*ir
)
2284 if (ir
->get_value()) {
2288 assert(current_function
);
2290 ir
->get_value()->accept(this);
2291 src_reg r
= this->result
;
2293 l
= dst_reg(current_function
->return_reg
);
2295 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2296 emit(ir
, OPCODE_MOV
, l
, r
);
2302 emit(ir
, OPCODE_RET
);
2306 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2308 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
2310 if (ir
->condition
) {
2311 ir
->condition
->accept(this);
2312 this->result
.negate
= ~this->result
.negate
;
2313 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2315 emit(ir
, OPCODE_KIL_NV
);
2318 fp
->UsesKill
= GL_TRUE
;
2322 ir_to_mesa_visitor::visit(ir_if
*ir
)
2324 ir_to_mesa_instruction
*cond_inst
, *if_inst
;
2325 ir_to_mesa_instruction
*prev_inst
;
2327 prev_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2329 ir
->condition
->accept(this);
2330 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2332 if (this->options
->EmitCondCodes
) {
2333 cond_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2335 /* See if we actually generated any instruction for generating
2336 * the condition. If not, then cook up a move to a temp so we
2337 * have something to set cond_update on.
2339 if (cond_inst
== prev_inst
) {
2340 src_reg temp
= get_temp(glsl_type::bool_type
);
2341 cond_inst
= emit(ir
->condition
, OPCODE_MOV
, dst_reg(temp
), result
);
2343 cond_inst
->cond_update
= GL_TRUE
;
2345 if_inst
= emit(ir
->condition
, OPCODE_IF
);
2346 if_inst
->dst
.cond_mask
= COND_NE
;
2348 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2351 this->instructions
.push_tail(if_inst
);
2353 visit_exec_list(&ir
->then_instructions
, this);
2355 if (!ir
->else_instructions
.is_empty()) {
2356 emit(ir
->condition
, OPCODE_ELSE
);
2357 visit_exec_list(&ir
->else_instructions
, this);
2360 if_inst
= emit(ir
->condition
, OPCODE_ENDIF
);
2363 ir_to_mesa_visitor::ir_to_mesa_visitor()
2365 result
.file
= PROGRAM_UNDEFINED
;
2367 next_signature_id
= 1;
2368 current_function
= NULL
;
2369 mem_ctx
= ralloc_context(NULL
);
2372 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2374 ralloc_free(mem_ctx
);
2377 static struct prog_src_register
2378 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2380 struct prog_src_register mesa_reg
;
2382 mesa_reg
.File
= reg
.file
;
2383 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2384 mesa_reg
.Index
= reg
.index
;
2385 mesa_reg
.Swizzle
= reg
.swizzle
;
2386 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2387 mesa_reg
.Negate
= reg
.negate
;
2389 mesa_reg
.HasIndex2
= GL_FALSE
;
2390 mesa_reg
.RelAddr2
= 0;
2391 mesa_reg
.Index2
= 0;
2397 set_branchtargets(ir_to_mesa_visitor
*v
,
2398 struct prog_instruction
*mesa_instructions
,
2399 int num_instructions
)
2401 int if_count
= 0, loop_count
= 0;
2402 int *if_stack
, *loop_stack
;
2403 int if_stack_pos
= 0, loop_stack_pos
= 0;
2406 for (i
= 0; i
< num_instructions
; i
++) {
2407 switch (mesa_instructions
[i
].Opcode
) {
2411 case OPCODE_BGNLOOP
:
2416 mesa_instructions
[i
].BranchTarget
= -1;
2423 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2424 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2426 for (i
= 0; i
< num_instructions
; i
++) {
2427 switch (mesa_instructions
[i
].Opcode
) {
2429 if_stack
[if_stack_pos
] = i
;
2433 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2434 if_stack
[if_stack_pos
- 1] = i
;
2437 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2440 case OPCODE_BGNLOOP
:
2441 loop_stack
[loop_stack_pos
] = i
;
2444 case OPCODE_ENDLOOP
:
2446 /* Rewrite any breaks/conts at this nesting level (haven't
2447 * already had a BranchTarget assigned) to point to the end
2450 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2451 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2452 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2453 if (mesa_instructions
[j
].BranchTarget
== -1) {
2454 mesa_instructions
[j
].BranchTarget
= i
;
2458 /* The loop ends point at each other. */
2459 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2460 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2463 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
2464 function_entry
*entry
= (function_entry
*)iter
.get();
2466 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2467 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2479 print_program(struct prog_instruction
*mesa_instructions
,
2480 ir_instruction
**mesa_instruction_annotation
,
2481 int num_instructions
)
2483 ir_instruction
*last_ir
= NULL
;
2487 for (i
= 0; i
< num_instructions
; i
++) {
2488 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2489 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2491 fprintf(stdout
, "%3d: ", i
);
2493 if (last_ir
!= ir
&& ir
) {
2496 for (j
= 0; j
< indent
; j
++) {
2497 fprintf(stdout
, " ");
2503 fprintf(stdout
, " "); /* line number spacing. */
2506 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2507 PROG_PRINT_DEBUG
, NULL
);
2513 * Count resources used by the given gpu program (number of texture
2517 count_resources(struct gl_program
*prog
)
2521 prog
->SamplersUsed
= 0;
2523 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
2524 struct prog_instruction
*inst
= &prog
->Instructions
[i
];
2526 if (_mesa_is_tex_instruction(inst
->Opcode
)) {
2527 prog
->SamplerTargets
[inst
->TexSrcUnit
] =
2528 (gl_texture_index
)inst
->TexSrcTarget
;
2529 prog
->SamplersUsed
|= 1 << inst
->TexSrcUnit
;
2530 if (inst
->TexShadow
) {
2531 prog
->ShadowSamplers
|= 1 << inst
->TexSrcUnit
;
2536 _mesa_update_shader_textures_used(prog
);
2541 * Check if the given vertex/fragment/shader program is within the
2542 * resource limits of the context (number of texture units, etc).
2543 * If any of those checks fail, record a linker error.
2545 * XXX more checks are needed...
2548 check_resources(const struct gl_context
*ctx
,
2549 struct gl_shader_program
*shader_program
,
2550 struct gl_program
*prog
)
2552 switch (prog
->Target
) {
2553 case GL_VERTEX_PROGRAM_ARB
:
2554 if (_mesa_bitcount(prog
->SamplersUsed
) >
2555 ctx
->Const
.MaxVertexTextureImageUnits
) {
2556 linker_error(shader_program
,
2557 "Too many vertex shader texture samplers");
2559 if (prog
->Parameters
->NumParameters
> MAX_UNIFORMS
) {
2560 linker_error(shader_program
, "Too many vertex shader constants");
2563 case MESA_GEOMETRY_PROGRAM
:
2564 if (_mesa_bitcount(prog
->SamplersUsed
) >
2565 ctx
->Const
.MaxGeometryTextureImageUnits
) {
2566 linker_error(shader_program
,
2567 "Too many geometry shader texture samplers");
2569 if (prog
->Parameters
->NumParameters
>
2570 MAX_GEOMETRY_UNIFORM_COMPONENTS
/ 4) {
2571 linker_error(shader_program
, "Too many geometry shader constants");
2574 case GL_FRAGMENT_PROGRAM_ARB
:
2575 if (_mesa_bitcount(prog
->SamplersUsed
) >
2576 ctx
->Const
.MaxTextureImageUnits
) {
2577 linker_error(shader_program
,
2578 "Too many fragment shader texture samplers");
2580 if (prog
->Parameters
->NumParameters
> MAX_UNIFORMS
) {
2581 linker_error(shader_program
, "Too many fragment shader constants");
2585 _mesa_problem(ctx
, "unexpected program type in check_resources()");
2591 struct uniform_sort
{
2592 struct gl_uniform
*u
;
2596 /* The shader_program->Uniforms list is almost sorted in increasing
2597 * uniform->{Frag,Vert}Pos locations, but not quite when there are
2598 * uniforms shared between targets. We need to add parameters in
2599 * increasing order for the targets.
2602 sort_uniforms(const void *a
, const void *b
)
2604 struct uniform_sort
*u1
= (struct uniform_sort
*)a
;
2605 struct uniform_sort
*u2
= (struct uniform_sort
*)b
;
2607 return u1
->pos
- u2
->pos
;
2610 /* Add the uniforms to the parameters. The linker chose locations
2611 * in our parameters lists (which weren't created yet), which the
2612 * uniforms code will use to poke values into our parameters list
2613 * when uniforms are updated.
2616 add_uniforms_to_parameters_list(struct gl_shader_program
*shader_program
,
2617 struct gl_shader
*shader
,
2618 struct gl_program
*prog
)
2621 unsigned int next_sampler
= 0, num_uniforms
= 0;
2622 struct uniform_sort
*sorted_uniforms
;
2624 sorted_uniforms
= ralloc_array(NULL
, struct uniform_sort
,
2625 shader_program
->Uniforms
->NumUniforms
);
2627 for (i
= 0; i
< shader_program
->Uniforms
->NumUniforms
; i
++) {
2628 struct gl_uniform
*uniform
= shader_program
->Uniforms
->Uniforms
+ i
;
2629 int parameter_index
= -1;
2631 switch (shader
->Type
) {
2632 case GL_VERTEX_SHADER
:
2633 parameter_index
= uniform
->VertPos
;
2635 case GL_FRAGMENT_SHADER
:
2636 parameter_index
= uniform
->FragPos
;
2638 case GL_GEOMETRY_SHADER
:
2639 parameter_index
= uniform
->GeomPos
;
2643 /* Only add uniforms used in our target. */
2644 if (parameter_index
!= -1) {
2645 sorted_uniforms
[num_uniforms
].pos
= parameter_index
;
2646 sorted_uniforms
[num_uniforms
].u
= uniform
;
2651 qsort(sorted_uniforms
, num_uniforms
, sizeof(struct uniform_sort
),
2654 for (i
= 0; i
< num_uniforms
; i
++) {
2655 struct gl_uniform
*uniform
= sorted_uniforms
[i
].u
;
2656 int parameter_index
= sorted_uniforms
[i
].pos
;
2657 const glsl_type
*type
= uniform
->Type
;
2660 if (type
->is_vector() ||
2661 type
->is_scalar()) {
2662 size
= type
->vector_elements
;
2664 size
= type_size(type
) * 4;
2667 gl_register_file file
;
2668 if (type
->is_sampler() ||
2669 (type
->is_array() && type
->fields
.array
->is_sampler())) {
2670 file
= PROGRAM_SAMPLER
;
2672 file
= PROGRAM_UNIFORM
;
2675 GLint index
= _mesa_lookup_parameter_index(prog
->Parameters
, -1,
2679 index
= _mesa_add_parameter(prog
->Parameters
, file
,
2680 uniform
->Name
, size
, type
->gl_type
,
2683 /* Sampler uniform values are stored in prog->SamplerUnits,
2684 * and the entry in that array is selected by this index we
2685 * store in ParameterValues[].
2687 if (file
== PROGRAM_SAMPLER
) {
2688 for (unsigned int j
= 0; j
< size
/ 4; j
++)
2689 prog
->Parameters
->ParameterValues
[index
+ j
][0].f
= next_sampler
++;
2692 /* The location chosen in the Parameters list here (returned
2693 * from _mesa_add_uniform) has to match what the linker chose.
2695 if (index
!= parameter_index
) {
2696 linker_error(shader_program
,
2697 "Allocation of uniform `%s' to target failed "
2699 uniform
->Name
, index
, parameter_index
);
2704 ralloc_free(sorted_uniforms
);
2708 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
2709 struct gl_shader_program
*shader_program
,
2710 const char *name
, const glsl_type
*type
,
2713 if (type
->is_record()) {
2714 ir_constant
*field_constant
;
2716 field_constant
= (ir_constant
*)val
->components
.get_head();
2718 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2719 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
2720 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
2721 type
->fields
.structure
[i
].name
);
2722 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
2723 field_type
, field_constant
);
2724 field_constant
= (ir_constant
*)field_constant
->next
;
2729 int loc
= _mesa_get_uniform_location(ctx
, shader_program
, name
);
2732 linker_error(shader_program
,
2733 "Couldn't find uniform for initializer %s\n", name
);
2737 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
2738 ir_constant
*element
;
2739 const glsl_type
*element_type
;
2740 if (type
->is_array()) {
2741 element
= val
->array_elements
[i
];
2742 element_type
= type
->fields
.array
;
2745 element_type
= type
;
2750 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
2751 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
2752 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
2753 conv
[j
] = element
->value
.b
[j
];
2755 values
= (void *)conv
;
2756 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
2757 element_type
->vector_elements
,
2760 values
= &element
->value
;
2763 if (element_type
->is_matrix()) {
2764 _mesa_uniform_matrix(ctx
, shader_program
,
2765 element_type
->matrix_columns
,
2766 element_type
->vector_elements
,
2767 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
2768 loc
+= element_type
->matrix_columns
;
2770 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
2771 values
, element_type
->gl_type
);
2772 loc
+= type_size(element_type
);
2778 set_uniform_initializers(struct gl_context
*ctx
,
2779 struct gl_shader_program
*shader_program
)
2781 void *mem_ctx
= NULL
;
2783 for (unsigned int i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
2784 struct gl_shader
*shader
= shader_program
->_LinkedShaders
[i
];
2789 foreach_iter(exec_list_iterator
, iter
, *shader
->ir
) {
2790 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
2791 ir_variable
*var
= ir
->as_variable();
2793 if (!var
|| var
->mode
!= ir_var_uniform
|| !var
->constant_value
)
2797 mem_ctx
= ralloc_context(NULL
);
2799 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, var
->name
,
2800 var
->type
, var
->constant_value
);
2804 ralloc_free(mem_ctx
);
2808 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2809 * channels for copy propagation and updates following instructions to
2810 * use the original versions.
2812 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2813 * will occur. As an example, a TXP production before this pass:
2815 * 0: MOV TEMP[1], INPUT[4].xyyy;
2816 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2817 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2821 * 0: MOV TEMP[1], INPUT[4].xyyy;
2822 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2823 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2825 * which allows for dead code elimination on TEMP[1]'s writes.
2828 ir_to_mesa_visitor::copy_propagate(void)
2830 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2831 ir_to_mesa_instruction
*,
2832 this->next_temp
* 4);
2833 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2836 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
2837 ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
2839 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2840 || inst
->dst
.index
< this->next_temp
);
2842 /* First, do any copy propagation possible into the src regs. */
2843 for (int r
= 0; r
< 3; r
++) {
2844 ir_to_mesa_instruction
*first
= NULL
;
2846 int acp_base
= inst
->src
[r
].index
* 4;
2848 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2849 inst
->src
[r
].reladdr
)
2852 /* See if we can find entries in the ACP consisting of MOVs
2853 * from the same src register for all the swizzled channels
2854 * of this src register reference.
2856 for (int i
= 0; i
< 4; i
++) {
2857 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2858 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2865 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2870 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2871 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2879 /* We've now validated that we can copy-propagate to
2880 * replace this src register reference. Do it.
2882 inst
->src
[r
].file
= first
->src
[0].file
;
2883 inst
->src
[r
].index
= first
->src
[0].index
;
2886 for (int i
= 0; i
< 4; i
++) {
2887 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2888 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2889 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2892 inst
->src
[r
].swizzle
= swizzle
;
2897 case OPCODE_BGNLOOP
:
2898 case OPCODE_ENDLOOP
:
2899 /* End of a basic block, clear the ACP entirely. */
2900 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2909 /* Clear all channels written inside the block from the ACP, but
2910 * leaving those that were not touched.
2912 for (int r
= 0; r
< this->next_temp
; r
++) {
2913 for (int c
= 0; c
< 4; c
++) {
2914 if (!acp
[4 * r
+ c
])
2917 if (acp_level
[4 * r
+ c
] >= level
)
2918 acp
[4 * r
+ c
] = NULL
;
2921 if (inst
->op
== OPCODE_ENDIF
)
2926 /* Continuing the block, clear any written channels from
2929 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2930 /* Any temporary might be written, so no copy propagation
2931 * across this instruction.
2933 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2934 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2935 inst
->dst
.reladdr
) {
2936 /* Any output might be written, so no copy propagation
2937 * from outputs across this instruction.
2939 for (int r
= 0; r
< this->next_temp
; r
++) {
2940 for (int c
= 0; c
< 4; c
++) {
2941 if (!acp
[4 * r
+ c
])
2944 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2945 acp
[4 * r
+ c
] = NULL
;
2948 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2949 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2950 /* Clear where it's used as dst. */
2951 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2952 for (int c
= 0; c
< 4; c
++) {
2953 if (inst
->dst
.writemask
& (1 << c
)) {
2954 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2959 /* Clear where it's used as src. */
2960 for (int r
= 0; r
< this->next_temp
; r
++) {
2961 for (int c
= 0; c
< 4; c
++) {
2962 if (!acp
[4 * r
+ c
])
2965 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2967 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2968 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2969 inst
->dst
.writemask
& (1 << src_chan
))
2971 acp
[4 * r
+ c
] = NULL
;
2979 /* If this is a copy, add it to the ACP. */
2980 if (inst
->op
== OPCODE_MOV
&&
2981 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2982 !inst
->dst
.reladdr
&&
2984 !inst
->src
[0].reladdr
&&
2985 !inst
->src
[0].negate
) {
2986 for (int i
= 0; i
< 4; i
++) {
2987 if (inst
->dst
.writemask
& (1 << i
)) {
2988 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2989 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2995 ralloc_free(acp_level
);
3001 * Convert a shader's GLSL IR into a Mesa gl_program.
3003 static struct gl_program
*
3004 get_mesa_program(struct gl_context
*ctx
,
3005 struct gl_shader_program
*shader_program
,
3006 struct gl_shader
*shader
)
3008 ir_to_mesa_visitor v
;
3009 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
3010 ir_instruction
**mesa_instruction_annotation
;
3012 struct gl_program
*prog
;
3014 const char *target_string
;
3016 struct gl_shader_compiler_options
*options
=
3017 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
3019 switch (shader
->Type
) {
3020 case GL_VERTEX_SHADER
:
3021 target
= GL_VERTEX_PROGRAM_ARB
;
3022 target_string
= "vertex";
3024 case GL_FRAGMENT_SHADER
:
3025 target
= GL_FRAGMENT_PROGRAM_ARB
;
3026 target_string
= "fragment";
3028 case GL_GEOMETRY_SHADER
:
3029 target
= GL_GEOMETRY_PROGRAM_NV
;
3030 target_string
= "geometry";
3033 assert(!"should not be reached");
3037 validate_ir_tree(shader
->ir
);
3039 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
3042 prog
->Parameters
= _mesa_new_parameter_list();
3045 v
.shader_program
= shader_program
;
3046 v
.options
= options
;
3048 add_uniforms_to_parameters_list(shader_program
, shader
, prog
);
3050 /* Emit Mesa IR for main(). */
3051 visit_exec_list(shader
->ir
, &v
);
3052 v
.emit(NULL
, OPCODE_END
);
3054 /* Now emit bodies for any functions that were used. */
3056 progress
= GL_FALSE
;
3058 foreach_iter(exec_list_iterator
, iter
, v
.function_signatures
) {
3059 function_entry
*entry
= (function_entry
*)iter
.get();
3061 if (!entry
->bgn_inst
) {
3062 v
.current_function
= entry
;
3064 entry
->bgn_inst
= v
.emit(NULL
, OPCODE_BGNSUB
);
3065 entry
->bgn_inst
->function
= entry
;
3067 visit_exec_list(&entry
->sig
->body
, &v
);
3069 ir_to_mesa_instruction
*last
;
3070 last
= (ir_to_mesa_instruction
*)v
.instructions
.get_tail();
3071 if (last
->op
!= OPCODE_RET
)
3072 v
.emit(NULL
, OPCODE_RET
);
3074 ir_to_mesa_instruction
*end
;
3075 end
= v
.emit(NULL
, OPCODE_ENDSUB
);
3076 end
->function
= entry
;
3083 prog
->NumTemporaries
= v
.next_temp
;
3085 int num_instructions
= 0;
3086 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
3091 (struct prog_instruction
*)calloc(num_instructions
,
3092 sizeof(*mesa_instructions
));
3093 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
3098 /* Convert ir_mesa_instructions into prog_instructions.
3100 mesa_inst
= mesa_instructions
;
3102 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
3103 const ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
3105 mesa_inst
->Opcode
= inst
->op
;
3106 mesa_inst
->CondUpdate
= inst
->cond_update
;
3108 mesa_inst
->SaturateMode
= SATURATE_ZERO_ONE
;
3109 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
3110 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
3111 mesa_inst
->DstReg
.CondMask
= inst
->dst
.cond_mask
;
3112 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
3113 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
3114 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
3115 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
3116 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
3117 mesa_inst
->TexSrcUnit
= inst
->sampler
;
3118 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
3119 mesa_inst
->TexShadow
= inst
->tex_shadow
;
3120 mesa_instruction_annotation
[i
] = inst
->ir
;
3122 /* Set IndirectRegisterFiles. */
3123 if (mesa_inst
->DstReg
.RelAddr
)
3124 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
3126 /* Update program's bitmask of indirectly accessed register files */
3127 for (unsigned src
= 0; src
< 3; src
++)
3128 if (mesa_inst
->SrcReg
[src
].RelAddr
)
3129 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
3131 switch (mesa_inst
->Opcode
) {
3133 if (options
->MaxIfDepth
== 0) {
3134 linker_warning(shader_program
,
3135 "Couldn't flatten if-statement. "
3136 "This will likely result in software "
3137 "rasterization.\n");
3140 case OPCODE_BGNLOOP
:
3141 if (options
->EmitNoLoops
) {
3142 linker_warning(shader_program
,
3143 "Couldn't unroll loop. "
3144 "This will likely result in software "
3145 "rasterization.\n");
3149 if (options
->EmitNoCont
) {
3150 linker_warning(shader_program
,
3151 "Couldn't lower continue-statement. "
3152 "This will likely result in software "
3153 "rasterization.\n");
3157 inst
->function
->inst
= i
;
3158 mesa_inst
->Comment
= strdup(inst
->function
->sig
->function_name());
3161 mesa_inst
->Comment
= strdup(inst
->function
->sig
->function_name());
3164 mesa_inst
->BranchTarget
= inst
->function
->sig_id
; /* rewritten later */
3167 prog
->NumAddressRegs
= 1;
3176 if (!shader_program
->LinkStatus
)
3180 if (!shader_program
->LinkStatus
) {
3181 free(mesa_instructions
);
3182 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
3186 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
3188 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3190 printf("GLSL IR for linked %s program %d:\n", target_string
,
3191 shader_program
->Name
);
3192 _mesa_print_ir(shader
->ir
, NULL
);
3195 printf("Mesa IR for linked %s program %d:\n", target_string
,
3196 shader_program
->Name
);
3197 print_program(mesa_instructions
, mesa_instruction_annotation
,
3201 prog
->Instructions
= mesa_instructions
;
3202 prog
->NumInstructions
= num_instructions
;
3204 do_set_program_inouts(shader
->ir
, prog
);
3205 count_resources(prog
);
3207 check_resources(ctx
, shader_program
, prog
);
3209 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
3211 if ((ctx
->Shader
.Flags
& GLSL_NO_OPT
) == 0) {
3212 _mesa_optimize_program(ctx
, prog
);
3222 * Called via ctx->Driver.LinkShader()
3223 * This actually involves converting GLSL IR into Mesa gl_programs with
3224 * code lowering and other optimizations.
3227 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3229 assert(prog
->LinkStatus
);
3231 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
3232 if (prog
->_LinkedShaders
[i
] == NULL
)
3236 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3237 const struct gl_shader_compiler_options
*options
=
3238 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
3244 do_mat_op_to_vec(ir
);
3245 lower_instructions(ir
, (MOD_TO_FRACT
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3246 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3247 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3249 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
3251 progress
= do_common_optimization(ir
, true, options
->MaxUnrollIterations
) || progress
;
3253 progress
= lower_quadop_vector(ir
, true) || progress
;
3255 if (options
->MaxIfDepth
== 0)
3256 progress
= lower_discard(ir
) || progress
;
3258 progress
= lower_if_to_cond_assign(ir
, options
->MaxIfDepth
) || progress
;
3260 if (options
->EmitNoNoise
)
3261 progress
= lower_noise(ir
) || progress
;
3263 /* If there are forms of indirect addressing that the driver
3264 * cannot handle, perform the lowering pass.
3266 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3267 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3269 lower_variable_index_to_cond_assign(ir
,
3270 options
->EmitNoIndirectInput
,
3271 options
->EmitNoIndirectOutput
,
3272 options
->EmitNoIndirectTemp
,
3273 options
->EmitNoIndirectUniform
)
3276 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3279 validate_ir_tree(ir
);
3282 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
3283 struct gl_program
*linked_prog
;
3285 if (prog
->_LinkedShaders
[i
] == NULL
)
3288 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3291 static const GLenum targets
[] = {
3292 GL_VERTEX_PROGRAM_ARB
,
3293 GL_FRAGMENT_PROGRAM_ARB
,
3294 GL_GEOMETRY_PROGRAM_NV
3297 if (i
== MESA_SHADER_VERTEX
) {
3298 ((struct gl_vertex_program
*)linked_prog
)->UsesClipDistance
3299 = prog
->Vert
.UsesClipDistance
;
3302 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3304 if (!ctx
->Driver
.ProgramStringNotify(ctx
, targets
[i
], linked_prog
)) {
3309 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
3317 * Compile a GLSL shader. Called via glCompileShader().
3320 _mesa_glsl_compile_shader(struct gl_context
*ctx
, struct gl_shader
*shader
)
3322 struct _mesa_glsl_parse_state
*state
=
3323 new(shader
) _mesa_glsl_parse_state(ctx
, shader
->Type
, shader
);
3325 const char *source
= shader
->Source
;
3326 /* Check if the user called glCompileShader without first calling
3327 * glShaderSource. This should fail to compile, but not raise a GL_ERROR.
3329 if (source
== NULL
) {
3330 shader
->CompileStatus
= GL_FALSE
;
3334 state
->error
= preprocess(state
, &source
, &state
->info_log
,
3335 &ctx
->Extensions
, ctx
->API
);
3337 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3338 printf("GLSL source for %s shader %d:\n",
3339 _mesa_glsl_shader_target_name(state
->target
), shader
->Name
);
3340 printf("%s\n", shader
->Source
);
3343 if (!state
->error
) {
3344 _mesa_glsl_lexer_ctor(state
, source
);
3345 _mesa_glsl_parse(state
);
3346 _mesa_glsl_lexer_dtor(state
);
3349 ralloc_free(shader
->ir
);
3350 shader
->ir
= new(shader
) exec_list
;
3351 if (!state
->error
&& !state
->translation_unit
.is_empty())
3352 _mesa_ast_to_hir(shader
->ir
, state
);
3354 if (!state
->error
&& !shader
->ir
->is_empty()) {
3355 validate_ir_tree(shader
->ir
);
3357 /* Do some optimization at compile time to reduce shader IR size
3358 * and reduce later work if the same shader is linked multiple times
3360 while (do_common_optimization(shader
->ir
, false, 32))
3363 validate_ir_tree(shader
->ir
);
3366 shader
->symbols
= state
->symbols
;
3368 shader
->CompileStatus
= !state
->error
;
3369 shader
->InfoLog
= state
->info_log
;
3370 shader
->Version
= state
->language_version
;
3371 memcpy(shader
->builtins_to_link
, state
->builtins_to_link
,
3372 sizeof(shader
->builtins_to_link
[0]) * state
->num_builtins_to_link
);
3373 shader
->num_builtins_to_link
= state
->num_builtins_to_link
;
3375 if (ctx
->Shader
.Flags
& GLSL_LOG
) {
3376 _mesa_write_shader_to_file(shader
);
3379 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3380 if (shader
->CompileStatus
) {
3381 printf("GLSL IR for shader %d:\n", shader
->Name
);
3382 _mesa_print_ir(shader
->ir
, NULL
);
3385 printf("GLSL shader %d failed to compile.\n", shader
->Name
);
3387 if (shader
->InfoLog
&& shader
->InfoLog
[0] != 0) {
3388 printf("GLSL shader %d info log:\n", shader
->Name
);
3389 printf("%s\n", shader
->InfoLog
);
3393 /* Retain any live IR, but trash the rest. */
3394 reparent_ir(shader
->ir
, shader
->ir
);
3401 * Link a GLSL shader program. Called via glLinkProgram().
3404 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3408 _mesa_clear_shader_program_data(ctx
, prog
);
3410 prog
->LinkStatus
= GL_TRUE
;
3412 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3413 if (!prog
->Shaders
[i
]->CompileStatus
) {
3414 linker_error(prog
, "linking with uncompiled shader");
3415 prog
->LinkStatus
= GL_FALSE
;
3419 if (prog
->LinkStatus
) {
3420 link_shaders(ctx
, prog
);
3423 if (prog
->LinkStatus
) {
3424 if (!ctx
->Driver
.LinkShader(ctx
, prog
)) {
3425 prog
->LinkStatus
= GL_FALSE
;
3429 set_uniform_initializers(ctx
, prog
);
3431 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3432 if (!prog
->LinkStatus
) {
3433 printf("GLSL shader program %d failed to link\n", prog
->Name
);
3436 if (prog
->InfoLog
&& prog
->InfoLog
[0] != 0) {
3437 printf("GLSL shader program %d info log:\n", prog
->Name
);
3438 printf("%s\n", prog
->InfoLog
);