2 * Mesa 3-D graphics library
4 * Copyright (C) 2009 VMware, Inc. All Rights Reserved.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VMWARE BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #include "main/glheader.h"
27 #include "main/context.h"
28 #include "main/macros.h"
30 #include "prog_instruction.h"
31 #include "prog_optimize.h"
32 #include "prog_print.h"
35 #define MAX_LOOP_NESTING 50
36 /* MAX_PROGRAM_TEMPS is a low number (256), and we want to be able to
37 * register allocate many temporary values into that small number of
38 * temps. So allow large temporary indices coming into the register
41 #define REG_ALLOCATE_MAX_PROGRAM_TEMPS ((1 << INST_INDEX_BITS) - 1)
43 static GLboolean dbg
= GL_FALSE
;
48 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
49 * are read from the given src in this instruction, We also provide
50 * one optional masks which may mask other components in the dst
54 get_src_arg_mask(const struct prog_instruction
*inst
,
55 GLuint arg
, GLuint dst_mask
)
57 GLuint read_mask
, channel_mask
;
60 assert(arg
< _mesa_num_inst_src_regs(inst
->Opcode
));
62 /* Form the dst register, find the written channels */
63 switch (inst
->Opcode
) {
79 channel_mask
= inst
->DstReg
.WriteMask
& dst_mask
;
88 channel_mask
= WRITEMASK_X
;
91 channel_mask
= WRITEMASK_XY
;
95 channel_mask
= WRITEMASK_XYZ
;
98 channel_mask
= WRITEMASK_XYZW
;
102 /* Now, given the src swizzle and the written channels, find which
103 * components are actually read
106 for (comp
= 0; comp
< 4; ++comp
) {
107 const GLuint coord
= GET_SWZ(inst
->SrcReg
[arg
].Swizzle
, comp
);
108 if (channel_mask
& (1 << comp
) && coord
<= SWIZZLE_W
)
109 read_mask
|= 1 << coord
;
117 * For a MOV instruction, compute a write mask when src register also has
121 get_dst_mask_for_mov(const struct prog_instruction
*mov
, GLuint src_mask
)
123 const GLuint mask
= mov
->DstReg
.WriteMask
;
125 GLuint updated_mask
= 0x0;
127 assert(mov
->Opcode
== OPCODE_MOV
);
129 for (comp
= 0; comp
< 4; ++comp
) {
131 if ((mask
& (1 << comp
)) == 0)
133 src_comp
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, comp
);
134 if ((src_mask
& (1 << src_comp
)) == 0)
136 updated_mask
|= 1 << comp
;
144 * Ensure that the swizzle is regular. That is, all of the swizzle
145 * terms are SWIZZLE_X,Y,Z,W and not SWIZZLE_ZERO or SWIZZLE_ONE.
148 is_swizzle_regular(GLuint swz
)
150 return GET_SWZ(swz
,0) <= SWIZZLE_W
&&
151 GET_SWZ(swz
,1) <= SWIZZLE_W
&&
152 GET_SWZ(swz
,2) <= SWIZZLE_W
&&
153 GET_SWZ(swz
,3) <= SWIZZLE_W
;
158 * In 'prog' remove instruction[i] if removeFlags[i] == TRUE.
159 * \return number of instructions removed
162 remove_instructions(struct gl_program
*prog
, const GLboolean
*removeFlags
)
164 GLint i
, removeEnd
= 0, removeCount
= 0;
165 GLuint totalRemoved
= 0;
168 for (i
= prog
->NumInstructions
- 1; i
>= 0; i
--) {
169 if (removeFlags
[i
]) {
171 if (removeCount
== 0) {
172 /* begin a run of instructions to remove */
177 /* extend the run of instructions to remove */
182 /* don't remove this instruction, but check if the preceeding
183 * instructions are to be removed.
185 if (removeCount
> 0) {
186 GLint removeStart
= removeEnd
- removeCount
+ 1;
187 _mesa_delete_instructions(prog
, removeStart
, removeCount
);
188 removeStart
= removeCount
= 0; /* reset removal info */
192 /* Finish removing if the first instruction was to be removed. */
193 if (removeCount
> 0) {
194 GLint removeStart
= removeEnd
- removeCount
+ 1;
195 _mesa_delete_instructions(prog
, removeStart
, removeCount
);
202 * Remap register indexes according to map.
203 * \param prog the program to search/replace
204 * \param file the type of register file to search/replace
205 * \param map maps old register indexes to new indexes
208 replace_regs(struct gl_program
*prog
, gl_register_file file
, const GLint map
[])
212 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
213 struct prog_instruction
*inst
= prog
->Instructions
+ i
;
214 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
216 for (j
= 0; j
< numSrc
; j
++) {
217 if (inst
->SrcReg
[j
].File
== file
) {
218 GLuint index
= inst
->SrcReg
[j
].Index
;
219 assert(map
[index
] >= 0);
220 inst
->SrcReg
[j
].Index
= map
[index
];
223 if (inst
->DstReg
.File
== file
) {
224 const GLuint index
= inst
->DstReg
.Index
;
225 assert(map
[index
] >= 0);
226 inst
->DstReg
.Index
= map
[index
];
233 * Remove dead instructions from the given program.
234 * This is very primitive for now. Basically look for temp registers
235 * that are written to but never read. Remove any instructions that
236 * write to such registers. Be careful with condition code setters.
239 _mesa_remove_dead_code_global(struct gl_program
*prog
)
241 GLboolean tempRead
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
][4];
242 GLboolean
*removeInst
; /* per-instruction removal flag */
243 GLuint i
, rem
= 0, comp
;
245 memset(tempRead
, 0, sizeof(tempRead
));
248 printf("Optimize: Begin dead code removal\n");
249 /*_mesa_print_program(prog);*/
253 calloc(prog
->NumInstructions
, sizeof(GLboolean
));
255 /* Determine which temps are read and written */
256 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
257 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
258 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
262 for (j
= 0; j
< numSrc
; j
++) {
263 if (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
) {
264 const GLuint index
= inst
->SrcReg
[j
].Index
;
266 assert(index
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
);
267 read_mask
= get_src_arg_mask(inst
, j
, NO_MASK
);
269 if (inst
->SrcReg
[j
].RelAddr
) {
271 printf("abort remove dead code (indirect temp)\n");
275 for (comp
= 0; comp
< 4; comp
++) {
276 const GLuint swz
= GET_SWZ(inst
->SrcReg
[j
].Swizzle
, comp
);
277 if (swz
<= SWIZZLE_W
) {
278 if ((read_mask
& (1 << swz
)) == 0)
280 tempRead
[index
][swz
] = GL_TRUE
;
287 if (inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
288 assert(inst
->DstReg
.Index
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
);
290 if (inst
->DstReg
.RelAddr
) {
292 printf("abort remove dead code (indirect temp)\n");
298 /* find instructions that write to dead registers, flag for removal */
299 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
300 struct prog_instruction
*inst
= prog
->Instructions
+ i
;
301 const GLuint numDst
= _mesa_num_inst_dst_regs(inst
->Opcode
);
303 if (numDst
!= 0 && inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
304 GLint chan
, index
= inst
->DstReg
.Index
;
306 for (chan
= 0; chan
< 4; chan
++) {
307 if (!tempRead
[index
][chan
] &&
308 inst
->DstReg
.WriteMask
& (1 << chan
)) {
310 printf("Remove writemask on %u.%c\n", i
,
311 chan
== 3 ? 'w' : 'x' + chan
);
313 inst
->DstReg
.WriteMask
&= ~(1 << chan
);
318 if (inst
->DstReg
.WriteMask
== 0) {
319 /* If we cleared all writes, the instruction can be removed. */
321 printf("Remove instruction %u: \n", i
);
322 removeInst
[i
] = GL_TRUE
;
327 /* now remove the instructions which aren't needed */
328 rem
= remove_instructions(prog
, removeInst
);
331 printf("Optimize: End dead code removal.\n");
332 printf(" %u channel writes removed\n", rem
);
333 printf(" %u instructions removed\n", rem
);
334 /*_mesa_print_program(prog);*/
353 * Scan forward in program from 'start' for the next occurances of TEMP[index].
354 * We look if an instruction reads the component given by the masks and if they
356 * Return READ, WRITE, FLOW or END to indicate the next usage or an indicator
357 * that we can't look further.
360 find_next_use(const struct gl_program
*prog
,
367 for (i
= start
; i
< prog
->NumInstructions
; i
++) {
368 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
369 switch (inst
->Opcode
) {
385 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
387 for (j
= 0; j
< numSrc
; j
++) {
388 if (inst
->SrcReg
[j
].RelAddr
||
389 (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
&&
390 inst
->SrcReg
[j
].Index
== (GLint
)index
&&
391 (get_src_arg_mask(inst
,j
,NO_MASK
) & mask
)))
394 if (_mesa_num_inst_dst_regs(inst
->Opcode
) == 1 &&
395 inst
->DstReg
.File
== PROGRAM_TEMPORARY
&&
396 inst
->DstReg
.Index
== index
) {
397 mask
&= ~inst
->DstReg
.WriteMask
;
409 * Is the given instruction opcode a flow-control opcode?
410 * XXX maybe move this into prog_instruction.[ch]
413 _mesa_is_flow_control_opcode(enum prog_opcode opcode
)
435 * Test if the given instruction is a simple MOV (no conditional updating,
436 * not relative addressing, no negation/abs, etc).
439 can_downward_mov_be_modifed(const struct prog_instruction
*mov
)
442 mov
->Opcode
== OPCODE_MOV
&&
443 mov
->SrcReg
[0].RelAddr
== 0 &&
444 mov
->SrcReg
[0].Negate
== 0 &&
445 mov
->DstReg
.RelAddr
== 0;
450 can_upward_mov_be_modifed(const struct prog_instruction
*mov
)
453 can_downward_mov_be_modifed(mov
) &&
454 mov
->DstReg
.File
== PROGRAM_TEMPORARY
&&
460 * Try to remove use of extraneous MOV instructions, to free them up for dead
464 _mesa_remove_extra_move_use(struct gl_program
*prog
)
469 printf("Optimize: Begin remove extra move use\n");
470 _mesa_print_program(prog
);
474 * Look for sequences such as this:
477 * FOO tmpY, tmpX, arg1;
481 * FOO tmpY, arg0, arg1;
484 for (i
= 0; i
+ 1 < prog
->NumInstructions
; i
++) {
485 const struct prog_instruction
*mov
= prog
->Instructions
+ i
;
486 GLuint dst_mask
, src_mask
;
487 if (can_upward_mov_be_modifed(mov
) == GL_FALSE
)
490 /* Scanning the code, we maintain the components which are still active in
493 dst_mask
= mov
->DstReg
.WriteMask
;
494 src_mask
= get_src_arg_mask(mov
, 0, NO_MASK
);
496 /* Walk through remaining instructions until the or src reg gets
497 * rewritten or we get into some flow-control, eliminating the use of
500 for (j
= i
+ 1; j
< prog
->NumInstructions
; j
++) {
501 struct prog_instruction
*inst2
= prog
->Instructions
+ j
;
504 if (_mesa_is_flow_control_opcode(inst2
->Opcode
))
507 /* First rewrite this instruction's args if appropriate. */
508 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst2
->Opcode
); arg
++) {
509 GLuint comp
, read_mask
;
511 if (inst2
->SrcReg
[arg
].File
!= mov
->DstReg
.File
||
512 inst2
->SrcReg
[arg
].Index
!= mov
->DstReg
.Index
||
513 inst2
->SrcReg
[arg
].RelAddr
)
515 read_mask
= get_src_arg_mask(inst2
, arg
, NO_MASK
);
517 /* Adjust the swizzles of inst2 to point at MOV's source if ALL the
518 * components read still come from the mov instructions
520 if (is_swizzle_regular(inst2
->SrcReg
[arg
].Swizzle
) &&
521 (read_mask
& dst_mask
) == read_mask
) {
522 for (comp
= 0; comp
< 4; comp
++) {
523 const GLuint inst2_swz
=
524 GET_SWZ(inst2
->SrcReg
[arg
].Swizzle
, comp
);
525 const GLuint s
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, inst2_swz
);
526 inst2
->SrcReg
[arg
].Swizzle
&= ~(7 << (3 * comp
));
527 inst2
->SrcReg
[arg
].Swizzle
|= s
<< (3 * comp
);
528 inst2
->SrcReg
[arg
].Negate
^= (((mov
->SrcReg
[0].Negate
>>
529 inst2_swz
) & 0x1) << comp
);
531 inst2
->SrcReg
[arg
].File
= mov
->SrcReg
[0].File
;
532 inst2
->SrcReg
[arg
].Index
= mov
->SrcReg
[0].Index
;
536 /* The source of MOV is written. This potentially deactivates some
537 * components from the src and dst of the MOV instruction
539 if (inst2
->DstReg
.File
== mov
->DstReg
.File
&&
540 (inst2
->DstReg
.RelAddr
||
541 inst2
->DstReg
.Index
== mov
->DstReg
.Index
)) {
542 dst_mask
&= ~inst2
->DstReg
.WriteMask
;
543 src_mask
= get_src_arg_mask(mov
, 0, dst_mask
);
546 /* Idem when the destination of mov is written */
547 if (inst2
->DstReg
.File
== mov
->SrcReg
[0].File
&&
548 (inst2
->DstReg
.RelAddr
||
549 inst2
->DstReg
.Index
== mov
->SrcReg
[0].Index
)) {
550 src_mask
&= ~inst2
->DstReg
.WriteMask
;
551 dst_mask
&= get_dst_mask_for_mov(mov
, src_mask
);
559 printf("Optimize: End remove extra move use.\n");
560 /*_mesa_print_program(prog);*/
566 * Complements dead_code_global. Try to remove code in block of code by
567 * carefully monitoring the swizzles. Both functions should be merged into one
568 * with a proper control flow graph
571 _mesa_remove_dead_code_local(struct gl_program
*prog
)
573 GLboolean
*removeInst
;
574 GLuint i
, arg
, rem
= 0;
577 calloc(prog
->NumInstructions
, sizeof(GLboolean
));
579 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
580 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
581 const GLuint index
= inst
->DstReg
.Index
;
582 const GLuint mask
= inst
->DstReg
.WriteMask
;
585 /* We must deactivate the pass as soon as some indirection is used */
586 if (inst
->DstReg
.RelAddr
)
588 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst
->Opcode
); arg
++)
589 if (inst
->SrcReg
[arg
].RelAddr
)
592 if (_mesa_is_flow_control_opcode(inst
->Opcode
) ||
593 _mesa_num_inst_dst_regs(inst
->Opcode
) == 0 ||
594 inst
->DstReg
.File
!= PROGRAM_TEMPORARY
||
595 inst
->DstReg
.RelAddr
)
598 use
= find_next_use(prog
, i
+1, index
, mask
);
599 if (use
== WRITE
|| use
== END
)
600 removeInst
[i
] = GL_TRUE
;
603 rem
= remove_instructions(prog
, removeInst
);
612 * Try to inject the destination of mov as the destination of inst and recompute
613 * the swizzles operators for the sources of inst if required. Return GL_TRUE
614 * of the substitution was possible, GL_FALSE otherwise
617 _mesa_merge_mov_into_inst(struct prog_instruction
*inst
,
618 const struct prog_instruction
*mov
)
620 /* Indirection table which associates destination and source components for
621 * the mov instruction
623 const GLuint mask
= get_src_arg_mask(mov
, 0, NO_MASK
);
625 /* Some components are not written by inst. We cannot remove the mov */
626 if (mask
!= (inst
->DstReg
.WriteMask
& mask
))
629 inst
->Saturate
|= mov
->Saturate
;
631 /* Depending on the instruction, we may need to recompute the swizzles.
632 * Also, some other instructions (like TEX) are not linear. We will only
633 * consider completely active sources and destinations
635 switch (inst
->Opcode
) {
637 /* Carstesian instructions: we compute the swizzle */
647 GLuint dst_to_src_comp
[4] = {0,0,0,0};
648 GLuint dst_comp
, arg
;
649 for (dst_comp
= 0; dst_comp
< 4; ++dst_comp
) {
650 if (mov
->DstReg
.WriteMask
& (1 << dst_comp
)) {
651 const GLuint src_comp
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, dst_comp
);
652 assert(src_comp
< 4);
653 dst_to_src_comp
[dst_comp
] = src_comp
;
657 /* Patch each source of the instruction */
658 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst
->Opcode
); arg
++) {
659 const GLuint arg_swz
= inst
->SrcReg
[arg
].Swizzle
;
660 inst
->SrcReg
[arg
].Swizzle
= 0;
662 /* Reset each active component of the swizzle */
663 for (dst_comp
= 0; dst_comp
< 4; ++dst_comp
) {
664 GLuint src_comp
, arg_comp
;
665 if ((mov
->DstReg
.WriteMask
& (1 << dst_comp
)) == 0)
667 src_comp
= dst_to_src_comp
[dst_comp
];
668 assert(src_comp
< 4);
669 arg_comp
= GET_SWZ(arg_swz
, src_comp
);
670 assert(arg_comp
< 4);
671 inst
->SrcReg
[arg
].Swizzle
|= arg_comp
<< (3*dst_comp
);
674 inst
->DstReg
= mov
->DstReg
;
678 /* Dot products and scalar instructions: we only change the destination */
689 inst
->DstReg
= mov
->DstReg
;
692 /* All other instructions require fully active components with no swizzle */
694 if (mov
->SrcReg
[0].Swizzle
!= SWIZZLE_XYZW
||
695 inst
->DstReg
.WriteMask
!= WRITEMASK_XYZW
)
697 inst
->DstReg
= mov
->DstReg
;
704 * Try to remove extraneous MOV instructions from the given program.
707 _mesa_remove_extra_moves(struct gl_program
*prog
)
709 GLboolean
*removeInst
; /* per-instruction removal flag */
710 GLuint i
, rem
= 0, nesting
= 0;
713 printf("Optimize: Begin remove extra moves\n");
714 _mesa_print_program(prog
);
718 calloc(prog
->NumInstructions
, sizeof(GLboolean
));
721 * Look for sequences such as this:
722 * FOO tmpX, arg0, arg1;
725 * FOO tmpY, arg0, arg1;
728 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
729 const struct prog_instruction
*mov
= prog
->Instructions
+ i
;
731 switch (mov
->Opcode
) {
744 can_downward_mov_be_modifed(mov
) &&
745 mov
->SrcReg
[0].File
== PROGRAM_TEMPORARY
&&
749 /* see if this MOV can be removed */
750 const GLuint id
= mov
->SrcReg
[0].Index
;
751 struct prog_instruction
*prevInst
;
754 /* get pointer to previous instruction */
756 while (prevI
> 0 && removeInst
[prevI
])
758 prevInst
= prog
->Instructions
+ prevI
;
760 if (prevInst
->DstReg
.File
== PROGRAM_TEMPORARY
&&
761 prevInst
->DstReg
.Index
== id
&&
762 prevInst
->DstReg
.RelAddr
== 0) {
764 const GLuint dst_mask
= prevInst
->DstReg
.WriteMask
;
765 enum inst_use next_use
= find_next_use(prog
, i
+1, id
, dst_mask
);
767 if (next_use
== WRITE
|| next_use
== END
) {
768 /* OK, we can safely remove this MOV instruction.
770 * prevI: FOO tempIndex, x, y;
771 * i: MOV z, tempIndex;
773 * prevI: FOO z, x, y;
775 if (_mesa_merge_mov_into_inst(prevInst
, mov
)) {
776 removeInst
[i
] = GL_TRUE
;
778 printf("Remove MOV at %u\n", i
);
779 printf("new prev inst %u: ", prevI
);
780 _mesa_print_instruction(prevInst
);
792 /* now remove the instructions which aren't needed */
793 rem
= remove_instructions(prog
, removeInst
);
798 printf("Optimize: End remove extra moves. %u instructions removed\n", rem
);
799 /*_mesa_print_program(prog);*/
806 /** A live register interval */
809 GLuint Reg
; /** The temporary register index */
810 GLuint Start
, End
; /** Start/end instruction numbers */
814 /** A list of register intervals */
818 struct interval Intervals
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
823 append_interval(struct interval_list
*list
, const struct interval
*inv
)
825 list
->Intervals
[list
->Num
++] = *inv
;
829 /** Insert interval inv into list, sorted by interval end */
831 insert_interval_by_end(struct interval_list
*list
, const struct interval
*inv
)
833 /* XXX we could do a binary search insertion here since list is sorted */
834 GLint i
= list
->Num
- 1;
835 while (i
>= 0 && list
->Intervals
[i
].End
> inv
->End
) {
836 list
->Intervals
[i
+ 1] = list
->Intervals
[i
];
839 list
->Intervals
[i
+ 1] = *inv
;
845 for (i
= 0; i
+ 1 < list
->Num
; i
++) {
846 assert(list
->Intervals
[i
].End
<= list
->Intervals
[i
+ 1].End
);
853 /** Remove the given interval from the interval list */
855 remove_interval(struct interval_list
*list
, const struct interval
*inv
)
857 /* XXX we could binary search since list is sorted */
859 for (k
= 0; k
< list
->Num
; k
++) {
860 if (list
->Intervals
[k
].Reg
== inv
->Reg
) {
861 /* found, remove it */
862 assert(list
->Intervals
[k
].Start
== inv
->Start
);
863 assert(list
->Intervals
[k
].End
== inv
->End
);
864 while (k
< list
->Num
- 1) {
865 list
->Intervals
[k
] = list
->Intervals
[k
+ 1];
875 /** called by qsort() */
877 compare_start(const void *a
, const void *b
)
879 const struct interval
*ia
= (const struct interval
*) a
;
880 const struct interval
*ib
= (const struct interval
*) b
;
881 if (ia
->Start
< ib
->Start
)
883 else if (ia
->Start
> ib
->Start
)
890 /** sort the interval list according to interval starts */
892 sort_interval_list_by_start(struct interval_list
*list
)
894 qsort(list
->Intervals
, list
->Num
, sizeof(struct interval
), compare_start
);
898 for (i
= 0; i
+ 1 < list
->Num
; i
++) {
899 assert(list
->Intervals
[i
].Start
<= list
->Intervals
[i
+ 1].Start
);
907 GLuint Start
, End
; /**< Start, end instructions of loop */
911 * Update the intermediate interval info for register 'index' and
915 update_interval(GLint intBegin
[], GLint intEnd
[],
916 struct loop_info
*loopStack
, GLuint loopStackDepth
,
917 GLuint index
, GLuint ic
)
923 /* If the register is used in a loop, extend its lifetime through the end
924 * of the outermost loop that doesn't contain its definition.
926 for (i
= 0; i
< loopStackDepth
; i
++) {
927 if (intBegin
[index
] < loopStack
[i
].Start
) {
928 end
= loopStack
[i
].End
;
933 /* Variables that are live at the end of a loop will also be live at the
934 * beginning, so an instruction inside of a loop should have its live
935 * interval begin at the start of the outermost loop.
937 if (loopStackDepth
> 0 && ic
> loopStack
[0].Start
&& ic
< loopStack
[0].End
) {
938 begin
= loopStack
[0].Start
;
941 assert(index
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
);
942 if (intBegin
[index
] == -1) {
943 assert(intEnd
[index
] == -1);
944 intBegin
[index
] = begin
;
954 * Find first/last instruction that references each temporary register.
957 _mesa_find_temp_intervals(const struct prog_instruction
*instructions
,
958 GLuint numInstructions
,
959 GLint intBegin
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
],
960 GLint intEnd
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
])
962 struct loop_info loopStack
[MAX_LOOP_NESTING
];
963 GLuint loopStackDepth
= 0;
966 for (i
= 0; i
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; i
++){
967 intBegin
[i
] = intEnd
[i
] = -1;
970 /* Scan instructions looking for temporary registers */
971 for (i
= 0; i
< numInstructions
; i
++) {
972 const struct prog_instruction
*inst
= instructions
+ i
;
973 if (inst
->Opcode
== OPCODE_BGNLOOP
) {
974 loopStack
[loopStackDepth
].Start
= i
;
975 loopStack
[loopStackDepth
].End
= inst
->BranchTarget
;
978 else if (inst
->Opcode
== OPCODE_ENDLOOP
) {
981 else if (inst
->Opcode
== OPCODE_CAL
) {
985 const GLuint numSrc
= 3;/*_mesa_num_inst_src_regs(inst->Opcode);*/
987 for (j
= 0; j
< numSrc
; j
++) {
988 if (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
) {
989 const GLuint index
= inst
->SrcReg
[j
].Index
;
990 if (inst
->SrcReg
[j
].RelAddr
)
992 update_interval(intBegin
, intEnd
, loopStack
, loopStackDepth
,
996 if (inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
997 const GLuint index
= inst
->DstReg
.Index
;
998 if (inst
->DstReg
.RelAddr
)
1000 update_interval(intBegin
, intEnd
, loopStack
, loopStackDepth
,
1011 * Find the live intervals for each temporary register in the program.
1012 * For register R, the interval [A,B] indicates that R is referenced
1013 * from instruction A through instruction B.
1014 * Special consideration is needed for loops and subroutines.
1015 * \return GL_TRUE if success, GL_FALSE if we cannot proceed for some reason
1018 find_live_intervals(struct gl_program
*prog
,
1019 struct interval_list
*liveIntervals
)
1021 GLint intBegin
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1022 GLint intEnd
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1026 * Note: we'll return GL_FALSE below if we find relative indexing
1027 * into the TEMP register file. We can't handle that yet.
1028 * We also give up on subroutines for now.
1032 printf("Optimize: Begin find intervals\n");
1035 /* build intermediate arrays */
1036 if (!_mesa_find_temp_intervals(prog
->Instructions
, prog
->NumInstructions
,
1040 /* Build live intervals list from intermediate arrays */
1041 liveIntervals
->Num
= 0;
1042 for (i
= 0; i
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; i
++) {
1043 if (intBegin
[i
] >= 0) {
1044 struct interval inv
;
1046 inv
.Start
= intBegin
[i
];
1047 inv
.End
= intEnd
[i
];
1048 append_interval(liveIntervals
, &inv
);
1052 /* Sort the list according to interval starts */
1053 sort_interval_list_by_start(liveIntervals
);
1056 /* print interval info */
1057 for (i
= 0; i
< liveIntervals
->Num
; i
++) {
1058 const struct interval
*inv
= liveIntervals
->Intervals
+ i
;
1059 printf("Reg[%d] live [%d, %d]:",
1060 inv
->Reg
, inv
->Start
, inv
->End
);
1063 for (j
= 0; j
< inv
->Start
; j
++)
1065 for (j
= inv
->Start
; j
<= inv
->End
; j
++)
1076 /** Scan the array of used register flags to find free entry */
1078 alloc_register(GLboolean usedRegs
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
])
1081 for (k
= 0; k
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; k
++) {
1083 usedRegs
[k
] = GL_TRUE
;
1092 * This function implements "Linear Scan Register Allocation" to reduce
1093 * the number of temporary registers used by the program.
1095 * We compute the "live interval" for all temporary registers then
1096 * examine the overlap of the intervals to allocate new registers.
1097 * Basically, if two intervals do not overlap, they can use the same register.
1100 _mesa_reallocate_registers(struct gl_program
*prog
)
1102 struct interval_list liveIntervals
;
1103 GLint registerMap
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1104 GLboolean usedRegs
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1109 printf("Optimize: Begin live-interval register reallocation\n");
1110 _mesa_print_program(prog
);
1113 for (i
= 0; i
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; i
++){
1114 registerMap
[i
] = -1;
1115 usedRegs
[i
] = GL_FALSE
;
1118 if (!find_live_intervals(prog
, &liveIntervals
)) {
1120 printf("Aborting register reallocation\n");
1125 struct interval_list activeIntervals
;
1126 activeIntervals
.Num
= 0;
1128 /* loop over live intervals, allocating a new register for each */
1129 for (i
= 0; i
< liveIntervals
.Num
; i
++) {
1130 const struct interval
*live
= liveIntervals
.Intervals
+ i
;
1133 printf("Consider register %u\n", live
->Reg
);
1135 /* Expire old intervals. Intervals which have ended with respect
1136 * to the live interval can have their remapped registers freed.
1140 for (j
= 0; j
< (GLint
) activeIntervals
.Num
; j
++) {
1141 const struct interval
*inv
= activeIntervals
.Intervals
+ j
;
1142 if (inv
->End
>= live
->Start
) {
1143 /* Stop now. Since the activeInterval list is sorted
1144 * we know we don't have to go further.
1149 /* Interval 'inv' has expired */
1150 const GLint regNew
= registerMap
[inv
->Reg
];
1151 assert(regNew
>= 0);
1154 printf(" expire interval for reg %u\n", inv
->Reg
);
1156 /* remove interval j from active list */
1157 remove_interval(&activeIntervals
, inv
);
1158 j
--; /* counter-act j++ in for-loop above */
1160 /* return register regNew to the free pool */
1162 printf(" free reg %d\n", regNew
);
1163 assert(usedRegs
[regNew
] == GL_TRUE
);
1164 usedRegs
[regNew
] = GL_FALSE
;
1169 /* find a free register for this live interval */
1171 const GLint k
= alloc_register(usedRegs
);
1173 /* out of registers, give up */
1176 registerMap
[live
->Reg
] = k
;
1177 maxTemp
= MAX2(maxTemp
, k
);
1179 printf(" remap register %u -> %d\n", live
->Reg
, k
);
1182 /* Insert this live interval into the active list which is sorted
1183 * by increasing end points.
1185 insert_interval_by_end(&activeIntervals
, live
);
1189 if (maxTemp
+ 1 < (GLint
) liveIntervals
.Num
) {
1190 /* OK, we've reduced the number of registers needed.
1191 * Scan the program and replace all the old temporary register
1192 * indexes with the new indexes.
1194 replace_regs(prog
, PROGRAM_TEMPORARY
, registerMap
);
1196 prog
->NumTemporaries
= maxTemp
+ 1;
1200 printf("Optimize: End live-interval register reallocation\n");
1201 printf("Num temp regs before: %u after: %u\n",
1202 liveIntervals
.Num
, maxTemp
+ 1);
1203 _mesa_print_program(prog
);
1210 print_it(struct gl_context
*ctx
, struct gl_program
*program
, const char *txt
) {
1211 fprintf(stderr
, "%s (%u inst):\n", txt
, program
->NumInstructions
);
1212 _mesa_print_program(program
);
1213 _mesa_print_program_parameters(ctx
, program
);
1214 fprintf(stderr
, "\n\n");
1219 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
1220 * instruction is the first instruction to write to register T0. The are
1221 * several lowering passes done in GLSL IR (e.g. branches and
1222 * relative addressing) that create a large number of conditional assignments
1223 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
1225 * Here is why this conversion is safe:
1226 * CMP T0, T1 T2 T0 can be expanded to:
1232 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
1233 * as the original program. If (T1 < 0.0) evaluates to false, executing
1234 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
1235 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
1236 * because any instruction that was going to read from T0 after this was going
1237 * to read a garbage value anyway.
1240 _mesa_simplify_cmp(struct gl_program
* program
)
1242 GLuint tempWrites
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1243 GLuint outputWrites
[MAX_PROGRAM_OUTPUTS
];
1247 printf("Optimize: Begin reads without writes\n");
1248 _mesa_print_program(program
);
1251 for (i
= 0; i
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; i
++) {
1255 for (i
= 0; i
< MAX_PROGRAM_OUTPUTS
; i
++) {
1256 outputWrites
[i
] = 0;
1259 for (i
= 0; i
< program
->NumInstructions
; i
++) {
1260 struct prog_instruction
*inst
= program
->Instructions
+ i
;
1261 GLuint prevWriteMask
;
1263 /* Give up if we encounter relative addressing or flow control. */
1264 if (_mesa_is_flow_control_opcode(inst
->Opcode
) || inst
->DstReg
.RelAddr
) {
1268 if (inst
->DstReg
.File
== PROGRAM_OUTPUT
) {
1269 assert(inst
->DstReg
.Index
< MAX_PROGRAM_OUTPUTS
);
1270 prevWriteMask
= outputWrites
[inst
->DstReg
.Index
];
1271 outputWrites
[inst
->DstReg
.Index
] |= inst
->DstReg
.WriteMask
;
1272 } else if (inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
1273 assert(inst
->DstReg
.Index
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
);
1274 prevWriteMask
= tempWrites
[inst
->DstReg
.Index
];
1275 tempWrites
[inst
->DstReg
.Index
] |= inst
->DstReg
.WriteMask
;
1277 /* No other register type can be a destination register. */
1281 /* For a CMP to be considered a conditional write, the destination
1282 * register and source register two must be the same. */
1283 if (inst
->Opcode
== OPCODE_CMP
1284 && !(inst
->DstReg
.WriteMask
& prevWriteMask
)
1285 && inst
->SrcReg
[2].File
== inst
->DstReg
.File
1286 && inst
->SrcReg
[2].Index
== inst
->DstReg
.Index
1287 && inst
->DstReg
.WriteMask
== get_src_arg_mask(inst
, 2, NO_MASK
)) {
1289 inst
->Opcode
= OPCODE_MOV
;
1290 inst
->SrcReg
[0] = inst
->SrcReg
[1];
1292 /* Unused operands are expected to have the file set to
1293 * PROGRAM_UNDEFINED. This is how _mesa_init_instructions initializes
1294 * all of the sources.
1296 inst
->SrcReg
[1].File
= PROGRAM_UNDEFINED
;
1297 inst
->SrcReg
[1].Swizzle
= SWIZZLE_NOOP
;
1298 inst
->SrcReg
[2].File
= PROGRAM_UNDEFINED
;
1299 inst
->SrcReg
[2].Swizzle
= SWIZZLE_NOOP
;
1303 printf("Optimize: End reads without writes\n");
1304 _mesa_print_program(program
);
1309 * Apply optimizations to the given program to eliminate unnecessary
1310 * instructions, temp regs, etc.
1313 _mesa_optimize_program(struct gl_context
*ctx
, struct gl_program
*program
)
1315 GLboolean any_change
;
1317 _mesa_simplify_cmp(program
);
1318 /* Stop when no modifications were output */
1320 any_change
= GL_FALSE
;
1321 _mesa_remove_extra_move_use(program
);
1322 if (_mesa_remove_dead_code_global(program
))
1323 any_change
= GL_TRUE
;
1324 if (_mesa_remove_extra_moves(program
))
1325 any_change
= GL_TRUE
;
1326 if (_mesa_remove_dead_code_local(program
))
1327 any_change
= GL_TRUE
;
1329 any_change
= _mesa_constant_fold(program
) || any_change
;
1330 _mesa_reallocate_registers(program
);
1331 } while (any_change
);