2 * Mesa 3-D graphics library
4 * Copyright (C) 2009 VMware, Inc. All Rights Reserved.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VMWARE BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #include "main/glheader.h"
27 #include "main/context.h"
28 #include "main/macros.h"
30 #include "prog_instruction.h"
31 #include "prog_optimize.h"
32 #include "prog_print.h"
35 #define MAX_LOOP_NESTING 50
36 /* MAX_PROGRAM_TEMPS is a low number (256), and we want to be able to
37 * register allocate many temporary values into that small number of
38 * temps. So allow large temporary indices coming into the register
41 #define REG_ALLOCATE_MAX_PROGRAM_TEMPS ((1 << INST_INDEX_BITS) - 1)
43 static GLboolean dbg
= GL_FALSE
;
48 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
49 * are read from the given src in this instruction, We also provide
50 * one optional masks which may mask other components in the dst
54 get_src_arg_mask(const struct prog_instruction
*inst
,
55 GLuint arg
, GLuint dst_mask
)
57 GLuint read_mask
, channel_mask
;
60 assert(arg
< _mesa_num_inst_src_regs(inst
->Opcode
));
62 /* Form the dst register, find the written channels */
63 switch (inst
->Opcode
) {
83 channel_mask
= inst
->DstReg
.WriteMask
& dst_mask
;
92 channel_mask
= WRITEMASK_X
;
95 channel_mask
= WRITEMASK_XY
;
99 channel_mask
= WRITEMASK_XYZ
;
102 channel_mask
= WRITEMASK_XYZW
;
106 /* Now, given the src swizzle and the written channels, find which
107 * components are actually read
110 for (comp
= 0; comp
< 4; ++comp
) {
111 const GLuint coord
= GET_SWZ(inst
->SrcReg
[arg
].Swizzle
, comp
);
112 if (channel_mask
& (1 << comp
) && coord
<= SWIZZLE_W
)
113 read_mask
|= 1 << coord
;
121 * For a MOV instruction, compute a write mask when src register also has
125 get_dst_mask_for_mov(const struct prog_instruction
*mov
, GLuint src_mask
)
127 const GLuint mask
= mov
->DstReg
.WriteMask
;
129 GLuint updated_mask
= 0x0;
131 assert(mov
->Opcode
== OPCODE_MOV
);
133 for (comp
= 0; comp
< 4; ++comp
) {
135 if ((mask
& (1 << comp
)) == 0)
137 src_comp
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, comp
);
138 if ((src_mask
& (1 << src_comp
)) == 0)
140 updated_mask
|= 1 << comp
;
148 * Ensure that the swizzle is regular. That is, all of the swizzle
149 * terms are SWIZZLE_X,Y,Z,W and not SWIZZLE_ZERO or SWIZZLE_ONE.
152 is_swizzle_regular(GLuint swz
)
154 return GET_SWZ(swz
,0) <= SWIZZLE_W
&&
155 GET_SWZ(swz
,1) <= SWIZZLE_W
&&
156 GET_SWZ(swz
,2) <= SWIZZLE_W
&&
157 GET_SWZ(swz
,3) <= SWIZZLE_W
;
162 * In 'prog' remove instruction[i] if removeFlags[i] == TRUE.
163 * \return number of instructions removed
166 remove_instructions(struct gl_program
*prog
, const GLboolean
*removeFlags
)
168 GLint i
, removeEnd
= 0, removeCount
= 0;
169 GLuint totalRemoved
= 0;
172 for (i
= prog
->NumInstructions
- 1; i
>= 0; i
--) {
173 if (removeFlags
[i
]) {
175 if (removeCount
== 0) {
176 /* begin a run of instructions to remove */
181 /* extend the run of instructions to remove */
186 /* don't remove this instruction, but check if the preceeding
187 * instructions are to be removed.
189 if (removeCount
> 0) {
190 GLint removeStart
= removeEnd
- removeCount
+ 1;
191 _mesa_delete_instructions(prog
, removeStart
, removeCount
);
192 removeStart
= removeCount
= 0; /* reset removal info */
196 /* Finish removing if the first instruction was to be removed. */
197 if (removeCount
> 0) {
198 GLint removeStart
= removeEnd
- removeCount
+ 1;
199 _mesa_delete_instructions(prog
, removeStart
, removeCount
);
206 * Remap register indexes according to map.
207 * \param prog the program to search/replace
208 * \param file the type of register file to search/replace
209 * \param map maps old register indexes to new indexes
212 replace_regs(struct gl_program
*prog
, gl_register_file file
, const GLint map
[])
216 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
217 struct prog_instruction
*inst
= prog
->Instructions
+ i
;
218 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
220 for (j
= 0; j
< numSrc
; j
++) {
221 if (inst
->SrcReg
[j
].File
== file
) {
222 GLuint index
= inst
->SrcReg
[j
].Index
;
223 assert(map
[index
] >= 0);
224 inst
->SrcReg
[j
].Index
= map
[index
];
227 if (inst
->DstReg
.File
== file
) {
228 const GLuint index
= inst
->DstReg
.Index
;
229 assert(map
[index
] >= 0);
230 inst
->DstReg
.Index
= map
[index
];
237 * Remove dead instructions from the given program.
238 * This is very primitive for now. Basically look for temp registers
239 * that are written to but never read. Remove any instructions that
240 * write to such registers. Be careful with condition code setters.
243 _mesa_remove_dead_code_global(struct gl_program
*prog
)
245 GLboolean tempRead
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
][4];
246 GLboolean
*removeInst
; /* per-instruction removal flag */
247 GLuint i
, rem
= 0, comp
;
249 memset(tempRead
, 0, sizeof(tempRead
));
252 printf("Optimize: Begin dead code removal\n");
253 /*_mesa_print_program(prog);*/
257 calloc(prog
->NumInstructions
, sizeof(GLboolean
));
259 /* Determine which temps are read and written */
260 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
261 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
262 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
266 for (j
= 0; j
< numSrc
; j
++) {
267 if (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
) {
268 const GLuint index
= inst
->SrcReg
[j
].Index
;
270 assert(index
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
);
271 read_mask
= get_src_arg_mask(inst
, j
, NO_MASK
);
273 if (inst
->SrcReg
[j
].RelAddr
) {
275 printf("abort remove dead code (indirect temp)\n");
279 for (comp
= 0; comp
< 4; comp
++) {
280 const GLuint swz
= GET_SWZ(inst
->SrcReg
[j
].Swizzle
, comp
);
281 if (swz
<= SWIZZLE_W
) {
282 if ((read_mask
& (1 << swz
)) == 0)
284 tempRead
[index
][swz
] = GL_TRUE
;
291 if (inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
292 const GLuint index
= inst
->DstReg
.Index
;
293 assert(index
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
);
295 if (inst
->DstReg
.RelAddr
) {
297 printf("abort remove dead code (indirect temp)\n");
303 /* find instructions that write to dead registers, flag for removal */
304 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
305 struct prog_instruction
*inst
= prog
->Instructions
+ i
;
306 const GLuint numDst
= _mesa_num_inst_dst_regs(inst
->Opcode
);
308 if (numDst
!= 0 && inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
309 GLint chan
, index
= inst
->DstReg
.Index
;
311 for (chan
= 0; chan
< 4; chan
++) {
312 if (!tempRead
[index
][chan
] &&
313 inst
->DstReg
.WriteMask
& (1 << chan
)) {
315 printf("Remove writemask on %u.%c\n", i
,
316 chan
== 3 ? 'w' : 'x' + chan
);
318 inst
->DstReg
.WriteMask
&= ~(1 << chan
);
323 if (inst
->DstReg
.WriteMask
== 0) {
324 /* If we cleared all writes, the instruction can be removed. */
326 printf("Remove instruction %u: \n", i
);
327 removeInst
[i
] = GL_TRUE
;
332 /* now remove the instructions which aren't needed */
333 rem
= remove_instructions(prog
, removeInst
);
336 printf("Optimize: End dead code removal.\n");
337 printf(" %u channel writes removed\n", rem
);
338 printf(" %u instructions removed\n", rem
);
339 /*_mesa_print_program(prog);*/
358 * Scan forward in program from 'start' for the next occurances of TEMP[index].
359 * We look if an instruction reads the component given by the masks and if they
361 * Return READ, WRITE, FLOW or END to indicate the next usage or an indicator
362 * that we can't look further.
365 find_next_use(const struct gl_program
*prog
,
372 for (i
= start
; i
< prog
->NumInstructions
; i
++) {
373 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
374 switch (inst
->Opcode
) {
390 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
392 for (j
= 0; j
< numSrc
; j
++) {
393 if (inst
->SrcReg
[j
].RelAddr
||
394 (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
&&
395 inst
->SrcReg
[j
].Index
== (GLint
)index
&&
396 (get_src_arg_mask(inst
,j
,NO_MASK
) & mask
)))
399 if (_mesa_num_inst_dst_regs(inst
->Opcode
) == 1 &&
400 inst
->DstReg
.File
== PROGRAM_TEMPORARY
&&
401 inst
->DstReg
.Index
== index
) {
402 mask
&= ~inst
->DstReg
.WriteMask
;
414 * Is the given instruction opcode a flow-control opcode?
415 * XXX maybe move this into prog_instruction.[ch]
418 _mesa_is_flow_control_opcode(enum prog_opcode opcode
)
440 * Test if the given instruction is a simple MOV (no conditional updating,
441 * not relative addressing, no negation/abs, etc).
444 can_downward_mov_be_modifed(const struct prog_instruction
*mov
)
447 mov
->Opcode
== OPCODE_MOV
&&
448 mov
->SrcReg
[0].RelAddr
== 0 &&
449 mov
->SrcReg
[0].Negate
== 0 &&
450 mov
->DstReg
.RelAddr
== 0;
455 can_upward_mov_be_modifed(const struct prog_instruction
*mov
)
458 can_downward_mov_be_modifed(mov
) &&
459 mov
->DstReg
.File
== PROGRAM_TEMPORARY
&&
465 * Try to remove use of extraneous MOV instructions, to free them up for dead
469 _mesa_remove_extra_move_use(struct gl_program
*prog
)
474 printf("Optimize: Begin remove extra move use\n");
475 _mesa_print_program(prog
);
479 * Look for sequences such as this:
482 * FOO tmpY, tmpX, arg1;
486 * FOO tmpY, arg0, arg1;
489 for (i
= 0; i
+ 1 < prog
->NumInstructions
; i
++) {
490 const struct prog_instruction
*mov
= prog
->Instructions
+ i
;
491 GLuint dst_mask
, src_mask
;
492 if (can_upward_mov_be_modifed(mov
) == GL_FALSE
)
495 /* Scanning the code, we maintain the components which are still active in
498 dst_mask
= mov
->DstReg
.WriteMask
;
499 src_mask
= get_src_arg_mask(mov
, 0, NO_MASK
);
501 /* Walk through remaining instructions until the or src reg gets
502 * rewritten or we get into some flow-control, eliminating the use of
505 for (j
= i
+ 1; j
< prog
->NumInstructions
; j
++) {
506 struct prog_instruction
*inst2
= prog
->Instructions
+ j
;
509 if (_mesa_is_flow_control_opcode(inst2
->Opcode
))
512 /* First rewrite this instruction's args if appropriate. */
513 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst2
->Opcode
); arg
++) {
514 GLuint comp
, read_mask
;
516 if (inst2
->SrcReg
[arg
].File
!= mov
->DstReg
.File
||
517 inst2
->SrcReg
[arg
].Index
!= mov
->DstReg
.Index
||
518 inst2
->SrcReg
[arg
].RelAddr
)
520 read_mask
= get_src_arg_mask(inst2
, arg
, NO_MASK
);
522 /* Adjust the swizzles of inst2 to point at MOV's source if ALL the
523 * components read still come from the mov instructions
525 if (is_swizzle_regular(inst2
->SrcReg
[arg
].Swizzle
) &&
526 (read_mask
& dst_mask
) == read_mask
) {
527 for (comp
= 0; comp
< 4; comp
++) {
528 const GLuint inst2_swz
=
529 GET_SWZ(inst2
->SrcReg
[arg
].Swizzle
, comp
);
530 const GLuint s
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, inst2_swz
);
531 inst2
->SrcReg
[arg
].Swizzle
&= ~(7 << (3 * comp
));
532 inst2
->SrcReg
[arg
].Swizzle
|= s
<< (3 * comp
);
533 inst2
->SrcReg
[arg
].Negate
^= (((mov
->SrcReg
[0].Negate
>>
534 inst2_swz
) & 0x1) << comp
);
536 inst2
->SrcReg
[arg
].File
= mov
->SrcReg
[0].File
;
537 inst2
->SrcReg
[arg
].Index
= mov
->SrcReg
[0].Index
;
541 /* The source of MOV is written. This potentially deactivates some
542 * components from the src and dst of the MOV instruction
544 if (inst2
->DstReg
.File
== mov
->DstReg
.File
&&
545 (inst2
->DstReg
.RelAddr
||
546 inst2
->DstReg
.Index
== mov
->DstReg
.Index
)) {
547 dst_mask
&= ~inst2
->DstReg
.WriteMask
;
548 src_mask
= get_src_arg_mask(mov
, 0, dst_mask
);
551 /* Idem when the destination of mov is written */
552 if (inst2
->DstReg
.File
== mov
->SrcReg
[0].File
&&
553 (inst2
->DstReg
.RelAddr
||
554 inst2
->DstReg
.Index
== mov
->SrcReg
[0].Index
)) {
555 src_mask
&= ~inst2
->DstReg
.WriteMask
;
556 dst_mask
&= get_dst_mask_for_mov(mov
, src_mask
);
564 printf("Optimize: End remove extra move use.\n");
565 /*_mesa_print_program(prog);*/
571 * Complements dead_code_global. Try to remove code in block of code by
572 * carefully monitoring the swizzles. Both functions should be merged into one
573 * with a proper control flow graph
576 _mesa_remove_dead_code_local(struct gl_program
*prog
)
578 GLboolean
*removeInst
;
579 GLuint i
, arg
, rem
= 0;
582 calloc(prog
->NumInstructions
, sizeof(GLboolean
));
584 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
585 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
586 const GLuint index
= inst
->DstReg
.Index
;
587 const GLuint mask
= inst
->DstReg
.WriteMask
;
590 /* We must deactivate the pass as soon as some indirection is used */
591 if (inst
->DstReg
.RelAddr
)
593 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst
->Opcode
); arg
++)
594 if (inst
->SrcReg
[arg
].RelAddr
)
597 if (_mesa_is_flow_control_opcode(inst
->Opcode
) ||
598 _mesa_num_inst_dst_regs(inst
->Opcode
) == 0 ||
599 inst
->DstReg
.File
!= PROGRAM_TEMPORARY
||
600 inst
->DstReg
.RelAddr
)
603 use
= find_next_use(prog
, i
+1, index
, mask
);
604 if (use
== WRITE
|| use
== END
)
605 removeInst
[i
] = GL_TRUE
;
608 rem
= remove_instructions(prog
, removeInst
);
617 * Try to inject the destination of mov as the destination of inst and recompute
618 * the swizzles operators for the sources of inst if required. Return GL_TRUE
619 * of the substitution was possible, GL_FALSE otherwise
622 _mesa_merge_mov_into_inst(struct prog_instruction
*inst
,
623 const struct prog_instruction
*mov
)
625 /* Indirection table which associates destination and source components for
626 * the mov instruction
628 const GLuint mask
= get_src_arg_mask(mov
, 0, NO_MASK
);
630 /* Some components are not written by inst. We cannot remove the mov */
631 if (mask
!= (inst
->DstReg
.WriteMask
& mask
))
634 inst
->Saturate
|= mov
->Saturate
;
636 /* Depending on the instruction, we may need to recompute the swizzles.
637 * Also, some other instructions (like TEX) are not linear. We will only
638 * consider completely active sources and destinations
640 switch (inst
->Opcode
) {
642 /* Carstesian instructions: we compute the swizzle */
652 GLuint dst_to_src_comp
[4] = {0,0,0,0};
653 GLuint dst_comp
, arg
;
654 for (dst_comp
= 0; dst_comp
< 4; ++dst_comp
) {
655 if (mov
->DstReg
.WriteMask
& (1 << dst_comp
)) {
656 const GLuint src_comp
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, dst_comp
);
657 assert(src_comp
< 4);
658 dst_to_src_comp
[dst_comp
] = src_comp
;
662 /* Patch each source of the instruction */
663 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst
->Opcode
); arg
++) {
664 const GLuint arg_swz
= inst
->SrcReg
[arg
].Swizzle
;
665 inst
->SrcReg
[arg
].Swizzle
= 0;
667 /* Reset each active component of the swizzle */
668 for (dst_comp
= 0; dst_comp
< 4; ++dst_comp
) {
669 GLuint src_comp
, arg_comp
;
670 if ((mov
->DstReg
.WriteMask
& (1 << dst_comp
)) == 0)
672 src_comp
= dst_to_src_comp
[dst_comp
];
673 assert(src_comp
< 4);
674 arg_comp
= GET_SWZ(arg_swz
, src_comp
);
675 assert(arg_comp
< 4);
676 inst
->SrcReg
[arg
].Swizzle
|= arg_comp
<< (3*dst_comp
);
679 inst
->DstReg
= mov
->DstReg
;
683 /* Dot products and scalar instructions: we only change the destination */
694 inst
->DstReg
= mov
->DstReg
;
697 /* All other instructions require fully active components with no swizzle */
699 if (mov
->SrcReg
[0].Swizzle
!= SWIZZLE_XYZW
||
700 inst
->DstReg
.WriteMask
!= WRITEMASK_XYZW
)
702 inst
->DstReg
= mov
->DstReg
;
709 * Try to remove extraneous MOV instructions from the given program.
712 _mesa_remove_extra_moves(struct gl_program
*prog
)
714 GLboolean
*removeInst
; /* per-instruction removal flag */
715 GLuint i
, rem
= 0, nesting
= 0;
718 printf("Optimize: Begin remove extra moves\n");
719 _mesa_print_program(prog
);
723 calloc(prog
->NumInstructions
, sizeof(GLboolean
));
726 * Look for sequences such as this:
727 * FOO tmpX, arg0, arg1;
730 * FOO tmpY, arg0, arg1;
733 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
734 const struct prog_instruction
*mov
= prog
->Instructions
+ i
;
736 switch (mov
->Opcode
) {
749 can_downward_mov_be_modifed(mov
) &&
750 mov
->SrcReg
[0].File
== PROGRAM_TEMPORARY
&&
754 /* see if this MOV can be removed */
755 const GLuint id
= mov
->SrcReg
[0].Index
;
756 struct prog_instruction
*prevInst
;
759 /* get pointer to previous instruction */
761 while (prevI
> 0 && removeInst
[prevI
])
763 prevInst
= prog
->Instructions
+ prevI
;
765 if (prevInst
->DstReg
.File
== PROGRAM_TEMPORARY
&&
766 prevInst
->DstReg
.Index
== id
&&
767 prevInst
->DstReg
.RelAddr
== 0) {
769 const GLuint dst_mask
= prevInst
->DstReg
.WriteMask
;
770 enum inst_use next_use
= find_next_use(prog
, i
+1, id
, dst_mask
);
772 if (next_use
== WRITE
|| next_use
== END
) {
773 /* OK, we can safely remove this MOV instruction.
775 * prevI: FOO tempIndex, x, y;
776 * i: MOV z, tempIndex;
778 * prevI: FOO z, x, y;
780 if (_mesa_merge_mov_into_inst(prevInst
, mov
)) {
781 removeInst
[i
] = GL_TRUE
;
783 printf("Remove MOV at %u\n", i
);
784 printf("new prev inst %u: ", prevI
);
785 _mesa_print_instruction(prevInst
);
797 /* now remove the instructions which aren't needed */
798 rem
= remove_instructions(prog
, removeInst
);
803 printf("Optimize: End remove extra moves. %u instructions removed\n", rem
);
804 /*_mesa_print_program(prog);*/
811 /** A live register interval */
814 GLuint Reg
; /** The temporary register index */
815 GLuint Start
, End
; /** Start/end instruction numbers */
819 /** A list of register intervals */
823 struct interval Intervals
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
828 append_interval(struct interval_list
*list
, const struct interval
*inv
)
830 list
->Intervals
[list
->Num
++] = *inv
;
834 /** Insert interval inv into list, sorted by interval end */
836 insert_interval_by_end(struct interval_list
*list
, const struct interval
*inv
)
838 /* XXX we could do a binary search insertion here since list is sorted */
839 GLint i
= list
->Num
- 1;
840 while (i
>= 0 && list
->Intervals
[i
].End
> inv
->End
) {
841 list
->Intervals
[i
+ 1] = list
->Intervals
[i
];
844 list
->Intervals
[i
+ 1] = *inv
;
850 for (i
= 0; i
+ 1 < list
->Num
; i
++) {
851 assert(list
->Intervals
[i
].End
<= list
->Intervals
[i
+ 1].End
);
858 /** Remove the given interval from the interval list */
860 remove_interval(struct interval_list
*list
, const struct interval
*inv
)
862 /* XXX we could binary search since list is sorted */
864 for (k
= 0; k
< list
->Num
; k
++) {
865 if (list
->Intervals
[k
].Reg
== inv
->Reg
) {
866 /* found, remove it */
867 assert(list
->Intervals
[k
].Start
== inv
->Start
);
868 assert(list
->Intervals
[k
].End
== inv
->End
);
869 while (k
< list
->Num
- 1) {
870 list
->Intervals
[k
] = list
->Intervals
[k
+ 1];
880 /** called by qsort() */
882 compare_start(const void *a
, const void *b
)
884 const struct interval
*ia
= (const struct interval
*) a
;
885 const struct interval
*ib
= (const struct interval
*) b
;
886 if (ia
->Start
< ib
->Start
)
888 else if (ia
->Start
> ib
->Start
)
895 /** sort the interval list according to interval starts */
897 sort_interval_list_by_start(struct interval_list
*list
)
899 qsort(list
->Intervals
, list
->Num
, sizeof(struct interval
), compare_start
);
903 for (i
= 0; i
+ 1 < list
->Num
; i
++) {
904 assert(list
->Intervals
[i
].Start
<= list
->Intervals
[i
+ 1].Start
);
912 GLuint Start
, End
; /**< Start, end instructions of loop */
916 * Update the intermediate interval info for register 'index' and
920 update_interval(GLint intBegin
[], GLint intEnd
[],
921 struct loop_info
*loopStack
, GLuint loopStackDepth
,
922 GLuint index
, GLuint ic
)
928 /* If the register is used in a loop, extend its lifetime through the end
929 * of the outermost loop that doesn't contain its definition.
931 for (i
= 0; i
< loopStackDepth
; i
++) {
932 if (intBegin
[index
] < loopStack
[i
].Start
) {
933 end
= loopStack
[i
].End
;
938 /* Variables that are live at the end of a loop will also be live at the
939 * beginning, so an instruction inside of a loop should have its live
940 * interval begin at the start of the outermost loop.
942 if (loopStackDepth
> 0 && ic
> loopStack
[0].Start
&& ic
< loopStack
[0].End
) {
943 begin
= loopStack
[0].Start
;
946 assert(index
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
);
947 if (intBegin
[index
] == -1) {
948 assert(intEnd
[index
] == -1);
949 intBegin
[index
] = begin
;
959 * Find first/last instruction that references each temporary register.
962 _mesa_find_temp_intervals(const struct prog_instruction
*instructions
,
963 GLuint numInstructions
,
964 GLint intBegin
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
],
965 GLint intEnd
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
])
967 struct loop_info loopStack
[MAX_LOOP_NESTING
];
968 GLuint loopStackDepth
= 0;
971 for (i
= 0; i
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; i
++){
972 intBegin
[i
] = intEnd
[i
] = -1;
975 /* Scan instructions looking for temporary registers */
976 for (i
= 0; i
< numInstructions
; i
++) {
977 const struct prog_instruction
*inst
= instructions
+ i
;
978 if (inst
->Opcode
== OPCODE_BGNLOOP
) {
979 loopStack
[loopStackDepth
].Start
= i
;
980 loopStack
[loopStackDepth
].End
= inst
->BranchTarget
;
983 else if (inst
->Opcode
== OPCODE_ENDLOOP
) {
986 else if (inst
->Opcode
== OPCODE_CAL
) {
990 const GLuint numSrc
= 3;/*_mesa_num_inst_src_regs(inst->Opcode);*/
992 for (j
= 0; j
< numSrc
; j
++) {
993 if (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
) {
994 const GLuint index
= inst
->SrcReg
[j
].Index
;
995 if (inst
->SrcReg
[j
].RelAddr
)
997 update_interval(intBegin
, intEnd
, loopStack
, loopStackDepth
,
1001 if (inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
1002 const GLuint index
= inst
->DstReg
.Index
;
1003 if (inst
->DstReg
.RelAddr
)
1005 update_interval(intBegin
, intEnd
, loopStack
, loopStackDepth
,
1016 * Find the live intervals for each temporary register in the program.
1017 * For register R, the interval [A,B] indicates that R is referenced
1018 * from instruction A through instruction B.
1019 * Special consideration is needed for loops and subroutines.
1020 * \return GL_TRUE if success, GL_FALSE if we cannot proceed for some reason
1023 find_live_intervals(struct gl_program
*prog
,
1024 struct interval_list
*liveIntervals
)
1026 GLint intBegin
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1027 GLint intEnd
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1031 * Note: we'll return GL_FALSE below if we find relative indexing
1032 * into the TEMP register file. We can't handle that yet.
1033 * We also give up on subroutines for now.
1037 printf("Optimize: Begin find intervals\n");
1040 /* build intermediate arrays */
1041 if (!_mesa_find_temp_intervals(prog
->Instructions
, prog
->NumInstructions
,
1045 /* Build live intervals list from intermediate arrays */
1046 liveIntervals
->Num
= 0;
1047 for (i
= 0; i
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; i
++) {
1048 if (intBegin
[i
] >= 0) {
1049 struct interval inv
;
1051 inv
.Start
= intBegin
[i
];
1052 inv
.End
= intEnd
[i
];
1053 append_interval(liveIntervals
, &inv
);
1057 /* Sort the list according to interval starts */
1058 sort_interval_list_by_start(liveIntervals
);
1061 /* print interval info */
1062 for (i
= 0; i
< liveIntervals
->Num
; i
++) {
1063 const struct interval
*inv
= liveIntervals
->Intervals
+ i
;
1064 printf("Reg[%d] live [%d, %d]:",
1065 inv
->Reg
, inv
->Start
, inv
->End
);
1068 for (j
= 0; j
< inv
->Start
; j
++)
1070 for (j
= inv
->Start
; j
<= inv
->End
; j
++)
1081 /** Scan the array of used register flags to find free entry */
1083 alloc_register(GLboolean usedRegs
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
])
1086 for (k
= 0; k
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; k
++) {
1088 usedRegs
[k
] = GL_TRUE
;
1097 * This function implements "Linear Scan Register Allocation" to reduce
1098 * the number of temporary registers used by the program.
1100 * We compute the "live interval" for all temporary registers then
1101 * examine the overlap of the intervals to allocate new registers.
1102 * Basically, if two intervals do not overlap, they can use the same register.
1105 _mesa_reallocate_registers(struct gl_program
*prog
)
1107 struct interval_list liveIntervals
;
1108 GLint registerMap
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1109 GLboolean usedRegs
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1114 printf("Optimize: Begin live-interval register reallocation\n");
1115 _mesa_print_program(prog
);
1118 for (i
= 0; i
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; i
++){
1119 registerMap
[i
] = -1;
1120 usedRegs
[i
] = GL_FALSE
;
1123 if (!find_live_intervals(prog
, &liveIntervals
)) {
1125 printf("Aborting register reallocation\n");
1130 struct interval_list activeIntervals
;
1131 activeIntervals
.Num
= 0;
1133 /* loop over live intervals, allocating a new register for each */
1134 for (i
= 0; i
< liveIntervals
.Num
; i
++) {
1135 const struct interval
*live
= liveIntervals
.Intervals
+ i
;
1138 printf("Consider register %u\n", live
->Reg
);
1140 /* Expire old intervals. Intervals which have ended with respect
1141 * to the live interval can have their remapped registers freed.
1145 for (j
= 0; j
< (GLint
) activeIntervals
.Num
; j
++) {
1146 const struct interval
*inv
= activeIntervals
.Intervals
+ j
;
1147 if (inv
->End
>= live
->Start
) {
1148 /* Stop now. Since the activeInterval list is sorted
1149 * we know we don't have to go further.
1154 /* Interval 'inv' has expired */
1155 const GLint regNew
= registerMap
[inv
->Reg
];
1156 assert(regNew
>= 0);
1159 printf(" expire interval for reg %u\n", inv
->Reg
);
1161 /* remove interval j from active list */
1162 remove_interval(&activeIntervals
, inv
);
1163 j
--; /* counter-act j++ in for-loop above */
1165 /* return register regNew to the free pool */
1167 printf(" free reg %d\n", regNew
);
1168 assert(usedRegs
[regNew
] == GL_TRUE
);
1169 usedRegs
[regNew
] = GL_FALSE
;
1174 /* find a free register for this live interval */
1176 const GLint k
= alloc_register(usedRegs
);
1178 /* out of registers, give up */
1181 registerMap
[live
->Reg
] = k
;
1182 maxTemp
= MAX2(maxTemp
, k
);
1184 printf(" remap register %u -> %d\n", live
->Reg
, k
);
1187 /* Insert this live interval into the active list which is sorted
1188 * by increasing end points.
1190 insert_interval_by_end(&activeIntervals
, live
);
1194 if (maxTemp
+ 1 < (GLint
) liveIntervals
.Num
) {
1195 /* OK, we've reduced the number of registers needed.
1196 * Scan the program and replace all the old temporary register
1197 * indexes with the new indexes.
1199 replace_regs(prog
, PROGRAM_TEMPORARY
, registerMap
);
1201 prog
->NumTemporaries
= maxTemp
+ 1;
1205 printf("Optimize: End live-interval register reallocation\n");
1206 printf("Num temp regs before: %u after: %u\n",
1207 liveIntervals
.Num
, maxTemp
+ 1);
1208 _mesa_print_program(prog
);
1215 print_it(struct gl_context
*ctx
, struct gl_program
*program
, const char *txt
) {
1216 fprintf(stderr
, "%s (%u inst):\n", txt
, program
->NumInstructions
);
1217 _mesa_print_program(program
);
1218 _mesa_print_program_parameters(ctx
, program
);
1219 fprintf(stderr
, "\n\n");
1224 * This pass replaces CMP T0, T1 T2 T0 with MOV T0, T2 when the CMP
1225 * instruction is the first instruction to write to register T0. The are
1226 * several lowering passes done in GLSL IR (e.g. branches and
1227 * relative addressing) that create a large number of conditional assignments
1228 * that ir_to_mesa converts to CMP instructions like the one mentioned above.
1230 * Here is why this conversion is safe:
1231 * CMP T0, T1 T2 T0 can be expanded to:
1237 * If (T1 < 0.0) evaluates to true then our replacement MOV T0, T2 is the same
1238 * as the original program. If (T1 < 0.0) evaluates to false, executing
1239 * MOV T0, T0 will store a garbage value in T0 since T0 is uninitialized.
1240 * Therefore, it doesn't matter that we are replacing MOV T0, T0 with MOV T0, T2
1241 * because any instruction that was going to read from T0 after this was going
1242 * to read a garbage value anyway.
1245 _mesa_simplify_cmp(struct gl_program
* program
)
1247 GLuint tempWrites
[REG_ALLOCATE_MAX_PROGRAM_TEMPS
];
1248 GLuint outputWrites
[MAX_PROGRAM_OUTPUTS
];
1252 printf("Optimize: Begin reads without writes\n");
1253 _mesa_print_program(program
);
1256 for (i
= 0; i
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
; i
++) {
1260 for (i
= 0; i
< MAX_PROGRAM_OUTPUTS
; i
++) {
1261 outputWrites
[i
] = 0;
1264 for (i
= 0; i
< program
->NumInstructions
; i
++) {
1265 struct prog_instruction
*inst
= program
->Instructions
+ i
;
1266 GLuint prevWriteMask
;
1268 /* Give up if we encounter relative addressing or flow control. */
1269 if (_mesa_is_flow_control_opcode(inst
->Opcode
) || inst
->DstReg
.RelAddr
) {
1273 if (inst
->DstReg
.File
== PROGRAM_OUTPUT
) {
1274 assert(inst
->DstReg
.Index
< MAX_PROGRAM_OUTPUTS
);
1275 prevWriteMask
= outputWrites
[inst
->DstReg
.Index
];
1276 outputWrites
[inst
->DstReg
.Index
] |= inst
->DstReg
.WriteMask
;
1277 } else if (inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
1278 assert(inst
->DstReg
.Index
< REG_ALLOCATE_MAX_PROGRAM_TEMPS
);
1279 prevWriteMask
= tempWrites
[inst
->DstReg
.Index
];
1280 tempWrites
[inst
->DstReg
.Index
] |= inst
->DstReg
.WriteMask
;
1282 /* No other register type can be a destination register. */
1286 /* For a CMP to be considered a conditional write, the destination
1287 * register and source register two must be the same. */
1288 if (inst
->Opcode
== OPCODE_CMP
1289 && !(inst
->DstReg
.WriteMask
& prevWriteMask
)
1290 && inst
->SrcReg
[2].File
== inst
->DstReg
.File
1291 && inst
->SrcReg
[2].Index
== inst
->DstReg
.Index
1292 && inst
->DstReg
.WriteMask
== get_src_arg_mask(inst
, 2, NO_MASK
)) {
1294 inst
->Opcode
= OPCODE_MOV
;
1295 inst
->SrcReg
[0] = inst
->SrcReg
[1];
1297 /* Unused operands are expected to have the file set to
1298 * PROGRAM_UNDEFINED. This is how _mesa_init_instructions initializes
1299 * all of the sources.
1301 inst
->SrcReg
[1].File
= PROGRAM_UNDEFINED
;
1302 inst
->SrcReg
[1].Swizzle
= SWIZZLE_NOOP
;
1303 inst
->SrcReg
[2].File
= PROGRAM_UNDEFINED
;
1304 inst
->SrcReg
[2].Swizzle
= SWIZZLE_NOOP
;
1308 printf("Optimize: End reads without writes\n");
1309 _mesa_print_program(program
);
1314 * Apply optimizations to the given program to eliminate unnecessary
1315 * instructions, temp regs, etc.
1318 _mesa_optimize_program(struct gl_context
*ctx
, struct gl_program
*program
)
1320 GLboolean any_change
;
1322 _mesa_simplify_cmp(program
);
1323 /* Stop when no modifications were output */
1325 any_change
= GL_FALSE
;
1326 _mesa_remove_extra_move_use(program
);
1327 if (_mesa_remove_dead_code_global(program
))
1328 any_change
= GL_TRUE
;
1329 if (_mesa_remove_extra_moves(program
))
1330 any_change
= GL_TRUE
;
1331 if (_mesa_remove_dead_code_local(program
))
1332 any_change
= GL_TRUE
;
1334 any_change
= _mesa_constant_fold(program
) || any_change
;
1335 _mesa_reallocate_registers(program
);
1336 } while (any_change
);