2 * Mesa 3-D graphics library
5 * Copyright (C) 2009 VMware, Inc. All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * VMWARE BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include "main/glheader.h"
28 #include "main/context.h"
29 #include "main/macros.h"
31 #include "prog_instruction.h"
32 #include "prog_optimize.h"
33 #include "prog_print.h"
36 #define MAX_LOOP_NESTING 50
39 static GLboolean dbg
= GL_FALSE
;
44 * Returns the mask of channels (bitmask of WRITEMASK_X,Y,Z,W) which
45 * are read from the given src in this instruction, We also provide
46 * one optional masks which may mask other components in the dst
50 get_src_arg_mask(const struct prog_instruction
*inst
,
51 GLuint arg
, GLuint dst_mask
)
53 GLuint read_mask
, channel_mask
;
56 ASSERT(arg
< _mesa_num_inst_src_regs(inst
->Opcode
));
58 /* Form the dst register, find the written channels */
59 if (inst
->CondUpdate
) {
60 channel_mask
= WRITEMASK_XYZW
;
63 switch (inst
->Opcode
) {
72 channel_mask
= inst
->DstReg
.WriteMask
& dst_mask
;
81 channel_mask
= WRITEMASK_X
;
84 channel_mask
= WRITEMASK_XY
;
88 channel_mask
= WRITEMASK_XYZ
;
91 channel_mask
= WRITEMASK_XYZW
;
96 /* Now, given the src swizzle and the written channels, find which
97 * components are actually read
100 for (comp
= 0; comp
< 4; ++comp
) {
101 const GLuint coord
= GET_SWZ(inst
->SrcReg
[arg
].Swizzle
, comp
);
103 if (channel_mask
& (1 << comp
) && coord
<= SWIZZLE_W
)
104 read_mask
|= 1 << coord
;
112 * For a MOV instruction, compute a write mask when src register also has
116 get_dst_mask_for_mov(const struct prog_instruction
*mov
, GLuint src_mask
)
118 const GLuint mask
= mov
->DstReg
.WriteMask
;
120 GLuint updated_mask
= 0x0;
122 ASSERT(mov
->Opcode
== OPCODE_MOV
);
124 for (comp
= 0; comp
< 4; ++comp
) {
126 if ((mask
& (1 << comp
)) == 0)
128 src_comp
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, comp
);
129 if ((src_mask
& (1 << src_comp
)) == 0)
131 updated_mask
|= 1 << comp
;
139 * Ensure that the swizzle is regular. That is, all of the swizzle
140 * terms are SWIZZLE_X,Y,Z,W and not SWIZZLE_ZERO or SWIZZLE_ONE.
143 is_swizzle_regular(GLuint swz
)
145 return GET_SWZ(swz
,0) <= SWIZZLE_W
&&
146 GET_SWZ(swz
,1) <= SWIZZLE_W
&&
147 GET_SWZ(swz
,2) <= SWIZZLE_W
&&
148 GET_SWZ(swz
,3) <= SWIZZLE_W
;
153 * In 'prog' remove instruction[i] if removeFlags[i] == TRUE.
154 * \return number of instructions removed
157 remove_instructions(struct gl_program
*prog
, const GLboolean
*removeFlags
)
159 GLint i
, removeEnd
= 0, removeCount
= 0;
160 GLuint totalRemoved
= 0;
163 for (i
= prog
->NumInstructions
- 1; i
>= 0; i
--) {
164 if (removeFlags
[i
]) {
166 if (removeCount
== 0) {
167 /* begin a run of instructions to remove */
172 /* extend the run of instructions to remove */
177 /* don't remove this instruction, but check if the preceeding
178 * instructions are to be removed.
180 if (removeCount
> 0) {
181 GLint removeStart
= removeEnd
- removeCount
+ 1;
182 _mesa_delete_instructions(prog
, removeStart
, removeCount
);
183 removeStart
= removeCount
= 0; /* reset removal info */
187 /* Finish removing if the first instruction was to be removed. */
188 if (removeCount
> 0) {
189 GLint removeStart
= removeEnd
- removeCount
+ 1;
190 _mesa_delete_instructions(prog
, removeStart
, removeCount
);
197 * Remap register indexes according to map.
198 * \param prog the program to search/replace
199 * \param file the type of register file to search/replace
200 * \param map maps old register indexes to new indexes
203 replace_regs(struct gl_program
*prog
, gl_register_file file
, const GLint map
[])
207 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
208 struct prog_instruction
*inst
= prog
->Instructions
+ i
;
209 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
211 for (j
= 0; j
< numSrc
; j
++) {
212 if (inst
->SrcReg
[j
].File
== file
) {
213 GLuint index
= inst
->SrcReg
[j
].Index
;
214 ASSERT(map
[index
] >= 0);
215 inst
->SrcReg
[j
].Index
= map
[index
];
218 if (inst
->DstReg
.File
== file
) {
219 const GLuint index
= inst
->DstReg
.Index
;
220 ASSERT(map
[index
] >= 0);
221 inst
->DstReg
.Index
= map
[index
];
228 * Remove dead instructions from the given program.
229 * This is very primitive for now. Basically look for temp registers
230 * that are written to but never read. Remove any instructions that
231 * write to such registers. Be careful with condition code setters.
234 _mesa_remove_dead_code_global(struct gl_program
*prog
)
236 GLboolean tempRead
[MAX_PROGRAM_TEMPS
][4];
237 GLboolean
*removeInst
; /* per-instruction removal flag */
238 GLuint i
, rem
= 0, comp
;
240 memset(tempRead
, 0, sizeof(tempRead
));
243 printf("Optimize: Begin dead code removal\n");
244 /*_mesa_print_program(prog);*/
247 removeInst
= (GLboolean
*)
248 calloc(1, prog
->NumInstructions
* sizeof(GLboolean
));
250 /* Determine which temps are read and written */
251 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
252 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
253 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
257 for (j
= 0; j
< numSrc
; j
++) {
258 if (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
) {
259 const GLuint index
= inst
->SrcReg
[j
].Index
;
261 ASSERT(index
< MAX_PROGRAM_TEMPS
);
262 read_mask
= get_src_arg_mask(inst
, j
, NO_MASK
);
264 if (inst
->SrcReg
[j
].RelAddr
) {
266 printf("abort remove dead code (indirect temp)\n");
270 for (comp
= 0; comp
< 4; comp
++) {
271 const GLuint swz
= GET_SWZ(inst
->SrcReg
[j
].Swizzle
, comp
);
273 if ((read_mask
& (1 << swz
)) == 0)
275 if (swz
<= SWIZZLE_W
)
276 tempRead
[index
][swz
] = GL_TRUE
;
282 if (inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
283 const GLuint index
= inst
->DstReg
.Index
;
284 ASSERT(index
< MAX_PROGRAM_TEMPS
);
286 if (inst
->DstReg
.RelAddr
) {
288 printf("abort remove dead code (indirect temp)\n");
292 if (inst
->CondUpdate
) {
293 /* If we're writing to this register and setting condition
294 * codes we cannot remove the instruction. Prevent removal
295 * by setting the 'read' flag.
297 tempRead
[index
][0] = GL_TRUE
;
298 tempRead
[index
][1] = GL_TRUE
;
299 tempRead
[index
][2] = GL_TRUE
;
300 tempRead
[index
][3] = GL_TRUE
;
305 /* find instructions that write to dead registers, flag for removal */
306 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
307 struct prog_instruction
*inst
= prog
->Instructions
+ i
;
308 const GLuint numDst
= _mesa_num_inst_dst_regs(inst
->Opcode
);
310 if (numDst
!= 0 && inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
311 GLint chan
, index
= inst
->DstReg
.Index
;
313 for (chan
= 0; chan
< 4; chan
++) {
314 if (!tempRead
[index
][chan
] &&
315 inst
->DstReg
.WriteMask
& (1 << chan
)) {
317 printf("Remove writemask on %u.%c\n", i
,
318 chan
== 3 ? 'w' : 'x' + chan
);
320 inst
->DstReg
.WriteMask
&= ~(1 << chan
);
325 if (inst
->DstReg
.WriteMask
== 0) {
326 /* If we cleared all writes, the instruction can be removed. */
328 printf("Remove instruction %u: \n", i
);
329 removeInst
[i
] = GL_TRUE
;
334 /* now remove the instructions which aren't needed */
335 rem
= remove_instructions(prog
, removeInst
);
338 printf("Optimize: End dead code removal.\n");
339 printf(" %u channel writes removed\n", rem
);
340 printf(" %u instructions removed\n", rem
);
341 /*_mesa_print_program(prog);*/
360 * Scan forward in program from 'start' for the next occurances of TEMP[index].
361 * We look if an instruction reads the component given by the masks and if they
363 * Return READ, WRITE, FLOW or END to indicate the next usage or an indicator
364 * that we can't look further.
367 find_next_use(const struct gl_program
*prog
,
374 for (i
= start
; i
< prog
->NumInstructions
; i
++) {
375 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
376 switch (inst
->Opcode
) {
393 const GLuint numSrc
= _mesa_num_inst_src_regs(inst
->Opcode
);
395 for (j
= 0; j
< numSrc
; j
++) {
396 if (inst
->SrcReg
[j
].RelAddr
||
397 (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
&&
398 inst
->SrcReg
[j
].Index
== index
&&
399 (get_src_arg_mask(inst
,j
,NO_MASK
) & mask
)))
402 if (_mesa_num_inst_dst_regs(inst
->Opcode
) == 1 &&
403 inst
->DstReg
.File
== PROGRAM_TEMPORARY
&&
404 inst
->DstReg
.Index
== index
) {
405 mask
&= ~inst
->DstReg
.WriteMask
;
417 * Is the given instruction opcode a flow-control opcode?
418 * XXX maybe move this into prog_instruction.[ch]
421 _mesa_is_flow_control_opcode(enum prog_opcode opcode
)
444 * Test if the given instruction is a simple MOV (no conditional updating,
445 * not relative addressing, no negation/abs, etc).
448 can_downward_mov_be_modifed(const struct prog_instruction
*mov
)
451 mov
->Opcode
== OPCODE_MOV
&&
452 mov
->CondUpdate
== GL_FALSE
&&
453 mov
->SrcReg
[0].RelAddr
== 0 &&
454 mov
->SrcReg
[0].Negate
== 0 &&
455 mov
->SrcReg
[0].Abs
== 0 &&
456 mov
->SrcReg
[0].HasIndex2
== 0 &&
457 mov
->SrcReg
[0].RelAddr2
== 0 &&
458 mov
->DstReg
.RelAddr
== 0 &&
459 mov
->DstReg
.CondMask
== COND_TR
&&
460 mov
->SaturateMode
== SATURATE_OFF
;
465 can_upward_mov_be_modifed(const struct prog_instruction
*mov
)
468 can_downward_mov_be_modifed(mov
) &&
469 mov
->DstReg
.File
== PROGRAM_TEMPORARY
;
474 * Try to remove use of extraneous MOV instructions, to free them up for dead
478 _mesa_remove_extra_move_use(struct gl_program
*prog
)
483 printf("Optimize: Begin remove extra move use\n");
484 _mesa_print_program(prog
);
488 * Look for sequences such as this:
491 * FOO tmpY, tmpX, arg1;
495 * FOO tmpY, arg0, arg1;
498 for (i
= 0; i
+ 1 < prog
->NumInstructions
; i
++) {
499 const struct prog_instruction
*mov
= prog
->Instructions
+ i
;
500 GLuint dst_mask
, src_mask
;
501 if (can_upward_mov_be_modifed(mov
) == GL_FALSE
)
504 /* Scanning the code, we maintain the components which are still active in
507 dst_mask
= mov
->DstReg
.WriteMask
;
508 src_mask
= get_src_arg_mask(mov
, 0, NO_MASK
);
510 /* Walk through remaining instructions until the or src reg gets
511 * rewritten or we get into some flow-control, eliminating the use of
514 for (j
= i
+ 1; j
< prog
->NumInstructions
; j
++) {
515 struct prog_instruction
*inst2
= prog
->Instructions
+ j
;
518 if (_mesa_is_flow_control_opcode(inst2
->Opcode
))
521 /* First rewrite this instruction's args if appropriate. */
522 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst2
->Opcode
); arg
++) {
523 GLuint comp
, read_mask
;
525 if (inst2
->SrcReg
[arg
].File
!= mov
->DstReg
.File
||
526 inst2
->SrcReg
[arg
].Index
!= mov
->DstReg
.Index
||
527 inst2
->SrcReg
[arg
].RelAddr
||
528 inst2
->SrcReg
[arg
].Abs
)
530 read_mask
= get_src_arg_mask(inst2
, arg
, NO_MASK
);
532 /* Adjust the swizzles of inst2 to point at MOV's source if ALL the
533 * components read still come from the mov instructions
535 if (is_swizzle_regular(inst2
->SrcReg
[arg
].Swizzle
) &&
536 (read_mask
& dst_mask
) == read_mask
) {
537 for (comp
= 0; comp
< 4; comp
++) {
538 const GLuint inst2_swz
=
539 GET_SWZ(inst2
->SrcReg
[arg
].Swizzle
, comp
);
540 const GLuint s
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, inst2_swz
);
541 inst2
->SrcReg
[arg
].Swizzle
&= ~(7 << (3 * comp
));
542 inst2
->SrcReg
[arg
].Swizzle
|= s
<< (3 * comp
);
543 inst2
->SrcReg
[arg
].Negate
^= (((mov
->SrcReg
[0].Negate
>>
544 inst2_swz
) & 0x1) << comp
);
546 inst2
->SrcReg
[arg
].File
= mov
->SrcReg
[0].File
;
547 inst2
->SrcReg
[arg
].Index
= mov
->SrcReg
[0].Index
;
551 /* The source of MOV is written. This potentially deactivates some
552 * components from the src and dst of the MOV instruction
554 if (inst2
->DstReg
.File
== mov
->DstReg
.File
&&
555 (inst2
->DstReg
.RelAddr
||
556 inst2
->DstReg
.Index
== mov
->DstReg
.Index
)) {
557 dst_mask
&= ~inst2
->DstReg
.WriteMask
;
558 src_mask
= get_src_arg_mask(mov
, 0, dst_mask
);
561 /* Idem when the destination of mov is written */
562 if (inst2
->DstReg
.File
== mov
->SrcReg
[0].File
&&
563 (inst2
->DstReg
.RelAddr
||
564 inst2
->DstReg
.Index
== mov
->SrcReg
[0].Index
)) {
565 src_mask
&= ~inst2
->DstReg
.WriteMask
;
566 dst_mask
&= get_dst_mask_for_mov(mov
, src_mask
);
574 printf("Optimize: End remove extra move use.\n");
575 /*_mesa_print_program(prog);*/
581 * Complements dead_code_global. Try to remove code in block of code by
582 * carefully monitoring the swizzles. Both functions should be merged into one
583 * with a proper control flow graph
586 _mesa_remove_dead_code_local(struct gl_program
*prog
)
588 GLboolean
*removeInst
;
589 GLuint i
, arg
, rem
= 0;
591 removeInst
= (GLboolean
*)
592 calloc(1, prog
->NumInstructions
* sizeof(GLboolean
));
594 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
595 const struct prog_instruction
*inst
= prog
->Instructions
+ i
;
596 const GLuint index
= inst
->DstReg
.Index
;
597 const GLuint mask
= inst
->DstReg
.WriteMask
;
600 /* We must deactivate the pass as soon as some indirection is used */
601 if (inst
->DstReg
.RelAddr
)
603 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst
->Opcode
); arg
++)
604 if (inst
->SrcReg
[arg
].RelAddr
)
607 if (_mesa_is_flow_control_opcode(inst
->Opcode
) ||
608 _mesa_num_inst_dst_regs(inst
->Opcode
) == 0 ||
609 inst
->DstReg
.File
!= PROGRAM_TEMPORARY
||
610 inst
->DstReg
.RelAddr
)
613 use
= find_next_use(prog
, i
+1, index
, mask
);
614 if (use
== WRITE
|| use
== END
)
615 removeInst
[i
] = GL_TRUE
;
618 rem
= remove_instructions(prog
, removeInst
);
627 * Try to inject the destination of mov as the destination of inst and recompute
628 * the swizzles operators for the sources of inst if required. Return GL_TRUE
629 * of the substitution was possible, GL_FALSE otherwise
632 _mesa_merge_mov_into_inst(struct prog_instruction
*inst
,
633 const struct prog_instruction
*mov
)
635 /* Indirection table which associates destination and source components for
636 * the mov instruction
638 const GLuint mask
= get_src_arg_mask(mov
, 0, NO_MASK
);
640 /* Some components are not written by inst. We cannot remove the mov */
641 if (mask
!= (inst
->DstReg
.WriteMask
& mask
))
644 /* Depending on the instruction, we may need to recompute the swizzles.
645 * Also, some other instructions (like TEX) are not linear. We will only
646 * consider completely active sources and destinations
648 switch (inst
->Opcode
) {
650 /* Carstesian instructions: we compute the swizzle */
660 GLuint dst_to_src_comp
[4] = {0,0,0,0};
661 GLuint dst_comp
, arg
;
662 for (dst_comp
= 0; dst_comp
< 4; ++dst_comp
) {
663 if (mov
->DstReg
.WriteMask
& (1 << dst_comp
)) {
664 const GLuint src_comp
= GET_SWZ(mov
->SrcReg
[0].Swizzle
, dst_comp
);
665 ASSERT(src_comp
< 4);
666 dst_to_src_comp
[dst_comp
] = src_comp
;
670 /* Patch each source of the instruction */
671 for (arg
= 0; arg
< _mesa_num_inst_src_regs(inst
->Opcode
); arg
++) {
672 const GLuint arg_swz
= inst
->SrcReg
[arg
].Swizzle
;
673 inst
->SrcReg
[arg
].Swizzle
= 0;
675 /* Reset each active component of the swizzle */
676 for (dst_comp
= 0; dst_comp
< 4; ++dst_comp
) {
677 GLuint src_comp
, arg_comp
;
678 if ((mov
->DstReg
.WriteMask
& (1 << dst_comp
)) == 0)
680 src_comp
= dst_to_src_comp
[dst_comp
];
681 ASSERT(src_comp
< 4);
682 arg_comp
= GET_SWZ(arg_swz
, src_comp
);
683 ASSERT(arg_comp
< 4);
684 inst
->SrcReg
[arg
].Swizzle
|= arg_comp
<< (3*dst_comp
);
687 inst
->DstReg
= mov
->DstReg
;
691 /* Dot products and scalar instructions: we only change the destination */
702 inst
->DstReg
= mov
->DstReg
;
705 /* All other instructions require fully active components with no swizzle */
707 if (mov
->SrcReg
[0].Swizzle
!= SWIZZLE_XYZW
||
708 inst
->DstReg
.WriteMask
!= WRITEMASK_XYZW
)
710 inst
->DstReg
= mov
->DstReg
;
717 * Try to remove extraneous MOV instructions from the given program.
720 _mesa_remove_extra_moves(struct gl_program
*prog
)
722 GLboolean
*removeInst
; /* per-instruction removal flag */
723 GLuint i
, rem
= 0, nesting
= 0;
726 printf("Optimize: Begin remove extra moves\n");
727 _mesa_print_program(prog
);
730 removeInst
= (GLboolean
*)
731 calloc(1, prog
->NumInstructions
* sizeof(GLboolean
));
734 * Look for sequences such as this:
735 * FOO tmpX, arg0, arg1;
738 * FOO tmpY, arg0, arg1;
741 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
742 const struct prog_instruction
*mov
= prog
->Instructions
+ i
;
744 switch (mov
->Opcode
) {
756 if (i
> 0 && can_downward_mov_be_modifed(mov
) && nesting
== 0) {
758 /* see if this MOV can be removed */
759 const GLuint id
= mov
->SrcReg
[0].Index
;
760 struct prog_instruction
*prevInst
;
763 /* get pointer to previous instruction */
765 while (prevI
> 0 && removeInst
[prevI
])
767 prevInst
= prog
->Instructions
+ prevI
;
769 if (prevInst
->DstReg
.File
== PROGRAM_TEMPORARY
&&
770 prevInst
->DstReg
.Index
== id
&&
771 prevInst
->DstReg
.RelAddr
== 0 &&
772 prevInst
->DstReg
.CondSrc
== 0 &&
773 prevInst
->DstReg
.CondMask
== COND_TR
) {
775 const GLuint dst_mask
= prevInst
->DstReg
.WriteMask
;
776 enum inst_use next_use
= find_next_use(prog
, i
+1, id
, dst_mask
);
778 if (next_use
== WRITE
|| next_use
== END
) {
779 /* OK, we can safely remove this MOV instruction.
781 * prevI: FOO tempIndex, x, y;
782 * i: MOV z, tempIndex;
784 * prevI: FOO z, x, y;
786 if (_mesa_merge_mov_into_inst(prevInst
, mov
)) {
787 removeInst
[i
] = GL_TRUE
;
789 printf("Remove MOV at %u\n", i
);
790 printf("new prev inst %u: ", prevI
);
791 _mesa_print_instruction(prevInst
);
803 /* now remove the instructions which aren't needed */
804 rem
= remove_instructions(prog
, removeInst
);
809 printf("Optimize: End remove extra moves. %u instructions removed\n", rem
);
810 /*_mesa_print_program(prog);*/
817 /** A live register interval */
820 GLuint Reg
; /** The temporary register index */
821 GLuint Start
, End
; /** Start/end instruction numbers */
825 /** A list of register intervals */
829 struct interval Intervals
[MAX_PROGRAM_TEMPS
];
834 append_interval(struct interval_list
*list
, const struct interval
*inv
)
836 list
->Intervals
[list
->Num
++] = *inv
;
840 /** Insert interval inv into list, sorted by interval end */
842 insert_interval_by_end(struct interval_list
*list
, const struct interval
*inv
)
844 /* XXX we could do a binary search insertion here since list is sorted */
845 GLint i
= list
->Num
- 1;
846 while (i
>= 0 && list
->Intervals
[i
].End
> inv
->End
) {
847 list
->Intervals
[i
+ 1] = list
->Intervals
[i
];
850 list
->Intervals
[i
+ 1] = *inv
;
856 for (i
= 0; i
+ 1 < list
->Num
; i
++) {
857 ASSERT(list
->Intervals
[i
].End
<= list
->Intervals
[i
+ 1].End
);
864 /** Remove the given interval from the interval list */
866 remove_interval(struct interval_list
*list
, const struct interval
*inv
)
868 /* XXX we could binary search since list is sorted */
870 for (k
= 0; k
< list
->Num
; k
++) {
871 if (list
->Intervals
[k
].Reg
== inv
->Reg
) {
872 /* found, remove it */
873 ASSERT(list
->Intervals
[k
].Start
== inv
->Start
);
874 ASSERT(list
->Intervals
[k
].End
== inv
->End
);
875 while (k
< list
->Num
- 1) {
876 list
->Intervals
[k
] = list
->Intervals
[k
+ 1];
886 /** called by qsort() */
888 compare_start(const void *a
, const void *b
)
890 const struct interval
*ia
= (const struct interval
*) a
;
891 const struct interval
*ib
= (const struct interval
*) b
;
892 if (ia
->Start
< ib
->Start
)
894 else if (ia
->Start
> ib
->Start
)
901 /** sort the interval list according to interval starts */
903 sort_interval_list_by_start(struct interval_list
*list
)
905 qsort(list
->Intervals
, list
->Num
, sizeof(struct interval
), compare_start
);
909 for (i
= 0; i
+ 1 < list
->Num
; i
++) {
910 ASSERT(list
->Intervals
[i
].Start
<= list
->Intervals
[i
+ 1].Start
);
918 * Update the intermediate interval info for register 'index' and
922 update_interval(GLint intBegin
[], GLint intEnd
[], GLuint index
, GLuint ic
)
924 ASSERT(index
< MAX_PROGRAM_TEMPS
);
925 if (intBegin
[index
] == -1) {
926 ASSERT(intEnd
[index
] == -1);
927 intBegin
[index
] = intEnd
[index
] = ic
;
936 * Find first/last instruction that references each temporary register.
939 _mesa_find_temp_intervals(const struct prog_instruction
*instructions
,
940 GLuint numInstructions
,
941 GLint intBegin
[MAX_PROGRAM_TEMPS
],
942 GLint intEnd
[MAX_PROGRAM_TEMPS
])
946 GLuint Start
, End
; /**< Start, end instructions of loop */
948 struct loop_info loopStack
[MAX_LOOP_NESTING
];
949 GLuint loopStackDepth
= 0;
952 for (i
= 0; i
< MAX_PROGRAM_TEMPS
; i
++){
953 intBegin
[i
] = intEnd
[i
] = -1;
956 /* Scan instructions looking for temporary registers */
957 for (i
= 0; i
< numInstructions
; i
++) {
958 const struct prog_instruction
*inst
= instructions
+ i
;
959 if (inst
->Opcode
== OPCODE_BGNLOOP
) {
960 loopStack
[loopStackDepth
].Start
= i
;
961 loopStack
[loopStackDepth
].End
= inst
->BranchTarget
;
964 else if (inst
->Opcode
== OPCODE_ENDLOOP
) {
967 else if (inst
->Opcode
== OPCODE_CAL
) {
971 const GLuint numSrc
= 3;/*_mesa_num_inst_src_regs(inst->Opcode);*/
973 for (j
= 0; j
< numSrc
; j
++) {
974 if (inst
->SrcReg
[j
].File
== PROGRAM_TEMPORARY
) {
975 const GLuint index
= inst
->SrcReg
[j
].Index
;
976 if (inst
->SrcReg
[j
].RelAddr
)
978 update_interval(intBegin
, intEnd
, index
, i
);
979 if (loopStackDepth
> 0) {
980 /* extend temp register's interval to end of loop */
981 GLuint loopEnd
= loopStack
[loopStackDepth
- 1].End
;
982 update_interval(intBegin
, intEnd
, index
, loopEnd
);
986 if (inst
->DstReg
.File
== PROGRAM_TEMPORARY
) {
987 const GLuint index
= inst
->DstReg
.Index
;
988 if (inst
->DstReg
.RelAddr
)
990 update_interval(intBegin
, intEnd
, index
, i
);
991 if (loopStackDepth
> 0) {
992 /* extend temp register's interval to end of loop */
993 GLuint loopEnd
= loopStack
[loopStackDepth
- 1].End
;
994 update_interval(intBegin
, intEnd
, index
, loopEnd
);
1005 * Find the live intervals for each temporary register in the program.
1006 * For register R, the interval [A,B] indicates that R is referenced
1007 * from instruction A through instruction B.
1008 * Special consideration is needed for loops and subroutines.
1009 * \return GL_TRUE if success, GL_FALSE if we cannot proceed for some reason
1012 find_live_intervals(struct gl_program
*prog
,
1013 struct interval_list
*liveIntervals
)
1015 GLint intBegin
[MAX_PROGRAM_TEMPS
], intEnd
[MAX_PROGRAM_TEMPS
];
1019 * Note: we'll return GL_FALSE below if we find relative indexing
1020 * into the TEMP register file. We can't handle that yet.
1021 * We also give up on subroutines for now.
1025 printf("Optimize: Begin find intervals\n");
1028 /* build intermediate arrays */
1029 if (!_mesa_find_temp_intervals(prog
->Instructions
, prog
->NumInstructions
,
1033 /* Build live intervals list from intermediate arrays */
1034 liveIntervals
->Num
= 0;
1035 for (i
= 0; i
< MAX_PROGRAM_TEMPS
; i
++) {
1036 if (intBegin
[i
] >= 0) {
1037 struct interval inv
;
1039 inv
.Start
= intBegin
[i
];
1040 inv
.End
= intEnd
[i
];
1041 append_interval(liveIntervals
, &inv
);
1045 /* Sort the list according to interval starts */
1046 sort_interval_list_by_start(liveIntervals
);
1049 /* print interval info */
1050 for (i
= 0; i
< liveIntervals
->Num
; i
++) {
1051 const struct interval
*inv
= liveIntervals
->Intervals
+ i
;
1052 printf("Reg[%d] live [%d, %d]:",
1053 inv
->Reg
, inv
->Start
, inv
->End
);
1056 for (j
= 0; j
< inv
->Start
; j
++)
1058 for (j
= inv
->Start
; j
<= inv
->End
; j
++)
1069 /** Scan the array of used register flags to find free entry */
1071 alloc_register(GLboolean usedRegs
[MAX_PROGRAM_TEMPS
])
1074 for (k
= 0; k
< MAX_PROGRAM_TEMPS
; k
++) {
1076 usedRegs
[k
] = GL_TRUE
;
1085 * This function implements "Linear Scan Register Allocation" to reduce
1086 * the number of temporary registers used by the program.
1088 * We compute the "live interval" for all temporary registers then
1089 * examine the overlap of the intervals to allocate new registers.
1090 * Basically, if two intervals do not overlap, they can use the same register.
1093 _mesa_reallocate_registers(struct gl_program
*prog
)
1095 struct interval_list liveIntervals
;
1096 GLint registerMap
[MAX_PROGRAM_TEMPS
];
1097 GLboolean usedRegs
[MAX_PROGRAM_TEMPS
];
1102 printf("Optimize: Begin live-interval register reallocation\n");
1103 _mesa_print_program(prog
);
1106 for (i
= 0; i
< MAX_PROGRAM_TEMPS
; i
++){
1107 registerMap
[i
] = -1;
1108 usedRegs
[i
] = GL_FALSE
;
1111 if (!find_live_intervals(prog
, &liveIntervals
)) {
1113 printf("Aborting register reallocation\n");
1118 struct interval_list activeIntervals
;
1119 activeIntervals
.Num
= 0;
1121 /* loop over live intervals, allocating a new register for each */
1122 for (i
= 0; i
< liveIntervals
.Num
; i
++) {
1123 const struct interval
*live
= liveIntervals
.Intervals
+ i
;
1126 printf("Consider register %u\n", live
->Reg
);
1128 /* Expire old intervals. Intervals which have ended with respect
1129 * to the live interval can have their remapped registers freed.
1133 for (j
= 0; j
< (GLint
) activeIntervals
.Num
; j
++) {
1134 const struct interval
*inv
= activeIntervals
.Intervals
+ j
;
1135 if (inv
->End
>= live
->Start
) {
1136 /* Stop now. Since the activeInterval list is sorted
1137 * we know we don't have to go further.
1142 /* Interval 'inv' has expired */
1143 const GLint regNew
= registerMap
[inv
->Reg
];
1144 ASSERT(regNew
>= 0);
1147 printf(" expire interval for reg %u\n", inv
->Reg
);
1149 /* remove interval j from active list */
1150 remove_interval(&activeIntervals
, inv
);
1151 j
--; /* counter-act j++ in for-loop above */
1153 /* return register regNew to the free pool */
1155 printf(" free reg %d\n", regNew
);
1156 ASSERT(usedRegs
[regNew
] == GL_TRUE
);
1157 usedRegs
[regNew
] = GL_FALSE
;
1162 /* find a free register for this live interval */
1164 const GLint k
= alloc_register(usedRegs
);
1166 /* out of registers, give up */
1169 registerMap
[live
->Reg
] = k
;
1170 maxTemp
= MAX2(maxTemp
, k
);
1172 printf(" remap register %u -> %d\n", live
->Reg
, k
);
1175 /* Insert this live interval into the active list which is sorted
1176 * by increasing end points.
1178 insert_interval_by_end(&activeIntervals
, live
);
1182 if (maxTemp
+ 1 < (GLint
) liveIntervals
.Num
) {
1183 /* OK, we've reduced the number of registers needed.
1184 * Scan the program and replace all the old temporary register
1185 * indexes with the new indexes.
1187 replace_regs(prog
, PROGRAM_TEMPORARY
, registerMap
);
1189 prog
->NumTemporaries
= maxTemp
+ 1;
1193 printf("Optimize: End live-interval register reallocation\n");
1194 printf("Num temp regs before: %u after: %u\n",
1195 liveIntervals
.Num
, maxTemp
+ 1);
1196 _mesa_print_program(prog
);
1203 print_it(GLcontext
*ctx
, struct gl_program
*program
, const char *txt
) {
1204 fprintf(stderr
, "%s (%u inst):\n", txt
, program
->NumInstructions
);
1205 _mesa_print_program(program
);
1206 _mesa_print_program_parameters(ctx
, program
);
1207 fprintf(stderr
, "\n\n");
1213 * Apply optimizations to the given program to eliminate unnecessary
1214 * instructions, temp regs, etc.
1217 _mesa_optimize_program(GLcontext
*ctx
, struct gl_program
*program
)
1219 GLboolean any_change
;
1221 /* Stop when no modifications were output */
1223 any_change
= GL_FALSE
;
1224 _mesa_remove_extra_move_use(program
);
1225 if (_mesa_remove_dead_code_global(program
))
1226 any_change
= GL_TRUE
;
1227 if (_mesa_remove_extra_moves(program
))
1228 any_change
= GL_TRUE
;
1229 if (_mesa_remove_dead_code_local(program
))
1230 any_change
= GL_TRUE
;
1231 _mesa_reallocate_registers(program
);
1232 } while (any_change
);