2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translates the IR to ARB_fragment_program text if possible,
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
45 #include "main/mtypes.h"
46 #include "shader/prog_instruction.h"
47 #include "shader/prog_print.h"
48 #include "shader/program.h"
49 #include "shader/prog_uniform.h"
50 #include "shader/prog_parameter.h"
51 #include "shader/shader_api.h"
55 * This struct is a corresponding struct to Mesa prog_src_register, with
58 typedef struct ir_to_mesa_src_reg
{
59 int file
; /**< PROGRAM_* from Mesa */
60 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
61 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
62 int negate
; /**< NEGATE_XYZW mask from mesa */
63 bool reladdr
; /**< Register index should be offset by address reg. */
66 typedef struct ir_to_mesa_dst_reg
{
67 int file
; /**< PROGRAM_* from Mesa */
68 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
69 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
72 extern ir_to_mesa_src_reg ir_to_mesa_undef
;
74 class ir_to_mesa_instruction
: public exec_node
{
77 ir_to_mesa_dst_reg dst_reg
;
78 ir_to_mesa_src_reg src_reg
[3];
79 /** Pointer to the ir source this tree came from for debugging */
83 class temp_entry
: public exec_node
{
85 temp_entry(ir_variable
*var
, int file
, int index
)
86 : file(file
), index(index
), var(var
)
93 ir_variable
*var
; /* variable that maps to this, if any */
96 class ir_to_mesa_visitor
: public ir_visitor
{
101 struct gl_program
*prog
;
105 temp_entry
*find_variable_storage(ir_variable
*var
);
107 ir_to_mesa_src_reg
get_temp(const glsl_type
*type
);
109 struct ir_to_mesa_src_reg
src_reg_for_float(float val
);
112 * \name Visit methods
114 * As typical for the visitor pattern, there must be one \c visit method for
115 * each concrete subclass of \c ir_instruction. Virtual base classes within
116 * the hierarchy should not have \c visit methods.
119 virtual void visit(ir_variable
*);
120 virtual void visit(ir_loop
*);
121 virtual void visit(ir_loop_jump
*);
122 virtual void visit(ir_function_signature
*);
123 virtual void visit(ir_function
*);
124 virtual void visit(ir_expression
*);
125 virtual void visit(ir_swizzle
*);
126 virtual void visit(ir_dereference_variable
*);
127 virtual void visit(ir_dereference_array
*);
128 virtual void visit(ir_dereference_record
*);
129 virtual void visit(ir_assignment
*);
130 virtual void visit(ir_constant
*);
131 virtual void visit(ir_call
*);
132 virtual void visit(ir_return
*);
133 virtual void visit(ir_texture
*);
134 virtual void visit(ir_if
*);
137 struct ir_to_mesa_src_reg result
;
139 /** List of temp_entry */
140 exec_list variable_storage
;
142 /** List of ir_to_mesa_instruction */
143 exec_list instructions
;
145 ir_to_mesa_instruction
*ir_to_mesa_emit_op1(ir_instruction
*ir
,
147 ir_to_mesa_dst_reg dst
,
148 ir_to_mesa_src_reg src0
);
150 ir_to_mesa_instruction
*ir_to_mesa_emit_op2(ir_instruction
*ir
,
152 ir_to_mesa_dst_reg dst
,
153 ir_to_mesa_src_reg src0
,
154 ir_to_mesa_src_reg src1
);
156 ir_to_mesa_instruction
*ir_to_mesa_emit_op3(ir_instruction
*ir
,
158 ir_to_mesa_dst_reg dst
,
159 ir_to_mesa_src_reg src0
,
160 ir_to_mesa_src_reg src1
,
161 ir_to_mesa_src_reg src2
);
163 void ir_to_mesa_emit_scalar_op1(ir_instruction
*ir
,
165 ir_to_mesa_dst_reg dst
,
166 ir_to_mesa_src_reg src0
);
171 ir_to_mesa_src_reg ir_to_mesa_undef
= {
172 PROGRAM_UNDEFINED
, 0, SWIZZLE_NOOP
, NEGATE_NONE
, false,
175 ir_to_mesa_dst_reg ir_to_mesa_undef_dst
= {
176 PROGRAM_UNDEFINED
, 0, SWIZZLE_NOOP
179 ir_to_mesa_dst_reg ir_to_mesa_address_reg
= {
180 PROGRAM_ADDRESS
, 0, WRITEMASK_X
183 static int swizzle_for_size(int size
)
185 int size_swizzles
[4] = {
186 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
187 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
188 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
189 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
192 return size_swizzles
[size
- 1];
195 /* This list should match up with builtin_variables.h */
196 static const struct {
200 } builtin_var_to_mesa_reg
[] = {
202 {"gl_Position", PROGRAM_OUTPUT
, VERT_RESULT_HPOS
},
203 {"gl_PointSize", PROGRAM_OUTPUT
, VERT_RESULT_PSIZ
},
206 {"gl_FragCoord", PROGRAM_INPUT
, FRAG_ATTRIB_WPOS
},
207 {"gl_FrontFacing", PROGRAM_INPUT
, FRAG_ATTRIB_FACE
},
208 {"gl_FragColor", PROGRAM_OUTPUT
, FRAG_ATTRIB_COL0
},
209 {"gl_FragDepth", PROGRAM_UNDEFINED
, FRAG_ATTRIB_WPOS
}, /* FINISHME: WPOS.z */
211 /* 110_deprecated_fs */
212 {"gl_Color", PROGRAM_INPUT
, FRAG_ATTRIB_COL0
},
213 {"gl_SecondaryColor", PROGRAM_INPUT
, FRAG_ATTRIB_COL1
},
214 {"gl_FogFragCoord", PROGRAM_INPUT
, FRAG_ATTRIB_FOGC
},
215 {"gl_TexCoord", PROGRAM_INPUT
, FRAG_ATTRIB_TEX0
}, /* array */
217 /* 110_deprecated_vs */
218 {"gl_Vertex", PROGRAM_INPUT
, VERT_ATTRIB_POS
},
219 {"gl_Normal", PROGRAM_INPUT
, VERT_ATTRIB_NORMAL
},
220 {"gl_Color", PROGRAM_INPUT
, VERT_ATTRIB_COLOR0
},
221 {"gl_SecondaryColor", PROGRAM_INPUT
, VERT_ATTRIB_COLOR1
},
222 {"gl_MultiTexCoord0", PROGRAM_INPUT
, VERT_ATTRIB_TEX0
},
223 {"gl_MultiTexCoord1", PROGRAM_INPUT
, VERT_ATTRIB_TEX1
},
224 {"gl_MultiTexCoord2", PROGRAM_INPUT
, VERT_ATTRIB_TEX2
},
225 {"gl_MultiTexCoord3", PROGRAM_INPUT
, VERT_ATTRIB_TEX3
},
226 {"gl_MultiTexCoord4", PROGRAM_INPUT
, VERT_ATTRIB_TEX4
},
227 {"gl_MultiTexCoord5", PROGRAM_INPUT
, VERT_ATTRIB_TEX5
},
228 {"gl_MultiTexCoord6", PROGRAM_INPUT
, VERT_ATTRIB_TEX6
},
229 {"gl_MultiTexCoord7", PROGRAM_INPUT
, VERT_ATTRIB_TEX7
},
230 {"gl_TexCoord", PROGRAM_OUTPUT
, VERT_RESULT_TEX0
}, /* array */
231 {"gl_FogCoord", PROGRAM_INPUT
, VERT_RESULT_FOGC
},
232 /*{"gl_ClipVertex", PROGRAM_OUTPUT, VERT_ATTRIB_FOGC},*/ /* FINISHME */
233 {"gl_FrontColor", PROGRAM_OUTPUT
, VERT_RESULT_COL0
},
234 {"gl_BackColor", PROGRAM_OUTPUT
, VERT_RESULT_BFC0
},
235 {"gl_FrontSecondaryColor", PROGRAM_OUTPUT
, VERT_RESULT_COL1
},
236 {"gl_BackSecondaryColor", PROGRAM_OUTPUT
, VERT_RESULT_BFC1
},
237 {"gl_FogFragCoord", PROGRAM_OUTPUT
, VERT_RESULT_FOGC
},
240 /*{"gl_VertexID", PROGRAM_INPUT, VERT_ATTRIB_FOGC},*/ /* FINISHME */
242 {"gl_FragData", PROGRAM_OUTPUT
, FRAG_RESULT_DATA0
}, /* array */
245 ir_to_mesa_instruction
*
246 ir_to_mesa_visitor::ir_to_mesa_emit_op3(ir_instruction
*ir
,
248 ir_to_mesa_dst_reg dst
,
249 ir_to_mesa_src_reg src0
,
250 ir_to_mesa_src_reg src1
,
251 ir_to_mesa_src_reg src2
)
253 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
257 inst
->src_reg
[0] = src0
;
258 inst
->src_reg
[1] = src1
;
259 inst
->src_reg
[2] = src2
;
262 this->instructions
.push_tail(inst
);
268 ir_to_mesa_instruction
*
269 ir_to_mesa_visitor::ir_to_mesa_emit_op2(ir_instruction
*ir
,
271 ir_to_mesa_dst_reg dst
,
272 ir_to_mesa_src_reg src0
,
273 ir_to_mesa_src_reg src1
)
275 return ir_to_mesa_emit_op3(ir
, op
, dst
, src0
, src1
, ir_to_mesa_undef
);
278 ir_to_mesa_instruction
*
279 ir_to_mesa_visitor::ir_to_mesa_emit_op1(ir_instruction
*ir
,
281 ir_to_mesa_dst_reg dst
,
282 ir_to_mesa_src_reg src0
)
284 return ir_to_mesa_emit_op3(ir
, op
, dst
,
285 src0
, ir_to_mesa_undef
, ir_to_mesa_undef
);
288 inline ir_to_mesa_dst_reg
289 ir_to_mesa_dst_reg_from_src(ir_to_mesa_src_reg reg
)
291 ir_to_mesa_dst_reg dst_reg
;
293 dst_reg
.file
= reg
.file
;
294 dst_reg
.index
= reg
.index
;
295 dst_reg
.writemask
= WRITEMASK_XYZW
;
301 * Emits Mesa scalar opcodes to produce unique answers across channels.
303 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
304 * channel determines the result across all channels. So to do a vec4
305 * of this operation, we want to emit a scalar per source channel used
306 * to produce dest channels.
309 ir_to_mesa_visitor::ir_to_mesa_emit_scalar_op1(ir_instruction
*ir
,
311 ir_to_mesa_dst_reg dst
,
312 ir_to_mesa_src_reg src0
)
315 int done_mask
= ~dst
.writemask
;
317 /* Mesa RCP is a scalar operation splatting results to all channels,
318 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
321 for (i
= 0; i
< 4; i
++) {
322 GLuint this_mask
= (1 << i
);
323 ir_to_mesa_instruction
*inst
;
324 ir_to_mesa_src_reg src
= src0
;
326 if (done_mask
& this_mask
)
329 GLuint src_swiz
= GET_SWZ(src
.swizzle
, i
);
330 for (j
= i
+ 1; j
< 4; j
++) {
331 if (!(done_mask
& (1 << j
)) && GET_SWZ(src
.swizzle
, j
) == src_swiz
) {
332 this_mask
|= (1 << j
);
335 src
.swizzle
= MAKE_SWIZZLE4(src_swiz
, src_swiz
,
338 inst
= ir_to_mesa_emit_op1(ir
, op
,
341 inst
->dst_reg
.writemask
= this_mask
;
342 done_mask
|= this_mask
;
346 struct ir_to_mesa_src_reg
347 ir_to_mesa_visitor::src_reg_for_float(float val
)
349 ir_to_mesa_src_reg src_reg
;
351 src_reg
.file
= PROGRAM_CONSTANT
;
352 src_reg
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
353 &val
, 1, &src_reg
.swizzle
);
359 * In the initial pass of codegen, we assign temporary numbers to
360 * intermediate results. (not SSA -- variable assignments will reuse
361 * storage). Actual register allocation for the Mesa VM occurs in a
362 * pass over the Mesa IR later.
365 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
367 ir_to_mesa_src_reg src_reg
;
371 assert(!type
->is_array());
373 src_reg
.file
= PROGRAM_TEMPORARY
;
374 src_reg
.index
= type
->matrix_columns
;
375 src_reg
.reladdr
= false;
377 for (i
= 0; i
< type
->vector_elements
; i
++)
380 swizzle
[i
] = type
->vector_elements
- 1;
381 src_reg
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1],
382 swizzle
[2], swizzle
[3]);
388 type_size(const struct glsl_type
*type
)
393 switch (type
->base_type
) {
396 case GLSL_TYPE_FLOAT
:
398 if (type
->is_matrix()) {
399 return 4; /* FINISHME: Not all matrices are 4x4. */
401 /* Regardless of size of vector, it gets a vec4. This is bad
402 * packing for things like floats, but otherwise arrays become a
403 * mess. Hopefully a later pass over the code can pack scalars
404 * down if appropriate.
408 case GLSL_TYPE_ARRAY
:
409 return type_size(type
->fields
.array
) * type
->length
;
410 case GLSL_TYPE_STRUCT
:
412 for (i
= 0; i
< type
->length
; i
++) {
413 size
+= type_size(type
->fields
.structure
[i
].type
);
422 ir_to_mesa_visitor::find_variable_storage(ir_variable
*var
)
427 foreach_iter(exec_list_iterator
, iter
, this->variable_storage
) {
428 entry
= (temp_entry
*)iter
.get();
430 if (entry
->var
== var
)
438 ir_to_mesa_visitor::visit(ir_variable
*ir
)
444 ir_to_mesa_visitor::visit(ir_loop
*ir
)
448 assert(!ir
->increment
);
449 assert(!ir
->counter
);
451 ir_to_mesa_emit_op1(NULL
, OPCODE_BGNLOOP
,
452 ir_to_mesa_undef_dst
, ir_to_mesa_undef
);
454 visit_exec_list(&ir
->body_instructions
, this);
456 ir_to_mesa_emit_op1(NULL
, OPCODE_ENDLOOP
,
457 ir_to_mesa_undef_dst
, ir_to_mesa_undef
);
461 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
464 case ir_loop_jump::jump_break
:
465 ir_to_mesa_emit_op1(NULL
, OPCODE_BRK
,
466 ir_to_mesa_undef_dst
, ir_to_mesa_undef
);
468 case ir_loop_jump::jump_continue
:
469 ir_to_mesa_emit_op1(NULL
, OPCODE_CONT
,
470 ir_to_mesa_undef_dst
, ir_to_mesa_undef
);
477 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
484 ir_to_mesa_visitor::visit(ir_function
*ir
)
486 /* Ignore function bodies other than main() -- we shouldn't see calls to
487 * them since they should all be inlined before we get to ir_to_mesa.
489 if (strcmp(ir
->name
, "main") == 0) {
490 const ir_function_signature
*sig
;
493 sig
= ir
->matching_signature(&empty
);
497 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
498 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
506 ir_to_mesa_visitor::visit(ir_expression
*ir
)
508 unsigned int operand
;
509 struct ir_to_mesa_src_reg op
[2];
510 struct ir_to_mesa_src_reg result_src
;
511 struct ir_to_mesa_dst_reg result_dst
;
512 const glsl_type
*vec4_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
, 4, 1);
513 const glsl_type
*vec3_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
, 3, 1);
514 const glsl_type
*vec2_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
, 2, 1);
516 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
517 this->result
.file
= PROGRAM_UNDEFINED
;
518 ir
->operands
[operand
]->accept(this);
519 if (this->result
.file
== PROGRAM_UNDEFINED
) {
521 printf("Failed to get tree for expression operand:\n");
522 ir
->operands
[operand
]->accept(&v
);
525 op
[operand
] = this->result
;
527 /* Only expression implemented for matrices yet */
528 assert(!ir
->operands
[operand
]->type
->is_matrix() ||
529 ir
->operation
== ir_binop_mul
);
532 this->result
.file
= PROGRAM_UNDEFINED
;
534 /* Storage for our result. Ideally for an assignment we'd be using
535 * the actual storage for the result here, instead.
537 result_src
= get_temp(ir
->type
);
538 /* convenience for the emit functions below. */
539 result_dst
= ir_to_mesa_dst_reg_from_src(result_src
);
540 /* Limit writes to the channels that will be used by result_src later.
541 * This does limit this temp's use as a temporary for multi-instruction
544 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
546 switch (ir
->operation
) {
547 case ir_unop_logic_not
:
548 ir_to_mesa_emit_op2(ir
, OPCODE_SEQ
, result_dst
,
549 op
[0], src_reg_for_float(0.0));
552 op
[0].negate
= ~op
[0].negate
;
556 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_EXP
, result_dst
, op
[0]);
559 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_EX2
, result_dst
, op
[0]);
562 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_LOG
, result_dst
, op
[0]);
565 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_LG2
, result_dst
, op
[0]);
568 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_SIN
, result_dst
, op
[0]);
571 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_COS
, result_dst
, op
[0]);
574 ir_to_mesa_emit_op2(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
577 ir_to_mesa_emit_op2(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
580 if (ir
->operands
[0]->type
->is_matrix() &&
581 !ir
->operands
[1]->type
->is_matrix()) {
582 if (ir
->operands
[1]->type
->is_scalar()) {
583 ir_to_mesa_dst_reg dst_column
= result_dst
;
584 ir_to_mesa_src_reg src_column
= op
[0];
585 for (int i
= 0; i
< ir
->operands
[0]->type
->matrix_columns
; i
++) {
586 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
,
587 dst_column
, src_column
, op
[1]);
592 ir_to_mesa_dst_reg dst_chan
= result_dst
;
593 ir_to_mesa_src_reg src_column
= op
[0];
594 ir_to_mesa_src_reg src_chan
= op
[1];
595 for (int i
= 0; i
< ir
->operands
[0]->type
->matrix_columns
; i
++) {
596 dst_chan
.writemask
= (1 << i
);
597 src_chan
.swizzle
= MAKE_SWIZZLE4(i
, i
, i
, i
);
598 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
,
599 dst_chan
, src_column
, src_chan
);
604 assert(!ir
->operands
[0]->type
->is_matrix());
605 assert(!ir
->operands
[1]->type
->is_matrix());
606 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
610 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_RCP
, result_dst
, op
[1]);
611 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
, result_dst
, op
[0], result_src
);
615 ir_to_mesa_emit_op2(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
617 case ir_binop_greater
:
618 ir_to_mesa_emit_op2(ir
, OPCODE_SGT
, result_dst
, op
[0], op
[1]);
620 case ir_binop_lequal
:
621 ir_to_mesa_emit_op2(ir
, OPCODE_SLE
, result_dst
, op
[0], op
[1]);
623 case ir_binop_gequal
:
624 ir_to_mesa_emit_op2(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
627 ir_to_mesa_emit_op2(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
629 case ir_binop_logic_xor
:
630 case ir_binop_nequal
:
631 ir_to_mesa_emit_op2(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
634 case ir_binop_logic_or
:
635 /* This could be a saturated add and skip the SNE. */
636 ir_to_mesa_emit_op2(ir
, OPCODE_ADD
,
640 ir_to_mesa_emit_op2(ir
, OPCODE_SNE
,
642 result_src
, src_reg_for_float(0.0));
645 case ir_binop_logic_and
:
646 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
647 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
,
653 if (ir
->operands
[0]->type
== vec4_type
) {
654 assert(ir
->operands
[1]->type
== vec4_type
);
655 ir_to_mesa_emit_op2(ir
, OPCODE_DP4
,
658 } else if (ir
->operands
[0]->type
== vec3_type
) {
659 assert(ir
->operands
[1]->type
== vec3_type
);
660 ir_to_mesa_emit_op2(ir
, OPCODE_DP3
,
663 } else if (ir
->operands
[0]->type
== vec2_type
) {
664 assert(ir
->operands
[1]->type
== vec2_type
);
665 ir_to_mesa_emit_op2(ir
, OPCODE_DP2
,
671 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
672 ir_to_mesa_emit_op1(ir
, OPCODE_RCP
, result_dst
, result_src
);
675 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
678 /* Mesa IR lacks types, ints are stored as truncated floats. */
682 ir_to_mesa_emit_op1(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
685 ir_to_mesa_emit_op2(ir
, OPCODE_SNE
, result_dst
,
686 result_src
, src_reg_for_float(0.0));
689 ir_to_mesa_emit_op1(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
692 op
[0].negate
= ~op
[0].negate
;
693 ir_to_mesa_emit_op1(ir
, OPCODE_FLR
, result_dst
, op
[0]);
694 result_src
.negate
= ~result_src
.negate
;
697 ir_to_mesa_emit_op1(ir
, OPCODE_FLR
, result_dst
, op
[0]);
700 ir_to_mesa_emit_op2(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
703 ir_to_mesa_emit_op2(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
707 printf("Failed to get tree for expression:\n");
713 this->result
= result_src
;
718 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
720 ir_to_mesa_src_reg src_reg
;
724 /* Note that this is only swizzles in expressions, not those on the left
725 * hand side of an assignment, which do write masking. See ir_assignment
729 ir
->val
->accept(this);
730 src_reg
= this->result
;
731 assert(src_reg
.file
!= PROGRAM_UNDEFINED
);
733 for (i
= 0; i
< 4; i
++) {
734 if (i
< ir
->type
->vector_elements
) {
737 swizzle
[i
] = ir
->mask
.x
;
740 swizzle
[i
] = ir
->mask
.y
;
743 swizzle
[i
] = ir
->mask
.z
;
746 swizzle
[i
] = ir
->mask
.w
;
750 /* If the type is smaller than a vec4, replicate the last
753 swizzle
[i
] = ir
->type
->vector_elements
- 1;
757 src_reg
.swizzle
= MAKE_SWIZZLE4(swizzle
[0],
762 this->result
= src_reg
;
766 get_builtin_matrix_ref(void *mem_ctx
, struct gl_program
*prog
, ir_variable
*var
)
769 * NOTE: The ARB_vertex_program extension specified that matrices get
770 * loaded in registers in row-major order. With GLSL, we want column-
771 * major order. So, we need to transpose all matrices here...
773 static const struct {
778 { "gl_ModelViewMatrix", STATE_MODELVIEW_MATRIX
, STATE_MATRIX_TRANSPOSE
},
779 { "gl_ModelViewMatrixInverse", STATE_MODELVIEW_MATRIX
, STATE_MATRIX_INVTRANS
},
780 { "gl_ModelViewMatrixTranspose", STATE_MODELVIEW_MATRIX
, 0 },
781 { "gl_ModelViewMatrixInverseTranspose", STATE_MODELVIEW_MATRIX
, STATE_MATRIX_INVERSE
},
783 { "gl_ProjectionMatrix", STATE_PROJECTION_MATRIX
, STATE_MATRIX_TRANSPOSE
},
784 { "gl_ProjectionMatrixInverse", STATE_PROJECTION_MATRIX
, STATE_MATRIX_INVTRANS
},
785 { "gl_ProjectionMatrixTranspose", STATE_PROJECTION_MATRIX
, 0 },
786 { "gl_ProjectionMatrixInverseTranspose", STATE_PROJECTION_MATRIX
, STATE_MATRIX_INVERSE
},
788 { "gl_ModelViewProjectionMatrix", STATE_MVP_MATRIX
, STATE_MATRIX_TRANSPOSE
},
789 { "gl_ModelViewProjectionMatrixInverse", STATE_MVP_MATRIX
, STATE_MATRIX_INVTRANS
},
790 { "gl_ModelViewProjectionMatrixTranspose", STATE_MVP_MATRIX
, 0 },
791 { "gl_ModelViewProjectionMatrixInverseTranspose", STATE_MVP_MATRIX
, STATE_MATRIX_INVERSE
},
793 { "gl_TextureMatrix", STATE_TEXTURE_MATRIX
, STATE_MATRIX_TRANSPOSE
},
794 { "gl_TextureMatrixInverse", STATE_TEXTURE_MATRIX
, STATE_MATRIX_INVTRANS
},
795 { "gl_TextureMatrixTranspose", STATE_TEXTURE_MATRIX
, 0 },
796 { "gl_TextureMatrixInverseTranspose", STATE_TEXTURE_MATRIX
, STATE_MATRIX_INVERSE
},
798 { "gl_NormalMatrix", STATE_MODELVIEW_MATRIX
, STATE_MATRIX_INVERSE
},
804 /* C++ gets angry when we try to use an int as a gl_state_index, so we use
805 * ints for gl_state_index. Make sure they're compatible.
807 assert(sizeof(gl_state_index
) == sizeof(int));
809 for (i
= 0; i
< Elements(matrices
); i
++) {
810 if (strcmp(var
->name
, matrices
[i
].name
) == 0) {
812 int last_pos
= -1, base_pos
= -1;
813 int tokens
[STATE_LENGTH
];
815 tokens
[0] = matrices
[i
].matrix
;
816 tokens
[1] = 0; /* array index! */
817 tokens
[4] = matrices
[i
].modifier
;
819 /* Add a ref for each column. It looks like the reason we do
820 * it this way is that _mesa_add_state_reference doesn't work
821 * for things that aren't vec4s, so the tokens[2]/tokens[3]
822 * range has to be equal.
824 for (j
= 0; j
< 4; j
++) {
827 int pos
= _mesa_add_state_reference(prog
->Parameters
,
828 (gl_state_index
*)tokens
);
829 assert(last_pos
== -1 || last_pos
== base_pos
+ j
);
834 entry
= new(mem_ctx
) temp_entry(var
,
846 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
848 ir_to_mesa_src_reg src_reg
;
849 temp_entry
*entry
= find_variable_storage(ir
->var
);
854 switch (ir
->var
->mode
) {
856 entry
= get_builtin_matrix_ref(this->mem_ctx
, this->prog
, ir
->var
);
860 /* FINISHME: Fix up uniform name for arrays and things */
861 assert(ir
->var
->type
->gl_type
!= 0 &&
862 ir
->var
->type
->gl_type
!= GL_INVALID_ENUM
);
863 loc
= _mesa_add_uniform(this->prog
->Parameters
,
865 type_size(ir
->var
->type
) * 4,
866 ir
->var
->type
->gl_type
,
868 /* Always mark the uniform used at this point. If it isn't
869 * used, dead code elimination should have nuked the decl already.
871 this->prog
->Parameters
->Parameters
[loc
].Used
= GL_TRUE
;
873 entry
= new(mem_ctx
) temp_entry(ir
->var
, PROGRAM_UNIFORM
, loc
);
874 this->variable_storage
.push_tail(entry
);
879 var_in
= (ir
->var
->mode
== ir_var_in
||
880 ir
->var
->mode
== ir_var_inout
);
882 for (i
= 0; i
< ARRAY_SIZE(builtin_var_to_mesa_reg
); i
++) {
883 bool in
= builtin_var_to_mesa_reg
[i
].file
== PROGRAM_INPUT
;
885 if (strcmp(ir
->var
->name
, builtin_var_to_mesa_reg
[i
].name
) == 0 &&
889 if (i
== ARRAY_SIZE(builtin_var_to_mesa_reg
)) {
890 printf("Failed to find builtin for %s variable %s\n",
891 var_in
? "in" : "out",
895 entry
= new(mem_ctx
) temp_entry(ir
->var
,
896 builtin_var_to_mesa_reg
[i
].file
,
897 builtin_var_to_mesa_reg
[i
].index
);
900 entry
= new(mem_ctx
) temp_entry(ir
->var
, PROGRAM_TEMPORARY
,
902 this->variable_storage
.push_tail(entry
);
904 next_temp
+= type_size(ir
->var
->type
);
909 printf("Failed to make storage for %s\n", ir
->var
->name
);
914 src_reg
.file
= entry
->file
;
915 src_reg
.index
= entry
->index
;
916 /* If the type is smaller than a vec4, replicate the last channel out. */
917 src_reg
.swizzle
= swizzle_for_size(ir
->var
->type
->vector_elements
);
918 src_reg
.reladdr
= false;
921 this->result
= src_reg
;
925 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
928 ir_to_mesa_src_reg src_reg
;
930 index
= ir
->array_index
->constant_expression_value();
932 /* By the time we make it to this stage, matrices should be broken down
935 assert(!ir
->type
->is_matrix());
937 ir
->array
->accept(this);
938 src_reg
= this->result
;
940 if (src_reg
.file
== PROGRAM_INPUT
||
941 src_reg
.file
== PROGRAM_OUTPUT
) {
942 assert(index
); /* FINISHME: Handle variable indexing of builtins. */
944 src_reg
.index
+= index
->value
.i
[0];
947 src_reg
.index
+= index
->value
.i
[0];
949 ir_to_mesa_src_reg array_base
= this->result
;
950 /* Variable index array dereference. It eats the "vec4" of the
951 * base of the array and an index that offsets the Mesa register
954 ir
->array_index
->accept(this);
956 /* FINISHME: This doesn't work when we're trying to do the LHS
959 src_reg
.reladdr
= true;
960 ir_to_mesa_emit_op1(ir
, OPCODE_ARL
, ir_to_mesa_address_reg
,
963 this->result
= get_temp(ir
->type
);
964 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
,
965 ir_to_mesa_dst_reg_from_src(this->result
),
970 /* If the type is smaller than a vec4, replicate the last channel out. */
971 src_reg
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
973 this->result
= src_reg
;
977 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
980 const glsl_type
*struct_type
= ir
->record
->type
;
983 ir
->record
->accept(this);
985 for (i
= 0; i
< struct_type
->length
; i
++) {
986 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
988 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
990 this->result
.index
+= offset
;
994 * We want to be careful in assignment setup to hit the actual storage
995 * instead of potentially using a temporary like we might with the
996 * ir_dereference handler.
998 * Thanks to ir_swizzle_swizzle, and ir_vec_index_to_swizzle, we
999 * should only see potentially one variable array index of a vector,
1000 * and one swizzle, before getting to actual vec4 storage. So handle
1001 * those, then go use ir_dereference to handle the rest.
1003 static struct ir_to_mesa_dst_reg
1004 get_assignment_lhs(ir_instruction
*ir
, ir_to_mesa_visitor
*v
)
1006 struct ir_to_mesa_dst_reg dst_reg
;
1007 ir_dereference
*deref
;
1010 /* Use the rvalue deref handler for the most part. We'll ignore
1011 * swizzles in it and write swizzles using writemask, though.
1014 dst_reg
= ir_to_mesa_dst_reg_from_src(v
->result
);
1016 if ((deref
= ir
->as_dereference())) {
1017 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1018 assert(!deref_array
|| deref_array
->array
->type
->is_array());
1021 } else if ((swiz
= ir
->as_swizzle())) {
1022 dst_reg
.writemask
= 0;
1023 if (swiz
->mask
.num_components
>= 1)
1024 dst_reg
.writemask
|= (1 << swiz
->mask
.x
);
1025 if (swiz
->mask
.num_components
>= 2)
1026 dst_reg
.writemask
|= (1 << swiz
->mask
.y
);
1027 if (swiz
->mask
.num_components
>= 3)
1028 dst_reg
.writemask
|= (1 << swiz
->mask
.z
);
1029 if (swiz
->mask
.num_components
>= 4)
1030 dst_reg
.writemask
|= (1 << swiz
->mask
.w
);
1037 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1039 struct ir_to_mesa_dst_reg l
;
1040 struct ir_to_mesa_src_reg r
;
1042 assert(!ir
->lhs
->type
->is_matrix());
1043 assert(!ir
->lhs
->type
->is_array());
1044 assert(ir
->lhs
->type
->base_type
!= GLSL_TYPE_STRUCT
);
1046 l
= get_assignment_lhs(ir
->lhs
, this);
1048 ir
->rhs
->accept(this);
1050 assert(l
.file
!= PROGRAM_UNDEFINED
);
1051 assert(r
.file
!= PROGRAM_UNDEFINED
);
1053 if (ir
->condition
) {
1054 ir_constant
*condition_constant
;
1056 condition_constant
= ir
->condition
->constant_expression_value();
1058 assert(condition_constant
&& condition_constant
->value
.b
[0]);
1061 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, l
, r
);
1066 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1068 ir_to_mesa_src_reg src_reg
;
1069 GLfloat stack_vals
[4];
1070 GLfloat
*values
= stack_vals
;
1073 if (ir
->type
->is_matrix() || ir
->type
->is_array()) {
1074 assert(!"FINISHME: array/matrix constants");
1077 src_reg
.file
= PROGRAM_CONSTANT
;
1078 switch (ir
->type
->base_type
) {
1079 case GLSL_TYPE_FLOAT
:
1080 values
= &ir
->value
.f
[0];
1082 case GLSL_TYPE_UINT
:
1083 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1084 values
[i
] = ir
->value
.u
[i
];
1088 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1089 values
[i
] = ir
->value
.i
[i
];
1092 case GLSL_TYPE_BOOL
:
1093 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1094 values
[i
] = ir
->value
.b
[i
];
1098 assert(!"Non-float/uint/int/bool constant");
1101 src_reg
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1102 values
, ir
->type
->vector_elements
,
1104 src_reg
.reladdr
= false;
1107 this->result
= src_reg
;
1112 ir_to_mesa_visitor::visit(ir_call
*ir
)
1114 printf("Can't support call to %s\n", ir
->callee_name());
1120 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1124 ir
->coordinate
->accept(this);
1128 ir_to_mesa_visitor::visit(ir_return
*ir
)
1132 ir
->get_value()->accept(this);
1137 ir_to_mesa_visitor::visit(ir_if
*ir
)
1139 ir_to_mesa_instruction
*if_inst
, *else_inst
= NULL
;
1141 ir
->condition
->accept(this);
1142 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
1144 if_inst
= ir_to_mesa_emit_op1(ir
->condition
,
1145 OPCODE_IF
, ir_to_mesa_undef_dst
,
1148 this->instructions
.push_tail(if_inst
);
1150 visit_exec_list(&ir
->then_instructions
, this);
1152 if (!ir
->else_instructions
.is_empty()) {
1153 else_inst
= ir_to_mesa_emit_op1(ir
->condition
, OPCODE_ELSE
,
1154 ir_to_mesa_undef_dst
,
1156 visit_exec_list(&ir
->then_instructions
, this);
1159 if_inst
= ir_to_mesa_emit_op1(ir
->condition
, OPCODE_ENDIF
,
1160 ir_to_mesa_undef_dst
, ir_to_mesa_undef
);
1163 ir_to_mesa_visitor::ir_to_mesa_visitor()
1165 result
.file
= PROGRAM_UNDEFINED
;
1169 static struct prog_src_register
1170 mesa_src_reg_from_ir_src_reg(ir_to_mesa_src_reg reg
)
1172 struct prog_src_register mesa_reg
;
1174 mesa_reg
.File
= reg
.file
;
1175 assert(reg
.index
< (1 << INST_INDEX_BITS
) - 1);
1176 mesa_reg
.Index
= reg
.index
;
1177 mesa_reg
.Swizzle
= reg
.swizzle
;
1178 mesa_reg
.RelAddr
= reg
.reladdr
;
1184 set_branchtargets(struct prog_instruction
*mesa_instructions
,
1185 int num_instructions
)
1187 int if_count
= 0, loop_count
;
1188 int *if_stack
, *loop_stack
;
1189 int if_stack_pos
= 0, loop_stack_pos
= 0;
1192 for (i
= 0; i
< num_instructions
; i
++) {
1193 switch (mesa_instructions
[i
].Opcode
) {
1197 case OPCODE_BGNLOOP
:
1202 mesa_instructions
[i
].BranchTarget
= -1;
1209 if_stack
= (int *)calloc(if_count
, sizeof(*if_stack
));
1210 loop_stack
= (int *)calloc(loop_count
, sizeof(*loop_stack
));
1212 for (i
= 0; i
< num_instructions
; i
++) {
1213 switch (mesa_instructions
[i
].Opcode
) {
1215 if_stack
[if_stack_pos
] = i
;
1219 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
1220 if_stack
[if_stack_pos
- 1] = i
;
1223 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
1226 case OPCODE_BGNLOOP
:
1227 loop_stack
[loop_stack_pos
] = i
;
1230 case OPCODE_ENDLOOP
:
1232 /* Rewrite any breaks/conts at this nesting level (haven't
1233 * already had a BranchTarget assigned) to point to the end
1236 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
1237 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
1238 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
1239 if (mesa_instructions
[j
].BranchTarget
== -1) {
1240 mesa_instructions
[j
].BranchTarget
= i
;
1244 /* The loop ends point at each other. */
1245 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
1246 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
1256 print_program(struct prog_instruction
*mesa_instructions
,
1257 ir_instruction
**mesa_instruction_annotation
,
1258 int num_instructions
)
1260 ir_instruction
*last_ir
= NULL
;
1263 for (i
= 0; i
< num_instructions
; i
++) {
1264 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
1265 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
1267 if (last_ir
!= ir
&& ir
) {
1268 ir_print_visitor print
;
1274 _mesa_print_instruction(mesa_inst
);
1279 count_resources(struct gl_program
*prog
)
1281 prog
->InputsRead
= 0;
1282 prog
->OutputsWritten
= 0;
1285 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
1286 struct prog_instruction
*inst
= &prog
->Instructions
[i
];
1289 switch (inst
->DstReg
.File
) {
1290 case PROGRAM_OUTPUT
:
1291 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->DstReg
.Index
);
1294 prog
->InputsRead
|= BITFIELD64_BIT(inst
->DstReg
.Index
);
1300 for (reg
= 0; reg
< _mesa_num_inst_src_regs(inst
->Opcode
); reg
++) {
1301 switch (inst
->SrcReg
[reg
].File
) {
1302 case PROGRAM_OUTPUT
:
1303 prog
->OutputsWritten
|= BITFIELD64_BIT(inst
->SrcReg
[reg
].Index
);
1306 prog
->InputsRead
|= BITFIELD64_BIT(inst
->SrcReg
[reg
].Index
);
1315 /* Each stage has some uniforms in its Parameters list. The Uniforms
1316 * list for the linked shader program has a pointer to these uniforms
1317 * in each of the stage's Parameters list, so that their values can be
1318 * updated when a uniform is set.
1321 link_uniforms_to_shared_uniform_list(struct gl_uniform_list
*uniforms
,
1322 struct gl_program
*prog
)
1326 for (i
= 0; i
< prog
->Parameters
->NumParameters
; i
++) {
1327 const struct gl_program_parameter
*p
= prog
->Parameters
->Parameters
+ i
;
1329 if (p
->Type
== PROGRAM_UNIFORM
|| p
->Type
== PROGRAM_SAMPLER
) {
1330 struct gl_uniform
*uniform
=
1331 _mesa_append_uniform(uniforms
, p
->Name
, prog
->Target
, i
);
1333 uniform
->Initialized
= p
->Initialized
;
1339 get_mesa_program(GLcontext
*ctx
, void *mem_ctx
, struct glsl_shader
*shader
)
1341 ir_to_mesa_visitor v
;
1342 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
1343 ir_instruction
**mesa_instruction_annotation
;
1345 exec_list
*instructions
= &shader
->ir
;
1346 struct gl_program
*prog
;
1349 switch (shader
->Type
) {
1350 case GL_VERTEX_SHADER
: target
= GL_VERTEX_PROGRAM_ARB
; break;
1351 case GL_FRAGMENT_SHADER
: target
= GL_FRAGMENT_PROGRAM_ARB
; break;
1352 default: assert(!"should not be reached"); break;
1355 prog
= ctx
->Driver
.NewProgram(ctx
, target
, 1);
1358 prog
->Parameters
= _mesa_new_parameter_list();
1359 prog
->Varying
= _mesa_new_parameter_list();
1360 prog
->Attributes
= _mesa_new_parameter_list();
1364 v
.mem_ctx
= talloc_new(NULL
);
1365 visit_exec_list(instructions
, &v
);
1366 v
.ir_to_mesa_emit_op1(NULL
, OPCODE_END
,
1367 ir_to_mesa_undef_dst
, ir_to_mesa_undef
);
1369 prog
->NumTemporaries
= v
.next_temp
;
1371 int num_instructions
= 0;
1372 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
1377 (struct prog_instruction
*)calloc(num_instructions
,
1378 sizeof(*mesa_instructions
));
1379 mesa_instruction_annotation
= talloc_array(mem_ctx
, ir_instruction
*,
1382 mesa_inst
= mesa_instructions
;
1384 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
1385 ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
1387 mesa_inst
->Opcode
= inst
->op
;
1388 mesa_inst
->DstReg
.File
= inst
->dst_reg
.file
;
1389 mesa_inst
->DstReg
.Index
= inst
->dst_reg
.index
;
1390 mesa_inst
->DstReg
.CondMask
= COND_TR
;
1391 mesa_inst
->DstReg
.WriteMask
= inst
->dst_reg
.writemask
;
1392 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src_reg
[0]);
1393 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src_reg
[1]);
1394 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src_reg
[2]);
1395 mesa_instruction_annotation
[i
] = inst
->ir
;
1401 set_branchtargets(mesa_instructions
, num_instructions
);
1403 print_program(mesa_instructions
, mesa_instruction_annotation
,
1407 prog
->Instructions
= mesa_instructions
;
1408 prog
->NumInstructions
= num_instructions
;
1410 _mesa_reference_program(ctx
, &shader
->mesa_shader
->Program
, prog
);
1415 /* Takes a Mesa gl shader structure and compiles it, returning our Mesa-like
1416 * structure with the IR and such attached.
1418 static struct glsl_shader
*
1419 _mesa_get_glsl_shader(GLcontext
*ctx
, void *mem_ctx
, struct gl_shader
*sh
)
1421 struct glsl_shader
*shader
= talloc_zero(mem_ctx
, struct glsl_shader
);
1422 struct _mesa_glsl_parse_state
*state
;
1424 shader
->Type
= sh
->Type
;
1425 shader
->Name
= sh
->Name
;
1426 shader
->RefCount
= 1;
1427 shader
->Source
= sh
->Source
;
1428 shader
->SourceLen
= strlen(sh
->Source
);
1429 shader
->mesa_shader
= sh
;
1431 state
= talloc_zero(shader
, struct _mesa_glsl_parse_state
);
1432 switch (shader
->Type
) {
1433 case GL_VERTEX_SHADER
: state
->target
= vertex_shader
; break;
1434 case GL_FRAGMENT_SHADER
: state
->target
= fragment_shader
; break;
1435 case GL_GEOMETRY_SHADER
: state
->target
= geometry_shader
; break;
1438 state
->scanner
= NULL
;
1439 state
->translation_unit
.make_empty();
1440 state
->symbols
= new(mem_ctx
) glsl_symbol_table
;
1441 state
->info_log
= talloc_strdup(shader
, "");
1442 state
->error
= false;
1443 state
->temp_index
= 0;
1444 state
->loop_or_switch_nesting
= NULL
;
1445 state
->ARB_texture_rectangle_enable
= true;
1447 _mesa_glsl_lexer_ctor(state
, shader
->Source
);
1448 _mesa_glsl_parse(state
);
1449 _mesa_glsl_lexer_dtor(state
);
1451 shader
->ir
.make_empty();
1452 if (!state
->error
&& !state
->translation_unit
.is_empty())
1453 _mesa_ast_to_hir(&shader
->ir
, state
);
1455 /* Optimization passes */
1456 if (!state
->error
&& !shader
->ir
.is_empty()) {
1461 progress
= do_function_inlining(&shader
->ir
) || progress
;
1462 progress
= do_if_simplification(&shader
->ir
) || progress
;
1463 progress
= do_copy_propagation(&shader
->ir
) || progress
;
1464 progress
= do_dead_code_local(&shader
->ir
) || progress
;
1465 progress
= do_dead_code_unlinked(state
, &shader
->ir
) || progress
;
1466 progress
= do_constant_variable_unlinked(&shader
->ir
) || progress
;
1467 progress
= do_constant_folding(&shader
->ir
) || progress
;
1468 progress
= do_vec_index_to_swizzle(&shader
->ir
) || progress
;
1469 progress
= do_swizzle_swizzle(&shader
->ir
) || progress
;
1473 shader
->symbols
= state
->symbols
;
1475 shader
->CompileStatus
= !state
->error
;
1476 shader
->InfoLog
= state
->info_log
;
1486 _mesa_glsl_compile_shader(GLcontext
*ctx
, struct gl_shader
*sh
)
1488 struct glsl_shader
*shader
;
1489 TALLOC_CTX
*mem_ctx
= talloc_new(NULL
);
1491 shader
= _mesa_get_glsl_shader(ctx
, mem_ctx
, sh
);
1493 sh
->CompileStatus
= shader
->CompileStatus
;
1494 sh
->InfoLog
= strdup(shader
->InfoLog
);
1495 talloc_free(mem_ctx
);
1499 _mesa_glsl_link_shader(GLcontext
*ctx
, struct gl_shader_program
*prog
)
1501 struct glsl_program
*whole_program
;
1504 _mesa_clear_shader_program_data(ctx
, prog
);
1506 whole_program
= talloc_zero(NULL
, struct glsl_program
);
1507 whole_program
->LinkStatus
= GL_TRUE
;
1508 whole_program
->NumShaders
= prog
->NumShaders
;
1509 whole_program
->Shaders
= talloc_array(whole_program
, struct glsl_shader
*,
1512 for (i
= 0; i
< prog
->NumShaders
; i
++) {
1513 whole_program
->Shaders
[i
] = _mesa_get_glsl_shader(ctx
, whole_program
,
1515 if (!whole_program
->Shaders
[i
]->CompileStatus
) {
1516 whole_program
->InfoLog
=
1517 talloc_asprintf_append(whole_program
->InfoLog
,
1518 "linking with uncompiled shader");
1519 whole_program
->LinkStatus
= GL_FALSE
;
1523 prog
->Uniforms
= _mesa_new_uniform_list();
1524 prog
->Varying
= _mesa_new_parameter_list();
1525 _mesa_reference_vertprog(ctx
, &prog
->VertexProgram
, NULL
);
1526 _mesa_reference_fragprog(ctx
, &prog
->FragmentProgram
, NULL
);
1528 if (whole_program
->LinkStatus
)
1529 link_shaders(whole_program
);
1531 prog
->LinkStatus
= whole_program
->LinkStatus
;
1533 /* FINISHME: This should use the linker-generated code */
1534 if (prog
->LinkStatus
) {
1535 for (i
= 0; i
< prog
->NumShaders
; i
++) {
1536 struct gl_program
*linked_prog
;
1538 linked_prog
= get_mesa_program(ctx
, whole_program
,
1539 whole_program
->Shaders
[i
]);
1540 count_resources(linked_prog
);
1542 link_uniforms_to_shared_uniform_list(prog
->Uniforms
, linked_prog
);
1544 switch (whole_program
->Shaders
[i
]->Type
) {
1545 case GL_VERTEX_SHADER
:
1546 _mesa_reference_vertprog(ctx
, &prog
->VertexProgram
,
1547 (struct gl_vertex_program
*)linked_prog
);
1549 case GL_FRAGMENT_SHADER
:
1550 _mesa_reference_fragprog(ctx
, &prog
->FragmentProgram
,
1551 (struct gl_fragment_program
*)linked_prog
);
1557 talloc_free(whole_program
);