src/mesa/shader/slang/slang_emit.c

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2005-2008  Brian Paul   All Rights Reserved.
   5  * Copyright (C) 2008 VMware, Inc.   All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included
  15  * in all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  21  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /**
  26  * \file slang_emit.c
  27  * Emit program instructions (PI code) from IR trees.
  28  * \author Brian Paul
  29  */
  30
  31 /***
  32  *** NOTES
  33  ***
  34  *** To emit GPU instructions, we basically just do an in-order traversal
  35  *** of the IR tree.
  36  ***/
  37
  38
  39 #include "main/imports.h"
  40 #include "main/context.h"
  41 #include "main/macros.h"
  42 #include "shader/program.h"
  43 #include "shader/prog_instruction.h"
  44 #include "shader/prog_parameter.h"
  45 #include "shader/prog_print.h"
  46 #include "slang_builtin.h"
  47 #include "slang_emit.h"
  48 #include "slang_mem.h"
  49
  50
  51 #define PEEPHOLE_OPTIMIZATIONS 1
  52 #define ANNOTATE 0
  53
  54
  55 typedef struct
  56 {
  57    slang_info_log *log;
  58    slang_var_table *vt;
  59    struct gl_program *prog;
  60    struct gl_program **Subroutines;
  61    GLuint NumSubroutines;
  62
  63    GLuint MaxInstructions;  /**< size of prog->Instructions[] buffer */
  64
  65    /* code-gen options */
  66    GLboolean EmitHighLevelInstructions;
  67    GLboolean EmitCondCodes;
  68    GLboolean EmitComments;
  69    GLboolean EmitBeginEndSub; /* XXX TEMPORARY */
  70 } slang_emit_info;
  71
  72
  73
  74 static struct gl_program *
  75 new_subroutine(slang_emit_info *emitInfo, GLuint *id)
  76 {
  77    GET_CURRENT_CONTEXT(ctx);
  78    const GLuint n = emitInfo->NumSubroutines;
  79
  80    emitInfo->Subroutines = (struct gl_program **)
  81       _mesa_realloc(emitInfo->Subroutines,
  82                     n * sizeof(struct gl_program),
  83                     (n + 1) * sizeof(struct gl_program));
  84    emitInfo->Subroutines[n] = ctx->Driver.NewProgram(ctx, emitInfo->prog->Target, 0);
  85    emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters;
  86    emitInfo->NumSubroutines++;
  87    *id = n;
  88    return emitInfo->Subroutines[n];
  89 }
  90
  91
  92 /**
  93  * Convert a writemask to a swizzle.  Used for testing cond codes because
  94  * we only want to test the cond code component(s) that was set by the
  95  * previous instruction.
  96  */
  97 static GLuint
  98 writemask_to_swizzle(GLuint writemask)
  99 {
 100    if (writemask == WRITEMASK_X)
 101       return SWIZZLE_XXXX;
 102    if (writemask == WRITEMASK_Y)
 103       return SWIZZLE_YYYY;
 104    if (writemask == WRITEMASK_Z)
 105       return SWIZZLE_ZZZZ;
 106    if (writemask == WRITEMASK_W)
 107       return SWIZZLE_WWWW;
 108    return SWIZZLE_XYZW;  /* shouldn't be hit */
 109 }
 110
 111
 112 /**
 113  * Convert a swizzle mask to a writemask.
 114  * Note that the slang_ir_storage->Swizzle field can represent either a
 115  * swizzle mask or a writemask, depending on how it's used.  For example,
 116  * when we parse "direction.yz" alone, we don't know whether .yz is a
 117  * writemask or a swizzle.  In this case, we encode ".yz" in store->Swizzle
 118  * as a swizzle mask (.yz?? actually).  Later, if direction.yz is used as
 119  * an R-value, we use store->Swizzle as-is.  Otherwise, if direction.yz is
 120  * used as an L-value, we convert it to a writemask.
 121  */
 122 static GLuint
 123 swizzle_to_writemask(GLuint swizzle)
 124 {
 125    GLuint i, writemask = 0x0;
 126    for (i = 0; i < 4; i++) {
 127       GLuint swz = GET_SWZ(swizzle, i);
 128       if (swz <= SWIZZLE_W) {
 129          writemask |= (1 << swz);
 130       }
 131    }
 132    return writemask;
 133 }
 134
 135
 136 /**
 137  * Swizzle a swizzle (function composition).
 138  * That is, return swz2(swz1), or said another way: swz1.szw2
 139  * Example: swizzle_swizzle(".zwxx", ".xxyw") yields ".zzwx"
 140  */
 141 GLuint
 142 _slang_swizzle_swizzle(GLuint swz1, GLuint swz2)
 143 {
 144    GLuint i, swz, s[4];
 145    for (i = 0; i < 4; i++) {
 146       GLuint c = GET_SWZ(swz2, i);
 147       if (c <= SWIZZLE_W)
 148          s[i] = GET_SWZ(swz1, c);
 149       else
 150          s[i] = c;
 151    }
 152    swz = MAKE_SWIZZLE4(s[0], s[1], s[2], s[3]);
 153    return swz;
 154 }
 155
 156
 157 /**
 158  * Return the default swizzle mask for accessing a variable of the
 159  * given size (in floats).  If size = 1, comp is used to identify
 160  * which component [0..3] of the register holds the variable.
 161  */
 162 GLuint
 163 _slang_var_swizzle(GLint size, GLint comp)
 164 {
 165    switch (size) {
 166    case 1:
 167       return MAKE_SWIZZLE4(comp, comp, comp, comp);
 168    case 2:
 169       return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_NIL, SWIZZLE_NIL);
 170    case 3:
 171       return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_NIL);
 172    default:
 173       return SWIZZLE_XYZW;
 174    }
 175 }
 176
 177
 178
 179 /**
 180  * Allocate storage for the given node (if it hasn't already been allocated).
 181  *
 182  * Typically this is temporary storage for an intermediate result (such as
 183  * for a multiply or add, etc).
 184  *
 185  * If n->Store does not exist it will be created and will be of the size
 186  * specified by defaultSize.
 187  */
 188 static GLboolean
 189 alloc_node_storage(slang_emit_info *emitInfo, slang_ir_node *n,
 190                    GLint defaultSize)
 191 {
 192    assert(!n->Var);
 193    if (!n->Store) {
 194       assert(defaultSize > 0);
 195       n->Store = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, defaultSize);
 196    }
 197
 198    /* now allocate actual register(s).  I.e. set n->Store->Index >= 0 */
 199    if (n->Store->Index < 0) {
 200       if (!_slang_alloc_temp(emitInfo->vt, n->Store)) {
 201          slang_info_log_error(emitInfo->log,
 202                               "Ran out of registers, too many temporaries");
 203          _slang_free(n->Store);
 204          n->Store = NULL;
 205          return GL_FALSE;
 206       }
 207    }
 208    return GL_TRUE;
 209 }
 210
 211
 212 /**
 213  * Free temporary storage, if n->Store is, in fact, temp storage.
 214  * Otherwise, no-op.
 215  */
 216 static void
 217 free_node_storage(slang_var_table *vt, slang_ir_node *n)
 218 {
 219    if (n->Store->File == PROGRAM_TEMPORARY &&
 220        n->Store->Index >= 0 &&
 221        n->Opcode != IR_SWIZZLE) {
 222       if (_slang_is_temp(vt, n->Store)) {
 223          _slang_free_temp(vt, n->Store);
 224          n->Store->Index = -1;
 225          n->Store = NULL; /* XXX this may not be needed */
 226       }
 227    }
 228 }
 229
 230
 231 /**
 232  * Helper function to allocate a short-term temporary.
 233  * Free it with _slang_free_temp().
 234  */
 235 static GLboolean
 236 alloc_local_temp(slang_emit_info *emitInfo, slang_ir_storage *temp, GLint size)
 237 {
 238    assert(size >= 1);
 239    assert(size <= 4);
 240    _mesa_bzero(temp, sizeof(*temp));
 241    temp->Size = size;
 242    temp->File = PROGRAM_TEMPORARY;
 243    temp->Index = -1;
 244    return _slang_alloc_temp(emitInfo->vt, temp);
 245 }
 246
 247
 248 /**
 249  * Remove any SWIZZLE_NIL terms from given swizzle mask.
 250  * For a swizzle like .z??? generate .zzzz (replicate single component).
 251  * Else, for .wx?? generate .wxzw (insert default component for the position).
 252  */
 253 static GLuint
 254 fix_swizzle(GLuint swizzle)
 255 {
 256    GLuint c0 = GET_SWZ(swizzle, 0),
 257       c1 = GET_SWZ(swizzle, 1),
 258       c2 = GET_SWZ(swizzle, 2),
 259       c3 = GET_SWZ(swizzle, 3);
 260    if (c1 == SWIZZLE_NIL && c2 == SWIZZLE_NIL && c3 == SWIZZLE_NIL) {
 261       /* smear first component across all positions */
 262       c1 = c2 = c3 = c0;
 263    }
 264    else {
 265       /* insert default swizzle components */
 266       if (c0 == SWIZZLE_NIL)
 267          c0 = SWIZZLE_X;
 268       if (c1 == SWIZZLE_NIL)
 269          c1 = SWIZZLE_Y;
 270       if (c2 == SWIZZLE_NIL)
 271          c2 = SWIZZLE_Z;
 272       if (c3 == SWIZZLE_NIL)
 273          c3 = SWIZZLE_W;
 274    }
 275    return MAKE_SWIZZLE4(c0, c1, c2, c3);
 276 }
 277
 278
 279
 280 /**
 281  * Convert IR storage to an instruction dst register.
 282  */
 283 static void
 284 storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st)
 285 {
 286    const GLboolean relAddr = st->RelAddr;
 287    const GLint size = st->Size;
 288    GLint index = st->Index;
 289    GLuint swizzle = st->Swizzle;
 290
 291    assert(index >= 0);
 292    /* if this is storage relative to some parent storage, walk up the tree */
 293    while (st->Parent) {
 294       st = st->Parent;
 295       assert(st->Index >= 0);
 296       index += st->Index;
 297       swizzle = _slang_swizzle_swizzle(st->Swizzle, swizzle);
 298    }
 299
 300    assert(st->File != PROGRAM_UNDEFINED);
 301    dst->File = st->File;
 302
 303    assert(index >= 0);
 304    dst->Index = index;
 305
 306    assert(size >= 1);
 307    assert(size <= 4);
 308
 309    if (swizzle != SWIZZLE_XYZW) {
 310       dst->WriteMask = swizzle_to_writemask(swizzle);
 311    }
 312    else {
 313       switch (size) {
 314       case 1:
 315          dst->WriteMask = WRITEMASK_X << GET_SWZ(st->Swizzle, 0);
 316          break;
 317       case 2:
 318          dst->WriteMask = WRITEMASK_XY;
 319          break;
 320       case 3:
 321          dst->WriteMask = WRITEMASK_XYZ;
 322          break;
 323       case 4:
 324          dst->WriteMask = WRITEMASK_XYZW;
 325          break;
 326       default:
 327          ; /* error would have been caught above */
 328       }
 329    }
 330
 331    dst->RelAddr = relAddr;
 332 }
 333
 334
 335 /**
 336  * Convert IR storage to an instruction src register.
 337  */
 338 static void
 339 storage_to_src_reg(struct prog_src_register *src, const slang_ir_storage *st)
 340 {
 341    const GLboolean relAddr = st->RelAddr;
 342    GLint index = st->Index;
 343    GLuint swizzle = st->Swizzle;
 344
 345    /* if this is storage relative to some parent storage, walk up the tree */
 346    assert(index >= 0);
 347    while (st->Parent) {
 348       st = st->Parent;
 349       if (st->Index < 0) {
 350          /* an error should have been reported already */
 351          return;
 352       }
 353       assert(st->Index >= 0);
 354       index += st->Index;
 355       swizzle = _slang_swizzle_swizzle(fix_swizzle(st->Swizzle), swizzle);
 356    }
 357
 358    assert(st->File >= 0);
 359 #if 1 /* XXX temporary */
 360    if (st->File == PROGRAM_UNDEFINED) {
 361       slang_ir_storage *st0 = (slang_ir_storage *) st;
 362       st0->File = PROGRAM_TEMPORARY;
 363    }
 364 #endif
 365    assert(st->File < PROGRAM_UNDEFINED);
 366    src->File = st->File;
 367
 368    assert(index >= 0);
 369    src->Index = index;
 370
 371    swizzle = fix_swizzle(swizzle);
 372    assert(GET_SWZ(swizzle, 0) <= SWIZZLE_W);
 373    assert(GET_SWZ(swizzle, 1) <= SWIZZLE_W);
 374    assert(GET_SWZ(swizzle, 2) <= SWIZZLE_W);
 375    assert(GET_SWZ(swizzle, 3) <= SWIZZLE_W);
 376    src->Swizzle = swizzle;
 377
 378    src->RelAddr = relAddr;
 379 }
 380
 381
 382 /*
 383  * Setup storage pointing to a scalar constant/literal.
 384  */
 385 static void
 386 constant_to_storage(slang_emit_info *emitInfo,
 387                     GLfloat val,
 388                     slang_ir_storage *store)
 389 {
 390    GLuint swizzle;
 391    GLint reg;
 392    GLfloat value[4];
 393
 394    value[0] = val;
 395    reg = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
 396                                         value, 1, &swizzle);
 397
 398    memset(store, 0, sizeof(*store));
 399    store->File = PROGRAM_CONSTANT;
 400    store->Index = reg;
 401    store->Swizzle = swizzle;
 402 }
 403
 404
 405 /**
 406  * Add new instruction at end of given program.
 407  * \param prog  the program to append instruction onto
 408  * \param opcode  opcode for the new instruction
 409  * \return pointer to the new instruction
 410  */
 411 static struct prog_instruction *
 412 new_instruction(slang_emit_info *emitInfo, gl_inst_opcode opcode)
 413 {
 414    struct gl_program *prog = emitInfo->prog;
 415    struct prog_instruction *inst;
 416
 417 #if 0
 418    /* print prev inst */
 419    if (prog->NumInstructions > 0) {
 420       _mesa_print_instruction(prog->Instructions + prog->NumInstructions - 1);
 421    }
 422 #endif
 423    assert(prog->NumInstructions <= emitInfo->MaxInstructions);
 424
 425    if (prog->NumInstructions == emitInfo->MaxInstructions) {
 426       /* grow the instruction buffer */
 427       emitInfo->MaxInstructions += 20;
 428       prog->Instructions =
 429          _mesa_realloc_instructions(prog->Instructions,
 430                                     prog->NumInstructions,
 431                                     emitInfo->MaxInstructions);
 432    }
 433
 434    inst = prog->Instructions + prog->NumInstructions;
 435    prog->NumInstructions++;
 436    _mesa_init_instructions(inst, 1);
 437    inst->Opcode = opcode;
 438    inst->BranchTarget = -1; /* invalid */
 439    /*
 440    printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
 441           _mesa_opcode_string(inst->Opcode));
 442    */
 443    return inst;
 444 }
 445
 446
 447 static struct prog_instruction *
 448 emit_arl_load(slang_emit_info *emitInfo,
 449               enum register_file file, GLint index, GLuint swizzle)
 450 {
 451    struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_ARL);
 452    inst->SrcReg[0].File = file;
 453    inst->SrcReg[0].Index = index;
 454    inst->SrcReg[0].Swizzle = swizzle;
 455    inst->DstReg.File = PROGRAM_ADDRESS;
 456    inst->DstReg.Index = 0;
 457    inst->DstReg.WriteMask = WRITEMASK_X;
 458    return inst;
 459 }
 460
 461
 462 /**
 463  * Emit a new instruction with given opcode, operands.
 464  * At this point the instruction may have multiple indirect register
 465  * loads/stores.  We convert those into ARL loads and address-relative
 466  * operands.  See comments inside.
 467  * At some point in the future we could directly emit indirectly addressed
 468  * registers in Mesa GPU instructions.
 469  */
 470 static struct prog_instruction *
 471 emit_instruction(slang_emit_info *emitInfo,
 472                  gl_inst_opcode opcode,
 473                  const slang_ir_storage *dst,
 474                  const slang_ir_storage *src0,
 475                  const slang_ir_storage *src1,
 476                  const slang_ir_storage *src2)
 477 {
 478    struct prog_instruction *inst;
 479    GLuint numIndirect = 0;
 480    const slang_ir_storage *src[3];
 481    slang_ir_storage newSrc[3], newDst;
 482    GLuint i;
 483    GLboolean isTemp[3];
 484
 485    isTemp[0] = isTemp[1] = isTemp[2] = GL_FALSE;
 486
 487    src[0] = src0;
 488    src[1] = src1;
 489    src[2] = src2;
 490
 491    /* count up how many operands are indirect loads */
 492    for (i = 0; i < 3; i++) {
 493       if (src[i] && src[i]->IsIndirect)
 494          numIndirect++;
 495    }
 496    if (dst && dst->IsIndirect)
 497       numIndirect++;
 498
 499    /* Take special steps for indirect register loads.
 500     * If we had multiple address registers this would be simpler.
 501     * For example, this GLSL code:
 502     *    x[i] = y[j] + z[k];
 503     * would translate into something like:
 504     *    ARL ADDR.x, i;
 505     *    ARL ADDR.y, j;
 506     *    ARL ADDR.z, k;
 507     *    ADD TEMP[ADDR.x+5], TEMP[ADDR.y+9], TEMP[ADDR.z+4];
 508     * But since we currently only have one address register we have to do this:
 509     *    ARL ADDR.x, i;
 510     *    MOV t1, TEMP[ADDR.x+9];
 511     *    ARL ADDR.x, j;
 512     *    MOV t2, TEMP[ADDR.x+4];
 513     *    ARL ADDR.x, k;
 514     *    ADD TEMP[ADDR.x+5], t1, t2;
 515     * The code here figures this out...
 516     */
 517    if (numIndirect > 0) {
 518       for (i = 0; i < 3; i++) {
 519          if (src[i] && src[i]->IsIndirect) {
 520             /* load the ARL register with the indirect register */
 521             emit_arl_load(emitInfo,
 522                           src[i]->IndirectFile,
 523                           src[i]->IndirectIndex,
 524                           src[i]->IndirectSwizzle);
 525
 526             if (numIndirect > 1) {
 527                /* Need to load src[i] into a temporary register */
 528                slang_ir_storage srcRelAddr;
 529                alloc_local_temp(emitInfo, &newSrc[i], src[i]->Size);
 530                isTemp[i] = GL_TRUE;
 531
 532                /* set RelAddr flag on src register */
 533                srcRelAddr = *src[i];
 534                srcRelAddr.RelAddr = GL_TRUE;
 535                srcRelAddr.IsIndirect = GL_FALSE; /* not really needed */
 536
 537                /* MOV newSrc, srcRelAddr; */
 538                inst = emit_instruction(emitInfo,
 539                                        OPCODE_MOV,
 540                                        &newSrc[i],
 541                                        &srcRelAddr,
 542                                        NULL,
 543                                        NULL);
 544
 545                src[i] = &newSrc[i];
 546             }
 547             else {
 548                /* just rewrite the src[i] storage to be ARL-relative */
 549                newSrc[i] = *src[i];
 550                newSrc[i].RelAddr = GL_TRUE;
 551                newSrc[i].IsIndirect = GL_FALSE; /* not really needed */
 552                src[i] = &newSrc[i];
 553             }
 554          }
 555       }
 556    }
 557
 558    /* Take special steps for indirect dest register write */
 559    if (dst && dst->IsIndirect) {
 560       /* load the ARL register with the indirect register */
 561       emit_arl_load(emitInfo,
 562                     dst->IndirectFile,
 563                     dst->IndirectIndex,
 564                     dst->IndirectSwizzle);
 565       newDst = *dst;
 566       newDst.RelAddr = GL_TRUE;
 567       newDst.IsIndirect = GL_FALSE;
 568       dst = &newDst;
 569    }
 570
 571    /* OK, emit the instruction and its dst, src regs */
 572    inst = new_instruction(emitInfo, opcode);
 573    if (!inst)
 574       return NULL;
 575
 576    if (dst)
 577       storage_to_dst_reg(&inst->DstReg, dst);
 578
 579    for (i = 0; i < 3; i++) {
 580       if (src[i])
 581          storage_to_src_reg(&inst->SrcReg[i], src[i]);
 582    }
 583
 584    /* Free any temp registers that we allocated above */
 585    for (i = 0; i < 3; i++) {
 586       if (isTemp[i])
 587          _slang_free_temp(emitInfo->vt, &newSrc[i]);
 588    }
 589
 590    return inst;
 591 }
 592
 593
 594
 595 /**
 596  * Put a comment on the given instruction.
 597  */
 598 static void
 599 inst_comment(struct prog_instruction *inst, const char *comment)
 600 {
 601    if (inst)
 602       inst->Comment = _mesa_strdup(comment);
 603 }
 604
 605
 606
 607 /**
 608  * Return pointer to last instruction in program.
 609  */
 610 static struct prog_instruction *
 611 prev_instruction(slang_emit_info *emitInfo)
 612 {
 613    struct gl_program *prog = emitInfo->prog;
 614    if (prog->NumInstructions == 0)
 615       return NULL;
 616    else
 617       return prog->Instructions + prog->NumInstructions - 1;
 618 }
 619
 620
 621 static struct prog_instruction *
 622 emit(slang_emit_info *emitInfo, slang_ir_node *n);
 623
 624
 625 /**
 626  * Return an annotation string for given node's storage.
 627  */
 628 static char *
 629 storage_annotation(const slang_ir_node *n, const struct gl_program *prog)
 630 {
 631 #if ANNOTATE
 632    const slang_ir_storage *st = n->Store;
 633    static char s[100] = "";
 634
 635    if (!st)
 636       return _mesa_strdup("");
 637
 638    switch (st->File) {
 639    case PROGRAM_CONSTANT:
 640       if (st->Index >= 0) {
 641          const GLfloat *val = prog->Parameters->ParameterValues[st->Index];
 642          if (st->Swizzle == SWIZZLE_NOOP)
 643             sprintf(s, "{%g, %g, %g, %g}", val[0], val[1], val[2], val[3]);
 644          else {
 645             sprintf(s, "%g", val[GET_SWZ(st->Swizzle, 0)]);
 646          }
 647       }
 648       break;
 649    case PROGRAM_TEMPORARY:
 650       if (n->Var)
 651          sprintf(s, "%s", (char *) n->Var->a_name);
 652       else
 653          sprintf(s, "t[%d]", st->Index);
 654       break;
 655    case PROGRAM_STATE_VAR:
 656    case PROGRAM_UNIFORM:
 657       sprintf(s, "%s", prog->Parameters->Parameters[st->Index].Name);
 658       break;
 659    case PROGRAM_VARYING:
 660       sprintf(s, "%s", prog->Varying->Parameters[st->Index].Name);
 661       break;
 662    case PROGRAM_INPUT:
 663       sprintf(s, "input[%d]", st->Index);
 664       break;
 665    case PROGRAM_OUTPUT:
 666       sprintf(s, "output[%d]", st->Index);
 667       break;
 668    default:
 669       s[0] = 0;
 670    }
 671    return _mesa_strdup(s);
 672 #else
 673    return NULL;
 674 #endif
 675 }
 676
 677
 678 /**
 679  * Return an annotation string for an instruction.
 680  */
 681 static char *
 682 instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
 683                        char *srcAnnot0, char *srcAnnot1, char *srcAnnot2)
 684 {
 685 #if ANNOTATE
 686    const char *operator;
 687    char *s;
 688    int len = 50;
 689
 690    if (dstAnnot)
 691       len += strlen(dstAnnot);
 692    else
 693       dstAnnot = _mesa_strdup("");
 694
 695    if (srcAnnot0)
 696       len += strlen(srcAnnot0);
 697    else
 698       srcAnnot0 = _mesa_strdup("");
 699
 700    if (srcAnnot1)
 701       len += strlen(srcAnnot1);
 702    else
 703       srcAnnot1 = _mesa_strdup("");
 704
 705    if (srcAnnot2)
 706       len += strlen(srcAnnot2);
 707    else
 708       srcAnnot2 = _mesa_strdup("");
 709
 710    switch (opcode) {
 711    case OPCODE_ADD:
 712       operator = "+";
 713       break;
 714    case OPCODE_SUB:
 715       operator = "-";
 716       break;
 717    case OPCODE_MUL:
 718       operator = "*";
 719       break;
 720    case OPCODE_DP3:
 721       operator = "DP3";
 722       break;
 723    case OPCODE_DP4:
 724       operator = "DP4";
 725       break;
 726    case OPCODE_XPD:
 727       operator = "XPD";
 728       break;
 729    case OPCODE_RSQ:
 730       operator = "RSQ";
 731       break;
 732    case OPCODE_SGT:
 733       operator = ">";
 734       break;
 735    default:
 736       operator = ",";
 737    }
 738
 739    s = (char *) malloc(len);
 740    sprintf(s, "%s = %s %s %s %s", dstAnnot,
 741            srcAnnot0, operator, srcAnnot1, srcAnnot2);
 742    assert(_mesa_strlen(s) < len);
 743
 744    free(dstAnnot);
 745    free(srcAnnot0);
 746    free(srcAnnot1);
 747    free(srcAnnot2);
 748
 749    return s;
 750 #else
 751    return NULL;
 752 #endif
 753 }
 754
 755
 756 /**
 757  * Emit an instruction that's just a comment.
 758  */
 759 static struct prog_instruction *
 760 emit_comment(slang_emit_info *emitInfo, const char *comment)
 761 {
 762    struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_NOP);
 763    inst_comment(inst, comment);
 764    return inst;
 765 }
 766
 767
 768 /**
 769  * Generate code for a simple arithmetic instruction.
 770  * Either 1, 2 or 3 operands.
 771  */
 772 static struct prog_instruction *
 773 emit_arith(slang_emit_info *emitInfo, slang_ir_node *n)
 774 {
 775    const slang_ir_info *info = _slang_ir_info(n->Opcode);
 776    struct prog_instruction *inst;
 777    GLuint i;
 778
 779    assert(info);
 780    assert(info->InstOpcode != OPCODE_NOP);
 781
 782 #if PEEPHOLE_OPTIMIZATIONS
 783    /* Look for MAD opportunity */
 784    if (info->NumParams == 2 &&
 785        n->Opcode == IR_ADD && n->Children[0]->Opcode == IR_MUL) {
 786       /* found pattern IR_ADD(IR_MUL(A, B), C) */
 787       emit(emitInfo, n->Children[0]->Children[0]);  /* A */
 788       emit(emitInfo, n->Children[0]->Children[1]);  /* B */
 789       emit(emitInfo, n->Children[1]);  /* C */
 790       alloc_node_storage(emitInfo, n, -1);  /* dest */
 791
 792       inst = emit_instruction(emitInfo,
 793                               OPCODE_MAD,
 794                               n->Store,
 795                               n->Children[0]->Children[0]->Store,
 796                               n->Children[0]->Children[1]->Store,
 797                               n->Children[1]->Store);
 798
 799       free_node_storage(emitInfo->vt, n->Children[0]->Children[0]);
 800       free_node_storage(emitInfo->vt, n->Children[0]->Children[1]);
 801       free_node_storage(emitInfo->vt, n->Children[1]);
 802       return inst;
 803    }
 804
 805    if (info->NumParams == 2 &&
 806        n->Opcode == IR_ADD && n->Children[1]->Opcode == IR_MUL) {
 807       /* found pattern IR_ADD(A, IR_MUL(B, C)) */
 808       emit(emitInfo, n->Children[0]);  /* A */
 809       emit(emitInfo, n->Children[1]->Children[0]);  /* B */
 810       emit(emitInfo, n->Children[1]->Children[1]);  /* C */
 811       alloc_node_storage(emitInfo, n, -1);  /* dest */
 812
 813       inst = emit_instruction(emitInfo,
 814                               OPCODE_MAD,
 815                               n->Store,
 816                               n->Children[1]->Children[0]->Store,
 817                               n->Children[1]->Children[1]->Store,
 818                               n->Children[0]->Store);
 819
 820       free_node_storage(emitInfo->vt, n->Children[1]->Children[0]);
 821       free_node_storage(emitInfo->vt, n->Children[1]->Children[1]);
 822       free_node_storage(emitInfo->vt, n->Children[0]);
 823       return inst;
 824    }
 825 #endif
 826
 827    /* gen code for children, may involve temp allocation */
 828    for (i = 0; i < info->NumParams; i++) {
 829       emit(emitInfo, n->Children[i]);
 830       if (!n->Children[i] || !n->Children[i]->Store) {
 831          /* error recovery */
 832          return NULL;
 833       }
 834    }
 835
 836    /* result storage */
 837    alloc_node_storage(emitInfo, n, -1);
 838
 839    inst = emit_instruction(emitInfo,
 840                            info->InstOpcode,
 841                            n->Store,  /* dest */
 842                            (info->NumParams > 0 ? n->Children[0]->Store : NULL),
 843                            (info->NumParams > 1 ? n->Children[1]->Store : NULL),
 844                            (info->NumParams > 2 ? n->Children[2]->Store : NULL)
 845                            );
 846
 847    /* free temps */
 848    for (i = 0; i < info->NumParams; i++)
 849       free_node_storage(emitInfo->vt, n->Children[i]);
 850
 851    return inst;
 852 }
 853
 854
 855 /**
 856  * Emit code for == and != operators.  These could normally be handled
 857  * by emit_arith() except we need to be able to handle structure comparisons.
 858  */
 859 static struct prog_instruction *
 860 emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
 861 {
 862    struct prog_instruction *inst = NULL;
 863    GLint size;
 864
 865    assert(n->Opcode == IR_EQUAL || n->Opcode == IR_NOTEQUAL);
 866
 867    /* gen code for children */
 868    emit(emitInfo, n->Children[0]);
 869    emit(emitInfo, n->Children[1]);
 870
 871    if (n->Children[0]->Store->Size != n->Children[1]->Store->Size) {
 872       slang_info_log_error(emitInfo->log, "invalid operands to == or !=");
 873       return NULL;
 874    }
 875
 876    /* final result is 1 bool */
 877    if (!alloc_node_storage(emitInfo, n, 1))
 878       return NULL;
 879
 880    size = n->Children[0]->Store->Size;
 881
 882    if (size == 1) {
 883       gl_inst_opcode opcode = n->Opcode == IR_EQUAL ? OPCODE_SEQ : OPCODE_SNE;
 884       inst =  emit_instruction(emitInfo,
 885                                opcode,
 886                                n->Store, /* dest */
 887                                n->Children[0]->Store,
 888                                n->Children[1]->Store,
 889                                NULL);
 890    }
 891    else if (size <= 4) {
 892       /* compare two vectors.
 893        * Unfortunately, there's no instruction to compare vectors and
 894        * return a scalar result.  Do it with some compare and dot product
 895        * instructions...
 896        */
 897       GLuint swizzle;
 898       gl_inst_opcode dotOp;
 899       slang_ir_storage tempStore;
 900
 901       if (!alloc_local_temp(emitInfo, &tempStore, 4)) {
 902          return NULL;
 903          /* out of temps */
 904       }
 905
 906       if (size == 4) {
 907          dotOp = OPCODE_DP4;
 908          swizzle = SWIZZLE_XYZW;
 909       }
 910       else if (size == 3) {
 911          dotOp = OPCODE_DP3;
 912          swizzle = SWIZZLE_XYZW;
 913       }
 914       else {
 915          assert(size == 2);
 916          dotOp = OPCODE_DP3;
 917          swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
 918       }
 919
 920       /* Compute inequality (temp = (A != B)) */
 921       inst = emit_instruction(emitInfo,
 922                               OPCODE_SNE,
 923                               &tempStore,
 924                               n->Children[0]->Store,
 925                               n->Children[1]->Store,
 926                               NULL);
 927       inst_comment(inst, "Compare values");
 928
 929       /* Compute val = DOT(temp, temp)  (reduction) */
 930       inst = emit_instruction(emitInfo,
 931                               dotOp,
 932                               n->Store,
 933                               &tempStore,
 934                               &tempStore,
 935                               NULL);
 936       inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/
 937       inst_comment(inst, "Reduce vec to bool");
 938
 939       _slang_free_temp(emitInfo->vt, &tempStore); /* free temp */
 940
 941       if (n->Opcode == IR_EQUAL) {
 942          /* compute val = !val.x  with SEQ val, val, 0; */
 943          slang_ir_storage zero;
 944          constant_to_storage(emitInfo, 0.0, &zero);
 945          inst = emit_instruction(emitInfo,
 946                                  OPCODE_SEQ,
 947                                  n->Store, /* dest */
 948                                  n->Store,
 949                                  &zero,
 950                                  NULL);
 951          inst_comment(inst, "Invert true/false");
 952       }
 953    }
 954    else {
 955       /* size > 4, struct or array compare.
 956        * XXX this won't work reliably for structs with padding!!
 957        */
 958       GLint i, num = (n->Children[0]->Store->Size + 3) / 4;
 959       slang_ir_storage accTemp, sneTemp;
 960
 961       if (!alloc_local_temp(emitInfo, &accTemp, 4))
 962          return NULL;
 963
 964       if (!alloc_local_temp(emitInfo, &sneTemp, 4))
 965          return NULL;
 966
 967       for (i = 0; i < num; i++) {
 968          slang_ir_storage srcStore0 = *n->Children[0]->Store;
 969          slang_ir_storage srcStore1 = *n->Children[1]->Store;
 970          srcStore0.Index += i;
 971          srcStore1.Index += i;
 972
 973          if (i == 0) {
 974             /* SNE accTemp, left[i], right[i] */
 975             inst = emit_instruction(emitInfo, OPCODE_SNE,
 976                                     &accTemp, /* dest */
 977                                     &srcStore0,
 978                                     &srcStore1,
 979                                     NULL);
 980             inst_comment(inst, "Begin struct/array comparison");
 981          }
 982          else {
 983             /* SNE sneTemp, left[i], right[i] */
 984             inst = emit_instruction(emitInfo, OPCODE_SNE,
 985                                     &sneTemp, /* dest */
 986                                     &srcStore0,
 987                                     &srcStore1,
 988                                     NULL);
 989             /* ADD accTemp, accTemp, sneTemp; # like logical-OR */
 990             inst = emit_instruction(emitInfo, OPCODE_ADD,
 991                                     &accTemp, /* dest */
 992                                     &accTemp,
 993                                     &sneTemp,
 994                                     NULL);
 995          }
 996       }
 997
 998       /* compute accTemp.x || accTemp.y || accTemp.z || accTemp.w with DOT4 */
 999       inst = emit_instruction(emitInfo, OPCODE_DP4,
1000                               n->Store,
1001                               &accTemp,
1002                               &accTemp,
1003                               NULL);
1004       inst_comment(inst, "End struct/array comparison");
1005
1006       if (n->Opcode == IR_EQUAL) {
1007          /* compute tmp.x = !tmp.x  via tmp.x = (tmp.x == 0) */
1008          slang_ir_storage zero;
1009          constant_to_storage(emitInfo, 0.0, &zero);
1010          inst = emit_instruction(emitInfo, OPCODE_SEQ,
1011                                  n->Store, /* dest */
1012                                  n->Store,
1013                                  &zero,
1014                                  NULL);
1015          inst_comment(inst, "Invert true/false");
1016       }
1017
1018       _slang_free_temp(emitInfo->vt, &accTemp);
1019       _slang_free_temp(emitInfo->vt, &sneTemp);
1020    }
1021
1022    /* free temps */
1023    free_node_storage(emitInfo->vt, n->Children[0]);
1024    free_node_storage(emitInfo->vt, n->Children[1]);
1025
1026    return inst;
1027 }
1028
1029
1030
1031 /**
1032  * Generate code for an IR_CLAMP instruction.
1033  */
1034 static struct prog_instruction *
1035 emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n)
1036 {
1037    struct prog_instruction *inst;
1038    slang_ir_node tmpNode;
1039
1040    assert(n->Opcode == IR_CLAMP);
1041    /* ch[0] = value
1042     * ch[1] = min limit
1043     * ch[2] = max limit
1044     */
1045
1046    inst = emit(emitInfo, n->Children[0]);
1047
1048    /* If lower limit == 0.0 and upper limit == 1.0,
1049     *    set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
1050     * Else,
1051     *    emit OPCODE_MIN, OPCODE_MAX sequence.
1052     */
1053 #if 0
1054    /* XXX this isn't quite finished yet */
1055    if (n->Children[1]->Opcode == IR_FLOAT &&
1056        n->Children[1]->Value[0] == 0.0 &&
1057        n->Children[1]->Value[1] == 0.0 &&
1058        n->Children[1]->Value[2] == 0.0 &&
1059        n->Children[1]->Value[3] == 0.0 &&
1060        n->Children[2]->Opcode == IR_FLOAT &&
1061        n->Children[2]->Value[0] == 1.0 &&
1062        n->Children[2]->Value[1] == 1.0 &&
1063        n->Children[2]->Value[2] == 1.0 &&
1064        n->Children[2]->Value[3] == 1.0) {
1065       if (!inst) {
1066          inst = prev_instruction(prog);
1067       }
1068       if (inst && inst->Opcode != OPCODE_NOP) {
1069          /* and prev instruction's DstReg matches n->Children[0]->Store */
1070          inst->SaturateMode = SATURATE_ZERO_ONE;
1071          n->Store = n->Children[0]->Store;
1072          return inst;
1073       }
1074    }
1075 #endif
1076
1077    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1078       return NULL;
1079
1080    emit(emitInfo, n->Children[1]);
1081    emit(emitInfo, n->Children[2]);
1082
1083    /* Some GPUs don't allow reading from output registers.  So if the
1084     * dest for this clamp() is an output reg, we can't use that reg for
1085     * the intermediate result.  Use a temp register instead.
1086     */
1087    _mesa_bzero(&tmpNode, sizeof(tmpNode));
1088    alloc_node_storage(emitInfo, &tmpNode, n->Store->Size);
1089
1090    /* tmp = max(ch[0], ch[1]) */
1091    inst = emit_instruction(emitInfo, OPCODE_MAX,
1092                            tmpNode.Store, /* dest */
1093                            n->Children[0]->Store,
1094                            n->Children[1]->Store,
1095                            NULL);
1096
1097    /* n->dest = min(tmp, ch[2]) */
1098    inst = emit_instruction(emitInfo, OPCODE_MIN,
1099                            n->Store, /* dest */
1100                            tmpNode.Store,
1101                            n->Children[2]->Store,
1102                            NULL);
1103
1104    free_node_storage(emitInfo->vt, &tmpNode);
1105
1106    return inst;
1107 }
1108
1109
1110 static struct prog_instruction *
1111 emit_negation(slang_emit_info *emitInfo, slang_ir_node *n)
1112 {
1113    /* Implement as MOV dst, -src; */
1114    /* XXX we could look at the previous instruction and in some circumstances
1115     * modify it to accomplish the negation.
1116     */
1117    struct prog_instruction *inst;
1118
1119    emit(emitInfo, n->Children[0]);
1120
1121    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1122       return NULL;
1123
1124    inst = emit_instruction(emitInfo,
1125                            OPCODE_MOV,
1126                            n->Store, /* dest */
1127                            n->Children[0]->Store,
1128                            NULL,
1129                            NULL);
1130    inst->SrcReg[0].NegateBase = NEGATE_XYZW;
1131    return inst;
1132 }
1133
1134
1135 static struct prog_instruction *
1136 emit_label(slang_emit_info *emitInfo, const slang_ir_node *n)
1137 {
1138    assert(n->Label);
1139 #if 0
1140    /* XXX this fails in loop tail code - investigate someday */
1141    assert(_slang_label_get_location(n->Label) < 0);
1142    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1143                              emitInfo->prog);
1144 #else
1145    if (_slang_label_get_location(n->Label) < 0)
1146       _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1147                                 emitInfo->prog);
1148 #endif
1149    return NULL;
1150 }
1151
1152
1153 /**
1154  * Emit code for a function call.
1155  * Note that for each time a function is called, we emit the function's
1156  * body code again because the set of available registers may be different.
1157  */
1158 static struct prog_instruction *
1159 emit_fcall(slang_emit_info *emitInfo, slang_ir_node *n)
1160 {
1161    struct gl_program *progSave;
1162    struct prog_instruction *inst;
1163    GLuint subroutineId;
1164    GLuint maxInstSave;
1165
1166    assert(n->Opcode == IR_CALL);
1167    assert(n->Label);
1168
1169    /* save/push cur program */
1170    maxInstSave = emitInfo->MaxInstructions;
1171    progSave = emitInfo->prog;
1172
1173    emitInfo->prog = new_subroutine(emitInfo, &subroutineId);
1174    emitInfo->MaxInstructions = emitInfo->prog->NumInstructions;
1175
1176    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1177                              emitInfo->prog);
1178
1179    if (emitInfo->EmitBeginEndSub) {
1180       /* BGNSUB isn't a real instruction.
1181        * We require a label (i.e. "foobar:") though, if we're going to
1182        * print the program in the NV format.  The BNGSUB instruction is
1183        * really just a NOP to attach the label to.
1184        */
1185       inst = new_instruction(emitInfo, OPCODE_BGNSUB);
1186       inst_comment(inst, n->Label->Name);
1187    }
1188
1189    /* body of function: */
1190    emit(emitInfo, n->Children[0]);
1191    n->Store = n->Children[0]->Store;
1192
1193    /* add RET instruction now, if needed */
1194    inst = prev_instruction(emitInfo);
1195    if (inst && inst->Opcode != OPCODE_RET) {
1196       inst = new_instruction(emitInfo, OPCODE_RET);
1197    }
1198
1199    if (emitInfo->EmitBeginEndSub) {
1200       inst = new_instruction(emitInfo, OPCODE_ENDSUB);
1201       inst_comment(inst, n->Label->Name);
1202    }
1203
1204    /* pop/restore cur program */
1205    emitInfo->prog = progSave;
1206    emitInfo->MaxInstructions = maxInstSave;
1207
1208    /* emit the function call */
1209    inst = new_instruction(emitInfo, OPCODE_CAL);
1210    /* The branch target is just the subroutine number (changed later) */
1211    inst->BranchTarget = subroutineId;
1212    inst_comment(inst, n->Label->Name);
1213    assert(inst->BranchTarget >= 0);
1214
1215    return inst;
1216 }
1217
1218
1219 /**
1220  * Emit code for a 'return' statement.
1221  */
1222 static struct prog_instruction *
1223 emit_return(slang_emit_info *emitInfo, slang_ir_node *n)
1224 {
1225    struct prog_instruction *inst;
1226    assert(n);
1227    assert(n->Opcode == IR_RETURN);
1228    assert(n->Label);
1229    inst = new_instruction(emitInfo, OPCODE_RET);
1230    inst->DstReg.CondMask = COND_TR;  /* always return */
1231    return inst;
1232 }
1233
1234
1235 static struct prog_instruction *
1236 emit_kill(slang_emit_info *emitInfo)
1237 {
1238    struct gl_fragment_program *fp;
1239    struct prog_instruction *inst;
1240    /* NV-KILL - discard fragment depending on condition code.
1241     * Note that ARB-KILL depends on sign of vector operand.
1242     */
1243    inst = new_instruction(emitInfo, OPCODE_KIL_NV);
1244    inst->DstReg.CondMask = COND_TR;  /* always kill */
1245
1246    assert(emitInfo->prog->Target == GL_FRAGMENT_PROGRAM_ARB);
1247    fp = (struct gl_fragment_program *) emitInfo->prog;
1248    fp->UsesKill = GL_TRUE;
1249
1250    return inst;
1251 }
1252
1253
1254 static struct prog_instruction *
1255 emit_tex(slang_emit_info *emitInfo, slang_ir_node *n)
1256 {
1257    struct prog_instruction *inst;
1258    gl_inst_opcode opcode;
1259
1260    if (n->Opcode == IR_TEX) {
1261       opcode = OPCODE_TEX;
1262    }
1263    else if (n->Opcode == IR_TEXB) {
1264       opcode = OPCODE_TXB;
1265    }
1266    else {
1267       assert(n->Opcode == IR_TEXP);
1268       opcode = OPCODE_TXP;
1269    }
1270
1271    /* emit code for the texcoord operand */
1272    (void) emit(emitInfo, n->Children[1]);
1273
1274    /* alloc storage for result of texture fetch */
1275    if (!alloc_node_storage(emitInfo, n, 4))
1276       return NULL;
1277
1278    /* emit TEX instruction;  Child[1] is the texcoord */
1279    inst = emit_instruction(emitInfo,
1280                            opcode,
1281                            n->Store,
1282                            n->Children[1]->Store,
1283                            NULL,
1284                            NULL);
1285
1286    /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
1287    assert(n->Children[0]->Store);
1288    assert(n->Children[0]->Store->File == PROGRAM_SAMPLER);
1289    /* Store->Index is the sampler index */
1290    assert(n->Children[0]->Store->Index >= 0);
1291    /* Store->Size is the texture target */
1292    assert(n->Children[0]->Store->Size >= TEXTURE_1D_INDEX);
1293    assert(n->Children[0]->Store->Size <= TEXTURE_RECT_INDEX);
1294
1295    inst->TexSrcTarget = n->Children[0]->Store->Size;
1296    inst->TexSrcUnit = n->Children[0]->Store->Index; /* i.e. uniform's index */
1297
1298    /* mark the sampler as being used */
1299    _mesa_use_uniform(emitInfo->prog->Parameters,
1300                      (char *) n->Children[0]->Var->a_name);
1301
1302    return inst;
1303 }
1304
1305
1306 /**
1307  * Assignment/copy
1308  */
1309 static struct prog_instruction *
1310 emit_copy(slang_emit_info *emitInfo, slang_ir_node *n)
1311 {
1312    struct prog_instruction *inst;
1313
1314    assert(n->Opcode == IR_COPY);
1315
1316    /* lhs */
1317    emit(emitInfo, n->Children[0]);
1318    if (!n->Children[0]->Store || n->Children[0]->Store->Index < 0) {
1319       /* an error should have been already recorded */
1320       return NULL;
1321    }
1322
1323    /* rhs */
1324    assert(n->Children[1]);
1325    inst = emit(emitInfo, n->Children[1]);
1326
1327    if (!n->Children[1]->Store || n->Children[1]->Store->Index < 0) {
1328       if (!emitInfo->log->text) {
1329          slang_info_log_error(emitInfo->log, "invalid assignment");
1330       }
1331       return NULL;
1332    }
1333
1334    assert(n->Children[1]->Store->Index >= 0);
1335
1336    /*assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);*/
1337
1338    n->Store = n->Children[0]->Store;
1339
1340    if (n->Store->File == PROGRAM_SAMPLER) {
1341       /* no code generated for sampler assignments,
1342        * just copy the sampler index at compile time.
1343        */
1344       n->Store->Index = n->Children[1]->Store->Index;
1345       return NULL;
1346    }
1347
1348 #if PEEPHOLE_OPTIMIZATIONS
1349    if (inst &&
1350        _slang_is_temp(emitInfo->vt, n->Children[1]->Store) &&
1351        (inst->DstReg.File == n->Children[1]->Store->File) &&
1352        (inst->DstReg.Index == n->Children[1]->Store->Index) &&
1353        !n->Children[0]->Store->IsIndirect &&
1354        n->Children[0]->Store->Size <= 4) {
1355       /* Peephole optimization:
1356        * The Right-Hand-Side has its results in a temporary place.
1357        * Modify the RHS (and the prev instruction) to store its results
1358        * in the destination specified by n->Children[0].
1359        * Then, this MOVE is a no-op.
1360        * Ex:
1361        *   MUL tmp, x, y;
1362        *   MOV a, tmp;
1363        * becomes:
1364        *   MUL a, x, y;
1365        */
1366       if (n->Children[1]->Opcode != IR_SWIZZLE)
1367          _slang_free_temp(emitInfo->vt, n->Children[1]->Store);
1368       *n->Children[1]->Store = *n->Children[0]->Store;
1369
1370       /* fixup the previous instruction (which stored the RHS result) */
1371       assert(n->Children[0]->Store->Index >= 0);
1372
1373       storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store);
1374       return inst;
1375    }
1376    else
1377 #endif
1378    {
1379       if (n->Children[0]->Store->Size > 4) {
1380          /* move matrix/struct etc (block of registers) */
1381          slang_ir_storage dstStore = *n->Children[0]->Store;
1382          slang_ir_storage srcStore = *n->Children[1]->Store;
1383          GLint size = srcStore.Size;
1384          ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP);
1385          dstStore.Size = 4;
1386          srcStore.Size = 4;
1387          while (size >= 4) {
1388             inst = emit_instruction(emitInfo, OPCODE_MOV,
1389                                     &dstStore,
1390                                     &srcStore,
1391                                     NULL,
1392                                     NULL);
1393             inst_comment(inst, "IR_COPY block");
1394             srcStore.Index++;
1395             dstStore.Index++;
1396             size -= 4;
1397          }
1398       }
1399       else {
1400          /* single register move */
1401          char *srcAnnot, *dstAnnot;
1402          assert(n->Children[0]->Store->Index >= 0);
1403          inst = emit_instruction(emitInfo, OPCODE_MOV,
1404                                  n->Children[0]->Store, /* dest */
1405                                  n->Children[1]->Store,
1406                                  NULL,
1407                                  NULL);
1408          dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);
1409          srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);
1410          inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
1411                                                 srcAnnot, NULL, NULL);
1412       }
1413       free_node_storage(emitInfo->vt, n->Children[1]);
1414       return inst;
1415    }
1416 }
1417
1418
1419 /**
1420  * An IR_COND node wraps a boolean expression which is used by an
1421  * IF or WHILE test.  This is where we'll set condition codes, if needed.
1422  */
1423 static struct prog_instruction *
1424 emit_cond(slang_emit_info *emitInfo, slang_ir_node *n)
1425 {
1426    struct prog_instruction *inst;
1427
1428    assert(n->Opcode == IR_COND);
1429
1430    if (!n->Children[0])
1431       return NULL;
1432
1433    /* emit code for the expression */
1434    inst = emit(emitInfo, n->Children[0]);
1435
1436    if (!n->Children[0]->Store) {
1437       /* error recovery */
1438       return NULL;
1439    }
1440
1441    assert(n->Children[0]->Store);
1442    /*assert(n->Children[0]->Store->Size == 1);*/
1443
1444    if (emitInfo->EmitCondCodes) {
1445       if (inst &&
1446           n->Children[0]->Store &&
1447           inst->DstReg.File == n->Children[0]->Store->File &&
1448           inst->DstReg.Index == n->Children[0]->Store->Index) {
1449          /* The previous instruction wrote to the register who's value
1450           * we're testing.  Just fix that instruction so that the
1451           * condition codes are computed.
1452           */
1453          inst->CondUpdate = GL_TRUE;
1454          n->Store = n->Children[0]->Store;
1455          return inst;
1456       }
1457       else {
1458          /* This'll happen for things like "if (i) ..." where no code
1459           * is normally generated for the expression "i".
1460           * Generate a move instruction just to set condition codes.
1461           */
1462          if (!alloc_node_storage(emitInfo, n, 1))
1463             return NULL;
1464          inst = emit_instruction(emitInfo, OPCODE_MOV,
1465                                  n->Store, /* dest */
1466                                  n->Children[0]->Store,
1467                                  NULL,
1468                                  NULL);
1469          inst->CondUpdate = GL_TRUE;
1470          inst_comment(inst, "COND expr");
1471          _slang_free_temp(emitInfo->vt, n->Store);
1472          return inst;
1473       }
1474    }
1475    else {
1476       /* No-op: the boolean result of the expression is in a regular reg */
1477       n->Store = n->Children[0]->Store;
1478       return inst;
1479    }
1480 }
1481
1482
1483 /**
1484  * Logical-NOT
1485  */
1486 static struct prog_instruction *
1487 emit_not(slang_emit_info *emitInfo, slang_ir_node *n)
1488 {
1489    static const struct {
1490       gl_inst_opcode op, opNot;
1491    } operators[] = {
1492       { OPCODE_SLT, OPCODE_SGE },
1493       { OPCODE_SLE, OPCODE_SGT },
1494       { OPCODE_SGT, OPCODE_SLE },
1495       { OPCODE_SGE, OPCODE_SLT },
1496       { OPCODE_SEQ, OPCODE_SNE },
1497       { OPCODE_SNE, OPCODE_SEQ },
1498       { 0, 0 }
1499    };
1500    struct prog_instruction *inst;
1501    slang_ir_storage zero;
1502    GLuint i;
1503
1504    /* child expr */
1505    inst = emit(emitInfo, n->Children[0]);
1506
1507 #if PEEPHOLE_OPTIMIZATIONS
1508    if (inst) {
1509       /* if the prev instruction was a comparison instruction, invert it */
1510       for (i = 0; operators[i].op; i++) {
1511          if (inst->Opcode == operators[i].op) {
1512             inst->Opcode = operators[i].opNot;
1513             n->Store = n->Children[0]->Store;
1514             return inst;
1515          }
1516       }
1517    }
1518 #endif
1519
1520    /* else, invert using SEQ (v = v == 0) */
1521    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1522       return NULL;
1523
1524    constant_to_storage(emitInfo, 0.0, &zero);
1525    inst = emit_instruction(emitInfo,
1526                            OPCODE_SEQ,
1527                            n->Store,
1528                            n->Children[0]->Store,
1529                            &zero,
1530                            NULL);
1531    inst_comment(inst, "NOT");
1532
1533    free_node_storage(emitInfo->vt, n->Children[0]);
1534
1535    return inst;
1536 }
1537
1538
1539 static struct prog_instruction *
1540 emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
1541 {
1542    struct gl_program *prog = emitInfo->prog;
1543    GLuint ifInstLoc, elseInstLoc = 0;
1544    GLuint condWritemask = 0;
1545
1546    /* emit condition expression code */
1547    {
1548       struct prog_instruction *inst;
1549       inst = emit(emitInfo, n->Children[0]);
1550       if (emitInfo->EmitCondCodes) {
1551          if (!inst) {
1552             /* error recovery */
1553             return NULL;
1554          }
1555          condWritemask = inst->DstReg.WriteMask;
1556       }
1557    }
1558
1559    if (!n->Children[0]->Store)
1560       return NULL;
1561
1562 #if 0
1563    assert(n->Children[0]->Store->Size == 1); /* a bool! */
1564 #endif
1565
1566    ifInstLoc = prog->NumInstructions;
1567    if (emitInfo->EmitHighLevelInstructions) {
1568       if (emitInfo->EmitCondCodes) {
1569          /* IF condcode THEN ... */
1570          struct prog_instruction *ifInst;
1571          ifInst = new_instruction(emitInfo, OPCODE_IF);
1572          ifInst->DstReg.CondMask = COND_NE;  /* if cond is non-zero */
1573          /* only test the cond code (1 of 4) that was updated by the
1574           * previous instruction.
1575           */
1576          ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1577       }
1578       else {
1579          /* IF src[0] THEN ... */
1580          emit_instruction(emitInfo, OPCODE_IF,
1581                           NULL, /* dst */
1582                           n->Children[0]->Store, /* op0 */
1583                           NULL,
1584                           NULL);
1585       }
1586    }
1587    else {
1588       /* conditional jump to else, or endif */
1589       struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_BRA);
1590       ifInst->DstReg.CondMask = COND_EQ;  /* BRA if cond is zero */
1591       inst_comment(ifInst, "if zero");
1592       ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1593    }
1594
1595    /* if body */
1596    emit(emitInfo, n->Children[1]);
1597
1598    if (n->Children[2]) {
1599       /* have else body */
1600       elseInstLoc = prog->NumInstructions;
1601       if (emitInfo->EmitHighLevelInstructions) {
1602          (void) new_instruction(emitInfo, OPCODE_ELSE);
1603       }
1604       else {
1605          /* jump to endif instruction */
1606          struct prog_instruction *inst;
1607          inst = new_instruction(emitInfo, OPCODE_BRA);
1608          inst_comment(inst, "else");
1609          inst->DstReg.CondMask = COND_TR;  /* always branch */
1610       }
1611       prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
1612       emit(emitInfo, n->Children[2]);
1613    }
1614    else {
1615       /* no else body */
1616       prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
1617    }
1618
1619    if (emitInfo->EmitHighLevelInstructions) {
1620       (void) new_instruction(emitInfo, OPCODE_ENDIF);
1621    }
1622
1623    if (n->Children[2]) {
1624       prog->Instructions[elseInstLoc].BranchTarget = prog->NumInstructions;
1625    }
1626    return NULL;
1627 }
1628
1629
1630 static struct prog_instruction *
1631 emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
1632 {
1633    struct gl_program *prog = emitInfo->prog;
1634    struct prog_instruction *endInst;
1635    GLuint beginInstLoc, tailInstLoc, endInstLoc;
1636    slang_ir_node *ir;
1637
1638    /* emit OPCODE_BGNLOOP */
1639    beginInstLoc = prog->NumInstructions;
1640    if (emitInfo->EmitHighLevelInstructions) {
1641       (void) new_instruction(emitInfo, OPCODE_BGNLOOP);
1642    }
1643
1644    /* body */
1645    emit(emitInfo, n->Children[0]);
1646
1647    /* tail */
1648    tailInstLoc = prog->NumInstructions;
1649    if (n->Children[1]) {
1650       if (emitInfo->EmitComments)
1651          emit_comment(emitInfo, "Loop tail code:");
1652       emit(emitInfo, n->Children[1]);
1653    }
1654
1655    endInstLoc = prog->NumInstructions;
1656    if (emitInfo->EmitHighLevelInstructions) {
1657       /* emit OPCODE_ENDLOOP */
1658       endInst = new_instruction(emitInfo, OPCODE_ENDLOOP);
1659    }
1660    else {
1661       /* emit unconditional BRA-nch */
1662       endInst = new_instruction(emitInfo, OPCODE_BRA);
1663       endInst->DstReg.CondMask = COND_TR;  /* always true */
1664    }
1665    /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1666    endInst->BranchTarget = beginInstLoc;
1667
1668    if (emitInfo->EmitHighLevelInstructions) {
1669       /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1670       prog->Instructions[beginInstLoc].BranchTarget = prog->NumInstructions -1;
1671    }
1672
1673    /* Done emitting loop code.  Now walk over the loop's linked list of
1674     * BREAK and CONT nodes, filling in their BranchTarget fields (which
1675     * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1676     */
1677    for (ir = n->List; ir; ir = ir->List) {
1678       struct prog_instruction *inst = prog->Instructions + ir->InstLocation;
1679       assert(inst->BranchTarget < 0);
1680       if (ir->Opcode == IR_BREAK ||
1681           ir->Opcode == IR_BREAK_IF_TRUE) {
1682          assert(inst->Opcode == OPCODE_BRK ||
1683                 inst->Opcode == OPCODE_BRA);
1684          /* go to instruction after end of loop */
1685          inst->BranchTarget = endInstLoc + 1;
1686       }
1687       else {
1688          assert(ir->Opcode == IR_CONT ||
1689                 ir->Opcode == IR_CONT_IF_TRUE);
1690          assert(inst->Opcode == OPCODE_CONT ||
1691                 inst->Opcode == OPCODE_BRA);
1692          /* go to instruction at tail of loop */
1693          inst->BranchTarget = endInstLoc;
1694       }
1695    }
1696    return NULL;
1697 }
1698
1699
1700 /**
1701  * Unconditional "continue" or "break" statement.
1702  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1703  */
1704 static struct prog_instruction *
1705 emit_cont_break(slang_emit_info *emitInfo, slang_ir_node *n)
1706 {
1707    gl_inst_opcode opcode;
1708    struct prog_instruction *inst;
1709
1710    if (n->Opcode == IR_CONT) {
1711       /* we need to execute the loop's tail code before doing CONT */
1712       assert(n->Parent);
1713       assert(n->Parent->Opcode == IR_LOOP);
1714       if (n->Parent->Children[1]) {
1715          /* emit tail code */
1716          if (emitInfo->EmitComments) {
1717             emit_comment(emitInfo, "continue - tail code:");
1718          }
1719          emit(emitInfo, n->Parent->Children[1]);
1720       }
1721    }
1722
1723    /* opcode selection */
1724    if (emitInfo->EmitHighLevelInstructions) {
1725       opcode = (n->Opcode == IR_CONT) ? OPCODE_CONT : OPCODE_BRK;
1726    }
1727    else {
1728       opcode = OPCODE_BRA;
1729    }
1730    n->InstLocation = emitInfo->prog->NumInstructions;
1731    inst = new_instruction(emitInfo, opcode);
1732    inst->DstReg.CondMask = COND_TR;  /* always true */
1733    return inst;
1734 }
1735
1736
1737 /**
1738  * Conditional "continue" or "break" statement.
1739  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1740  */
1741 static struct prog_instruction *
1742 emit_cont_break_if_true(slang_emit_info *emitInfo, slang_ir_node *n)
1743 {
1744    struct prog_instruction *inst;
1745
1746    assert(n->Opcode == IR_CONT_IF_TRUE ||
1747           n->Opcode == IR_BREAK_IF_TRUE);
1748
1749    /* evaluate condition expr, setting cond codes */
1750    inst = emit(emitInfo, n->Children[0]);
1751    if (emitInfo->EmitCondCodes) {
1752       assert(inst);
1753       inst->CondUpdate = GL_TRUE;
1754    }
1755
1756    n->InstLocation = emitInfo->prog->NumInstructions;
1757
1758    /* opcode selection */
1759    if (emitInfo->EmitHighLevelInstructions) {
1760       const gl_inst_opcode opcode
1761          = (n->Opcode == IR_CONT_IF_TRUE) ? OPCODE_CONT : OPCODE_BRK;
1762       if (emitInfo->EmitCondCodes) {
1763          /* Get the writemask from the previous instruction which set
1764           * the condcodes.  Use that writemask as the CondSwizzle.
1765           */
1766          const GLuint condWritemask = inst->DstReg.WriteMask;
1767          inst = new_instruction(emitInfo, opcode);
1768          inst->DstReg.CondMask = COND_NE;
1769          inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1770          return inst;
1771       }
1772       else {
1773          /* IF reg
1774           *    BRK/CONT;
1775           * ENDIF
1776           */
1777          GLint ifInstLoc;
1778          ifInstLoc = emitInfo->prog->NumInstructions;
1779          inst = emit_instruction(emitInfo, OPCODE_IF,
1780                                  NULL, /* dest */
1781                                  n->Children[0]->Store,
1782                                  NULL,
1783                                  NULL);
1784          n->InstLocation = emitInfo->prog->NumInstructions;
1785
1786          inst = new_instruction(emitInfo, opcode);
1787          inst = new_instruction(emitInfo, OPCODE_ENDIF);
1788
1789          emitInfo->prog->Instructions[ifInstLoc].BranchTarget
1790             = emitInfo->prog->NumInstructions;
1791          return inst;
1792       }
1793    }
1794    else {
1795       const GLuint condWritemask = inst->DstReg.WriteMask;
1796       assert(emitInfo->EmitCondCodes);
1797       inst = new_instruction(emitInfo, OPCODE_BRA);
1798       inst->DstReg.CondMask = COND_NE;
1799       inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1800       return inst;
1801    }
1802 }
1803
1804
1805 static struct prog_instruction *
1806 emit_swizzle(slang_emit_info *emitInfo, slang_ir_node *n)
1807 {
1808    struct prog_instruction *inst;
1809
1810    inst = emit(emitInfo, n->Children[0]);
1811
1812 #if 0
1813    assert(n->Store->Parent);
1814    /* Apply this node's swizzle to parent's storage */
1815    GLuint swizzle = n->Store->Swizzle;
1816    _slang_copy_ir_storage(n->Store, n->Store->Parent);
1817    n->Store->Swizzle = _slang_swizzle_swizzle(n->Store->Swizzle, swizzle);
1818    assert(!n->Store->Parent);
1819 #endif
1820    return inst;
1821 }
1822
1823
1824 /**
1825  * Dereference array element:  element == array[index]
1826  * This basically involves emitting code for computing the array index
1827  * and updating the node/element's storage info.
1828  */
1829 static struct prog_instruction *
1830 emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
1831 {
1832    slang_ir_storage *arrayStore, *indexStore;
1833    const int elemSize = n->Store->Size;           /* number of floats */
1834    const GLint elemSizeVec = (elemSize + 3) / 4;  /* number of vec4 */
1835    struct prog_instruction *inst;
1836
1837    assert(n->Opcode == IR_ELEMENT);
1838    assert(elemSize > 0);
1839
1840    /* special case for built-in state variables, like light state */
1841    {
1842       slang_ir_storage *root = n->Store;
1843       assert(!root->Parent);
1844       while (root->Parent)
1845          root = root->Parent;
1846
1847       if (root->File == PROGRAM_STATE_VAR) {
1848          GLboolean direct;
1849          GLint index =
1850             _slang_alloc_statevar(n, emitInfo->prog->Parameters, &direct);
1851          if (index < 0) {
1852             /* error */
1853             return NULL;
1854          }
1855          if (direct) {
1856             n->Store->Index = index;
1857             return NULL; /* all done */
1858          }
1859       }
1860    }
1861
1862    /* do codegen for array itself */
1863    emit(emitInfo, n->Children[0]);
1864    arrayStore = n->Children[0]->Store;
1865
1866    /* The initial array element storage is the array's storage,
1867     * then modified below.
1868     */
1869    _slang_copy_ir_storage(n->Store, arrayStore);
1870
1871
1872    if (n->Children[1]->Opcode == IR_FLOAT) {
1873       /* Constant array index */
1874       const GLint element = (GLint) n->Children[1]->Value[0];
1875
1876       /* this element's storage is the array's storage, plus constant offset */
1877       n->Store->Index += elemSizeVec * element;
1878    }
1879    else {
1880       /* Variable array index */
1881
1882       /* do codegen for array index expression */
1883       emit(emitInfo, n->Children[1]);
1884       indexStore = n->Children[1]->Store;
1885
1886       if (indexStore->IsIndirect) {
1887          /* need to put the array index into a temporary since we can't
1888           * directly support a[b[i]] constructs.
1889           */
1890
1891
1892          /*indexStore = tempstore();*/
1893       }
1894
1895
1896       if (elemSize > 4) {
1897          /* need to multiply array index by array element size */
1898          struct prog_instruction *inst;
1899          slang_ir_storage *indexTemp;
1900          slang_ir_storage elemSizeStore;
1901
1902          /* allocate 1 float indexTemp */
1903          indexTemp = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, 1);
1904          _slang_alloc_temp(emitInfo->vt, indexTemp);
1905
1906          /* allocate a constant containing the element size */
1907          constant_to_storage(emitInfo, (float) elemSizeVec, &elemSizeStore);
1908
1909          /* multiply array index by element size */
1910          inst = emit_instruction(emitInfo,
1911                                  OPCODE_MUL,
1912                                  indexTemp, /* dest */
1913                                  indexStore, /* the index */
1914                                  &elemSizeStore,
1915                                  NULL);
1916
1917          indexStore = indexTemp;
1918       }
1919
1920       if (arrayStore->IsIndirect) {
1921          /* ex: in a[i][j], a[i] (the arrayStore) is indirect */
1922          /* Need to add indexStore to arrayStore->Indirect store */
1923          slang_ir_storage indirectArray;
1924          slang_ir_storage *indexTemp;
1925
1926          _slang_init_ir_storage(&indirectArray,
1927                                 arrayStore->IndirectFile,
1928                                 arrayStore->IndirectIndex,
1929                                 1,
1930                                 arrayStore->IndirectSwizzle);
1931
1932          /* allocate 1 float indexTemp */
1933          indexTemp = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, 1);
1934          _slang_alloc_temp(emitInfo->vt, indexTemp);
1935
1936          inst = emit_instruction(emitInfo,
1937                                  OPCODE_ADD,
1938                                  indexTemp,      /* dest */
1939                                  indexStore,     /* the index */
1940                                  &indirectArray, /* indirect array base */
1941                                  NULL);
1942
1943          indexStore = indexTemp;
1944       }
1945
1946       /* update the array element storage info */
1947       n->Store->IsIndirect = GL_TRUE;
1948       n->Store->IndirectFile = indexStore->File;
1949       n->Store->IndirectIndex = indexStore->Index;
1950       n->Store->IndirectSwizzle = indexStore->Swizzle;
1951    }
1952
1953    n->Store->Size = elemSize;
1954    n->Store->Swizzle = _slang_var_swizzle(elemSize, 0);
1955
1956    return NULL; /* no instruction */
1957 }
1958
1959
1960 /**
1961  * Resolve storage for accessing a structure field.
1962  */
1963 static struct prog_instruction *
1964 emit_struct_field(slang_emit_info *emitInfo, slang_ir_node *n)
1965 {
1966    slang_ir_storage *root = n->Store;
1967    GLint fieldOffset, fieldSize;
1968
1969    assert(n->Opcode == IR_FIELD);
1970
1971    assert(!root->Parent);
1972    while (root->Parent)
1973       root = root->Parent;
1974
1975    /* If this is the field of a state var, allocate constant/uniform
1976     * storage for it now if we haven't already.
1977     * Note that we allocate storage (uniform/constant slots) for state
1978     * variables here rather than at declaration time so we only allocate
1979     * space for the ones that we actually use!
1980     */
1981    if (root->File == PROGRAM_STATE_VAR) {
1982       GLboolean direct;
1983       GLint index = _slang_alloc_statevar(n, emitInfo->prog->Parameters, &direct);
1984       if (index < 0) {
1985          slang_info_log_error(emitInfo->log, "Error parsing state variable");
1986          return NULL;
1987       }
1988       if (direct) {
1989          root->Index = index;
1990          return NULL; /* all done */
1991       }
1992    }
1993
1994    /* do codegen for struct */
1995    emit(emitInfo, n->Children[0]);
1996    assert(n->Children[0]->Store->Index >= 0);
1997
1998
1999    fieldOffset = n->Store->Index;
2000    fieldSize = n->Store->Size;
2001
2002    _slang_copy_ir_storage(n->Store, n->Children[0]->Store);
2003
2004    n->Store->Index = n->Children[0]->Store->Index + fieldOffset / 4;
2005    n->Store->Size = fieldSize;
2006
2007    switch (fieldSize) {
2008    case 1:
2009       {
2010          GLint swz = fieldOffset % 4;
2011          n->Store->Swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz);
2012       }
2013       break;
2014    case 2:
2015       n->Store->Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
2016                                         SWIZZLE_NIL, SWIZZLE_NIL);
2017       break;
2018    case 3:
2019       n->Store->Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
2020                                         SWIZZLE_Z, SWIZZLE_NIL);
2021       break;
2022    default:
2023       n->Store->Swizzle = SWIZZLE_XYZW;
2024    }
2025
2026    assert(n->Store->Index >= 0);
2027
2028    return NULL; /* no instruction */
2029 }
2030
2031
2032 /**
2033  * Emit code for a variable declaration.
2034  * This usually doesn't result in any code generation, but just
2035  * memory allocation.
2036  */
2037 static struct prog_instruction *
2038 emit_var_decl(slang_emit_info *emitInfo, slang_ir_node *n)
2039 {
2040    assert(n->Store);
2041    assert(n->Store->File != PROGRAM_UNDEFINED);
2042    assert(n->Store->Size > 0);
2043    /*assert(n->Store->Index < 0);*/
2044
2045    if (!n->Var || n->Var->isTemp) {
2046       /* a nameless/temporary variable, will be freed after first use */
2047       /*NEW*/
2048       if (n->Store->Index < 0 && !_slang_alloc_temp(emitInfo->vt, n->Store)) {
2049          slang_info_log_error(emitInfo->log,
2050                               "Ran out of registers, too many temporaries");
2051          return NULL;
2052       }
2053    }
2054    else {
2055       /* a regular variable */
2056       _slang_add_variable(emitInfo->vt, n->Var);
2057       if (!_slang_alloc_var(emitInfo->vt, n->Store)) {
2058          slang_info_log_error(emitInfo->log,
2059                               "Ran out of registers, too many variables");
2060          return NULL;
2061       }
2062       /*
2063         printf("IR_VAR_DECL %s %d store %p\n",
2064         (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
2065       */
2066       assert(n->Var->store == n->Store);
2067    }
2068    if (emitInfo->EmitComments) {
2069       /* emit NOP with comment describing the variable's storage location */
2070       char s[1000];
2071       sprintf(s, "TEMP[%d]%s = variable %s (size %d)",
2072               n->Store->Index,
2073               _mesa_swizzle_string(n->Store->Swizzle, 0, GL_FALSE),
2074               (n->Var ? (char *) n->Var->a_name : "anonymous"),
2075               n->Store->Size);
2076       emit_comment(emitInfo, s);
2077    }
2078    return NULL;
2079 }
2080
2081
2082 /**
2083  * Emit code for a reference to a variable.
2084  * Actually, no code is generated but we may do some memory allocation.
2085  * In particular, state vars (uniforms) are allocated on an as-needed basis.
2086  */
2087 static struct prog_instruction *
2088 emit_var_ref(slang_emit_info *emitInfo, slang_ir_node *n)
2089 {
2090    assert(n->Store);
2091    assert(n->Store->File != PROGRAM_UNDEFINED);
2092
2093    if (n->Store->File == PROGRAM_STATE_VAR && n->Store->Index < 0) {
2094       GLboolean direct;
2095       GLint index = _slang_alloc_statevar(n, emitInfo->prog->Parameters, &direct);
2096       if (index < 0) {
2097          /* error */
2098          char s[100];
2099          _mesa_snprintf(s, sizeof(s), "Undefined variable '%s'",
2100                         (char *) n->Var->a_name);
2101          slang_info_log_error(emitInfo->log, s);
2102          return NULL;
2103       }
2104
2105       n->Store->Index = index;
2106    }
2107    else if (n->Store->File == PROGRAM_UNIFORM ||
2108             n->Store->File == PROGRAM_SAMPLER) {
2109       /* mark var as used */
2110       _mesa_use_uniform(emitInfo->prog->Parameters, (char *) n->Var->a_name);
2111    }
2112
2113    if (n->Store->Index < 0) {
2114       /* probably ran out of registers */
2115       return NULL;
2116    }
2117    assert(n->Store->Size > 0);
2118
2119    return NULL;
2120 }
2121
2122
2123 static struct prog_instruction *
2124 emit(slang_emit_info *emitInfo, slang_ir_node *n)
2125 {
2126    struct prog_instruction *inst;
2127    if (!n)
2128       return NULL;
2129
2130    if (emitInfo->log->error_flag) {
2131       return NULL;
2132    }
2133
2134    switch (n->Opcode) {
2135    case IR_SEQ:
2136       /* sequence of two sub-trees */
2137       assert(n->Children[0]);
2138       assert(n->Children[1]);
2139       emit(emitInfo, n->Children[0]);
2140       if (emitInfo->log->error_flag)
2141          return NULL;
2142       inst = emit(emitInfo, n->Children[1]);
2143 #if 0
2144       assert(!n->Store);
2145 #endif
2146       n->Store = n->Children[1]->Store;
2147       return inst;
2148
2149    case IR_SCOPE:
2150       /* new variable scope */
2151       _slang_push_var_table(emitInfo->vt);
2152       inst = emit(emitInfo, n->Children[0]);
2153       _slang_pop_var_table(emitInfo->vt);
2154       return inst;
2155
2156    case IR_VAR_DECL:
2157       /* Variable declaration - allocate a register for it */
2158       inst = emit_var_decl(emitInfo, n);
2159       return inst;
2160
2161    case IR_VAR:
2162       /* Reference to a variable
2163        * Storage should have already been resolved/allocated.
2164        */
2165       return emit_var_ref(emitInfo, n);
2166
2167    case IR_ELEMENT:
2168       return emit_array_element(emitInfo, n);
2169    case IR_FIELD:
2170       return emit_struct_field(emitInfo, n);
2171    case IR_SWIZZLE:
2172       return emit_swizzle(emitInfo, n);
2173
2174    /* Simple arithmetic */
2175    /* unary */
2176    case IR_MOVE:
2177    case IR_RSQ:
2178    case IR_RCP:
2179    case IR_FLOOR:
2180    case IR_FRAC:
2181    case IR_F_TO_I:
2182    case IR_I_TO_F:
2183    case IR_ABS:
2184    case IR_SIN:
2185    case IR_COS:
2186    case IR_DDX:
2187    case IR_DDY:
2188    case IR_EXP:
2189    case IR_EXP2:
2190    case IR_LOG2:
2191    case IR_NOISE1:
2192    case IR_NOISE2:
2193    case IR_NOISE3:
2194    case IR_NOISE4:
2195    /* binary */
2196    case IR_ADD:
2197    case IR_SUB:
2198    case IR_MUL:
2199    case IR_DOT4:
2200    case IR_DOT3:
2201    case IR_CROSS:
2202    case IR_MIN:
2203    case IR_MAX:
2204    case IR_SEQUAL:
2205    case IR_SNEQUAL:
2206    case IR_SGE:
2207    case IR_SGT:
2208    case IR_SLE:
2209    case IR_SLT:
2210    case IR_POW:
2211    /* trinary operators */
2212    case IR_LRP:
2213       return emit_arith(emitInfo, n);
2214
2215    case IR_EQUAL:
2216    case IR_NOTEQUAL:
2217       return emit_compare(emitInfo, n);
2218
2219    case IR_CLAMP:
2220       return emit_clamp(emitInfo, n);
2221    case IR_TEX:
2222    case IR_TEXB:
2223    case IR_TEXP:
2224       return emit_tex(emitInfo, n);
2225    case IR_NEG:
2226       return emit_negation(emitInfo, n);
2227    case IR_FLOAT:
2228       /* find storage location for this float constant */
2229       n->Store->Index = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
2230                                                    n->Value,
2231                                                    n->Store->Size,
2232                                                    &n->Store->Swizzle);
2233       if (n->Store->Index < 0) {
2234          slang_info_log_error(emitInfo->log, "Ran out of space for constants");
2235          return NULL;
2236       }
2237       return NULL;
2238
2239    case IR_COPY:
2240       return emit_copy(emitInfo, n);
2241
2242    case IR_COND:
2243       return emit_cond(emitInfo, n);
2244
2245    case IR_NOT:
2246       return emit_not(emitInfo, n);
2247
2248    case IR_LABEL:
2249       return emit_label(emitInfo, n);
2250
2251    case IR_KILL:
2252       return emit_kill(emitInfo);
2253
2254    case IR_CALL:
2255       /* new variable scope for subroutines/function calls */
2256       _slang_push_var_table(emitInfo->vt);
2257       inst = emit_fcall(emitInfo, n);
2258       _slang_pop_var_table(emitInfo->vt);
2259       return inst;
2260
2261    case IR_IF:
2262       return emit_if(emitInfo, n);
2263
2264    case IR_LOOP:
2265       return emit_loop(emitInfo, n);
2266    case IR_BREAK_IF_TRUE:
2267    case IR_CONT_IF_TRUE:
2268       return emit_cont_break_if_true(emitInfo, n);
2269    case IR_BREAK:
2270       /* fall-through */
2271    case IR_CONT:
2272       return emit_cont_break(emitInfo, n);
2273
2274    case IR_BEGIN_SUB:
2275       return new_instruction(emitInfo, OPCODE_BGNSUB);
2276    case IR_END_SUB:
2277       return new_instruction(emitInfo, OPCODE_ENDSUB);
2278    case IR_RETURN:
2279       return emit_return(emitInfo, n);
2280
2281    case IR_NOP:
2282       return NULL;
2283
2284    default:
2285       _mesa_problem(NULL, "Unexpected IR opcode in emit()\n");
2286    }
2287    return NULL;
2288 }
2289
2290
2291 /**
2292  * After code generation, any subroutines will be in separate program
2293  * objects.  This function appends all the subroutines onto the main
2294  * program and resolves the linking of all the branch/call instructions.
2295  * XXX this logic should really be part of the linking process...
2296  */
2297 static void
2298 _slang_resolve_subroutines(slang_emit_info *emitInfo)
2299 {
2300    GET_CURRENT_CONTEXT(ctx);
2301    struct gl_program *mainP = emitInfo->prog;
2302    GLuint *subroutineLoc, i, total;
2303
2304    subroutineLoc
2305       = (GLuint *) _mesa_malloc(emitInfo->NumSubroutines * sizeof(GLuint));
2306
2307    /* total number of instructions */
2308    total = mainP->NumInstructions;
2309    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2310       subroutineLoc[i] = total;
2311       total += emitInfo->Subroutines[i]->NumInstructions;
2312    }
2313
2314    /* adjust BranchTargets within the functions */
2315    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2316       struct gl_program *sub = emitInfo->Subroutines[i];
2317       GLuint j;
2318       for (j = 0; j < sub->NumInstructions; j++) {
2319          struct prog_instruction *inst = sub->Instructions + j;
2320          if (inst->Opcode != OPCODE_CAL && inst->BranchTarget >= 0) {
2321             inst->BranchTarget += subroutineLoc[i];
2322          }
2323       }
2324    }
2325
2326    /* append subroutines' instructions after main's instructions */
2327    mainP->Instructions = _mesa_realloc_instructions(mainP->Instructions,
2328                                                     mainP->NumInstructions,
2329                                                     total);
2330    mainP->NumInstructions = total;
2331    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2332       struct gl_program *sub = emitInfo->Subroutines[i];
2333       _mesa_copy_instructions(mainP->Instructions + subroutineLoc[i],
2334                               sub->Instructions,
2335                               sub->NumInstructions);
2336       /* delete subroutine code */
2337       sub->Parameters = NULL; /* prevent double-free */
2338       _mesa_reference_program(ctx, &emitInfo->Subroutines[i], NULL);
2339    }
2340
2341    /* free subroutine list */
2342    if (emitInfo->Subroutines) {
2343       _mesa_free(emitInfo->Subroutines);
2344       emitInfo->Subroutines = NULL;
2345    }
2346    emitInfo->NumSubroutines = 0;
2347
2348    /* Examine CAL instructions.
2349     * At this point, the BranchTarget field of the CAL instruction is
2350     * the number/id of the subroutine to call (an index into the
2351     * emitInfo->Subroutines list).
2352     * Translate that into an actual instruction location now.
2353     */
2354    for (i = 0; i < mainP->NumInstructions; i++) {
2355       struct prog_instruction *inst = mainP->Instructions + i;
2356       if (inst->Opcode == OPCODE_CAL) {
2357          const GLuint f = inst->BranchTarget;
2358          inst->BranchTarget = subroutineLoc[f];
2359       }
2360    }
2361
2362    _mesa_free(subroutineLoc);
2363 }
2364
2365
2366
2367
2368 GLboolean
2369 _slang_emit_code(slang_ir_node *n, slang_var_table *vt,
2370                  struct gl_program *prog, GLboolean withEnd,
2371                  slang_info_log *log)
2372 {
2373    GET_CURRENT_CONTEXT(ctx);
2374    GLboolean success;
2375    slang_emit_info emitInfo;
2376    GLuint maxUniforms;
2377
2378    emitInfo.log = log;
2379    emitInfo.vt = vt;
2380    emitInfo.prog = prog;
2381    emitInfo.Subroutines = NULL;
2382    emitInfo.NumSubroutines = 0;
2383    emitInfo.MaxInstructions = prog->NumInstructions;
2384
2385    emitInfo.EmitHighLevelInstructions = ctx->Shader.EmitHighLevelInstructions;
2386    emitInfo.EmitCondCodes = ctx->Shader.EmitCondCodes;
2387    emitInfo.EmitComments = ctx->Shader.EmitComments;
2388    emitInfo.EmitBeginEndSub = GL_TRUE;
2389
2390    if (!emitInfo.EmitCondCodes) {
2391       emitInfo.EmitHighLevelInstructions = GL_TRUE;
2392    }
2393
2394    /* Check uniform/constant limits */
2395    if (prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
2396       maxUniforms = ctx->Const.FragmentProgram.MaxUniformComponents / 4;
2397    }
2398    else {
2399       assert(prog->Target == GL_VERTEX_PROGRAM_ARB);
2400       maxUniforms = ctx->Const.VertexProgram.MaxUniformComponents / 4;
2401    }
2402    if (prog->Parameters->NumParameters > maxUniforms) {
2403       slang_info_log_error(log, "Constant/uniform register limit exceeded");
2404       return GL_FALSE;
2405    }
2406
2407    (void) emit(&emitInfo, n);
2408
2409    /* finish up by adding the END opcode to program */
2410    if (withEnd) {
2411       struct prog_instruction *inst;
2412       inst = new_instruction(&emitInfo, OPCODE_END);
2413    }
2414
2415    _slang_resolve_subroutines(&emitInfo);
2416
2417    success = GL_TRUE;
2418
2419 #if 0
2420    printf("*********** End emit code (%u inst):\n", prog->NumInstructions);
2421    _mesa_print_program(prog);
2422    _mesa_print_program_parameters(ctx,prog);
2423 #endif
2424
2425    return success;
2426 }