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[mesa.git] / src / mesa / shader / slang / slang_emit.c
1 /*
2 * Mesa 3-D graphics library
3 * Version: 6.5.3
4 *
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 /**
26 * \file slang_emit.c
27 * Emit program instructions (PI code) from IR trees.
28 * \author Brian Paul
29 */
30
31 /***
32 *** NOTES
33 ***
34 *** To emit GPU instructions, we basically just do an in-order traversal
35 *** of the IR tree.
36 ***/
37
38
39 #include "imports.h"
40 #include "context.h"
41 #include "macros.h"
42 #include "program.h"
43 #include "prog_instruction.h"
44 #include "prog_parameter.h"
45 #include "prog_print.h"
46 #include "slang_builtin.h"
47 #include "slang_emit.h"
48
49
50 #define PEEPHOLE_OPTIMIZATIONS 1
51 #define ANNOTATE 0
52
53
54 typedef struct
55 {
56 slang_info_log *log;
57 slang_var_table *vt;
58 struct gl_program *prog;
59 struct gl_program **Subroutines;
60 GLuint NumSubroutines;
61
62 /* code-gen options */
63 GLboolean EmitHighLevelInstructions;
64 GLboolean EmitCondCodes;
65 GLboolean EmitComments;
66 GLboolean EmitBeginEndSub; /* XXX TEMPORARY */
67 } slang_emit_info;
68
69
70
71 static struct gl_program *
72 new_subroutine(slang_emit_info *emitInfo, GLuint *id)
73 {
74 GET_CURRENT_CONTEXT(ctx);
75 const GLuint n = emitInfo->NumSubroutines;
76
77 emitInfo->Subroutines = (struct gl_program **)
78 _mesa_realloc(emitInfo->Subroutines,
79 n * sizeof(struct gl_program),
80 (n + 1) * sizeof(struct gl_program));
81 emitInfo->Subroutines[n] = _mesa_new_program(ctx, emitInfo->prog->Target, 0);
82 emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters;
83 emitInfo->NumSubroutines++;
84 *id = n;
85 return emitInfo->Subroutines[n];
86 }
87
88
89 /**
90 * Convert a writemask to a swizzle. Used for testing cond codes because
91 * we only want to test the cond code component(s) that was set by the
92 * previous instruction.
93 */
94 static GLuint
95 writemask_to_swizzle(GLuint writemask)
96 {
97 if (writemask == WRITEMASK_X)
98 return SWIZZLE_XXXX;
99 if (writemask == WRITEMASK_Y)
100 return SWIZZLE_YYYY;
101 if (writemask == WRITEMASK_Z)
102 return SWIZZLE_ZZZZ;
103 if (writemask == WRITEMASK_W)
104 return SWIZZLE_WWWW;
105 return SWIZZLE_XYZW; /* shouldn't be hit */
106 }
107
108
109 /**
110 * Swizzle a swizzle. That is, return swz2(swz1)
111 */
112 static GLuint
113 swizzle_swizzle(GLuint swz1, GLuint swz2)
114 {
115 GLuint i, swz, s[4];
116 for (i = 0; i < 4; i++) {
117 GLuint c = GET_SWZ(swz2, i);
118 s[i] = GET_SWZ(swz1, c);
119 }
120 swz = MAKE_SWIZZLE4(s[0], s[1], s[2], s[3]);
121 return swz;
122 }
123
124
125 slang_ir_storage *
126 _slang_new_ir_storage(enum register_file file, GLint index, GLint size)
127 {
128 slang_ir_storage *st;
129 st = (slang_ir_storage *) _mesa_calloc(sizeof(slang_ir_storage));
130 if (st) {
131 st->File = file;
132 st->Index = index;
133 st->Size = size;
134 st->Swizzle = SWIZZLE_NOOP;
135 }
136 return st;
137 }
138
139
140 /**
141 * Allocate temporary storage for an intermediate result (such as for
142 * a multiply or add, etc.
143 */
144 static GLboolean
145 alloc_temp_storage(slang_emit_info *emitInfo, slang_ir_node *n, GLint size)
146 {
147 assert(!n->Var);
148 assert(!n->Store);
149 assert(size > 0);
150 n->Store = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, size);
151 if (!_slang_alloc_temp(emitInfo->vt, n->Store)) {
152 slang_info_log_error(emitInfo->log,
153 "Ran out of registers, too many temporaries");
154 return GL_FALSE;
155 }
156 return GL_TRUE;
157 }
158
159
160 /**
161 * Free temporary storage, if n->Store is, in fact, temp storage.
162 * Otherwise, no-op.
163 */
164 static void
165 free_temp_storage(slang_var_table *vt, slang_ir_node *n)
166 {
167 if (n->Store->File == PROGRAM_TEMPORARY &&
168 n->Store->Index >= 0 &&
169 n->Opcode != IR_SWIZZLE) {
170 if (_slang_is_temp(vt, n->Store)) {
171 _slang_free_temp(vt, n->Store);
172 n->Store->Index = -1;
173 n->Store->Size = -1;
174 _mesa_free(n->Store);
175 n->Store = NULL;
176 }
177 }
178 }
179
180
181 /**
182 * Convert IR storage to an instruction dst register.
183 */
184 static void
185 storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st,
186 GLuint writemask)
187 {
188 assert(st->Index >= 0);
189 dst->File = st->File;
190 dst->Index = st->Index;
191 assert(st->File != PROGRAM_UNDEFINED);
192 assert(st->Size >= 1);
193 assert(st->Size <= 4);
194 if (st->Size == 1) {
195 GLuint comp = GET_SWZ(st->Swizzle, 0);
196 assert(comp < 4);
197 dst->WriteMask = WRITEMASK_X << comp;
198 }
199 else {
200 dst->WriteMask = writemask;
201 }
202 }
203
204
205 /**
206 * Convert IR storage to an instruction src register.
207 */
208 static void
209 storage_to_src_reg(struct prog_src_register *src, const slang_ir_storage *st)
210 {
211 static const GLuint defaultSwizzle[4] = {
212 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
213 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
214 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
215 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W)
216 };
217 assert(st->File >= 0);
218 assert(st->File < PROGRAM_UNDEFINED);
219 assert(st->Size >= 1);
220 assert(st->Size <= 4);
221 src->File = st->File;
222 src->Index = st->Index;
223 if (st->Swizzle != SWIZZLE_NOOP)
224 src->Swizzle = st->Swizzle;
225 else
226 src->Swizzle = defaultSwizzle[st->Size - 1]; /*XXX really need this?*/
227
228 assert(GET_SWZ(src->Swizzle, 0) <= 3);
229 assert(GET_SWZ(src->Swizzle, 1) <= 3);
230 assert(GET_SWZ(src->Swizzle, 2) <= 3);
231 assert(GET_SWZ(src->Swizzle, 3) <= 3);
232 }
233
234
235
236 /**
237 * Add new instruction at end of given program.
238 * \param prog the program to append instruction onto
239 * \param opcode opcode for the new instruction
240 * \return pointer to the new instruction
241 */
242 static struct prog_instruction *
243 new_instruction(slang_emit_info *emitInfo, gl_inst_opcode opcode)
244 {
245 struct gl_program *prog = emitInfo->prog;
246 struct prog_instruction *inst;
247
248 #if 0
249 /* print prev inst */
250 if (prog->NumInstructions > 0) {
251 _mesa_print_instruction(prog->Instructions + prog->NumInstructions - 1);
252 }
253 #endif
254 prog->Instructions = _mesa_realloc_instructions(prog->Instructions,
255 prog->NumInstructions,
256 prog->NumInstructions + 1);
257 inst = prog->Instructions + prog->NumInstructions;
258 prog->NumInstructions++;
259 _mesa_init_instructions(inst, 1);
260 inst->Opcode = opcode;
261 inst->BranchTarget = -1; /* invalid */
262 /*
263 printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
264 _mesa_opcode_string(inst->Opcode));
265 */
266 return inst;
267 }
268
269
270 /**
271 * Return pointer to last instruction in program.
272 */
273 static struct prog_instruction *
274 prev_instruction(slang_emit_info *emitInfo)
275 {
276 struct gl_program *prog = emitInfo->prog;
277 if (prog->NumInstructions == 0)
278 return NULL;
279 else
280 return prog->Instructions + prog->NumInstructions - 1;
281 }
282
283
284 static struct prog_instruction *
285 emit(slang_emit_info *emitInfo, slang_ir_node *n);
286
287
288 /**
289 * Return an annotation string for given node's storage.
290 */
291 static char *
292 storage_annotation(const slang_ir_node *n, const struct gl_program *prog)
293 {
294 #if ANNOTATE
295 const slang_ir_storage *st = n->Store;
296 static char s[100] = "";
297
298 if (!st)
299 return _mesa_strdup("");
300
301 switch (st->File) {
302 case PROGRAM_CONSTANT:
303 if (st->Index >= 0) {
304 const GLfloat *val = prog->Parameters->ParameterValues[st->Index];
305 if (st->Swizzle == SWIZZLE_NOOP)
306 sprintf(s, "{%g, %g, %g, %g}", val[0], val[1], val[2], val[3]);
307 else {
308 sprintf(s, "%g", val[GET_SWZ(st->Swizzle, 0)]);
309 }
310 }
311 break;
312 case PROGRAM_TEMPORARY:
313 if (n->Var)
314 sprintf(s, "%s", (char *) n->Var->a_name);
315 else
316 sprintf(s, "t[%d]", st->Index);
317 break;
318 case PROGRAM_STATE_VAR:
319 case PROGRAM_UNIFORM:
320 sprintf(s, "%s", prog->Parameters->Parameters[st->Index].Name);
321 break;
322 case PROGRAM_VARYING:
323 sprintf(s, "%s", prog->Varying->Parameters[st->Index].Name);
324 break;
325 case PROGRAM_INPUT:
326 sprintf(s, "input[%d]", st->Index);
327 break;
328 case PROGRAM_OUTPUT:
329 sprintf(s, "output[%d]", st->Index);
330 break;
331 default:
332 s[0] = 0;
333 }
334 return _mesa_strdup(s);
335 #else
336 return NULL;
337 #endif
338 }
339
340
341 /**
342 * Return an annotation string for an instruction.
343 */
344 static char *
345 instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
346 char *srcAnnot0, char *srcAnnot1, char *srcAnnot2)
347 {
348 #if ANNOTATE
349 const char *operator;
350 char *s;
351 int len = 50;
352
353 if (dstAnnot)
354 len += strlen(dstAnnot);
355 else
356 dstAnnot = _mesa_strdup("");
357
358 if (srcAnnot0)
359 len += strlen(srcAnnot0);
360 else
361 srcAnnot0 = _mesa_strdup("");
362
363 if (srcAnnot1)
364 len += strlen(srcAnnot1);
365 else
366 srcAnnot1 = _mesa_strdup("");
367
368 if (srcAnnot2)
369 len += strlen(srcAnnot2);
370 else
371 srcAnnot2 = _mesa_strdup("");
372
373 switch (opcode) {
374 case OPCODE_ADD:
375 operator = "+";
376 break;
377 case OPCODE_SUB:
378 operator = "-";
379 break;
380 case OPCODE_MUL:
381 operator = "*";
382 break;
383 case OPCODE_DP3:
384 operator = "DP3";
385 break;
386 case OPCODE_DP4:
387 operator = "DP4";
388 break;
389 case OPCODE_XPD:
390 operator = "XPD";
391 break;
392 case OPCODE_RSQ:
393 operator = "RSQ";
394 break;
395 case OPCODE_SGT:
396 operator = ">";
397 break;
398 default:
399 operator = ",";
400 }
401
402 s = (char *) malloc(len);
403 sprintf(s, "%s = %s %s %s %s", dstAnnot,
404 srcAnnot0, operator, srcAnnot1, srcAnnot2);
405 assert(_mesa_strlen(s) < len);
406
407 free(dstAnnot);
408 free(srcAnnot0);
409 free(srcAnnot1);
410 free(srcAnnot2);
411
412 return s;
413 #else
414 return NULL;
415 #endif
416 }
417
418
419 /**
420 * Emit an instruction that's just a comment.
421 */
422 static struct prog_instruction *
423 emit_comment(slang_emit_info *emitInfo, const char *s)
424 {
425 struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_NOP);
426 if (inst) {
427 inst->Comment = _mesa_strdup(s);
428 }
429 return inst;
430 }
431
432
433 /**
434 * Generate code for a simple arithmetic instruction.
435 * Either 1, 2 or 3 operands.
436 */
437 static struct prog_instruction *
438 emit_arith(slang_emit_info *emitInfo, slang_ir_node *n)
439 {
440 struct prog_instruction *inst;
441 const slang_ir_info *info = _slang_ir_info(n->Opcode);
442 char *srcAnnot[3], *dstAnnot;
443 GLuint i;
444
445 assert(info);
446 assert(info->InstOpcode != OPCODE_NOP);
447
448 srcAnnot[0] = srcAnnot[1] = srcAnnot[2] = dstAnnot = NULL;
449
450 #if PEEPHOLE_OPTIMIZATIONS
451 /* Look for MAD opportunity */
452 if (info->NumParams == 2 &&
453 n->Opcode == IR_ADD && n->Children[0]->Opcode == IR_MUL) {
454 /* found pattern IR_ADD(IR_MUL(A, B), C) */
455 emit(emitInfo, n->Children[0]->Children[0]); /* A */
456 emit(emitInfo, n->Children[0]->Children[1]); /* B */
457 emit(emitInfo, n->Children[1]); /* C */
458 /* generate MAD instruction */
459 inst = new_instruction(emitInfo, OPCODE_MAD);
460 /* operands: A, B, C: */
461 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Children[0]->Store);
462 storage_to_src_reg(&inst->SrcReg[1], n->Children[0]->Children[1]->Store);
463 storage_to_src_reg(&inst->SrcReg[2], n->Children[1]->Store);
464 free_temp_storage(emitInfo->vt, n->Children[0]->Children[0]);
465 free_temp_storage(emitInfo->vt, n->Children[0]->Children[1]);
466 free_temp_storage(emitInfo->vt, n->Children[1]);
467 }
468 else if (info->NumParams == 2 &&
469 n->Opcode == IR_ADD && n->Children[1]->Opcode == IR_MUL) {
470 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
471 emit(emitInfo, n->Children[0]); /* A */
472 emit(emitInfo, n->Children[1]->Children[0]); /* B */
473 emit(emitInfo, n->Children[1]->Children[1]); /* C */
474 /* generate MAD instruction */
475 inst = new_instruction(emitInfo, OPCODE_MAD);
476 /* operands: B, C, A */
477 storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Children[0]->Store);
478 storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Children[1]->Store);
479 storage_to_src_reg(&inst->SrcReg[2], n->Children[0]->Store);
480 free_temp_storage(emitInfo->vt, n->Children[1]->Children[0]);
481 free_temp_storage(emitInfo->vt, n->Children[1]->Children[1]);
482 free_temp_storage(emitInfo->vt, n->Children[0]);
483 }
484 else
485 #endif
486 {
487 /* normal case */
488
489 /* gen code for children */
490 for (i = 0; i < info->NumParams; i++)
491 emit(emitInfo, n->Children[i]);
492
493 /* gen this instruction and src registers */
494 inst = new_instruction(emitInfo, info->InstOpcode);
495 for (i = 0; i < info->NumParams; i++)
496 storage_to_src_reg(&inst->SrcReg[i], n->Children[i]->Store);
497
498 /* annotation */
499 for (i = 0; i < info->NumParams; i++)
500 srcAnnot[i] = storage_annotation(n->Children[i], emitInfo->prog);
501
502 /* free temps */
503 for (i = 0; i < info->NumParams; i++)
504 free_temp_storage(emitInfo->vt, n->Children[i]);
505 }
506
507 /* result storage */
508 if (!n->Store) {
509 /* XXX this size isn't correct, it depends on the operands */
510 if (!alloc_temp_storage(emitInfo, n, info->ResultSize))
511 return NULL;
512 }
513 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
514
515 dstAnnot = storage_annotation(n, emitInfo->prog);
516
517 inst->Comment = instruction_annotation(inst->Opcode, dstAnnot, srcAnnot[0],
518 srcAnnot[1], srcAnnot[2]);
519
520 /*_mesa_print_instruction(inst);*/
521 return inst;
522 }
523
524
525 /**
526 * Emit code for == and != operators. These could normally be handled
527 * by emit_arith() except we need to be able to handle structure comparisons.
528 */
529 static struct prog_instruction *
530 emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
531 {
532 struct prog_instruction *inst;
533 GLint size;
534
535 assert(n->Opcode == IR_EQUAL || n->Opcode == IR_NOTEQUAL);
536
537 /* gen code for children */
538 emit(emitInfo, n->Children[0]);
539 emit(emitInfo, n->Children[1]);
540
541 assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);
542 size = n->Children[0]->Store->Size;
543
544 if (size == 1) {
545 gl_inst_opcode opcode;
546
547 if (!n->Store) {
548 if (!alloc_temp_storage(emitInfo, n, 1)) /* 1 bool */
549 return NULL;
550 }
551
552 opcode = n->Opcode == IR_EQUAL ? OPCODE_SEQ : OPCODE_SNE;
553 inst = new_instruction(emitInfo, opcode);
554 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
555 storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
556 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
557 }
558 else if (size <= 4) {
559 static const GLfloat zero[4] = { 0, 0, 0, 0 };
560 GLuint zeroSwizzle, swizzle;
561 GLint zeroReg = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
562 zero, 4, &zeroSwizzle);
563 gl_inst_opcode dotOp;
564
565 assert(zeroReg >= 0);
566
567 assert(!n->Store);
568 if (!n->Store) {
569 if (!alloc_temp_storage(emitInfo, n, size)) /* 'size' bools */
570 return NULL;
571 }
572
573 if (size == 4) {
574 dotOp = OPCODE_DP4;
575 swizzle = SWIZZLE_XYZW;
576 }
577 else if (size == 3) {
578 dotOp = OPCODE_DP3;
579 swizzle = SWIZZLE_XYZW;
580 }
581 else {
582 assert(size == 2);
583 dotOp = OPCODE_DP3;
584 swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
585 }
586
587 /* Compute equality, inequality (tmp1 = (A ?= B)) */
588 inst = new_instruction(emitInfo, OPCODE_SNE);
589 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
590 storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
591 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
592 inst->Comment = _mesa_strdup("Compare values");
593
594 /* Compute tmp2 = DOT(tmp1, tmp1) (reduction) */
595 inst = new_instruction(emitInfo, dotOp);
596 storage_to_src_reg(&inst->SrcReg[0], n->Store);
597 storage_to_src_reg(&inst->SrcReg[1], n->Store);
598 inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/
599 free_temp_storage(emitInfo->vt, n); /* free tmp1 */
600 if (!alloc_temp_storage(emitInfo, n, 1)) /* alloc tmp2 */
601 return NULL;
602 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
603 inst->Comment = _mesa_strdup("Reduce vec to bool");
604
605 if (n->Opcode == IR_EQUAL) {
606 /* compute tmp2.x = !tmp2.x via tmp2.x = (tmp2.x == 0) */
607 inst = new_instruction(emitInfo, OPCODE_SEQ);
608 storage_to_src_reg(&inst->SrcReg[0], n->Store);
609 inst->SrcReg[1].File = PROGRAM_CONSTANT;
610 inst->SrcReg[1].Index = zeroReg;
611 inst->SrcReg[1].Swizzle = zeroSwizzle;
612 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
613 inst->Comment = _mesa_strdup("Invert true/false");
614 }
615 }
616 else {
617 /* size > 4, struct compare */
618 #if 0
619 GLint i, num = (n->Children[0]->Store->Size + 3) / 4;
620 /*printf("BEGIN COMPARE size %d\n", num);*/
621 for (i = 0; i < num; i++) {
622 inst = new_instruction(emitInfo, opcode);
623 inst->SrcReg[0].File = n->Children[0]->Store->File;
624 inst->SrcReg[0].Index = n->Children[0]->Store->Index + i;
625 inst->SrcReg[1].File = n->Children[1]->Store->File;
626 inst->SrcReg[1].Index = n->Children[1]->Store->Index + i;
627 inst->DstReg.File = n->Store->File;
628 inst->DstReg.Index = n->Store->Index;
629
630 inst->CondUpdate = 1; /* update cond code */
631 if (i > 0) {
632 inst->DstReg.CondMask = COND_NE; /* update if !=0 */
633 }
634 /*_mesa_print_instruction(inst);*/
635 }
636 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
637 #endif
638 _mesa_problem(NULL, "struct comparison not implemented yet");
639 inst = NULL;
640 }
641
642 /* free temps */
643 free_temp_storage(emitInfo->vt, n->Children[0]);
644 free_temp_storage(emitInfo->vt, n->Children[1]);
645
646 return inst;
647 }
648
649
650
651 /**
652 * Generate code for an IR_CLAMP instruction.
653 */
654 static struct prog_instruction *
655 emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n)
656 {
657 struct prog_instruction *inst;
658
659 assert(n->Opcode == IR_CLAMP);
660 /* ch[0] = value
661 * ch[1] = min limit
662 * ch[2] = max limit
663 */
664
665 inst = emit(emitInfo, n->Children[0]);
666
667 /* If lower limit == 0.0 and upper limit == 1.0,
668 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
669 * Else,
670 * emit OPCODE_MIN, OPCODE_MAX sequence.
671 */
672 #if 0
673 /* XXX this isn't quite finished yet */
674 if (n->Children[1]->Opcode == IR_FLOAT &&
675 n->Children[1]->Value[0] == 0.0 &&
676 n->Children[1]->Value[1] == 0.0 &&
677 n->Children[1]->Value[2] == 0.0 &&
678 n->Children[1]->Value[3] == 0.0 &&
679 n->Children[2]->Opcode == IR_FLOAT &&
680 n->Children[2]->Value[0] == 1.0 &&
681 n->Children[2]->Value[1] == 1.0 &&
682 n->Children[2]->Value[2] == 1.0 &&
683 n->Children[2]->Value[3] == 1.0) {
684 if (!inst) {
685 inst = prev_instruction(prog);
686 }
687 if (inst && inst->Opcode != OPCODE_NOP) {
688 /* and prev instruction's DstReg matches n->Children[0]->Store */
689 inst->SaturateMode = SATURATE_ZERO_ONE;
690 n->Store = n->Children[0]->Store;
691 return inst;
692 }
693 }
694 #endif
695
696 if (!n->Store)
697 if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
698 return NULL;
699
700 emit(emitInfo, n->Children[1]);
701 emit(emitInfo, n->Children[2]);
702
703 /* tmp = max(ch[0], ch[1]) */
704 inst = new_instruction(emitInfo, OPCODE_MAX);
705 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
706 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
707 storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
708
709 /* tmp = min(tmp, ch[2]) */
710 inst = new_instruction(emitInfo, OPCODE_MIN);
711 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
712 storage_to_src_reg(&inst->SrcReg[0], n->Store);
713 storage_to_src_reg(&inst->SrcReg[1], n->Children[2]->Store);
714
715 return inst;
716 }
717
718
719 static struct prog_instruction *
720 emit_negation(slang_emit_info *emitInfo, slang_ir_node *n)
721 {
722 /* Implement as MOV dst, -src; */
723 /* XXX we could look at the previous instruction and in some circumstances
724 * modify it to accomplish the negation.
725 */
726 struct prog_instruction *inst;
727
728 emit(emitInfo, n->Children[0]);
729
730 if (!n->Store)
731 if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
732 return NULL;
733
734 inst = new_instruction(emitInfo, OPCODE_MOV);
735 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
736 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
737 inst->SrcReg[0].NegateBase = NEGATE_XYZW;
738 return inst;
739 }
740
741
742 static struct prog_instruction *
743 emit_label(slang_emit_info *emitInfo, const slang_ir_node *n)
744 {
745 assert(n->Label);
746 #if 0
747 /* XXX this fails in loop tail code - investigate someday */
748 assert(_slang_label_get_location(n->Label) < 0);
749 _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
750 emitInfo->prog);
751 #else
752 if (_slang_label_get_location(n->Label) < 0)
753 _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
754 emitInfo->prog);
755 #endif
756 return NULL;
757 }
758
759
760 /**
761 * Emit code for an inlined function call (subroutine).
762 */
763 static struct prog_instruction *
764 emit_func(slang_emit_info *emitInfo, slang_ir_node *n)
765 {
766 struct gl_program *progSave;
767 struct prog_instruction *inst;
768 GLuint subroutineId;
769
770 assert(n->Opcode == IR_FUNC);
771 assert(n->Label);
772
773 /* save/push cur program */
774 progSave = emitInfo->prog;
775 emitInfo->prog = new_subroutine(emitInfo, &subroutineId);
776
777 _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
778 emitInfo->prog);
779
780 if (emitInfo->EmitBeginEndSub) {
781 /* BGNSUB isn't a real instruction.
782 * We require a label (i.e. "foobar:") though, if we're going to
783 * print the program in the NV format. The BNGSUB instruction is
784 * really just a NOP to attach the label to.
785 */
786 inst = new_instruction(emitInfo, OPCODE_BGNSUB);
787 inst->Comment = _mesa_strdup(n->Label->Name);
788 }
789
790 /* body of function: */
791 emit(emitInfo, n->Children[0]);
792 n->Store = n->Children[0]->Store;
793
794 /* add RET instruction now, if needed */
795 inst = prev_instruction(emitInfo);
796 if (inst && inst->Opcode != OPCODE_RET) {
797 inst = new_instruction(emitInfo, OPCODE_RET);
798 }
799
800 if (emitInfo->EmitBeginEndSub) {
801 inst = new_instruction(emitInfo, OPCODE_ENDSUB);
802 inst->Comment = _mesa_strdup(n->Label->Name);
803 }
804
805 /* pop/restore cur program */
806 emitInfo->prog = progSave;
807
808 /* emit the function call */
809 inst = new_instruction(emitInfo, OPCODE_CAL);
810 /* The branch target is just the subroutine number (changed later) */
811 inst->BranchTarget = subroutineId;
812 inst->Comment = _mesa_strdup(n->Label->Name);
813 assert(inst->BranchTarget >= 0);
814
815 return inst;
816 }
817
818
819 /**
820 * Emit code for a 'return' statement.
821 */
822 static struct prog_instruction *
823 emit_return(slang_emit_info *emitInfo, slang_ir_node *n)
824 {
825 struct prog_instruction *inst;
826 assert(n);
827 assert(n->Opcode == IR_RETURN);
828 assert(n->Label);
829 inst = new_instruction(emitInfo, OPCODE_RET);
830 inst->DstReg.CondMask = COND_TR; /* always return */
831 return inst;
832 }
833
834
835 static struct prog_instruction *
836 emit_kill(slang_emit_info *emitInfo)
837 {
838 struct prog_instruction *inst;
839 /* NV-KILL - discard fragment depending on condition code.
840 * Note that ARB-KILL depends on sign of vector operand.
841 */
842 inst = new_instruction(emitInfo, OPCODE_KIL_NV);
843 inst->DstReg.CondMask = COND_TR; /* always branch */
844 return inst;
845 }
846
847
848 static struct prog_instruction *
849 emit_tex(slang_emit_info *emitInfo, slang_ir_node *n)
850 {
851 struct prog_instruction *inst;
852
853 (void) emit(emitInfo, n->Children[1]);
854
855 if (n->Opcode == IR_TEX) {
856 inst = new_instruction(emitInfo, OPCODE_TEX);
857 }
858 else if (n->Opcode == IR_TEXB) {
859 inst = new_instruction(emitInfo, OPCODE_TXB);
860 }
861 else {
862 assert(n->Opcode == IR_TEXP);
863 inst = new_instruction(emitInfo, OPCODE_TXP);
864 }
865
866 if (!n->Store)
867 if (!alloc_temp_storage(emitInfo, n, 4))
868 return NULL;
869
870 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
871
872 /* Child[1] is the coord */
873 assert(n->Children[1]->Store->File != PROGRAM_UNDEFINED);
874 assert(n->Children[1]->Store->Index >= 0);
875 storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
876
877 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
878 assert(n->Children[0]->Store);
879 assert(n->Children[0]->Store->Size >= TEXTURE_1D_INDEX);
880
881 inst->Sampler = n->Children[0]->Store->Index; /* i.e. uniform's index */
882 inst->TexSrcTarget = n->Children[0]->Store->Size;
883 inst->TexSrcUnit = 27; /* Dummy value; the TexSrcUnit will be computed at
884 * link time, using the sampler uniform's value.
885 */
886 return inst;
887 }
888
889
890 static struct prog_instruction *
891 emit_move(slang_emit_info *emitInfo, slang_ir_node *n)
892 {
893 struct prog_instruction *inst;
894
895 /* lhs */
896 emit(emitInfo, n->Children[0]);
897
898 /* rhs */
899 assert(n->Children[1]);
900 inst = emit(emitInfo, n->Children[1]);
901
902 if (!n->Children[1]->Store) {
903 slang_info_log_error(emitInfo->log, "invalid assignment");
904 return NULL;
905 }
906 assert(n->Children[1]->Store->Index >= 0);
907
908 n->Store = n->Children[0]->Store;
909
910 #if PEEPHOLE_OPTIMIZATIONS
911 if (inst &&
912 _slang_is_temp(emitInfo->vt, n->Children[1]->Store) &&
913 (inst->DstReg.File == n->Children[1]->Store->File) &&
914 (inst->DstReg.Index == n->Children[1]->Store->Index)) {
915 /* Peephole optimization:
916 * The Right-Hand-Side has its results in a temporary place.
917 * Modify the RHS (and the prev instruction) to store its results
918 * in the destination specified by n->Children[0].
919 * Then, this MOVE is a no-op.
920 */
921 if (n->Children[1]->Opcode != IR_SWIZZLE)
922 _slang_free_temp(emitInfo->vt, n->Children[1]->Store);
923 *n->Children[1]->Store = *n->Children[0]->Store;
924 /* fixup the previous instruction (which stored the RHS result) */
925 assert(n->Children[0]->Store->Index >= 0);
926 storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store, n->Writemask);
927 return inst;
928 }
929 else
930 #endif
931 {
932 if (n->Children[0]->Store->Size > 4) {
933 /* move matrix/struct etc (block of registers) */
934 slang_ir_storage dstStore = *n->Children[0]->Store;
935 slang_ir_storage srcStore = *n->Children[1]->Store;
936 GLint size = srcStore.Size;
937 ASSERT(n->Children[0]->Writemask == WRITEMASK_XYZW);
938 ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP);
939 dstStore.Size = 4;
940 srcStore.Size = 4;
941 while (size >= 4) {
942 inst = new_instruction(emitInfo, OPCODE_MOV);
943 inst->Comment = _mesa_strdup("IR_MOVE block");
944 storage_to_dst_reg(&inst->DstReg, &dstStore, n->Writemask);
945 storage_to_src_reg(&inst->SrcReg[0], &srcStore);
946 srcStore.Index++;
947 dstStore.Index++;
948 size -= 4;
949 }
950 }
951 else {
952 /* single register move */
953 char *srcAnnot, *dstAnnot;
954 inst = new_instruction(emitInfo, OPCODE_MOV);
955 assert(n->Children[0]->Store->Index >= 0);
956 storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store, n->Writemask);
957 storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
958 dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);
959 srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);
960 inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
961 srcAnnot, NULL, NULL);
962 }
963 free_temp_storage(emitInfo->vt, n->Children[1]);
964 return inst;
965 }
966 }
967
968
969 /**
970 * An IR_COND node wraps a boolean expression which is used by an
971 * IF or WHILE test. This is where we'll set condition codes, if needed.
972 */
973 static struct prog_instruction *
974 emit_cond(slang_emit_info *emitInfo, slang_ir_node *n)
975 {
976 struct prog_instruction *inst;
977
978 assert(n->Opcode == IR_COND);
979
980 if (!n->Children[0])
981 return NULL;
982
983 /* emit code for the expression */
984 inst = emit(emitInfo, n->Children[0]);
985
986 assert(n->Children[0]->Store);
987 /*assert(n->Children[0]->Store->Size == 1);*/
988
989 if (emitInfo->EmitCondCodes) {
990 if (inst &&
991 n->Children[0]->Store &&
992 inst->DstReg.File == n->Children[0]->Store->File &&
993 inst->DstReg.Index == n->Children[0]->Store->Index) {
994 /* The previous instruction wrote to the register who's value
995 * we're testing. Just fix that instruction so that the
996 * condition codes are computed.
997 */
998 inst->CondUpdate = GL_TRUE;
999 n->Store = n->Children[0]->Store;
1000 return inst;
1001 }
1002 else {
1003 /* This'll happen for things like "if (i) ..." where no code
1004 * is normally generated for the expression "i".
1005 * Generate a move instruction just to set condition codes.
1006 */
1007 if (!alloc_temp_storage(emitInfo, n, 1))
1008 return NULL;
1009 inst = new_instruction(emitInfo, OPCODE_MOV);
1010 inst->CondUpdate = GL_TRUE;
1011 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1012 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1013 _slang_free_temp(emitInfo->vt, n->Store);
1014 inst->Comment = _mesa_strdup("COND expr");
1015 return inst;
1016 }
1017 }
1018 else {
1019 /* No-op: the boolean result of the expression is in a regular reg */
1020 n->Store = n->Children[0]->Store;
1021 return inst;
1022 }
1023 }
1024
1025
1026 /**
1027 * Logical-NOT
1028 */
1029 static struct prog_instruction *
1030 emit_not(slang_emit_info *emitInfo, slang_ir_node *n)
1031 {
1032 GLfloat zero = 0.0;
1033 slang_ir_storage st;
1034 struct prog_instruction *inst;
1035
1036 /* need zero constant */
1037 st.File = PROGRAM_CONSTANT;
1038 st.Size = 1;
1039 st.Index = _mesa_add_unnamed_constant(emitInfo->prog->Parameters, &zero,
1040 1, &st.Swizzle);
1041
1042 /* child expr */
1043 (void) emit(emitInfo, n->Children[0]);
1044 /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1045
1046 if (!n->Store)
1047 if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
1048 return NULL;
1049
1050 inst = new_instruction(emitInfo, OPCODE_SEQ);
1051 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1052 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1053 storage_to_src_reg(&inst->SrcReg[1], &st);
1054
1055 free_temp_storage(emitInfo->vt, n->Children[0]);
1056
1057 inst->Comment = _mesa_strdup("NOT");
1058 return inst;
1059 }
1060
1061
1062 static struct prog_instruction *
1063 emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
1064 {
1065 struct gl_program *prog = emitInfo->prog;
1066 struct prog_instruction *ifInst, *inst;
1067 GLuint ifInstLoc, elseInstLoc = 0;
1068 GLuint condWritemask = 0;
1069
1070 inst = emit(emitInfo, n->Children[0]); /* the condition */
1071 if (emitInfo->EmitCondCodes) {
1072 assert(inst);
1073 condWritemask = inst->DstReg.WriteMask;
1074 }
1075
1076 #if 0
1077 assert(n->Children[0]->Store->Size == 1); /* a bool! */
1078 #endif
1079
1080 ifInstLoc = prog->NumInstructions;
1081 if (emitInfo->EmitHighLevelInstructions) {
1082 ifInst = new_instruction(emitInfo, OPCODE_IF);
1083 if (emitInfo->EmitCondCodes) {
1084 ifInst->DstReg.CondMask = COND_NE; /* if cond is non-zero */
1085 /* only test the cond code (1 of 4) that was updated by the
1086 * previous instruction.
1087 */
1088 ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1089 }
1090 else {
1091 /* test reg.x */
1092 storage_to_src_reg(&ifInst->SrcReg[0], n->Children[0]->Store);
1093 }
1094 }
1095 else {
1096 /* conditional jump to else, or endif */
1097 ifInst = new_instruction(emitInfo, OPCODE_BRA);
1098 ifInst->DstReg.CondMask = COND_EQ; /* BRA if cond is zero */
1099 ifInst->Comment = _mesa_strdup("if zero");
1100 ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1101 }
1102
1103 /* if body */
1104 emit(emitInfo, n->Children[1]);
1105
1106 if (n->Children[2]) {
1107 /* have else body */
1108 elseInstLoc = prog->NumInstructions;
1109 if (emitInfo->EmitHighLevelInstructions) {
1110 (void) new_instruction(emitInfo, OPCODE_ELSE);
1111 }
1112 else {
1113 /* jump to endif instruction */
1114 struct prog_instruction *inst;
1115 inst = new_instruction(emitInfo, OPCODE_BRA);
1116 inst->Comment = _mesa_strdup("else");
1117 inst->DstReg.CondMask = COND_TR; /* always branch */
1118 }
1119 ifInst = prog->Instructions + ifInstLoc;
1120 ifInst->BranchTarget = prog->NumInstructions;
1121
1122 emit(emitInfo, n->Children[2]);
1123 }
1124 else {
1125 /* no else body */
1126 ifInst = prog->Instructions + ifInstLoc;
1127 ifInst->BranchTarget = prog->NumInstructions /*+ 1*/;
1128 }
1129
1130 if (emitInfo->EmitHighLevelInstructions) {
1131 (void) new_instruction(emitInfo, OPCODE_ENDIF);
1132 }
1133
1134 if (n->Children[2]) {
1135 struct prog_instruction *elseInst;
1136 elseInst = prog->Instructions + elseInstLoc;
1137 elseInst->BranchTarget = prog->NumInstructions;
1138 }
1139 return NULL;
1140 }
1141
1142
1143 static struct prog_instruction *
1144 emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
1145 {
1146 struct gl_program *prog = emitInfo->prog;
1147 struct prog_instruction *beginInst, *endInst;
1148 GLuint beginInstLoc, tailInstLoc, endInstLoc;
1149 slang_ir_node *ir;
1150
1151 /* emit OPCODE_BGNLOOP */
1152 beginInstLoc = prog->NumInstructions;
1153 if (emitInfo->EmitHighLevelInstructions) {
1154 (void) new_instruction(emitInfo, OPCODE_BGNLOOP);
1155 }
1156
1157 /* body */
1158 emit(emitInfo, n->Children[0]);
1159
1160 /* tail */
1161 tailInstLoc = prog->NumInstructions;
1162 if (n->Children[1]) {
1163 if (emitInfo->EmitComments)
1164 emit_comment(emitInfo, "Loop tail code:");
1165 emit(emitInfo, n->Children[1]);
1166 }
1167
1168 endInstLoc = prog->NumInstructions;
1169 if (emitInfo->EmitHighLevelInstructions) {
1170 /* emit OPCODE_ENDLOOP */
1171 endInst = new_instruction(emitInfo, OPCODE_ENDLOOP);
1172 }
1173 else {
1174 /* emit unconditional BRA-nch */
1175 endInst = new_instruction(emitInfo, OPCODE_BRA);
1176 endInst->DstReg.CondMask = COND_TR; /* always true */
1177 }
1178 /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1179 endInst->BranchTarget = beginInstLoc;
1180
1181 if (emitInfo->EmitHighLevelInstructions) {
1182 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1183 beginInst = prog->Instructions + beginInstLoc;
1184 beginInst->BranchTarget = prog->NumInstructions - 1;
1185 }
1186
1187 /* Done emitting loop code. Now walk over the loop's linked list of
1188 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1189 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1190 */
1191 for (ir = n->List; ir; ir = ir->List) {
1192 struct prog_instruction *inst = prog->Instructions + ir->InstLocation;
1193 assert(inst->BranchTarget < 0);
1194 if (ir->Opcode == IR_BREAK ||
1195 ir->Opcode == IR_BREAK_IF_FALSE ||
1196 ir->Opcode == IR_BREAK_IF_TRUE) {
1197 assert(inst->Opcode == OPCODE_BRK ||
1198 inst->Opcode == OPCODE_BRK0 ||
1199 inst->Opcode == OPCODE_BRK1 ||
1200 inst->Opcode == OPCODE_BRA);
1201 /* go to instruction after end of loop */
1202 inst->BranchTarget = endInstLoc + 1;
1203 }
1204 else {
1205 assert(ir->Opcode == IR_CONT ||
1206 ir->Opcode == IR_CONT_IF_FALSE ||
1207 ir->Opcode == IR_CONT_IF_TRUE);
1208 assert(inst->Opcode == OPCODE_CONT ||
1209 inst->Opcode == OPCODE_CONT0 ||
1210 inst->Opcode == OPCODE_CONT1 ||
1211 inst->Opcode == OPCODE_BRA);
1212 /* go to instruction at tail of loop */
1213 inst->BranchTarget = endInstLoc;
1214 }
1215 }
1216 return NULL;
1217 }
1218
1219
1220 /**
1221 * Unconditional "continue" or "break" statement.
1222 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1223 */
1224 static struct prog_instruction *
1225 emit_cont_break(slang_emit_info *emitInfo, slang_ir_node *n)
1226 {
1227 gl_inst_opcode opcode;
1228 struct prog_instruction *inst;
1229
1230 if (n->Opcode == IR_CONT) {
1231 /* we need to execute the loop's tail code before doing CONT */
1232 assert(n->Parent);
1233 assert(n->Parent->Opcode == IR_LOOP);
1234 if (n->Parent->Children[1]) {
1235 /* emit tail code */
1236 if (emitInfo->EmitComments) {
1237 emit_comment(emitInfo, "continue - tail code:");
1238 }
1239 emit(emitInfo, n->Parent->Children[1]);
1240 }
1241 }
1242
1243 /* opcode selection */
1244 if (emitInfo->EmitHighLevelInstructions) {
1245 opcode = (n->Opcode == IR_CONT) ? OPCODE_CONT : OPCODE_BRK;
1246 }
1247 else {
1248 opcode = OPCODE_BRA;
1249 }
1250 n->InstLocation = emitInfo->prog->NumInstructions;
1251 inst = new_instruction(emitInfo, opcode);
1252 inst->DstReg.CondMask = COND_TR; /* always true */
1253 return inst;
1254 }
1255
1256
1257 /**
1258 * Conditional "continue" or "break" statement.
1259 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1260 */
1261 static struct prog_instruction *
1262 emit_cont_break_if(slang_emit_info *emitInfo, slang_ir_node *n,
1263 GLboolean breakTrue)
1264 {
1265 gl_inst_opcode opcode;
1266 struct prog_instruction *inst;
1267
1268 assert(n->Opcode == IR_CONT_IF_TRUE ||
1269 n->Opcode == IR_CONT_IF_FALSE ||
1270 n->Opcode == IR_BREAK_IF_TRUE ||
1271 n->Opcode == IR_BREAK_IF_FALSE);
1272
1273 /* evaluate condition expr, setting cond codes */
1274 inst = emit(emitInfo, n->Children[0]);
1275 if (emitInfo->EmitCondCodes) {
1276 assert(inst);
1277 inst->CondUpdate = GL_TRUE;
1278 }
1279
1280 n->InstLocation = emitInfo->prog->NumInstructions;
1281
1282 /* opcode selection */
1283 if (emitInfo->EmitHighLevelInstructions) {
1284 if (emitInfo->EmitCondCodes) {
1285 if (n->Opcode == IR_CONT_IF_TRUE ||
1286 n->Opcode == IR_CONT_IF_FALSE)
1287 opcode = OPCODE_CONT;
1288 else
1289 opcode = OPCODE_BRK;
1290 }
1291 else {
1292 if (n->Opcode == IR_CONT_IF_TRUE)
1293 opcode = OPCODE_CONT1;
1294 else if (n->Opcode == IR_CONT_IF_FALSE)
1295 opcode = OPCODE_CONT0;
1296 else if (n->Opcode == IR_BREAK_IF_TRUE)
1297 opcode = OPCODE_BRK1;
1298 else if (n->Opcode == IR_BREAK_IF_FALSE)
1299 opcode = OPCODE_BRK0;
1300 }
1301 }
1302 else {
1303 opcode = OPCODE_BRA;
1304 }
1305
1306 inst = new_instruction(emitInfo, opcode);
1307 if (emitInfo->EmitCondCodes) {
1308 inst->DstReg.CondMask = breakTrue ? COND_NE : COND_EQ;
1309 }
1310 else {
1311 /* BRK0, BRK1, CONT0, CONT1 uses SrcReg[0] as the condition */
1312 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1313 }
1314 return inst;
1315 }
1316
1317
1318
1319 /**
1320 * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1321 * Ex: fix_swizzle("zyNN") -> "zyyy"
1322 */
1323 static GLuint
1324 fix_swizzle(GLuint swizzle)
1325 {
1326 GLuint swz[4], i;
1327 for (i = 0; i < 4; i++) {
1328 swz[i] = GET_SWZ(swizzle, i);
1329 if (swz[i] == SWIZZLE_NIL) {
1330 swz[i] = swz[i - 1];
1331 }
1332 }
1333 return MAKE_SWIZZLE4(swz[0], swz[1], swz[2], swz[3]);
1334 }
1335
1336
1337 /**
1338 * Return the number of components actually named by the swizzle.
1339 * Recall that swizzles may have undefined/don't-care values.
1340 */
1341 static GLuint
1342 swizzle_size(GLuint swizzle)
1343 {
1344 GLuint size = 0, i;
1345 for (i = 0; i < 4; i++) {
1346 GLuint swz = GET_SWZ(swizzle, i);
1347 size += (swz >= 0 && swz <= 3);
1348 }
1349 return size;
1350 }
1351
1352
1353 static struct prog_instruction *
1354 emit_swizzle(slang_emit_info *emitInfo, slang_ir_node *n)
1355 {
1356 GLuint swizzle;
1357 struct prog_instruction *inst;
1358
1359 inst = emit(emitInfo, n->Children[0]);
1360
1361 #ifdef DEBUG
1362 {
1363 GLuint s = n->Children[0]->Store->Swizzle;
1364 assert(GET_SWZ(s, 0) != SWIZZLE_NIL);
1365 assert(GET_SWZ(s, 1) != SWIZZLE_NIL);
1366 assert(GET_SWZ(s, 2) != SWIZZLE_NIL);
1367 assert(GET_SWZ(s, 3) != SWIZZLE_NIL);
1368 }
1369 #endif
1370 /* For debug: n->Var = n->Children[0]->Var; */
1371
1372 /* "pull-up" the child's storage info, applying our swizzle info */
1373 n->Store->File = n->Children[0]->Store->File;
1374 n->Store->Index = n->Children[0]->Store->Index;
1375 n->Store->Size = swizzle_size(n->Store->Swizzle);
1376 #if 0
1377 printf("Emit Swizzle %s reg %d chSize %d mySize %d\n",
1378 _mesa_swizzle_string(n->Store->Swizzle, 0, 0),
1379 n->Store->Index, n->Children[0]->Store->Size,
1380 n->Store->Size);
1381 #endif
1382
1383 /* apply this swizzle to child's swizzle to get composed swizzle */
1384 swizzle = fix_swizzle(n->Store->Swizzle); /* remove the don't care terms */
1385 n->Store->Swizzle = swizzle_swizzle(n->Children[0]->Store->Swizzle,
1386 swizzle);
1387
1388 return inst;
1389 }
1390
1391
1392 /**
1393 * Dereference array element. Just resolve storage for the array
1394 * element represented by this node.
1395 */
1396 static struct prog_instruction *
1397 emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
1398 {
1399 assert(n->Store);
1400 assert(n->Store->File != PROGRAM_UNDEFINED);
1401 assert(n->Store->Size > 0);
1402
1403 if (n->Store->File == PROGRAM_STATE_VAR) {
1404 n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1405 return NULL;
1406 }
1407
1408 if (n->Children[1]->Opcode == IR_FLOAT) {
1409 /* Constant index */
1410 const GLint arrayAddr = n->Children[0]->Store->Index;
1411 const GLint index = (GLint) n->Children[1]->Value[0];
1412 n->Store->Index = arrayAddr + index;
1413 }
1414 else {
1415 /* Variable index - PROBLEM */
1416 const GLint arrayAddr = n->Children[0]->Store->Index;
1417 const GLint index = 0;
1418 _mesa_problem(NULL, "variable array indexes not supported yet!");
1419 n->Store->Index = arrayAddr + index;
1420 }
1421 return NULL; /* no instruction */
1422 }
1423
1424
1425 /**
1426 * Resolve storage for accessing a structure field.
1427 */
1428 static struct prog_instruction *
1429 emit_struct_field(slang_emit_info *emitInfo, slang_ir_node *n)
1430 {
1431 if (n->Store->File == PROGRAM_STATE_VAR) {
1432 n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1433 }
1434 else {
1435 GLint offset = n->FieldOffset / 4;
1436 assert(n->Children[0]->Store->Index >= 0);
1437 n->Store->Index = n->Children[0]->Store->Index + offset;
1438 if (n->Store->Size == 1) {
1439 GLint swz = n->FieldOffset % 4;
1440 n->Store->Swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz);
1441 }
1442 else {
1443 n->Store->Swizzle = SWIZZLE_XYZW;
1444 }
1445 }
1446 return NULL; /* no instruction */
1447 }
1448
1449
1450 static struct prog_instruction *
1451 emit(slang_emit_info *emitInfo, slang_ir_node *n)
1452 {
1453 struct prog_instruction *inst;
1454 if (!n)
1455 return NULL;
1456
1457 switch (n->Opcode) {
1458 case IR_SEQ:
1459 /* sequence of two sub-trees */
1460 assert(n->Children[0]);
1461 assert(n->Children[1]);
1462 emit(emitInfo, n->Children[0]);
1463 inst = emit(emitInfo, n->Children[1]);
1464 #if 0
1465 assert(!n->Store);
1466 #endif
1467 n->Store = n->Children[1]->Store;
1468 return inst;
1469
1470 case IR_SCOPE:
1471 /* new variable scope */
1472 _slang_push_var_table(emitInfo->vt);
1473 inst = emit(emitInfo, n->Children[0]);
1474 _slang_pop_var_table(emitInfo->vt);
1475 return inst;
1476
1477 case IR_VAR_DECL:
1478 /* Variable declaration - allocate a register for it */
1479 assert(n->Store);
1480 assert(n->Store->File != PROGRAM_UNDEFINED);
1481 assert(n->Store->Size > 0);
1482 /*assert(n->Store->Index < 0);*/
1483 if (!n->Var || n->Var->isTemp) {
1484 /* a nameless/temporary variable, will be freed after first use */
1485 /*NEW*/
1486 if (n->Store->Index < 0 && !_slang_alloc_temp(emitInfo->vt, n->Store)) {
1487 slang_info_log_error(emitInfo->log,
1488 "Ran out of registers, too many temporaries");
1489 return NULL;
1490 }
1491 }
1492 else {
1493 /* a regular variable */
1494 _slang_add_variable(emitInfo->vt, n->Var);
1495 if (!_slang_alloc_var(emitInfo->vt, n->Store)) {
1496 slang_info_log_error(emitInfo->log,
1497 "Ran out of registers, too many variables");
1498 return NULL;
1499 }
1500 /*
1501 printf("IR_VAR_DECL %s %d store %p\n",
1502 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1503 */
1504 assert(n->Var->aux == n->Store);
1505 }
1506 if (emitInfo->EmitComments) {
1507 /* emit NOP with comment describing the variable's storage location */
1508 char s[1000];
1509 sprintf(s, "TEMP[%d]%s = variable %s (size %d)",
1510 n->Store->Index,
1511 _mesa_swizzle_string(n->Store->Swizzle, 0, GL_FALSE),
1512 (n->Var ? (char *) n->Var->a_name : "anonymous"),
1513 n->Store->Size);
1514 inst = emit_comment(emitInfo, s);
1515 return inst;
1516 }
1517 return NULL;
1518
1519 case IR_VAR:
1520 /* Reference to a variable
1521 * Storage should have already been resolved/allocated.
1522 */
1523 assert(n->Store);
1524 assert(n->Store->File != PROGRAM_UNDEFINED);
1525
1526 if (n->Store->File == PROGRAM_STATE_VAR &&
1527 n->Store->Index < 0) {
1528 n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1529 }
1530
1531 if (n->Store->Index < 0) {
1532 printf("#### VAR %s not allocated!\n", (char*)n->Var->a_name);
1533 }
1534 assert(n->Store->Index >= 0);
1535 assert(n->Store->Size > 0);
1536 break;
1537
1538 case IR_ELEMENT:
1539 return emit_array_element(emitInfo, n);
1540 case IR_FIELD:
1541 return emit_struct_field(emitInfo, n);
1542 case IR_SWIZZLE:
1543 return emit_swizzle(emitInfo, n);
1544
1545 case IR_I_TO_F:
1546 /* just move */
1547 emit(emitInfo, n->Children[0]);
1548 inst = new_instruction(emitInfo, OPCODE_MOV);
1549 if (!n->Store) {
1550 if (!alloc_temp_storage(emitInfo, n, 1))
1551 return NULL;
1552 }
1553 storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1554 storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1555 if (emitInfo->EmitComments)
1556 inst->Comment = _mesa_strdup("int to float");
1557 return NULL;
1558
1559 /* Simple arithmetic */
1560 /* unary */
1561 case IR_RSQ:
1562 case IR_RCP:
1563 case IR_FLOOR:
1564 case IR_FRAC:
1565 case IR_F_TO_I:
1566 case IR_ABS:
1567 case IR_SIN:
1568 case IR_COS:
1569 case IR_DDX:
1570 case IR_DDY:
1571 case IR_NOISE1:
1572 case IR_NOISE2:
1573 case IR_NOISE3:
1574 case IR_NOISE4:
1575 /* binary */
1576 case IR_ADD:
1577 case IR_SUB:
1578 case IR_MUL:
1579 case IR_DOT4:
1580 case IR_DOT3:
1581 case IR_CROSS:
1582 case IR_MIN:
1583 case IR_MAX:
1584 case IR_SEQUAL:
1585 case IR_SNEQUAL:
1586 case IR_SGE:
1587 case IR_SGT:
1588 case IR_SLE:
1589 case IR_SLT:
1590 case IR_POW:
1591 case IR_EXP:
1592 case IR_EXP2:
1593 /* trinary operators */
1594 case IR_LRP:
1595 return emit_arith(emitInfo, n);
1596
1597 case IR_EQUAL:
1598 case IR_NOTEQUAL:
1599 return emit_compare(emitInfo, n);
1600
1601 case IR_CLAMP:
1602 return emit_clamp(emitInfo, n);
1603 case IR_TEX:
1604 case IR_TEXB:
1605 case IR_TEXP:
1606 return emit_tex(emitInfo, n);
1607 case IR_NEG:
1608 return emit_negation(emitInfo, n);
1609 case IR_FLOAT:
1610 /* find storage location for this float constant */
1611 n->Store->Index = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
1612 n->Value,
1613 n->Store->Size,
1614 &n->Store->Swizzle);
1615 if (n->Store->Index < 0) {
1616 slang_info_log_error(emitInfo->log, "Ran out of space for constants");
1617 return NULL;
1618 }
1619 return NULL;
1620
1621 case IR_MOVE:
1622 return emit_move(emitInfo, n);
1623
1624 case IR_COND:
1625 return emit_cond(emitInfo, n);
1626
1627 case IR_NOT:
1628 return emit_not(emitInfo, n);
1629
1630 case IR_LABEL:
1631 return emit_label(emitInfo, n);
1632
1633 case IR_KILL:
1634 return emit_kill(emitInfo);
1635
1636 case IR_FUNC:
1637 /* new variable scope for subroutines/function calls*/
1638 _slang_push_var_table(emitInfo->vt);
1639 inst = emit_func(emitInfo, n);
1640 _slang_pop_var_table(emitInfo->vt);
1641 return inst;
1642
1643 case IR_IF:
1644 return emit_if(emitInfo, n);
1645
1646 case IR_LOOP:
1647 return emit_loop(emitInfo, n);
1648 case IR_BREAK_IF_FALSE:
1649 case IR_CONT_IF_FALSE:
1650 return emit_cont_break_if(emitInfo, n, GL_FALSE);
1651 case IR_BREAK_IF_TRUE:
1652 case IR_CONT_IF_TRUE:
1653 return emit_cont_break_if(emitInfo, n, GL_TRUE);
1654 case IR_BREAK:
1655 /* fall-through */
1656 case IR_CONT:
1657 return emit_cont_break(emitInfo, n);
1658
1659 case IR_BEGIN_SUB:
1660 return new_instruction(emitInfo, OPCODE_BGNSUB);
1661 case IR_END_SUB:
1662 return new_instruction(emitInfo, OPCODE_ENDSUB);
1663 case IR_RETURN:
1664 return emit_return(emitInfo, n);
1665
1666 case IR_NOP:
1667 return NULL;
1668
1669 default:
1670 _mesa_problem(NULL, "Unexpected IR opcode in emit()\n");
1671 }
1672 return NULL;
1673 }
1674
1675
1676 /**
1677 * After code generation, any subroutines will be in separate program
1678 * objects. This function appends all the subroutines onto the main
1679 * program and resolves the linking of all the branch/call instructions.
1680 * XXX this logic should really be part of the linking process...
1681 */
1682 static void
1683 _slang_resolve_subroutines(slang_emit_info *emitInfo)
1684 {
1685 GET_CURRENT_CONTEXT(ctx);
1686 struct gl_program *mainP = emitInfo->prog;
1687 GLuint *subroutineLoc, i, total;
1688
1689 subroutineLoc
1690 = (GLuint *) _mesa_malloc(emitInfo->NumSubroutines * sizeof(GLuint));
1691
1692 /* total number of instructions */
1693 total = mainP->NumInstructions;
1694 for (i = 0; i < emitInfo->NumSubroutines; i++) {
1695 subroutineLoc[i] = total;
1696 total += emitInfo->Subroutines[i]->NumInstructions;
1697 }
1698
1699 /* adjust BrancTargets within the functions */
1700 for (i = 0; i < emitInfo->NumSubroutines; i++) {
1701 struct gl_program *sub = emitInfo->Subroutines[i];
1702 GLuint j;
1703 for (j = 0; j < sub->NumInstructions; j++) {
1704 struct prog_instruction *inst = sub->Instructions + j;
1705 if (inst->Opcode != OPCODE_CAL && inst->BranchTarget >= 0) {
1706 inst->BranchTarget += subroutineLoc[i];
1707 }
1708 }
1709 }
1710
1711 /* append subroutines' instructions after main's instructions */
1712 mainP->Instructions = _mesa_realloc_instructions(mainP->Instructions,
1713 mainP->NumInstructions,
1714 total);
1715 for (i = 0; i < emitInfo->NumSubroutines; i++) {
1716 struct gl_program *sub = emitInfo->Subroutines[i];
1717 _mesa_copy_instructions(mainP->Instructions + subroutineLoc[i],
1718 sub->Instructions,
1719 sub->NumInstructions);
1720 /* delete subroutine code */
1721 sub->Parameters = NULL; /* prevent double-free */
1722 _mesa_delete_program(ctx, sub);
1723 }
1724 mainP->NumInstructions = total;
1725
1726 /* Examine CAL instructions.
1727 * At this point, the BranchTarget field of the CAL instructions is
1728 * the number/id of the subroutine to call (an index into the
1729 * emitInfo->Subroutines list).
1730 * Translate that into an actual instruction location now.
1731 */
1732 for (i = 0; i < mainP->NumInstructions; i++) {
1733 struct prog_instruction *inst = mainP->Instructions + i;
1734 if (inst->Opcode == OPCODE_CAL) {
1735 const GLuint f = inst->BranchTarget;
1736 inst->BranchTarget = subroutineLoc[f];
1737 }
1738 }
1739
1740 _mesa_free(subroutineLoc);
1741 }
1742
1743
1744
1745
1746 GLboolean
1747 _slang_emit_code(slang_ir_node *n, slang_var_table *vt,
1748 struct gl_program *prog, GLboolean withEnd,
1749 slang_info_log *log)
1750 {
1751 GET_CURRENT_CONTEXT(ctx);
1752 GLboolean success;
1753 slang_emit_info emitInfo;
1754
1755 emitInfo.log = log;
1756 emitInfo.vt = vt;
1757 emitInfo.prog = prog;
1758 emitInfo.Subroutines = NULL;
1759 emitInfo.NumSubroutines = 0;
1760
1761 emitInfo.EmitHighLevelInstructions = ctx->Shader.EmitHighLevelInstructions;
1762 emitInfo.EmitCondCodes = ctx->Shader.EmitCondCodes;
1763 emitInfo.EmitComments = ctx->Shader.EmitComments;
1764 emitInfo.EmitBeginEndSub = 0; /* XXX for compiler debug only */
1765
1766 if (!emitInfo.EmitCondCodes) {
1767 emitInfo.EmitHighLevelInstructions = GL_TRUE;
1768 }
1769
1770 (void) emit(&emitInfo, n);
1771
1772 /* finish up by adding the END opcode to program */
1773 if (withEnd) {
1774 struct prog_instruction *inst;
1775 inst = new_instruction(&emitInfo, OPCODE_END);
1776 }
1777
1778 _slang_resolve_subroutines(&emitInfo);
1779
1780 success = GL_TRUE;
1781
1782 #if 0
1783 printf("*********** End emit code (%u inst):\n", prog->NumInstructions);
1784 _mesa_print_program(prog);
1785 _mesa_print_program_parameters(ctx,prog);
1786 #endif
1787
1788 return success;
1789 }