src/mesa/shader/slang/slang_emit.c

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2005-2008  Brian Paul   All Rights Reserved.
   5  * Copyright (C) 2008 VMware, Inc.   All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included
  15  * in all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  21  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /**
  26  * \file slang_emit.c
  27  * Emit program instructions (PI code) from IR trees.
  28  * \author Brian Paul
  29  */
  30
  31 /***
  32  *** NOTES
  33  ***
  34  *** To emit GPU instructions, we basically just do an in-order traversal
  35  *** of the IR tree.
  36  ***/
  37
  38
  39 #include "main/imports.h"
  40 #include "main/context.h"
  41 #include "main/macros.h"
  42 #include "shader/program.h"
  43 #include "shader/prog_instruction.h"
  44 #include "shader/prog_parameter.h"
  45 #include "shader/prog_print.h"
  46 #include "slang_builtin.h"
  47 #include "slang_emit.h"
  48 #include "slang_mem.h"
  49
  50
  51 #define PEEPHOLE_OPTIMIZATIONS 1
  52 #define ANNOTATE 0
  53
  54
  55 typedef struct
  56 {
  57    slang_info_log *log;
  58    slang_var_table *vt;
  59    struct gl_program *prog;
  60    struct gl_program **Subroutines;
  61    GLuint NumSubroutines;
  62
  63    GLuint MaxInstructions;  /**< size of prog->Instructions[] buffer */
  64
  65    /* code-gen options */
  66    GLboolean EmitHighLevelInstructions;
  67    GLboolean EmitCondCodes;
  68    GLboolean EmitComments;
  69    GLboolean EmitBeginEndSub; /* XXX TEMPORARY */
  70 } slang_emit_info;
  71
  72
  73
  74 static struct gl_program *
  75 new_subroutine(slang_emit_info *emitInfo, GLuint *id)
  76 {
  77    GET_CURRENT_CONTEXT(ctx);
  78    const GLuint n = emitInfo->NumSubroutines;
  79
  80    emitInfo->Subroutines = (struct gl_program **)
  81       _mesa_realloc(emitInfo->Subroutines,
  82                     n * sizeof(struct gl_program),
  83                     (n + 1) * sizeof(struct gl_program));
  84    emitInfo->Subroutines[n] = ctx->Driver.NewProgram(ctx, emitInfo->prog->Target, 0);
  85    emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters;
  86    emitInfo->NumSubroutines++;
  87    *id = n;
  88    return emitInfo->Subroutines[n];
  89 }
  90
  91
  92 /**
  93  * Convert a writemask to a swizzle.  Used for testing cond codes because
  94  * we only want to test the cond code component(s) that was set by the
  95  * previous instruction.
  96  */
  97 static GLuint
  98 writemask_to_swizzle(GLuint writemask)
  99 {
 100    if (writemask == WRITEMASK_X)
 101       return SWIZZLE_XXXX;
 102    if (writemask == WRITEMASK_Y)
 103       return SWIZZLE_YYYY;
 104    if (writemask == WRITEMASK_Z)
 105       return SWIZZLE_ZZZZ;
 106    if (writemask == WRITEMASK_W)
 107       return SWIZZLE_WWWW;
 108    return SWIZZLE_XYZW;  /* shouldn't be hit */
 109 }
 110
 111
 112 /**
 113  * Convert a swizzle mask to a writemask.
 114  * Note that the slang_ir_storage->Swizzle field can represent either a
 115  * swizzle mask or a writemask, depending on how it's used.  For example,
 116  * when we parse "direction.yz" alone, we don't know whether .yz is a
 117  * writemask or a swizzle.  In this case, we encode ".yz" in store->Swizzle
 118  * as a swizzle mask (.yz?? actually).  Later, if direction.yz is used as
 119  * an R-value, we use store->Swizzle as-is.  Otherwise, if direction.yz is
 120  * used as an L-value, we convert it to a writemask.
 121  */
 122 static GLuint
 123 swizzle_to_writemask(GLuint swizzle)
 124 {
 125    GLuint i, writemask = 0x0;
 126    for (i = 0; i < 4; i++) {
 127       GLuint swz = GET_SWZ(swizzle, i);
 128       if (swz <= SWIZZLE_W) {
 129          writemask |= (1 << swz);
 130       }
 131    }
 132    return writemask;
 133 }
 134
 135
 136 /**
 137  * Swizzle a swizzle (function composition).
 138  * That is, return swz2(swz1), or said another way: swz1.szw2
 139  * Example: swizzle_swizzle(".zwxx", ".xxyw") yields ".zzwx"
 140  */
 141 GLuint
 142 _slang_swizzle_swizzle(GLuint swz1, GLuint swz2)
 143 {
 144    GLuint i, swz, s[4];
 145    for (i = 0; i < 4; i++) {
 146       GLuint c = GET_SWZ(swz2, i);
 147       if (c <= SWIZZLE_W)
 148          s[i] = GET_SWZ(swz1, c);
 149       else
 150          s[i] = c;
 151    }
 152    swz = MAKE_SWIZZLE4(s[0], s[1], s[2], s[3]);
 153    return swz;
 154 }
 155
 156
 157 /**
 158  * Return the default swizzle mask for accessing a variable of the
 159  * given size (in floats).  If size = 1, comp is used to identify
 160  * which component [0..3] of the register holds the variable.
 161  */
 162 GLuint
 163 _slang_var_swizzle(GLint size, GLint comp)
 164 {
 165    switch (size) {
 166    case 1:
 167       return MAKE_SWIZZLE4(comp, comp, comp, comp);
 168    case 2:
 169       return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_NIL, SWIZZLE_NIL);
 170    case 3:
 171       return MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_NIL);
 172    default:
 173       return SWIZZLE_XYZW;
 174    }
 175 }
 176
 177
 178
 179 /**
 180  * Allocate storage for the given node (if it hasn't already been allocated).
 181  *
 182  * Typically this is temporary storage for an intermediate result (such as
 183  * for a multiply or add, etc).
 184  *
 185  * If n->Store does not exist it will be created and will be of the size
 186  * specified by defaultSize.
 187  */
 188 static GLboolean
 189 alloc_node_storage(slang_emit_info *emitInfo, slang_ir_node *n,
 190                    GLint defaultSize)
 191 {
 192    assert(!n->Var);
 193    if (!n->Store) {
 194       assert(defaultSize > 0);
 195       n->Store = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, defaultSize);
 196    }
 197
 198    /* now allocate actual register(s).  I.e. set n->Store->Index >= 0 */
 199    if (n->Store->Index < 0) {
 200       if (!_slang_alloc_temp(emitInfo->vt, n->Store)) {
 201          slang_info_log_error(emitInfo->log,
 202                               "Ran out of registers, too many temporaries");
 203          _slang_free(n->Store);
 204          n->Store = NULL;
 205          return GL_FALSE;
 206       }
 207    }
 208    return GL_TRUE;
 209 }
 210
 211
 212 /**
 213  * Free temporary storage, if n->Store is, in fact, temp storage.
 214  * Otherwise, no-op.
 215  */
 216 static void
 217 free_node_storage(slang_var_table *vt, slang_ir_node *n)
 218 {
 219    if (n->Store->File == PROGRAM_TEMPORARY &&
 220        n->Store->Index >= 0 &&
 221        n->Opcode != IR_SWIZZLE) {
 222       if (_slang_is_temp(vt, n->Store)) {
 223          _slang_free_temp(vt, n->Store);
 224          n->Store->Index = -1;
 225          n->Store = NULL; /* XXX this may not be needed */
 226       }
 227    }
 228 }
 229
 230
 231 /**
 232  * Helper function to allocate a short-term temporary.
 233  * Free it with _slang_free_temp().
 234  */
 235 static GLboolean
 236 alloc_local_temp(slang_emit_info *emitInfo, slang_ir_storage *temp, GLint size)
 237 {
 238    assert(size >= 1);
 239    assert(size <= 4);
 240    _mesa_bzero(temp, sizeof(*temp));
 241    temp->Size = size;
 242    temp->File = PROGRAM_TEMPORARY;
 243    temp->Index = -1;
 244    return _slang_alloc_temp(emitInfo->vt, temp);
 245 }
 246
 247
 248 /**
 249  * Remove any SWIZZLE_NIL terms from given swizzle mask.
 250  * For a swizzle like .z??? generate .zzzz (replicate single component).
 251  * Else, for .wx?? generate .wxzw (insert default component for the position).
 252  */
 253 static GLuint
 254 fix_swizzle(GLuint swizzle)
 255 {
 256    GLuint c0 = GET_SWZ(swizzle, 0),
 257       c1 = GET_SWZ(swizzle, 1),
 258       c2 = GET_SWZ(swizzle, 2),
 259       c3 = GET_SWZ(swizzle, 3);
 260    if (c1 == SWIZZLE_NIL && c2 == SWIZZLE_NIL && c3 == SWIZZLE_NIL) {
 261       /* smear first component across all positions */
 262       c1 = c2 = c3 = c0;
 263    }
 264    else {
 265       /* insert default swizzle components */
 266       if (c0 == SWIZZLE_NIL)
 267          c0 = SWIZZLE_X;
 268       if (c1 == SWIZZLE_NIL)
 269          c1 = SWIZZLE_Y;
 270       if (c2 == SWIZZLE_NIL)
 271          c2 = SWIZZLE_Z;
 272       if (c3 == SWIZZLE_NIL)
 273          c3 = SWIZZLE_W;
 274    }
 275    return MAKE_SWIZZLE4(c0, c1, c2, c3);
 276 }
 277
 278
 279
 280 /**
 281  * Convert IR storage to an instruction dst register.
 282  */
 283 static void
 284 storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st)
 285 {
 286    const GLboolean relAddr = st->RelAddr;
 287    const GLint size = st->Size;
 288    GLint index = st->Index;
 289    GLuint swizzle = st->Swizzle;
 290
 291    assert(index >= 0);
 292    /* if this is storage relative to some parent storage, walk up the tree */
 293    while (st->Parent) {
 294       st = st->Parent;
 295       assert(st->Index >= 0);
 296       index += st->Index;
 297       swizzle = _slang_swizzle_swizzle(st->Swizzle, swizzle);
 298    }
 299
 300    assert(st->File != PROGRAM_UNDEFINED);
 301    dst->File = st->File;
 302
 303    assert(index >= 0);
 304    dst->Index = index;
 305
 306    assert(size >= 1);
 307    assert(size <= 4);
 308
 309    if (swizzle != SWIZZLE_XYZW) {
 310       dst->WriteMask = swizzle_to_writemask(swizzle);
 311    }
 312    else {
 313       switch (size) {
 314       case 1:
 315          dst->WriteMask = WRITEMASK_X << GET_SWZ(st->Swizzle, 0);
 316          break;
 317       case 2:
 318          dst->WriteMask = WRITEMASK_XY;
 319          break;
 320       case 3:
 321          dst->WriteMask = WRITEMASK_XYZ;
 322          break;
 323       case 4:
 324          dst->WriteMask = WRITEMASK_XYZW;
 325          break;
 326       default:
 327          ; /* error would have been caught above */
 328       }
 329    }
 330
 331    dst->RelAddr = relAddr;
 332 }
 333
 334
 335 /**
 336  * Convert IR storage to an instruction src register.
 337  */
 338 static void
 339 storage_to_src_reg(struct prog_src_register *src, const slang_ir_storage *st)
 340 {
 341    const GLboolean relAddr = st->RelAddr;
 342    GLint index = st->Index;
 343    GLuint swizzle = st->Swizzle;
 344
 345    /* if this is storage relative to some parent storage, walk up the tree */
 346    assert(index >= 0);
 347    while (st->Parent) {
 348       st = st->Parent;
 349       if (st->Index < 0) {
 350          /* an error should have been reported already */
 351          return;
 352       }
 353       assert(st->Index >= 0);
 354       index += st->Index;
 355       swizzle = _slang_swizzle_swizzle(fix_swizzle(st->Swizzle), swizzle);
 356    }
 357
 358    assert(st->File >= 0);
 359 #if 1 /* XXX temporary */
 360    if (st->File == PROGRAM_UNDEFINED) {
 361       slang_ir_storage *st0 = (slang_ir_storage *) st;
 362       st0->File = PROGRAM_TEMPORARY;
 363    }
 364 #endif
 365    assert(st->File < PROGRAM_UNDEFINED);
 366    src->File = st->File;
 367
 368    assert(index >= 0);
 369    src->Index = index;
 370
 371    swizzle = fix_swizzle(swizzle);
 372    assert(GET_SWZ(swizzle, 0) <= SWIZZLE_W);
 373    assert(GET_SWZ(swizzle, 1) <= SWIZZLE_W);
 374    assert(GET_SWZ(swizzle, 2) <= SWIZZLE_W);
 375    assert(GET_SWZ(swizzle, 3) <= SWIZZLE_W);
 376    src->Swizzle = swizzle;
 377
 378    src->RelAddr = relAddr;
 379 }
 380
 381
 382 /*
 383  * Setup storage pointing to a scalar constant/literal.
 384  */
 385 static void
 386 constant_to_storage(slang_emit_info *emitInfo,
 387                     GLfloat val,
 388                     slang_ir_storage *store)
 389 {
 390    GLuint swizzle;
 391    GLint reg;
 392    GLfloat value[4];
 393
 394    value[0] = val;
 395    reg = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
 396                                         value, 1, &swizzle);
 397
 398    memset(store, 0, sizeof(*store));
 399    store->File = PROGRAM_CONSTANT;
 400    store->Index = reg;
 401    store->Swizzle = swizzle;
 402 }
 403
 404
 405 /**
 406  * Add new instruction at end of given program.
 407  * \param prog  the program to append instruction onto
 408  * \param opcode  opcode for the new instruction
 409  * \return pointer to the new instruction
 410  */
 411 static struct prog_instruction *
 412 new_instruction(slang_emit_info *emitInfo, gl_inst_opcode opcode)
 413 {
 414    struct gl_program *prog = emitInfo->prog;
 415    struct prog_instruction *inst;
 416
 417 #if 0
 418    /* print prev inst */
 419    if (prog->NumInstructions > 0) {
 420       _mesa_print_instruction(prog->Instructions + prog->NumInstructions - 1);
 421    }
 422 #endif
 423    assert(prog->NumInstructions <= emitInfo->MaxInstructions);
 424
 425    if (prog->NumInstructions == emitInfo->MaxInstructions) {
 426       /* grow the instruction buffer */
 427       emitInfo->MaxInstructions += 20;
 428       prog->Instructions =
 429          _mesa_realloc_instructions(prog->Instructions,
 430                                     prog->NumInstructions,
 431                                     emitInfo->MaxInstructions);
 432    }
 433
 434    inst = prog->Instructions + prog->NumInstructions;
 435    prog->NumInstructions++;
 436    _mesa_init_instructions(inst, 1);
 437    inst->Opcode = opcode;
 438    inst->BranchTarget = -1; /* invalid */
 439    /*
 440    printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
 441           _mesa_opcode_string(inst->Opcode));
 442    */
 443    return inst;
 444 }
 445
 446
 447 static struct prog_instruction *
 448 emit_arl_load(slang_emit_info *emitInfo,
 449               enum register_file file, GLint index, GLuint swizzle)
 450 {
 451    struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_ARL);
 452    inst->SrcReg[0].File = file;
 453    inst->SrcReg[0].Index = index;
 454    inst->SrcReg[0].Swizzle = swizzle;
 455    inst->DstReg.File = PROGRAM_ADDRESS;
 456    inst->DstReg.Index = 0;
 457    inst->DstReg.WriteMask = WRITEMASK_X;
 458    return inst;
 459 }
 460
 461
 462 /**
 463  * Emit a new instruction with given opcode, operands.
 464  * At this point the instruction may have multiple indirect register
 465  * loads/stores.  We convert those into ARL loads and address-relative
 466  * operands.  See comments inside.
 467  * At some point in the future we could directly emit indirectly addressed
 468  * registers in Mesa GPU instructions.
 469  */
 470 static struct prog_instruction *
 471 emit_instruction(slang_emit_info *emitInfo,
 472                  gl_inst_opcode opcode,
 473                  const slang_ir_storage *dst,
 474                  const slang_ir_storage *src0,
 475                  const slang_ir_storage *src1,
 476                  const slang_ir_storage *src2)
 477 {
 478    struct prog_instruction *inst;
 479    GLuint numIndirect = 0;
 480    const slang_ir_storage *src[3];
 481    slang_ir_storage newSrc[3], newDst;
 482    GLuint i;
 483    GLboolean isTemp[3];
 484
 485    isTemp[0] = isTemp[1] = isTemp[2] = GL_FALSE;
 486
 487    src[0] = src0;
 488    src[1] = src1;
 489    src[2] = src2;
 490
 491    /* count up how many operands are indirect loads */
 492    for (i = 0; i < 3; i++) {
 493       if (src[i] && src[i]->IsIndirect)
 494          numIndirect++;
 495    }
 496    if (dst && dst->IsIndirect)
 497       numIndirect++;
 498
 499    /* Take special steps for indirect register loads.
 500     * If we had multiple address registers this would be simpler.
 501     * For example, this GLSL code:
 502     *    x[i] = y[j] + z[k];
 503     * would translate into something like:
 504     *    ARL ADDR.x, i;
 505     *    ARL ADDR.y, j;
 506     *    ARL ADDR.z, k;
 507     *    ADD TEMP[ADDR.x+5], TEMP[ADDR.y+9], TEMP[ADDR.z+4];
 508     * But since we currently only have one address register we have to do this:
 509     *    ARL ADDR.x, i;
 510     *    MOV t1, TEMP[ADDR.x+9];
 511     *    ARL ADDR.x, j;
 512     *    MOV t2, TEMP[ADDR.x+4];
 513     *    ARL ADDR.x, k;
 514     *    ADD TEMP[ADDR.x+5], t1, t2;
 515     * The code here figures this out...
 516     */
 517    if (numIndirect > 0) {
 518       for (i = 0; i < 3; i++) {
 519          if (src[i] && src[i]->IsIndirect) {
 520             /* load the ARL register with the indirect register */
 521             emit_arl_load(emitInfo,
 522                           src[i]->IndirectFile,
 523                           src[i]->IndirectIndex,
 524                           src[i]->IndirectSwizzle);
 525
 526             if (numIndirect > 1) {
 527                /* Need to load src[i] into a temporary register */
 528                slang_ir_storage srcRelAddr;
 529                alloc_local_temp(emitInfo, &newSrc[i], src[i]->Size);
 530                isTemp[i] = GL_TRUE;
 531
 532                /* set RelAddr flag on src register */
 533                srcRelAddr = *src[i];
 534                srcRelAddr.RelAddr = GL_TRUE;
 535                srcRelAddr.IsIndirect = GL_FALSE; /* not really needed */
 536
 537                /* MOV newSrc, srcRelAddr; */
 538                inst = emit_instruction(emitInfo,
 539                                        OPCODE_MOV,
 540                                        &newSrc[i],
 541                                        &srcRelAddr,
 542                                        NULL,
 543                                        NULL);
 544
 545                src[i] = &newSrc[i];
 546             }
 547             else {
 548                /* just rewrite the src[i] storage to be ARL-relative */
 549                newSrc[i] = *src[i];
 550                newSrc[i].RelAddr = GL_TRUE;
 551                newSrc[i].IsIndirect = GL_FALSE; /* not really needed */
 552                src[i] = &newSrc[i];
 553             }
 554          }
 555       }
 556    }
 557
 558    /* Take special steps for indirect dest register write */
 559    if (dst && dst->IsIndirect) {
 560       /* load the ARL register with the indirect register */
 561       emit_arl_load(emitInfo,
 562                     dst->IndirectFile,
 563                     dst->IndirectIndex,
 564                     dst->IndirectSwizzle);
 565       newDst = *dst;
 566       newDst.RelAddr = GL_TRUE;
 567       newDst.IsIndirect = GL_FALSE;
 568       dst = &newDst;
 569    }
 570
 571    /* OK, emit the instruction and its dst, src regs */
 572    inst = new_instruction(emitInfo, opcode);
 573    if (!inst)
 574       return NULL;
 575
 576    if (dst)
 577       storage_to_dst_reg(&inst->DstReg, dst);
 578
 579    for (i = 0; i < 3; i++) {
 580       if (src[i])
 581          storage_to_src_reg(&inst->SrcReg[i], src[i]);
 582    }
 583
 584    /* Free any temp registers that we allocated above */
 585    for (i = 0; i < 3; i++) {
 586       if (isTemp[i])
 587          _slang_free_temp(emitInfo->vt, &newSrc[i]);
 588    }
 589
 590    return inst;
 591 }
 592
 593
 594
 595 /**
 596  * Put a comment on the given instruction.
 597  */
 598 static void
 599 inst_comment(struct prog_instruction *inst, const char *comment)
 600 {
 601    if (inst)
 602       inst->Comment = _mesa_strdup(comment);
 603 }
 604
 605
 606
 607 /**
 608  * Return pointer to last instruction in program.
 609  */
 610 static struct prog_instruction *
 611 prev_instruction(slang_emit_info *emitInfo)
 612 {
 613    struct gl_program *prog = emitInfo->prog;
 614    if (prog->NumInstructions == 0)
 615       return NULL;
 616    else
 617       return prog->Instructions + prog->NumInstructions - 1;
 618 }
 619
 620
 621 static struct prog_instruction *
 622 emit(slang_emit_info *emitInfo, slang_ir_node *n);
 623
 624
 625 /**
 626  * Return an annotation string for given node's storage.
 627  */
 628 static char *
 629 storage_annotation(const slang_ir_node *n, const struct gl_program *prog)
 630 {
 631 #if ANNOTATE
 632    const slang_ir_storage *st = n->Store;
 633    static char s[100] = "";
 634
 635    if (!st)
 636       return _mesa_strdup("");
 637
 638    switch (st->File) {
 639    case PROGRAM_CONSTANT:
 640       if (st->Index >= 0) {
 641          const GLfloat *val = prog->Parameters->ParameterValues[st->Index];
 642          if (st->Swizzle == SWIZZLE_NOOP)
 643             sprintf(s, "{%g, %g, %g, %g}", val[0], val[1], val[2], val[3]);
 644          else {
 645             sprintf(s, "%g", val[GET_SWZ(st->Swizzle, 0)]);
 646          }
 647       }
 648       break;
 649    case PROGRAM_TEMPORARY:
 650       if (n->Var)
 651          sprintf(s, "%s", (char *) n->Var->a_name);
 652       else
 653          sprintf(s, "t[%d]", st->Index);
 654       break;
 655    case PROGRAM_STATE_VAR:
 656    case PROGRAM_UNIFORM:
 657       sprintf(s, "%s", prog->Parameters->Parameters[st->Index].Name);
 658       break;
 659    case PROGRAM_VARYING:
 660       sprintf(s, "%s", prog->Varying->Parameters[st->Index].Name);
 661       break;
 662    case PROGRAM_INPUT:
 663       sprintf(s, "input[%d]", st->Index);
 664       break;
 665    case PROGRAM_OUTPUT:
 666       sprintf(s, "output[%d]", st->Index);
 667       break;
 668    default:
 669       s[0] = 0;
 670    }
 671    return _mesa_strdup(s);
 672 #else
 673    return NULL;
 674 #endif
 675 }
 676
 677
 678 /**
 679  * Return an annotation string for an instruction.
 680  */
 681 static char *
 682 instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
 683                        char *srcAnnot0, char *srcAnnot1, char *srcAnnot2)
 684 {
 685 #if ANNOTATE
 686    const char *operator;
 687    char *s;
 688    int len = 50;
 689
 690    if (dstAnnot)
 691       len += strlen(dstAnnot);
 692    else
 693       dstAnnot = _mesa_strdup("");
 694
 695    if (srcAnnot0)
 696       len += strlen(srcAnnot0);
 697    else
 698       srcAnnot0 = _mesa_strdup("");
 699
 700    if (srcAnnot1)
 701       len += strlen(srcAnnot1);
 702    else
 703       srcAnnot1 = _mesa_strdup("");
 704
 705    if (srcAnnot2)
 706       len += strlen(srcAnnot2);
 707    else
 708       srcAnnot2 = _mesa_strdup("");
 709
 710    switch (opcode) {
 711    case OPCODE_ADD:
 712       operator = "+";
 713       break;
 714    case OPCODE_SUB:
 715       operator = "-";
 716       break;
 717    case OPCODE_MUL:
 718       operator = "*";
 719       break;
 720    case OPCODE_DP2:
 721       operator = "DP2";
 722       break;
 723    case OPCODE_DP3:
 724       operator = "DP3";
 725       break;
 726    case OPCODE_DP4:
 727       operator = "DP4";
 728       break;
 729    case OPCODE_XPD:
 730       operator = "XPD";
 731       break;
 732    case OPCODE_RSQ:
 733       operator = "RSQ";
 734       break;
 735    case OPCODE_SGT:
 736       operator = ">";
 737       break;
 738    default:
 739       operator = ",";
 740    }
 741
 742    s = (char *) malloc(len);
 743    sprintf(s, "%s = %s %s %s %s", dstAnnot,
 744            srcAnnot0, operator, srcAnnot1, srcAnnot2);
 745    assert(_mesa_strlen(s) < len);
 746
 747    free(dstAnnot);
 748    free(srcAnnot0);
 749    free(srcAnnot1);
 750    free(srcAnnot2);
 751
 752    return s;
 753 #else
 754    return NULL;
 755 #endif
 756 }
 757
 758
 759 /**
 760  * Emit an instruction that's just a comment.
 761  */
 762 static struct prog_instruction *
 763 emit_comment(slang_emit_info *emitInfo, const char *comment)
 764 {
 765    struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_NOP);
 766    inst_comment(inst, comment);
 767    return inst;
 768 }
 769
 770
 771 /**
 772  * Generate code for a simple arithmetic instruction.
 773  * Either 1, 2 or 3 operands.
 774  */
 775 static struct prog_instruction *
 776 emit_arith(slang_emit_info *emitInfo, slang_ir_node *n)
 777 {
 778    const slang_ir_info *info = _slang_ir_info(n->Opcode);
 779    struct prog_instruction *inst;
 780    GLuint i;
 781
 782    assert(info);
 783    assert(info->InstOpcode != OPCODE_NOP);
 784
 785 #if PEEPHOLE_OPTIMIZATIONS
 786    /* Look for MAD opportunity */
 787    if (info->NumParams == 2 &&
 788        n->Opcode == IR_ADD && n->Children[0]->Opcode == IR_MUL) {
 789       /* found pattern IR_ADD(IR_MUL(A, B), C) */
 790       emit(emitInfo, n->Children[0]->Children[0]);  /* A */
 791       emit(emitInfo, n->Children[0]->Children[1]);  /* B */
 792       emit(emitInfo, n->Children[1]);  /* C */
 793       alloc_node_storage(emitInfo, n, -1);  /* dest */
 794
 795       inst = emit_instruction(emitInfo,
 796                               OPCODE_MAD,
 797                               n->Store,
 798                               n->Children[0]->Children[0]->Store,
 799                               n->Children[0]->Children[1]->Store,
 800                               n->Children[1]->Store);
 801
 802       free_node_storage(emitInfo->vt, n->Children[0]->Children[0]);
 803       free_node_storage(emitInfo->vt, n->Children[0]->Children[1]);
 804       free_node_storage(emitInfo->vt, n->Children[1]);
 805       return inst;
 806    }
 807
 808    if (info->NumParams == 2 &&
 809        n->Opcode == IR_ADD && n->Children[1]->Opcode == IR_MUL) {
 810       /* found pattern IR_ADD(A, IR_MUL(B, C)) */
 811       emit(emitInfo, n->Children[0]);  /* A */
 812       emit(emitInfo, n->Children[1]->Children[0]);  /* B */
 813       emit(emitInfo, n->Children[1]->Children[1]);  /* C */
 814       alloc_node_storage(emitInfo, n, -1);  /* dest */
 815
 816       inst = emit_instruction(emitInfo,
 817                               OPCODE_MAD,
 818                               n->Store,
 819                               n->Children[1]->Children[0]->Store,
 820                               n->Children[1]->Children[1]->Store,
 821                               n->Children[0]->Store);
 822
 823       free_node_storage(emitInfo->vt, n->Children[1]->Children[0]);
 824       free_node_storage(emitInfo->vt, n->Children[1]->Children[1]);
 825       free_node_storage(emitInfo->vt, n->Children[0]);
 826       return inst;
 827    }
 828 #endif
 829
 830    /* gen code for children, may involve temp allocation */
 831    for (i = 0; i < info->NumParams; i++) {
 832       emit(emitInfo, n->Children[i]);
 833       if (!n->Children[i] || !n->Children[i]->Store) {
 834          /* error recovery */
 835          return NULL;
 836       }
 837    }
 838
 839    /* result storage */
 840    alloc_node_storage(emitInfo, n, -1);
 841
 842    inst = emit_instruction(emitInfo,
 843                            info->InstOpcode,
 844                            n->Store,  /* dest */
 845                            (info->NumParams > 0 ? n->Children[0]->Store : NULL),
 846                            (info->NumParams > 1 ? n->Children[1]->Store : NULL),
 847                            (info->NumParams > 2 ? n->Children[2]->Store : NULL)
 848                            );
 849
 850    /* free temps */
 851    for (i = 0; i < info->NumParams; i++)
 852       free_node_storage(emitInfo->vt, n->Children[i]);
 853
 854    return inst;
 855 }
 856
 857
 858 /**
 859  * Emit code for == and != operators.  These could normally be handled
 860  * by emit_arith() except we need to be able to handle structure comparisons.
 861  */
 862 static struct prog_instruction *
 863 emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
 864 {
 865    struct prog_instruction *inst = NULL;
 866    GLint size;
 867
 868    assert(n->Opcode == IR_EQUAL || n->Opcode == IR_NOTEQUAL);
 869
 870    /* gen code for children */
 871    emit(emitInfo, n->Children[0]);
 872    emit(emitInfo, n->Children[1]);
 873
 874    if (n->Children[0]->Store->Size != n->Children[1]->Store->Size) {
 875       slang_info_log_error(emitInfo->log, "invalid operands to == or !=");
 876       return NULL;
 877    }
 878
 879    /* final result is 1 bool */
 880    if (!alloc_node_storage(emitInfo, n, 1))
 881       return NULL;
 882
 883    size = n->Children[0]->Store->Size;
 884
 885    if (size == 1) {
 886       gl_inst_opcode opcode = n->Opcode == IR_EQUAL ? OPCODE_SEQ : OPCODE_SNE;
 887       inst =  emit_instruction(emitInfo,
 888                                opcode,
 889                                n->Store, /* dest */
 890                                n->Children[0]->Store,
 891                                n->Children[1]->Store,
 892                                NULL);
 893    }
 894    else if (size <= 4) {
 895       /* compare two vectors.
 896        * Unfortunately, there's no instruction to compare vectors and
 897        * return a scalar result.  Do it with some compare and dot product
 898        * instructions...
 899        */
 900       GLuint swizzle;
 901       gl_inst_opcode dotOp;
 902       slang_ir_storage tempStore;
 903
 904       if (!alloc_local_temp(emitInfo, &tempStore, 4)) {
 905          return NULL;
 906          /* out of temps */
 907       }
 908
 909       if (size == 4) {
 910          dotOp = OPCODE_DP4;
 911          swizzle = SWIZZLE_XYZW;
 912       }
 913       else if (size == 3) {
 914          dotOp = OPCODE_DP3;
 915          swizzle = SWIZZLE_XYZW;
 916       }
 917       else {
 918          assert(size == 2);
 919          dotOp = OPCODE_DP3; /* XXX use OPCODE_DP2 eventually */
 920          swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
 921       }
 922
 923       /* Compute inequality (temp = (A != B)) */
 924       inst = emit_instruction(emitInfo,
 925                               OPCODE_SNE,
 926                               &tempStore,
 927                               n->Children[0]->Store,
 928                               n->Children[1]->Store,
 929                               NULL);
 930       inst_comment(inst, "Compare values");
 931
 932       /* Compute val = DOT(temp, temp)  (reduction) */
 933       inst = emit_instruction(emitInfo,
 934                               dotOp,
 935                               n->Store,
 936                               &tempStore,
 937                               &tempStore,
 938                               NULL);
 939       inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/
 940       inst_comment(inst, "Reduce vec to bool");
 941
 942       _slang_free_temp(emitInfo->vt, &tempStore); /* free temp */
 943
 944       if (n->Opcode == IR_EQUAL) {
 945          /* compute val = !val.x  with SEQ val, val, 0; */
 946          slang_ir_storage zero;
 947          constant_to_storage(emitInfo, 0.0, &zero);
 948          inst = emit_instruction(emitInfo,
 949                                  OPCODE_SEQ,
 950                                  n->Store, /* dest */
 951                                  n->Store,
 952                                  &zero,
 953                                  NULL);
 954          inst_comment(inst, "Invert true/false");
 955       }
 956    }
 957    else {
 958       /* size > 4, struct or array compare.
 959        * XXX this won't work reliably for structs with padding!!
 960        */
 961       GLint i, num = (n->Children[0]->Store->Size + 3) / 4;
 962       slang_ir_storage accTemp, sneTemp;
 963
 964       if (!alloc_local_temp(emitInfo, &accTemp, 4))
 965          return NULL;
 966
 967       if (!alloc_local_temp(emitInfo, &sneTemp, 4))
 968          return NULL;
 969
 970       for (i = 0; i < num; i++) {
 971          slang_ir_storage srcStore0 = *n->Children[0]->Store;
 972          slang_ir_storage srcStore1 = *n->Children[1]->Store;
 973          srcStore0.Index += i;
 974          srcStore1.Index += i;
 975
 976          if (i == 0) {
 977             /* SNE accTemp, left[i], right[i] */
 978             inst = emit_instruction(emitInfo, OPCODE_SNE,
 979                                     &accTemp, /* dest */
 980                                     &srcStore0,
 981                                     &srcStore1,
 982                                     NULL);
 983             inst_comment(inst, "Begin struct/array comparison");
 984          }
 985          else {
 986             /* SNE sneTemp, left[i], right[i] */
 987             inst = emit_instruction(emitInfo, OPCODE_SNE,
 988                                     &sneTemp, /* dest */
 989                                     &srcStore0,
 990                                     &srcStore1,
 991                                     NULL);
 992             /* ADD accTemp, accTemp, sneTemp; # like logical-OR */
 993             inst = emit_instruction(emitInfo, OPCODE_ADD,
 994                                     &accTemp, /* dest */
 995                                     &accTemp,
 996                                     &sneTemp,
 997                                     NULL);
 998          }
 999       }
1000
1001       /* compute accTemp.x || accTemp.y || accTemp.z || accTemp.w with DOT4 */
1002       inst = emit_instruction(emitInfo, OPCODE_DP4,
1003                               n->Store,
1004                               &accTemp,
1005                               &accTemp,
1006                               NULL);
1007       inst_comment(inst, "End struct/array comparison");
1008
1009       if (n->Opcode == IR_EQUAL) {
1010          /* compute tmp.x = !tmp.x  via tmp.x = (tmp.x == 0) */
1011          slang_ir_storage zero;
1012          constant_to_storage(emitInfo, 0.0, &zero);
1013          inst = emit_instruction(emitInfo, OPCODE_SEQ,
1014                                  n->Store, /* dest */
1015                                  n->Store,
1016                                  &zero,
1017                                  NULL);
1018          inst_comment(inst, "Invert true/false");
1019       }
1020
1021       _slang_free_temp(emitInfo->vt, &accTemp);
1022       _slang_free_temp(emitInfo->vt, &sneTemp);
1023    }
1024
1025    /* free temps */
1026    free_node_storage(emitInfo->vt, n->Children[0]);
1027    free_node_storage(emitInfo->vt, n->Children[1]);
1028
1029    return inst;
1030 }
1031
1032
1033
1034 /**
1035  * Generate code for an IR_CLAMP instruction.
1036  */
1037 static struct prog_instruction *
1038 emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n)
1039 {
1040    struct prog_instruction *inst;
1041    slang_ir_node tmpNode;
1042
1043    assert(n->Opcode == IR_CLAMP);
1044    /* ch[0] = value
1045     * ch[1] = min limit
1046     * ch[2] = max limit
1047     */
1048
1049    inst = emit(emitInfo, n->Children[0]);
1050
1051    /* If lower limit == 0.0 and upper limit == 1.0,
1052     *    set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
1053     * Else,
1054     *    emit OPCODE_MIN, OPCODE_MAX sequence.
1055     */
1056 #if 0
1057    /* XXX this isn't quite finished yet */
1058    if (n->Children[1]->Opcode == IR_FLOAT &&
1059        n->Children[1]->Value[0] == 0.0 &&
1060        n->Children[1]->Value[1] == 0.0 &&
1061        n->Children[1]->Value[2] == 0.0 &&
1062        n->Children[1]->Value[3] == 0.0 &&
1063        n->Children[2]->Opcode == IR_FLOAT &&
1064        n->Children[2]->Value[0] == 1.0 &&
1065        n->Children[2]->Value[1] == 1.0 &&
1066        n->Children[2]->Value[2] == 1.0 &&
1067        n->Children[2]->Value[3] == 1.0) {
1068       if (!inst) {
1069          inst = prev_instruction(prog);
1070       }
1071       if (inst && inst->Opcode != OPCODE_NOP) {
1072          /* and prev instruction's DstReg matches n->Children[0]->Store */
1073          inst->SaturateMode = SATURATE_ZERO_ONE;
1074          n->Store = n->Children[0]->Store;
1075          return inst;
1076       }
1077    }
1078 #endif
1079
1080    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1081       return NULL;
1082
1083    emit(emitInfo, n->Children[1]);
1084    emit(emitInfo, n->Children[2]);
1085
1086    /* Some GPUs don't allow reading from output registers.  So if the
1087     * dest for this clamp() is an output reg, we can't use that reg for
1088     * the intermediate result.  Use a temp register instead.
1089     */
1090    _mesa_bzero(&tmpNode, sizeof(tmpNode));
1091    alloc_node_storage(emitInfo, &tmpNode, n->Store->Size);
1092
1093    /* tmp = max(ch[0], ch[1]) */
1094    inst = emit_instruction(emitInfo, OPCODE_MAX,
1095                            tmpNode.Store, /* dest */
1096                            n->Children[0]->Store,
1097                            n->Children[1]->Store,
1098                            NULL);
1099
1100    /* n->dest = min(tmp, ch[2]) */
1101    inst = emit_instruction(emitInfo, OPCODE_MIN,
1102                            n->Store, /* dest */
1103                            tmpNode.Store,
1104                            n->Children[2]->Store,
1105                            NULL);
1106
1107    free_node_storage(emitInfo->vt, &tmpNode);
1108
1109    return inst;
1110 }
1111
1112
1113 static struct prog_instruction *
1114 emit_negation(slang_emit_info *emitInfo, slang_ir_node *n)
1115 {
1116    /* Implement as MOV dst, -src; */
1117    /* XXX we could look at the previous instruction and in some circumstances
1118     * modify it to accomplish the negation.
1119     */
1120    struct prog_instruction *inst;
1121
1122    emit(emitInfo, n->Children[0]);
1123
1124    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1125       return NULL;
1126
1127    inst = emit_instruction(emitInfo,
1128                            OPCODE_MOV,
1129                            n->Store, /* dest */
1130                            n->Children[0]->Store,
1131                            NULL,
1132                            NULL);
1133    inst->SrcReg[0].NegateBase = NEGATE_XYZW;
1134    return inst;
1135 }
1136
1137
1138 static struct prog_instruction *
1139 emit_label(slang_emit_info *emitInfo, const slang_ir_node *n)
1140 {
1141    assert(n->Label);
1142 #if 0
1143    /* XXX this fails in loop tail code - investigate someday */
1144    assert(_slang_label_get_location(n->Label) < 0);
1145    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1146                              emitInfo->prog);
1147 #else
1148    if (_slang_label_get_location(n->Label) < 0)
1149       _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1150                                 emitInfo->prog);
1151 #endif
1152    return NULL;
1153 }
1154
1155
1156 /**
1157  * Emit code for a function call.
1158  * Note that for each time a function is called, we emit the function's
1159  * body code again because the set of available registers may be different.
1160  */
1161 static struct prog_instruction *
1162 emit_fcall(slang_emit_info *emitInfo, slang_ir_node *n)
1163 {
1164    struct gl_program *progSave;
1165    struct prog_instruction *inst;
1166    GLuint subroutineId;
1167    GLuint maxInstSave;
1168
1169    assert(n->Opcode == IR_CALL);
1170    assert(n->Label);
1171
1172    /* save/push cur program */
1173    maxInstSave = emitInfo->MaxInstructions;
1174    progSave = emitInfo->prog;
1175
1176    emitInfo->prog = new_subroutine(emitInfo, &subroutineId);
1177    emitInfo->MaxInstructions = emitInfo->prog->NumInstructions;
1178
1179    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
1180                              emitInfo->prog);
1181
1182    if (emitInfo->EmitBeginEndSub) {
1183       /* BGNSUB isn't a real instruction.
1184        * We require a label (i.e. "foobar:") though, if we're going to
1185        * print the program in the NV format.  The BNGSUB instruction is
1186        * really just a NOP to attach the label to.
1187        */
1188       inst = new_instruction(emitInfo, OPCODE_BGNSUB);
1189       inst_comment(inst, n->Label->Name);
1190    }
1191
1192    /* body of function: */
1193    emit(emitInfo, n->Children[0]);
1194    n->Store = n->Children[0]->Store;
1195
1196    /* add RET instruction now, if needed */
1197    inst = prev_instruction(emitInfo);
1198    if (inst && inst->Opcode != OPCODE_RET) {
1199       inst = new_instruction(emitInfo, OPCODE_RET);
1200    }
1201
1202    if (emitInfo->EmitBeginEndSub) {
1203       inst = new_instruction(emitInfo, OPCODE_ENDSUB);
1204       inst_comment(inst, n->Label->Name);
1205    }
1206
1207    /* pop/restore cur program */
1208    emitInfo->prog = progSave;
1209    emitInfo->MaxInstructions = maxInstSave;
1210
1211    /* emit the function call */
1212    inst = new_instruction(emitInfo, OPCODE_CAL);
1213    /* The branch target is just the subroutine number (changed later) */
1214    inst->BranchTarget = subroutineId;
1215    inst_comment(inst, n->Label->Name);
1216    assert(inst->BranchTarget >= 0);
1217
1218    return inst;
1219 }
1220
1221
1222 /**
1223  * Emit code for a 'return' statement.
1224  */
1225 static struct prog_instruction *
1226 emit_return(slang_emit_info *emitInfo, slang_ir_node *n)
1227 {
1228    struct prog_instruction *inst;
1229    assert(n);
1230    assert(n->Opcode == IR_RETURN);
1231    assert(n->Label);
1232    inst = new_instruction(emitInfo, OPCODE_RET);
1233    inst->DstReg.CondMask = COND_TR;  /* always return */
1234    return inst;
1235 }
1236
1237
1238 static struct prog_instruction *
1239 emit_kill(slang_emit_info *emitInfo)
1240 {
1241    struct gl_fragment_program *fp;
1242    struct prog_instruction *inst;
1243    /* NV-KILL - discard fragment depending on condition code.
1244     * Note that ARB-KILL depends on sign of vector operand.
1245     */
1246    inst = new_instruction(emitInfo, OPCODE_KIL_NV);
1247    inst->DstReg.CondMask = COND_TR;  /* always kill */
1248
1249    assert(emitInfo->prog->Target == GL_FRAGMENT_PROGRAM_ARB);
1250    fp = (struct gl_fragment_program *) emitInfo->prog;
1251    fp->UsesKill = GL_TRUE;
1252
1253    return inst;
1254 }
1255
1256
1257 static struct prog_instruction *
1258 emit_tex(slang_emit_info *emitInfo, slang_ir_node *n)
1259 {
1260    struct prog_instruction *inst;
1261    gl_inst_opcode opcode;
1262
1263    if (n->Opcode == IR_TEX) {
1264       opcode = OPCODE_TEX;
1265    }
1266    else if (n->Opcode == IR_TEXB) {
1267       opcode = OPCODE_TXB;
1268    }
1269    else {
1270       assert(n->Opcode == IR_TEXP);
1271       opcode = OPCODE_TXP;
1272    }
1273
1274    /* emit code for the texcoord operand */
1275    (void) emit(emitInfo, n->Children[1]);
1276
1277    /* alloc storage for result of texture fetch */
1278    if (!alloc_node_storage(emitInfo, n, 4))
1279       return NULL;
1280
1281    /* emit TEX instruction;  Child[1] is the texcoord */
1282    inst = emit_instruction(emitInfo,
1283                            opcode,
1284                            n->Store,
1285                            n->Children[1]->Store,
1286                            NULL,
1287                            NULL);
1288
1289    /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
1290    assert(n->Children[0]->Store);
1291    assert(n->Children[0]->Store->File == PROGRAM_SAMPLER);
1292    /* Store->Index is the sampler index */
1293    assert(n->Children[0]->Store->Index >= 0);
1294    /* Store->Size is the texture target */
1295    assert(n->Children[0]->Store->Size >= TEXTURE_1D_INDEX);
1296    assert(n->Children[0]->Store->Size <= TEXTURE_RECT_INDEX);
1297
1298    inst->TexSrcTarget = n->Children[0]->Store->Size;
1299    inst->TexSrcUnit = n->Children[0]->Store->Index; /* i.e. uniform's index */
1300
1301    /* mark the sampler as being used */
1302    _mesa_use_uniform(emitInfo->prog->Parameters,
1303                      (char *) n->Children[0]->Var->a_name);
1304
1305    return inst;
1306 }
1307
1308
1309 /**
1310  * Assignment/copy
1311  */
1312 static struct prog_instruction *
1313 emit_copy(slang_emit_info *emitInfo, slang_ir_node *n)
1314 {
1315    struct prog_instruction *inst;
1316
1317    assert(n->Opcode == IR_COPY);
1318
1319    /* lhs */
1320    emit(emitInfo, n->Children[0]);
1321    if (!n->Children[0]->Store || n->Children[0]->Store->Index < 0) {
1322       /* an error should have been already recorded */
1323       return NULL;
1324    }
1325
1326    /* rhs */
1327    assert(n->Children[1]);
1328    inst = emit(emitInfo, n->Children[1]);
1329
1330    if (!n->Children[1]->Store || n->Children[1]->Store->Index < 0) {
1331       if (!emitInfo->log->text) {
1332          slang_info_log_error(emitInfo->log, "invalid assignment");
1333       }
1334       return NULL;
1335    }
1336
1337    assert(n->Children[1]->Store->Index >= 0);
1338
1339    /*assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);*/
1340
1341    n->Store = n->Children[0]->Store;
1342
1343    if (n->Store->File == PROGRAM_SAMPLER) {
1344       /* no code generated for sampler assignments,
1345        * just copy the sampler index at compile time.
1346        */
1347       n->Store->Index = n->Children[1]->Store->Index;
1348       return NULL;
1349    }
1350
1351 #if PEEPHOLE_OPTIMIZATIONS
1352    if (inst &&
1353        _slang_is_temp(emitInfo->vt, n->Children[1]->Store) &&
1354        (inst->DstReg.File == n->Children[1]->Store->File) &&
1355        (inst->DstReg.Index == n->Children[1]->Store->Index) &&
1356        !n->Children[0]->Store->IsIndirect &&
1357        n->Children[0]->Store->Size <= 4) {
1358       /* Peephole optimization:
1359        * The Right-Hand-Side has its results in a temporary place.
1360        * Modify the RHS (and the prev instruction) to store its results
1361        * in the destination specified by n->Children[0].
1362        * Then, this MOVE is a no-op.
1363        * Ex:
1364        *   MUL tmp, x, y;
1365        *   MOV a, tmp;
1366        * becomes:
1367        *   MUL a, x, y;
1368        */
1369       if (n->Children[1]->Opcode != IR_SWIZZLE)
1370          _slang_free_temp(emitInfo->vt, n->Children[1]->Store);
1371       *n->Children[1]->Store = *n->Children[0]->Store;
1372
1373       /* fixup the previous instruction (which stored the RHS result) */
1374       assert(n->Children[0]->Store->Index >= 0);
1375
1376       storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store);
1377       return inst;
1378    }
1379    else
1380 #endif
1381    {
1382       if (n->Children[0]->Store->Size > 4) {
1383          /* move matrix/struct etc (block of registers) */
1384          slang_ir_storage dstStore = *n->Children[0]->Store;
1385          slang_ir_storage srcStore = *n->Children[1]->Store;
1386          GLint size = srcStore.Size;
1387          ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP);
1388          dstStore.Size = 4;
1389          srcStore.Size = 4;
1390          while (size >= 4) {
1391             inst = emit_instruction(emitInfo, OPCODE_MOV,
1392                                     &dstStore,
1393                                     &srcStore,
1394                                     NULL,
1395                                     NULL);
1396             inst_comment(inst, "IR_COPY block");
1397             srcStore.Index++;
1398             dstStore.Index++;
1399             size -= 4;
1400          }
1401       }
1402       else {
1403          /* single register move */
1404          char *srcAnnot, *dstAnnot;
1405          assert(n->Children[0]->Store->Index >= 0);
1406          inst = emit_instruction(emitInfo, OPCODE_MOV,
1407                                  n->Children[0]->Store, /* dest */
1408                                  n->Children[1]->Store,
1409                                  NULL,
1410                                  NULL);
1411          dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);
1412          srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);
1413          inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
1414                                                 srcAnnot, NULL, NULL);
1415       }
1416       free_node_storage(emitInfo->vt, n->Children[1]);
1417       return inst;
1418    }
1419 }
1420
1421
1422 /**
1423  * An IR_COND node wraps a boolean expression which is used by an
1424  * IF or WHILE test.  This is where we'll set condition codes, if needed.
1425  */
1426 static struct prog_instruction *
1427 emit_cond(slang_emit_info *emitInfo, slang_ir_node *n)
1428 {
1429    struct prog_instruction *inst;
1430
1431    assert(n->Opcode == IR_COND);
1432
1433    if (!n->Children[0])
1434       return NULL;
1435
1436    /* emit code for the expression */
1437    inst = emit(emitInfo, n->Children[0]);
1438
1439    if (!n->Children[0]->Store) {
1440       /* error recovery */
1441       return NULL;
1442    }
1443
1444    assert(n->Children[0]->Store);
1445    /*assert(n->Children[0]->Store->Size == 1);*/
1446
1447    if (emitInfo->EmitCondCodes) {
1448       if (inst &&
1449           n->Children[0]->Store &&
1450           inst->DstReg.File == n->Children[0]->Store->File &&
1451           inst->DstReg.Index == n->Children[0]->Store->Index) {
1452          /* The previous instruction wrote to the register who's value
1453           * we're testing.  Just fix that instruction so that the
1454           * condition codes are computed.
1455           */
1456          inst->CondUpdate = GL_TRUE;
1457          n->Store = n->Children[0]->Store;
1458          return inst;
1459       }
1460       else {
1461          /* This'll happen for things like "if (i) ..." where no code
1462           * is normally generated for the expression "i".
1463           * Generate a move instruction just to set condition codes.
1464           */
1465          if (!alloc_node_storage(emitInfo, n, 1))
1466             return NULL;
1467          inst = emit_instruction(emitInfo, OPCODE_MOV,
1468                                  n->Store, /* dest */
1469                                  n->Children[0]->Store,
1470                                  NULL,
1471                                  NULL);
1472          inst->CondUpdate = GL_TRUE;
1473          inst_comment(inst, "COND expr");
1474          _slang_free_temp(emitInfo->vt, n->Store);
1475          return inst;
1476       }
1477    }
1478    else {
1479       /* No-op: the boolean result of the expression is in a regular reg */
1480       n->Store = n->Children[0]->Store;
1481       return inst;
1482    }
1483 }
1484
1485
1486 /**
1487  * Logical-NOT
1488  */
1489 static struct prog_instruction *
1490 emit_not(slang_emit_info *emitInfo, slang_ir_node *n)
1491 {
1492    static const struct {
1493       gl_inst_opcode op, opNot;
1494    } operators[] = {
1495       { OPCODE_SLT, OPCODE_SGE },
1496       { OPCODE_SLE, OPCODE_SGT },
1497       { OPCODE_SGT, OPCODE_SLE },
1498       { OPCODE_SGE, OPCODE_SLT },
1499       { OPCODE_SEQ, OPCODE_SNE },
1500       { OPCODE_SNE, OPCODE_SEQ },
1501       { 0, 0 }
1502    };
1503    struct prog_instruction *inst;
1504    slang_ir_storage zero;
1505    GLuint i;
1506
1507    /* child expr */
1508    inst = emit(emitInfo, n->Children[0]);
1509
1510 #if PEEPHOLE_OPTIMIZATIONS
1511    if (inst) {
1512       /* if the prev instruction was a comparison instruction, invert it */
1513       for (i = 0; operators[i].op; i++) {
1514          if (inst->Opcode == operators[i].op) {
1515             inst->Opcode = operators[i].opNot;
1516             n->Store = n->Children[0]->Store;
1517             return inst;
1518          }
1519       }
1520    }
1521 #endif
1522
1523    /* else, invert using SEQ (v = v == 0) */
1524    if (!alloc_node_storage(emitInfo, n, n->Children[0]->Store->Size))
1525       return NULL;
1526
1527    constant_to_storage(emitInfo, 0.0, &zero);
1528    inst = emit_instruction(emitInfo,
1529                            OPCODE_SEQ,
1530                            n->Store,
1531                            n->Children[0]->Store,
1532                            &zero,
1533                            NULL);
1534    inst_comment(inst, "NOT");
1535
1536    free_node_storage(emitInfo->vt, n->Children[0]);
1537
1538    return inst;
1539 }
1540
1541
1542 static struct prog_instruction *
1543 emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
1544 {
1545    struct gl_program *prog = emitInfo->prog;
1546    GLuint ifInstLoc, elseInstLoc = 0;
1547    GLuint condWritemask = 0;
1548
1549    /* emit condition expression code */
1550    {
1551       struct prog_instruction *inst;
1552       inst = emit(emitInfo, n->Children[0]);
1553       if (emitInfo->EmitCondCodes) {
1554          if (!inst) {
1555             /* error recovery */
1556             return NULL;
1557          }
1558          condWritemask = inst->DstReg.WriteMask;
1559       }
1560    }
1561
1562    if (!n->Children[0]->Store)
1563       return NULL;
1564
1565 #if 0
1566    assert(n->Children[0]->Store->Size == 1); /* a bool! */
1567 #endif
1568
1569    ifInstLoc = prog->NumInstructions;
1570    if (emitInfo->EmitHighLevelInstructions) {
1571       if (emitInfo->EmitCondCodes) {
1572          /* IF condcode THEN ... */
1573          struct prog_instruction *ifInst;
1574          ifInst = new_instruction(emitInfo, OPCODE_IF);
1575          ifInst->DstReg.CondMask = COND_NE;  /* if cond is non-zero */
1576          /* only test the cond code (1 of 4) that was updated by the
1577           * previous instruction.
1578           */
1579          ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1580       }
1581       else {
1582          /* IF src[0] THEN ... */
1583          emit_instruction(emitInfo, OPCODE_IF,
1584                           NULL, /* dst */
1585                           n->Children[0]->Store, /* op0 */
1586                           NULL,
1587                           NULL);
1588       }
1589    }
1590    else {
1591       /* conditional jump to else, or endif */
1592       struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_BRA);
1593       ifInst->DstReg.CondMask = COND_EQ;  /* BRA if cond is zero */
1594       inst_comment(ifInst, "if zero");
1595       ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1596    }
1597
1598    /* if body */
1599    emit(emitInfo, n->Children[1]);
1600
1601    if (n->Children[2]) {
1602       /* have else body */
1603       elseInstLoc = prog->NumInstructions;
1604       if (emitInfo->EmitHighLevelInstructions) {
1605          (void) new_instruction(emitInfo, OPCODE_ELSE);
1606       }
1607       else {
1608          /* jump to endif instruction */
1609          struct prog_instruction *inst;
1610          inst = new_instruction(emitInfo, OPCODE_BRA);
1611          inst_comment(inst, "else");
1612          inst->DstReg.CondMask = COND_TR;  /* always branch */
1613       }
1614       prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
1615       emit(emitInfo, n->Children[2]);
1616    }
1617    else {
1618       /* no else body */
1619       prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
1620    }
1621
1622    if (emitInfo->EmitHighLevelInstructions) {
1623       (void) new_instruction(emitInfo, OPCODE_ENDIF);
1624    }
1625
1626    if (n->Children[2]) {
1627       prog->Instructions[elseInstLoc].BranchTarget = prog->NumInstructions;
1628    }
1629    return NULL;
1630 }
1631
1632
1633 static struct prog_instruction *
1634 emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
1635 {
1636    struct gl_program *prog = emitInfo->prog;
1637    struct prog_instruction *endInst;
1638    GLuint beginInstLoc, tailInstLoc, endInstLoc;
1639    slang_ir_node *ir;
1640
1641    /* emit OPCODE_BGNLOOP */
1642    beginInstLoc = prog->NumInstructions;
1643    if (emitInfo->EmitHighLevelInstructions) {
1644       (void) new_instruction(emitInfo, OPCODE_BGNLOOP);
1645    }
1646
1647    /* body */
1648    emit(emitInfo, n->Children[0]);
1649
1650    /* tail */
1651    tailInstLoc = prog->NumInstructions;
1652    if (n->Children[1]) {
1653       if (emitInfo->EmitComments)
1654          emit_comment(emitInfo, "Loop tail code:");
1655       emit(emitInfo, n->Children[1]);
1656    }
1657
1658    endInstLoc = prog->NumInstructions;
1659    if (emitInfo->EmitHighLevelInstructions) {
1660       /* emit OPCODE_ENDLOOP */
1661       endInst = new_instruction(emitInfo, OPCODE_ENDLOOP);
1662    }
1663    else {
1664       /* emit unconditional BRA-nch */
1665       endInst = new_instruction(emitInfo, OPCODE_BRA);
1666       endInst->DstReg.CondMask = COND_TR;  /* always true */
1667    }
1668    /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1669    endInst->BranchTarget = beginInstLoc;
1670
1671    if (emitInfo->EmitHighLevelInstructions) {
1672       /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1673       prog->Instructions[beginInstLoc].BranchTarget = prog->NumInstructions -1;
1674    }
1675
1676    /* Done emitting loop code.  Now walk over the loop's linked list of
1677     * BREAK and CONT nodes, filling in their BranchTarget fields (which
1678     * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1679     */
1680    for (ir = n->List; ir; ir = ir->List) {
1681       struct prog_instruction *inst = prog->Instructions + ir->InstLocation;
1682       assert(inst->BranchTarget < 0);
1683       if (ir->Opcode == IR_BREAK ||
1684           ir->Opcode == IR_BREAK_IF_TRUE) {
1685          assert(inst->Opcode == OPCODE_BRK ||
1686                 inst->Opcode == OPCODE_BRA);
1687          /* go to instruction after end of loop */
1688          inst->BranchTarget = endInstLoc + 1;
1689       }
1690       else {
1691          assert(ir->Opcode == IR_CONT ||
1692                 ir->Opcode == IR_CONT_IF_TRUE);
1693          assert(inst->Opcode == OPCODE_CONT ||
1694                 inst->Opcode == OPCODE_BRA);
1695          /* go to instruction at tail of loop */
1696          inst->BranchTarget = endInstLoc;
1697       }
1698    }
1699    return NULL;
1700 }
1701
1702
1703 /**
1704  * Unconditional "continue" or "break" statement.
1705  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1706  */
1707 static struct prog_instruction *
1708 emit_cont_break(slang_emit_info *emitInfo, slang_ir_node *n)
1709 {
1710    gl_inst_opcode opcode;
1711    struct prog_instruction *inst;
1712
1713    if (n->Opcode == IR_CONT) {
1714       /* we need to execute the loop's tail code before doing CONT */
1715       assert(n->Parent);
1716       assert(n->Parent->Opcode == IR_LOOP);
1717       if (n->Parent->Children[1]) {
1718          /* emit tail code */
1719          if (emitInfo->EmitComments) {
1720             emit_comment(emitInfo, "continue - tail code:");
1721          }
1722          emit(emitInfo, n->Parent->Children[1]);
1723       }
1724    }
1725
1726    /* opcode selection */
1727    if (emitInfo->EmitHighLevelInstructions) {
1728       opcode = (n->Opcode == IR_CONT) ? OPCODE_CONT : OPCODE_BRK;
1729    }
1730    else {
1731       opcode = OPCODE_BRA;
1732    }
1733    n->InstLocation = emitInfo->prog->NumInstructions;
1734    inst = new_instruction(emitInfo, opcode);
1735    inst->DstReg.CondMask = COND_TR;  /* always true */
1736    return inst;
1737 }
1738
1739
1740 /**
1741  * Conditional "continue" or "break" statement.
1742  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1743  */
1744 static struct prog_instruction *
1745 emit_cont_break_if_true(slang_emit_info *emitInfo, slang_ir_node *n)
1746 {
1747    struct prog_instruction *inst;
1748
1749    assert(n->Opcode == IR_CONT_IF_TRUE ||
1750           n->Opcode == IR_BREAK_IF_TRUE);
1751
1752    /* evaluate condition expr, setting cond codes */
1753    inst = emit(emitInfo, n->Children[0]);
1754    if (emitInfo->EmitCondCodes) {
1755       assert(inst);
1756       inst->CondUpdate = GL_TRUE;
1757    }
1758
1759    n->InstLocation = emitInfo->prog->NumInstructions;
1760
1761    /* opcode selection */
1762    if (emitInfo->EmitHighLevelInstructions) {
1763       const gl_inst_opcode opcode
1764          = (n->Opcode == IR_CONT_IF_TRUE) ? OPCODE_CONT : OPCODE_BRK;
1765       if (emitInfo->EmitCondCodes) {
1766          /* Get the writemask from the previous instruction which set
1767           * the condcodes.  Use that writemask as the CondSwizzle.
1768           */
1769          const GLuint condWritemask = inst->DstReg.WriteMask;
1770          inst = new_instruction(emitInfo, opcode);
1771          inst->DstReg.CondMask = COND_NE;
1772          inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1773          return inst;
1774       }
1775       else {
1776          /* IF reg
1777           *    BRK/CONT;
1778           * ENDIF
1779           */
1780          GLint ifInstLoc;
1781          ifInstLoc = emitInfo->prog->NumInstructions;
1782          inst = emit_instruction(emitInfo, OPCODE_IF,
1783                                  NULL, /* dest */
1784                                  n->Children[0]->Store,
1785                                  NULL,
1786                                  NULL);
1787          n->InstLocation = emitInfo->prog->NumInstructions;
1788
1789          inst = new_instruction(emitInfo, opcode);
1790          inst = new_instruction(emitInfo, OPCODE_ENDIF);
1791
1792          emitInfo->prog->Instructions[ifInstLoc].BranchTarget
1793             = emitInfo->prog->NumInstructions;
1794          return inst;
1795       }
1796    }
1797    else {
1798       const GLuint condWritemask = inst->DstReg.WriteMask;
1799       assert(emitInfo->EmitCondCodes);
1800       inst = new_instruction(emitInfo, OPCODE_BRA);
1801       inst->DstReg.CondMask = COND_NE;
1802       inst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1803       return inst;
1804    }
1805 }
1806
1807
1808 static struct prog_instruction *
1809 emit_swizzle(slang_emit_info *emitInfo, slang_ir_node *n)
1810 {
1811    struct prog_instruction *inst;
1812
1813    inst = emit(emitInfo, n->Children[0]);
1814
1815 #if 0
1816    assert(n->Store->Parent);
1817    /* Apply this node's swizzle to parent's storage */
1818    GLuint swizzle = n->Store->Swizzle;
1819    _slang_copy_ir_storage(n->Store, n->Store->Parent);
1820    n->Store->Swizzle = _slang_swizzle_swizzle(n->Store->Swizzle, swizzle);
1821    assert(!n->Store->Parent);
1822 #endif
1823    return inst;
1824 }
1825
1826
1827 /**
1828  * Dereference array element:  element == array[index]
1829  * This basically involves emitting code for computing the array index
1830  * and updating the node/element's storage info.
1831  */
1832 static struct prog_instruction *
1833 emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
1834 {
1835    slang_ir_storage *arrayStore, *indexStore;
1836    const int elemSize = n->Store->Size;           /* number of floats */
1837    const GLint elemSizeVec = (elemSize + 3) / 4;  /* number of vec4 */
1838    struct prog_instruction *inst;
1839
1840    assert(n->Opcode == IR_ELEMENT);
1841    assert(elemSize > 0);
1842
1843    /* special case for built-in state variables, like light state */
1844    {
1845       slang_ir_storage *root = n->Store;
1846       assert(!root->Parent);
1847       while (root->Parent)
1848          root = root->Parent;
1849
1850       if (root->File == PROGRAM_STATE_VAR) {
1851          GLboolean direct;
1852          GLint index =
1853             _slang_alloc_statevar(n, emitInfo->prog->Parameters, &direct);
1854          if (index < 0) {
1855             /* error */
1856             return NULL;
1857          }
1858          if (direct) {
1859             n->Store->Index = index;
1860             return NULL; /* all done */
1861          }
1862       }
1863    }
1864
1865    /* do codegen for array itself */
1866    emit(emitInfo, n->Children[0]);
1867    arrayStore = n->Children[0]->Store;
1868
1869    /* The initial array element storage is the array's storage,
1870     * then modified below.
1871     */
1872    _slang_copy_ir_storage(n->Store, arrayStore);
1873
1874
1875    if (n->Children[1]->Opcode == IR_FLOAT) {
1876       /* Constant array index */
1877       const GLint element = (GLint) n->Children[1]->Value[0];
1878
1879       /* this element's storage is the array's storage, plus constant offset */
1880       n->Store->Index += elemSizeVec * element;
1881    }
1882    else {
1883       /* Variable array index */
1884
1885       /* do codegen for array index expression */
1886       emit(emitInfo, n->Children[1]);
1887       indexStore = n->Children[1]->Store;
1888
1889       if (indexStore->IsIndirect) {
1890          /* need to put the array index into a temporary since we can't
1891           * directly support a[b[i]] constructs.
1892           */
1893
1894
1895          /*indexStore = tempstore();*/
1896       }
1897
1898
1899       if (elemSize > 4) {
1900          /* need to multiply array index by array element size */
1901          struct prog_instruction *inst;
1902          slang_ir_storage *indexTemp;
1903          slang_ir_storage elemSizeStore;
1904
1905          /* allocate 1 float indexTemp */
1906          indexTemp = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, 1);
1907          _slang_alloc_temp(emitInfo->vt, indexTemp);
1908
1909          /* allocate a constant containing the element size */
1910          constant_to_storage(emitInfo, (float) elemSizeVec, &elemSizeStore);
1911
1912          /* multiply array index by element size */
1913          inst = emit_instruction(emitInfo,
1914                                  OPCODE_MUL,
1915                                  indexTemp, /* dest */
1916                                  indexStore, /* the index */
1917                                  &elemSizeStore,
1918                                  NULL);
1919
1920          indexStore = indexTemp;
1921       }
1922
1923       if (arrayStore->IsIndirect) {
1924          /* ex: in a[i][j], a[i] (the arrayStore) is indirect */
1925          /* Need to add indexStore to arrayStore->Indirect store */
1926          slang_ir_storage indirectArray;
1927          slang_ir_storage *indexTemp;
1928
1929          _slang_init_ir_storage(&indirectArray,
1930                                 arrayStore->IndirectFile,
1931                                 arrayStore->IndirectIndex,
1932                                 1,
1933                                 arrayStore->IndirectSwizzle);
1934
1935          /* allocate 1 float indexTemp */
1936          indexTemp = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, 1);
1937          _slang_alloc_temp(emitInfo->vt, indexTemp);
1938
1939          inst = emit_instruction(emitInfo,
1940                                  OPCODE_ADD,
1941                                  indexTemp,      /* dest */
1942                                  indexStore,     /* the index */
1943                                  &indirectArray, /* indirect array base */
1944                                  NULL);
1945
1946          indexStore = indexTemp;
1947       }
1948
1949       /* update the array element storage info */
1950       n->Store->IsIndirect = GL_TRUE;
1951       n->Store->IndirectFile = indexStore->File;
1952       n->Store->IndirectIndex = indexStore->Index;
1953       n->Store->IndirectSwizzle = indexStore->Swizzle;
1954    }
1955
1956    n->Store->Size = elemSize;
1957    n->Store->Swizzle = _slang_var_swizzle(elemSize, 0);
1958
1959    return NULL; /* no instruction */
1960 }
1961
1962
1963 /**
1964  * Resolve storage for accessing a structure field.
1965  */
1966 static struct prog_instruction *
1967 emit_struct_field(slang_emit_info *emitInfo, slang_ir_node *n)
1968 {
1969    slang_ir_storage *root = n->Store;
1970    GLint fieldOffset, fieldSize;
1971
1972    assert(n->Opcode == IR_FIELD);
1973
1974    assert(!root->Parent);
1975    while (root->Parent)
1976       root = root->Parent;
1977
1978    /* If this is the field of a state var, allocate constant/uniform
1979     * storage for it now if we haven't already.
1980     * Note that we allocate storage (uniform/constant slots) for state
1981     * variables here rather than at declaration time so we only allocate
1982     * space for the ones that we actually use!
1983     */
1984    if (root->File == PROGRAM_STATE_VAR) {
1985       GLboolean direct;
1986       GLint index = _slang_alloc_statevar(n, emitInfo->prog->Parameters, &direct);
1987       if (index < 0) {
1988          slang_info_log_error(emitInfo->log, "Error parsing state variable");
1989          return NULL;
1990       }
1991       if (direct) {
1992          root->Index = index;
1993          return NULL; /* all done */
1994       }
1995    }
1996
1997    /* do codegen for struct */
1998    emit(emitInfo, n->Children[0]);
1999    assert(n->Children[0]->Store->Index >= 0);
2000
2001
2002    fieldOffset = n->Store->Index;
2003    fieldSize = n->Store->Size;
2004
2005    _slang_copy_ir_storage(n->Store, n->Children[0]->Store);
2006
2007    n->Store->Index = n->Children[0]->Store->Index + fieldOffset / 4;
2008    n->Store->Size = fieldSize;
2009
2010    switch (fieldSize) {
2011    case 1:
2012       {
2013          GLint swz = fieldOffset % 4;
2014          n->Store->Swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz);
2015       }
2016       break;
2017    case 2:
2018       n->Store->Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
2019                                         SWIZZLE_NIL, SWIZZLE_NIL);
2020       break;
2021    case 3:
2022       n->Store->Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y,
2023                                         SWIZZLE_Z, SWIZZLE_NIL);
2024       break;
2025    default:
2026       n->Store->Swizzle = SWIZZLE_XYZW;
2027    }
2028
2029    assert(n->Store->Index >= 0);
2030
2031    return NULL; /* no instruction */
2032 }
2033
2034
2035 /**
2036  * Emit code for a variable declaration.
2037  * This usually doesn't result in any code generation, but just
2038  * memory allocation.
2039  */
2040 static struct prog_instruction *
2041 emit_var_decl(slang_emit_info *emitInfo, slang_ir_node *n)
2042 {
2043    assert(n->Store);
2044    assert(n->Store->File != PROGRAM_UNDEFINED);
2045    assert(n->Store->Size > 0);
2046    /*assert(n->Store->Index < 0);*/
2047
2048    if (!n->Var || n->Var->isTemp) {
2049       /* a nameless/temporary variable, will be freed after first use */
2050       /*NEW*/
2051       if (n->Store->Index < 0 && !_slang_alloc_temp(emitInfo->vt, n->Store)) {
2052          slang_info_log_error(emitInfo->log,
2053                               "Ran out of registers, too many temporaries");
2054          return NULL;
2055       }
2056    }
2057    else {
2058       /* a regular variable */
2059       _slang_add_variable(emitInfo->vt, n->Var);
2060       if (!_slang_alloc_var(emitInfo->vt, n->Store)) {
2061          slang_info_log_error(emitInfo->log,
2062                               "Ran out of registers, too many variables");
2063          return NULL;
2064       }
2065       /*
2066         printf("IR_VAR_DECL %s %d store %p\n",
2067         (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
2068       */
2069       assert(n->Var->store == n->Store);
2070    }
2071    if (emitInfo->EmitComments) {
2072       /* emit NOP with comment describing the variable's storage location */
2073       char s[1000];
2074       sprintf(s, "TEMP[%d]%s = variable %s (size %d)",
2075               n->Store->Index,
2076               _mesa_swizzle_string(n->Store->Swizzle, 0, GL_FALSE),
2077               (n->Var ? (char *) n->Var->a_name : "anonymous"),
2078               n->Store->Size);
2079       emit_comment(emitInfo, s);
2080    }
2081    return NULL;
2082 }
2083
2084
2085 /**
2086  * Emit code for a reference to a variable.
2087  * Actually, no code is generated but we may do some memory allocation.
2088  * In particular, state vars (uniforms) are allocated on an as-needed basis.
2089  */
2090 static struct prog_instruction *
2091 emit_var_ref(slang_emit_info *emitInfo, slang_ir_node *n)
2092 {
2093    assert(n->Store);
2094    assert(n->Store->File != PROGRAM_UNDEFINED);
2095
2096    if (n->Store->File == PROGRAM_STATE_VAR && n->Store->Index < 0) {
2097       GLboolean direct;
2098       GLint index = _slang_alloc_statevar(n, emitInfo->prog->Parameters, &direct);
2099       if (index < 0) {
2100          /* error */
2101          char s[100];
2102          _mesa_snprintf(s, sizeof(s), "Undefined variable '%s'",
2103                         (char *) n->Var->a_name);
2104          slang_info_log_error(emitInfo->log, s);
2105          return NULL;
2106       }
2107
2108       n->Store->Index = index;
2109    }
2110    else if (n->Store->File == PROGRAM_UNIFORM ||
2111             n->Store->File == PROGRAM_SAMPLER) {
2112       /* mark var as used */
2113       _mesa_use_uniform(emitInfo->prog->Parameters, (char *) n->Var->a_name);
2114    }
2115
2116    if (n->Store->Index < 0) {
2117       /* probably ran out of registers */
2118       return NULL;
2119    }
2120    assert(n->Store->Size > 0);
2121
2122    return NULL;
2123 }
2124
2125
2126 static struct prog_instruction *
2127 emit(slang_emit_info *emitInfo, slang_ir_node *n)
2128 {
2129    struct prog_instruction *inst;
2130    if (!n)
2131       return NULL;
2132
2133    if (emitInfo->log->error_flag) {
2134       return NULL;
2135    }
2136
2137    switch (n->Opcode) {
2138    case IR_SEQ:
2139       /* sequence of two sub-trees */
2140       assert(n->Children[0]);
2141       assert(n->Children[1]);
2142       emit(emitInfo, n->Children[0]);
2143       if (emitInfo->log->error_flag)
2144          return NULL;
2145       inst = emit(emitInfo, n->Children[1]);
2146 #if 0
2147       assert(!n->Store);
2148 #endif
2149       n->Store = n->Children[1]->Store;
2150       return inst;
2151
2152    case IR_SCOPE:
2153       /* new variable scope */
2154       _slang_push_var_table(emitInfo->vt);
2155       inst = emit(emitInfo, n->Children[0]);
2156       _slang_pop_var_table(emitInfo->vt);
2157       return inst;
2158
2159    case IR_VAR_DECL:
2160       /* Variable declaration - allocate a register for it */
2161       inst = emit_var_decl(emitInfo, n);
2162       return inst;
2163
2164    case IR_VAR:
2165       /* Reference to a variable
2166        * Storage should have already been resolved/allocated.
2167        */
2168       return emit_var_ref(emitInfo, n);
2169
2170    case IR_ELEMENT:
2171       return emit_array_element(emitInfo, n);
2172    case IR_FIELD:
2173       return emit_struct_field(emitInfo, n);
2174    case IR_SWIZZLE:
2175       return emit_swizzle(emitInfo, n);
2176
2177    /* Simple arithmetic */
2178    /* unary */
2179    case IR_MOVE:
2180    case IR_RSQ:
2181    case IR_RCP:
2182    case IR_FLOOR:
2183    case IR_FRAC:
2184    case IR_F_TO_I:
2185    case IR_I_TO_F:
2186    case IR_ABS:
2187    case IR_SIN:
2188    case IR_COS:
2189    case IR_DDX:
2190    case IR_DDY:
2191    case IR_EXP:
2192    case IR_EXP2:
2193    case IR_LOG2:
2194    case IR_NOISE1:
2195    case IR_NOISE2:
2196    case IR_NOISE3:
2197    case IR_NOISE4:
2198    case IR_NRM4:
2199    case IR_NRM3:
2200    /* binary */
2201    case IR_ADD:
2202    case IR_SUB:
2203    case IR_MUL:
2204    case IR_DOT4:
2205    case IR_DOT3:
2206    case IR_DOT2:
2207    case IR_CROSS:
2208    case IR_MIN:
2209    case IR_MAX:
2210    case IR_SEQUAL:
2211    case IR_SNEQUAL:
2212    case IR_SGE:
2213    case IR_SGT:
2214    case IR_SLE:
2215    case IR_SLT:
2216    case IR_POW:
2217    /* trinary operators */
2218    case IR_LRP:
2219       return emit_arith(emitInfo, n);
2220
2221    case IR_EQUAL:
2222    case IR_NOTEQUAL:
2223       return emit_compare(emitInfo, n);
2224
2225    case IR_CLAMP:
2226       return emit_clamp(emitInfo, n);
2227    case IR_TEX:
2228    case IR_TEXB:
2229    case IR_TEXP:
2230       return emit_tex(emitInfo, n);
2231    case IR_NEG:
2232       return emit_negation(emitInfo, n);
2233    case IR_FLOAT:
2234       /* find storage location for this float constant */
2235       n->Store->Index = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
2236                                                    n->Value,
2237                                                    n->Store->Size,
2238                                                    &n->Store->Swizzle);
2239       if (n->Store->Index < 0) {
2240          slang_info_log_error(emitInfo->log, "Ran out of space for constants");
2241          return NULL;
2242       }
2243       return NULL;
2244
2245    case IR_COPY:
2246       return emit_copy(emitInfo, n);
2247
2248    case IR_COND:
2249       return emit_cond(emitInfo, n);
2250
2251    case IR_NOT:
2252       return emit_not(emitInfo, n);
2253
2254    case IR_LABEL:
2255       return emit_label(emitInfo, n);
2256
2257    case IR_KILL:
2258       return emit_kill(emitInfo);
2259
2260    case IR_CALL:
2261       /* new variable scope for subroutines/function calls */
2262       _slang_push_var_table(emitInfo->vt);
2263       inst = emit_fcall(emitInfo, n);
2264       _slang_pop_var_table(emitInfo->vt);
2265       return inst;
2266
2267    case IR_IF:
2268       return emit_if(emitInfo, n);
2269
2270    case IR_LOOP:
2271       return emit_loop(emitInfo, n);
2272    case IR_BREAK_IF_TRUE:
2273    case IR_CONT_IF_TRUE:
2274       return emit_cont_break_if_true(emitInfo, n);
2275    case IR_BREAK:
2276       /* fall-through */
2277    case IR_CONT:
2278       return emit_cont_break(emitInfo, n);
2279
2280    case IR_BEGIN_SUB:
2281       return new_instruction(emitInfo, OPCODE_BGNSUB);
2282    case IR_END_SUB:
2283       return new_instruction(emitInfo, OPCODE_ENDSUB);
2284    case IR_RETURN:
2285       return emit_return(emitInfo, n);
2286
2287    case IR_NOP:
2288       return NULL;
2289
2290    default:
2291       _mesa_problem(NULL, "Unexpected IR opcode in emit()\n");
2292    }
2293    return NULL;
2294 }
2295
2296
2297 /**
2298  * After code generation, any subroutines will be in separate program
2299  * objects.  This function appends all the subroutines onto the main
2300  * program and resolves the linking of all the branch/call instructions.
2301  * XXX this logic should really be part of the linking process...
2302  */
2303 static void
2304 _slang_resolve_subroutines(slang_emit_info *emitInfo)
2305 {
2306    GET_CURRENT_CONTEXT(ctx);
2307    struct gl_program *mainP = emitInfo->prog;
2308    GLuint *subroutineLoc, i, total;
2309
2310    subroutineLoc
2311       = (GLuint *) _mesa_malloc(emitInfo->NumSubroutines * sizeof(GLuint));
2312
2313    /* total number of instructions */
2314    total = mainP->NumInstructions;
2315    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2316       subroutineLoc[i] = total;
2317       total += emitInfo->Subroutines[i]->NumInstructions;
2318    }
2319
2320    /* adjust BranchTargets within the functions */
2321    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2322       struct gl_program *sub = emitInfo->Subroutines[i];
2323       GLuint j;
2324       for (j = 0; j < sub->NumInstructions; j++) {
2325          struct prog_instruction *inst = sub->Instructions + j;
2326          if (inst->Opcode != OPCODE_CAL && inst->BranchTarget >= 0) {
2327             inst->BranchTarget += subroutineLoc[i];
2328          }
2329       }
2330    }
2331
2332    /* append subroutines' instructions after main's instructions */
2333    mainP->Instructions = _mesa_realloc_instructions(mainP->Instructions,
2334                                                     mainP->NumInstructions,
2335                                                     total);
2336    mainP->NumInstructions = total;
2337    for (i = 0; i < emitInfo->NumSubroutines; i++) {
2338       struct gl_program *sub = emitInfo->Subroutines[i];
2339       _mesa_copy_instructions(mainP->Instructions + subroutineLoc[i],
2340                               sub->Instructions,
2341                               sub->NumInstructions);
2342       /* delete subroutine code */
2343       sub->Parameters = NULL; /* prevent double-free */
2344       _mesa_reference_program(ctx, &emitInfo->Subroutines[i], NULL);
2345    }
2346
2347    /* free subroutine list */
2348    if (emitInfo->Subroutines) {
2349       _mesa_free(emitInfo->Subroutines);
2350       emitInfo->Subroutines = NULL;
2351    }
2352    emitInfo->NumSubroutines = 0;
2353
2354    /* Examine CAL instructions.
2355     * At this point, the BranchTarget field of the CAL instruction is
2356     * the number/id of the subroutine to call (an index into the
2357     * emitInfo->Subroutines list).
2358     * Translate that into an actual instruction location now.
2359     */
2360    for (i = 0; i < mainP->NumInstructions; i++) {
2361       struct prog_instruction *inst = mainP->Instructions + i;
2362       if (inst->Opcode == OPCODE_CAL) {
2363          const GLuint f = inst->BranchTarget;
2364          inst->BranchTarget = subroutineLoc[f];
2365       }
2366    }
2367
2368    _mesa_free(subroutineLoc);
2369 }
2370
2371
2372
2373
2374 GLboolean
2375 _slang_emit_code(slang_ir_node *n, slang_var_table *vt,
2376                  struct gl_program *prog, GLboolean withEnd,
2377                  slang_info_log *log)
2378 {
2379    GET_CURRENT_CONTEXT(ctx);
2380    GLboolean success;
2381    slang_emit_info emitInfo;
2382    GLuint maxUniforms;
2383
2384    emitInfo.log = log;
2385    emitInfo.vt = vt;
2386    emitInfo.prog = prog;
2387    emitInfo.Subroutines = NULL;
2388    emitInfo.NumSubroutines = 0;
2389    emitInfo.MaxInstructions = prog->NumInstructions;
2390
2391    emitInfo.EmitHighLevelInstructions = ctx->Shader.EmitHighLevelInstructions;
2392    emitInfo.EmitCondCodes = ctx->Shader.EmitCondCodes;
2393    emitInfo.EmitComments = ctx->Shader.EmitComments;
2394    emitInfo.EmitBeginEndSub = GL_TRUE;
2395
2396    if (!emitInfo.EmitCondCodes) {
2397       emitInfo.EmitHighLevelInstructions = GL_TRUE;
2398    }
2399
2400    /* Check uniform/constant limits */
2401    if (prog->Target == GL_FRAGMENT_PROGRAM_ARB) {
2402       maxUniforms = ctx->Const.FragmentProgram.MaxUniformComponents / 4;
2403    }
2404    else {
2405       assert(prog->Target == GL_VERTEX_PROGRAM_ARB);
2406       maxUniforms = ctx->Const.VertexProgram.MaxUniformComponents / 4;
2407    }
2408    if (prog->Parameters->NumParameters > maxUniforms) {
2409       slang_info_log_error(log, "Constant/uniform register limit exceeded");
2410       return GL_FALSE;
2411    }
2412
2413    (void) emit(&emitInfo, n);
2414
2415    /* finish up by adding the END opcode to program */
2416    if (withEnd) {
2417       struct prog_instruction *inst;
2418       inst = new_instruction(&emitInfo, OPCODE_END);
2419    }
2420
2421    _slang_resolve_subroutines(&emitInfo);
2422
2423    success = GL_TRUE;
2424
2425 #if 0
2426    printf("*********** End emit code (%u inst):\n", prog->NumInstructions);
2427    _mesa_print_program(prog);
2428    _mesa_print_program_parameters(ctx,prog);
2429 #endif
2430
2431    return success;
2432 }