src/mesa/shader/slang/slang_emit.c

   1 /*
   2  * Mesa 3-D graphics library
   3  * Version:  6.5.3
   4  *
   5  * Copyright (C) 2005-2007  Brian Paul   All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included
  15  * in all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  18  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  21  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  22  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24
  25 /**
  26  * \file slang_emit.c
  27  * Emit program instructions (PI code) from IR trees.
  28  * \author Brian Paul
  29  */
  30
  31 /***
  32  *** NOTES
  33  ***
  34  *** To emit GPU instructions, we basically just do an in-order traversal
  35  *** of the IR tree.
  36  ***/
  37
  38
  39 #include "imports.h"
  40 #include "context.h"
  41 #include "macros.h"
  42 #include "program.h"
  43 #include "prog_instruction.h"
  44 #include "prog_parameter.h"
  45 #include "prog_print.h"
  46 #include "slang_builtin.h"
  47 #include "slang_emit.h"
  48
  49
  50 #define PEEPHOLE_OPTIMIZATIONS 1
  51 #define ANNOTATE 0
  52
  53
  54 typedef struct
  55 {
  56    slang_info_log *log;
  57    slang_var_table *vt;
  58    struct gl_program *prog;
  59    struct gl_program **Subroutines;
  60    GLuint NumSubroutines;
  61
  62    /* code-gen options */
  63    GLboolean EmitHighLevelInstructions;
  64    GLboolean EmitCondCodes;
  65    GLboolean EmitComments;
  66    GLboolean EmitBeginEndSub; /* XXX TEMPORARY */
  67 } slang_emit_info;
  68
  69
  70
  71 static struct gl_program *
  72 new_subroutine(slang_emit_info *emitInfo, GLuint *id)
  73 {
  74    GET_CURRENT_CONTEXT(ctx);
  75    const GLuint n = emitInfo->NumSubroutines;
  76
  77    emitInfo->Subroutines = (struct gl_program **)
  78       _mesa_realloc(emitInfo->Subroutines,
  79                     n * sizeof(struct gl_program),
  80                     (n + 1) * sizeof(struct gl_program));
  81    emitInfo->Subroutines[n] = _mesa_new_program(ctx, emitInfo->prog->Target, 0);
  82    emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters;
  83    emitInfo->NumSubroutines++;
  84    *id = n;
  85    return emitInfo->Subroutines[n];
  86 }
  87
  88
  89 /**
  90  * Convert a writemask to a swizzle.  Used for testing cond codes because
  91  * we only want to test the cond code component(s) that was set by the
  92  * previous instruction.
  93  */
  94 static GLuint
  95 writemask_to_swizzle(GLuint writemask)
  96 {
  97    if (writemask == WRITEMASK_X)
  98       return SWIZZLE_XXXX;
  99    if (writemask == WRITEMASK_Y)
 100       return SWIZZLE_YYYY;
 101    if (writemask == WRITEMASK_Z)
 102       return SWIZZLE_ZZZZ;
 103    if (writemask == WRITEMASK_W)
 104       return SWIZZLE_WWWW;
 105    return SWIZZLE_XYZW;  /* shouldn't be hit */
 106 }
 107
 108
 109 /**
 110  * Swizzle a swizzle.  That is, return swz2(swz1)
 111  */
 112 static GLuint
 113 swizzle_swizzle(GLuint swz1, GLuint swz2)
 114 {
 115    GLuint i, swz, s[4];
 116    for (i = 0; i < 4; i++) {
 117       GLuint c = GET_SWZ(swz2, i);
 118       s[i] = GET_SWZ(swz1, c);
 119    }
 120    swz = MAKE_SWIZZLE4(s[0], s[1], s[2], s[3]);
 121    return swz;
 122 }
 123
 124
 125 slang_ir_storage *
 126 _slang_new_ir_storage(enum register_file file, GLint index, GLint size)
 127 {
 128    slang_ir_storage *st;
 129    st = (slang_ir_storage *) _mesa_calloc(sizeof(slang_ir_storage));
 130    if (st) {
 131       st->File = file;
 132       st->Index = index;
 133       st->Size = size;
 134       st->Swizzle = SWIZZLE_NOOP;
 135    }
 136    return st;
 137 }
 138
 139
 140 /**
 141  * Allocate temporary storage for an intermediate result (such as for
 142  * a multiply or add, etc.
 143  */
 144 static GLboolean
 145 alloc_temp_storage(slang_emit_info *emitInfo, slang_ir_node *n, GLint size)
 146 {
 147    assert(!n->Var);
 148    assert(!n->Store);
 149    assert(size > 0);
 150    n->Store = _slang_new_ir_storage(PROGRAM_TEMPORARY, -1, size);
 151    if (!_slang_alloc_temp(emitInfo->vt, n->Store)) {
 152       slang_info_log_error(emitInfo->log,
 153                            "Ran out of registers, too many temporaries");
 154       return GL_FALSE;
 155    }
 156    return GL_TRUE;
 157 }
 158
 159
 160 /**
 161  * Free temporary storage, if n->Store is, in fact, temp storage.
 162  * Otherwise, no-op.
 163  */
 164 static void
 165 free_temp_storage(slang_var_table *vt, slang_ir_node *n)
 166 {
 167    if (n->Store->File == PROGRAM_TEMPORARY &&
 168        n->Store->Index >= 0 &&
 169        n->Opcode != IR_SWIZZLE) {
 170       if (_slang_is_temp(vt, n->Store)) {
 171          _slang_free_temp(vt, n->Store);
 172          n->Store->Index = -1;
 173          n->Store->Size = -1;
 174          /*_mesa_free(n->Store);*/ /* XXX leak */
 175          n->Store = NULL;
 176       }
 177    }
 178 }
 179
 180
 181 /**
 182  * Convert IR storage to an instruction dst register.
 183  */
 184 static void
 185 storage_to_dst_reg(struct prog_dst_register *dst, const slang_ir_storage *st,
 186                    GLuint writemask)
 187 {
 188    assert(st->Index >= 0);
 189    dst->File = st->File;
 190    dst->Index = st->Index;
 191    assert(st->File != PROGRAM_UNDEFINED);
 192    assert(st->Size >= 1);
 193    assert(st->Size <= 4);
 194    if (st->Size == 1) {
 195       GLuint comp = GET_SWZ(st->Swizzle, 0);
 196       assert(comp < 4);
 197       dst->WriteMask = WRITEMASK_X << comp;
 198    }
 199    else {
 200       dst->WriteMask = writemask;
 201    }
 202 }
 203
 204
 205 /**
 206  * Convert IR storage to an instruction src register.
 207  */
 208 static void
 209 storage_to_src_reg(struct prog_src_register *src, const slang_ir_storage *st)
 210 {
 211    static const GLuint defaultSwizzle[4] = {
 212       MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
 213       MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
 214       MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
 215       MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W)
 216    };
 217    assert(st->File >= 0);
 218    assert(st->File < PROGRAM_UNDEFINED);
 219    assert(st->Size >= 1);
 220    assert(st->Size <= 4);
 221    src->File = st->File;
 222    src->Index = st->Index;
 223    if (st->Swizzle != SWIZZLE_NOOP)
 224       src->Swizzle = st->Swizzle;
 225    else
 226       src->Swizzle = defaultSwizzle[st->Size - 1]; /*XXX really need this?*/
 227
 228    assert(GET_SWZ(src->Swizzle, 0) <= 3);
 229    assert(GET_SWZ(src->Swizzle, 1) <= 3);
 230    assert(GET_SWZ(src->Swizzle, 2) <= 3);
 231    assert(GET_SWZ(src->Swizzle, 3) <= 3);
 232 }
 233
 234
 235 /*
 236  * Setup an instrucion src register to point to a scalar constant.
 237  */
 238 static void
 239 constant_to_src_reg(struct prog_src_register *src, GLfloat val,
 240                     slang_emit_info *emitInfo)
 241 {
 242    GLuint zeroSwizzle;
 243    GLint zeroReg;
 244    GLfloat value[4];
 245
 246    value[0] = val;
 247    zeroReg = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
 248                                         value, 1, &zeroSwizzle);
 249    assert(zeroReg >= 0);
 250
 251    src->File = PROGRAM_CONSTANT;
 252    src->Index = zeroReg;
 253    src->Swizzle = zeroSwizzle;
 254 }
 255
 256
 257 /**
 258  * Add new instruction at end of given program.
 259  * \param prog  the program to append instruction onto
 260  * \param opcode  opcode for the new instruction
 261  * \return pointer to the new instruction
 262  */
 263 static struct prog_instruction *
 264 new_instruction(slang_emit_info *emitInfo, gl_inst_opcode opcode)
 265 {
 266    struct gl_program *prog = emitInfo->prog;
 267    struct prog_instruction *inst;
 268
 269 #if 0
 270    /* print prev inst */
 271    if (prog->NumInstructions > 0) {
 272       _mesa_print_instruction(prog->Instructions + prog->NumInstructions - 1);
 273    }
 274 #endif
 275    prog->Instructions = _mesa_realloc_instructions(prog->Instructions,
 276                                                    prog->NumInstructions,
 277                                                    prog->NumInstructions + 1);
 278    inst = prog->Instructions + prog->NumInstructions;
 279    prog->NumInstructions++;
 280    _mesa_init_instructions(inst, 1);
 281    inst->Opcode = opcode;
 282    inst->BranchTarget = -1; /* invalid */
 283    /*
 284    printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
 285           _mesa_opcode_string(inst->Opcode));
 286    */
 287    return inst;
 288 }
 289
 290
 291 /**
 292  * Return pointer to last instruction in program.
 293  */
 294 static struct prog_instruction *
 295 prev_instruction(slang_emit_info *emitInfo)
 296 {
 297    struct gl_program *prog = emitInfo->prog;
 298    if (prog->NumInstructions == 0)
 299       return NULL;
 300    else
 301       return prog->Instructions + prog->NumInstructions - 1;
 302 }
 303
 304
 305 static struct prog_instruction *
 306 emit(slang_emit_info *emitInfo, slang_ir_node *n);
 307
 308
 309 /**
 310  * Return an annotation string for given node's storage.
 311  */
 312 static char *
 313 storage_annotation(const slang_ir_node *n, const struct gl_program *prog)
 314 {
 315 #if ANNOTATE
 316    const slang_ir_storage *st = n->Store;
 317    static char s[100] = "";
 318
 319    if (!st)
 320       return _mesa_strdup("");
 321
 322    switch (st->File) {
 323    case PROGRAM_CONSTANT:
 324       if (st->Index >= 0) {
 325          const GLfloat *val = prog->Parameters->ParameterValues[st->Index];
 326          if (st->Swizzle == SWIZZLE_NOOP)
 327             sprintf(s, "{%g, %g, %g, %g}", val[0], val[1], val[2], val[3]);
 328          else {
 329             sprintf(s, "%g", val[GET_SWZ(st->Swizzle, 0)]);
 330          }
 331       }
 332       break;
 333    case PROGRAM_TEMPORARY:
 334       if (n->Var)
 335          sprintf(s, "%s", (char *) n->Var->a_name);
 336       else
 337          sprintf(s, "t[%d]", st->Index);
 338       break;
 339    case PROGRAM_STATE_VAR:
 340    case PROGRAM_UNIFORM:
 341       sprintf(s, "%s", prog->Parameters->Parameters[st->Index].Name);
 342       break;
 343    case PROGRAM_VARYING:
 344       sprintf(s, "%s", prog->Varying->Parameters[st->Index].Name);
 345       break;
 346    case PROGRAM_INPUT:
 347       sprintf(s, "input[%d]", st->Index);
 348       break;
 349    case PROGRAM_OUTPUT:
 350       sprintf(s, "output[%d]", st->Index);
 351       break;
 352    default:
 353       s[0] = 0;
 354    }
 355    return _mesa_strdup(s);
 356 #else
 357    return NULL;
 358 #endif
 359 }
 360
 361
 362 /**
 363  * Return an annotation string for an instruction.
 364  */
 365 static char *
 366 instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
 367                        char *srcAnnot0, char *srcAnnot1, char *srcAnnot2)
 368 {
 369 #if ANNOTATE
 370    const char *operator;
 371    char *s;
 372    int len = 50;
 373
 374    if (dstAnnot)
 375       len += strlen(dstAnnot);
 376    else
 377       dstAnnot = _mesa_strdup("");
 378
 379    if (srcAnnot0)
 380       len += strlen(srcAnnot0);
 381    else
 382       srcAnnot0 = _mesa_strdup("");
 383
 384    if (srcAnnot1)
 385       len += strlen(srcAnnot1);
 386    else
 387       srcAnnot1 = _mesa_strdup("");
 388
 389    if (srcAnnot2)
 390       len += strlen(srcAnnot2);
 391    else
 392       srcAnnot2 = _mesa_strdup("");
 393
 394    switch (opcode) {
 395    case OPCODE_ADD:
 396       operator = "+";
 397       break;
 398    case OPCODE_SUB:
 399       operator = "-";
 400       break;
 401    case OPCODE_MUL:
 402       operator = "*";
 403       break;
 404    case OPCODE_DP3:
 405       operator = "DP3";
 406       break;
 407    case OPCODE_DP4:
 408       operator = "DP4";
 409       break;
 410    case OPCODE_XPD:
 411       operator = "XPD";
 412       break;
 413    case OPCODE_RSQ:
 414       operator = "RSQ";
 415       break;
 416    case OPCODE_SGT:
 417       operator = ">";
 418       break;
 419    default:
 420       operator = ",";
 421    }
 422
 423    s = (char *) malloc(len);
 424    sprintf(s, "%s = %s %s %s %s", dstAnnot,
 425            srcAnnot0, operator, srcAnnot1, srcAnnot2);
 426    assert(_mesa_strlen(s) < len);
 427
 428    free(dstAnnot);
 429    free(srcAnnot0);
 430    free(srcAnnot1);
 431    free(srcAnnot2);
 432
 433    return s;
 434 #else
 435    return NULL;
 436 #endif
 437 }
 438
 439
 440 /**
 441  * Emit an instruction that's just a comment.
 442  */
 443 static struct prog_instruction *
 444 emit_comment(slang_emit_info *emitInfo, const char *s)
 445 {
 446    struct prog_instruction *inst = new_instruction(emitInfo, OPCODE_NOP);
 447    if (inst) {
 448       inst->Comment = _mesa_strdup(s);
 449    }
 450    return inst;
 451 }
 452
 453
 454 /**
 455  * Generate code for a simple arithmetic instruction.
 456  * Either 1, 2 or 3 operands.
 457  */
 458 static struct prog_instruction *
 459 emit_arith(slang_emit_info *emitInfo, slang_ir_node *n)
 460 {
 461    struct prog_instruction *inst;
 462    const slang_ir_info *info = _slang_ir_info(n->Opcode);
 463    char *srcAnnot[3], *dstAnnot;
 464    GLuint i;
 465
 466    assert(info);
 467    assert(info->InstOpcode != OPCODE_NOP);
 468
 469    srcAnnot[0] = srcAnnot[1] = srcAnnot[2] = dstAnnot = NULL;
 470
 471 #if PEEPHOLE_OPTIMIZATIONS
 472    /* Look for MAD opportunity */
 473    if (info->NumParams == 2 &&
 474        n->Opcode == IR_ADD && n->Children[0]->Opcode == IR_MUL) {
 475       /* found pattern IR_ADD(IR_MUL(A, B), C) */
 476       emit(emitInfo, n->Children[0]->Children[0]);  /* A */
 477       emit(emitInfo, n->Children[0]->Children[1]);  /* B */
 478       emit(emitInfo, n->Children[1]);  /* C */
 479       /* generate MAD instruction */
 480       inst = new_instruction(emitInfo, OPCODE_MAD);
 481       /* operands: A, B, C: */
 482       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Children[0]->Store);
 483       storage_to_src_reg(&inst->SrcReg[1], n->Children[0]->Children[1]->Store);
 484       storage_to_src_reg(&inst->SrcReg[2], n->Children[1]->Store);
 485       free_temp_storage(emitInfo->vt, n->Children[0]->Children[0]);
 486       free_temp_storage(emitInfo->vt, n->Children[0]->Children[1]);
 487       free_temp_storage(emitInfo->vt, n->Children[1]);
 488    }
 489    else if (info->NumParams == 2 &&
 490             n->Opcode == IR_ADD && n->Children[1]->Opcode == IR_MUL) {
 491       /* found pattern IR_ADD(A, IR_MUL(B, C)) */
 492       emit(emitInfo, n->Children[0]);  /* A */
 493       emit(emitInfo, n->Children[1]->Children[0]);  /* B */
 494       emit(emitInfo, n->Children[1]->Children[1]);  /* C */
 495       /* generate MAD instruction */
 496       inst = new_instruction(emitInfo, OPCODE_MAD);
 497       /* operands: B, C, A */
 498       storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Children[0]->Store);
 499       storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Children[1]->Store);
 500       storage_to_src_reg(&inst->SrcReg[2], n->Children[0]->Store);
 501       free_temp_storage(emitInfo->vt, n->Children[1]->Children[0]);
 502       free_temp_storage(emitInfo->vt, n->Children[1]->Children[1]);
 503       free_temp_storage(emitInfo->vt, n->Children[0]);
 504    }
 505    else
 506 #endif
 507    {
 508       /* normal case */
 509
 510       /* gen code for children */
 511       for (i = 0; i < info->NumParams; i++) {
 512          emit(emitInfo, n->Children[i]);
 513          if (!n->Children[i] || !n->Children[i]->Store) {
 514             /* error recovery */
 515             return NULL;
 516          }
 517       }
 518
 519       /* gen this instruction and src registers */
 520       inst = new_instruction(emitInfo, info->InstOpcode);
 521       for (i = 0; i < info->NumParams; i++)
 522          storage_to_src_reg(&inst->SrcReg[i], n->Children[i]->Store);
 523
 524       /* annotation */
 525       for (i = 0; i < info->NumParams; i++)
 526          srcAnnot[i] = storage_annotation(n->Children[i], emitInfo->prog);
 527
 528       /* free temps */
 529       for (i = 0; i < info->NumParams; i++)
 530          free_temp_storage(emitInfo->vt, n->Children[i]);
 531    }
 532
 533    /* result storage */
 534    if (!n->Store) {
 535       /* XXX this size isn't correct, it depends on the operands */
 536       if (!alloc_temp_storage(emitInfo, n, info->ResultSize))
 537          return NULL;
 538    }
 539    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 540
 541    dstAnnot = storage_annotation(n, emitInfo->prog);
 542
 543    inst->Comment = instruction_annotation(inst->Opcode, dstAnnot, srcAnnot[0],
 544                                           srcAnnot[1], srcAnnot[2]);
 545
 546    /*_mesa_print_instruction(inst);*/
 547    return inst;
 548 }
 549
 550
 551 /**
 552  * Emit code for == and != operators.  These could normally be handled
 553  * by emit_arith() except we need to be able to handle structure comparisons.
 554  */
 555 static struct prog_instruction *
 556 emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
 557 {
 558    struct prog_instruction *inst;
 559    GLint size;
 560
 561    assert(n->Opcode == IR_EQUAL || n->Opcode == IR_NOTEQUAL);
 562
 563    /* gen code for children */
 564    emit(emitInfo, n->Children[0]);
 565    emit(emitInfo, n->Children[1]);
 566
 567    assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);
 568    size = n->Children[0]->Store->Size;
 569
 570    if (size == 1) {
 571       gl_inst_opcode opcode;
 572
 573       if (!n->Store) {
 574          if (!alloc_temp_storage(emitInfo, n, 1))  /* 1 bool */
 575             return NULL;
 576       }
 577
 578       opcode = n->Opcode == IR_EQUAL ? OPCODE_SEQ : OPCODE_SNE;
 579       inst = new_instruction(emitInfo, opcode);
 580       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
 581       storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
 582       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 583    }
 584    else if (size <= 4) {
 585       GLuint swizzle;
 586       gl_inst_opcode dotOp;
 587
 588       assert(!n->Store);
 589       if (!n->Store) {
 590          if (!alloc_temp_storage(emitInfo, n, size))  /* 'size' bools */
 591             return NULL;
 592       }
 593
 594       if (size == 4) {
 595          dotOp = OPCODE_DP4;
 596          swizzle = SWIZZLE_XYZW;
 597       }
 598       else if (size == 3) {
 599          dotOp = OPCODE_DP3;
 600          swizzle = SWIZZLE_XYZW;
 601       }
 602       else {
 603          assert(size == 2);
 604          dotOp = OPCODE_DP3;
 605          swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
 606       }
 607
 608       /* Compute equality, inequality (tmp1 = (A ?= B)) */
 609       inst = new_instruction(emitInfo, OPCODE_SNE);
 610       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
 611       storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
 612       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 613       inst->Comment = _mesa_strdup("Compare values");
 614
 615       /* Compute tmp2 = DOT(tmp1, tmp1)  (reduction) */
 616       inst = new_instruction(emitInfo, dotOp);
 617       storage_to_src_reg(&inst->SrcReg[0], n->Store);
 618       storage_to_src_reg(&inst->SrcReg[1], n->Store);
 619       inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/
 620       free_temp_storage(emitInfo->vt, n); /* free tmp1 */
 621       if (!alloc_temp_storage(emitInfo, n, 1))  /* alloc tmp2 */
 622          return NULL;
 623       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 624       inst->Comment = _mesa_strdup("Reduce vec to bool");
 625
 626       if (n->Opcode == IR_EQUAL) {
 627          /* compute tmp2.x = !tmp2.x  via tmp2.x = (tmp2.x == 0) */
 628          inst = new_instruction(emitInfo, OPCODE_SEQ);
 629          storage_to_src_reg(&inst->SrcReg[0], n->Store);
 630          constant_to_src_reg(&inst->SrcReg[1], 0.0, emitInfo);
 631          storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 632          inst->Comment = _mesa_strdup("Invert true/false");
 633       }
 634    }
 635    else {
 636       /* size > 4, struct compare */
 637 #if 0
 638       GLint i, num = (n->Children[0]->Store->Size + 3) / 4;
 639       /*printf("BEGIN COMPARE size %d\n", num);*/
 640       for (i = 0; i < num; i++) {
 641          inst = new_instruction(emitInfo, opcode);
 642          inst->SrcReg[0].File = n->Children[0]->Store->File;
 643          inst->SrcReg[0].Index = n->Children[0]->Store->Index + i;
 644          inst->SrcReg[1].File = n->Children[1]->Store->File;
 645          inst->SrcReg[1].Index = n->Children[1]->Store->Index + i;
 646          inst->DstReg.File = n->Store->File;
 647          inst->DstReg.Index = n->Store->Index;
 648
 649          inst->CondUpdate = 1; /* update cond code */
 650          if (i > 0) {
 651             inst->DstReg.CondMask = COND_NE; /* update if !=0 */
 652          }
 653          /*_mesa_print_instruction(inst);*/
 654       }
 655       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 656 #endif
 657       _mesa_problem(NULL, "struct comparison not implemented yet");
 658       inst = NULL;
 659    }
 660
 661    /* free temps */
 662    free_temp_storage(emitInfo->vt, n->Children[0]);
 663    free_temp_storage(emitInfo->vt, n->Children[1]);
 664
 665    return inst;
 666 }
 667
 668
 669
 670 /**
 671  * Generate code for an IR_CLAMP instruction.
 672  */
 673 static struct prog_instruction *
 674 emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n)
 675 {
 676    struct prog_instruction *inst;
 677
 678    assert(n->Opcode == IR_CLAMP);
 679    /* ch[0] = value
 680     * ch[1] = min limit
 681     * ch[2] = max limit
 682     */
 683
 684    inst = emit(emitInfo, n->Children[0]);
 685
 686    /* If lower limit == 0.0 and upper limit == 1.0,
 687     *    set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
 688     * Else,
 689     *    emit OPCODE_MIN, OPCODE_MAX sequence.
 690     */
 691 #if 0
 692    /* XXX this isn't quite finished yet */
 693    if (n->Children[1]->Opcode == IR_FLOAT &&
 694        n->Children[1]->Value[0] == 0.0 &&
 695        n->Children[1]->Value[1] == 0.0 &&
 696        n->Children[1]->Value[2] == 0.0 &&
 697        n->Children[1]->Value[3] == 0.0 &&
 698        n->Children[2]->Opcode == IR_FLOAT &&
 699        n->Children[2]->Value[0] == 1.0 &&
 700        n->Children[2]->Value[1] == 1.0 &&
 701        n->Children[2]->Value[2] == 1.0 &&
 702        n->Children[2]->Value[3] == 1.0) {
 703       if (!inst) {
 704          inst = prev_instruction(prog);
 705       }
 706       if (inst && inst->Opcode != OPCODE_NOP) {
 707          /* and prev instruction's DstReg matches n->Children[0]->Store */
 708          inst->SaturateMode = SATURATE_ZERO_ONE;
 709          n->Store = n->Children[0]->Store;
 710          return inst;
 711       }
 712    }
 713 #endif
 714
 715    if (!n->Store)
 716       if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
 717          return NULL;
 718
 719    emit(emitInfo, n->Children[1]);
 720    emit(emitInfo, n->Children[2]);
 721
 722    /* tmp = max(ch[0], ch[1]) */
 723    inst = new_instruction(emitInfo, OPCODE_MAX);
 724    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 725    storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
 726    storage_to_src_reg(&inst->SrcReg[1], n->Children[1]->Store);
 727
 728    /* tmp = min(tmp, ch[2]) */
 729    inst = new_instruction(emitInfo, OPCODE_MIN);
 730    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 731    storage_to_src_reg(&inst->SrcReg[0], n->Store);
 732    storage_to_src_reg(&inst->SrcReg[1], n->Children[2]->Store);
 733
 734    return inst;
 735 }
 736
 737
 738 static struct prog_instruction *
 739 emit_negation(slang_emit_info *emitInfo, slang_ir_node *n)
 740 {
 741    /* Implement as MOV dst, -src; */
 742    /* XXX we could look at the previous instruction and in some circumstances
 743     * modify it to accomplish the negation.
 744     */
 745    struct prog_instruction *inst;
 746
 747    emit(emitInfo, n->Children[0]);
 748
 749    if (!n->Store)
 750       if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
 751          return NULL;
 752
 753    inst = new_instruction(emitInfo, OPCODE_MOV);
 754    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 755    storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
 756    inst->SrcReg[0].NegateBase = NEGATE_XYZW;
 757    return inst;
 758 }
 759
 760
 761 static struct prog_instruction *
 762 emit_label(slang_emit_info *emitInfo, const slang_ir_node *n)
 763 {
 764    assert(n->Label);
 765 #if 0
 766    /* XXX this fails in loop tail code - investigate someday */
 767    assert(_slang_label_get_location(n->Label) < 0);
 768    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
 769                              emitInfo->prog);
 770 #else
 771    if (_slang_label_get_location(n->Label) < 0)
 772       _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
 773                                 emitInfo->prog);
 774 #endif
 775    return NULL;
 776 }
 777
 778
 779 /**
 780  * Emit code for an inlined function call (subroutine).
 781  */
 782 static struct prog_instruction *
 783 emit_func(slang_emit_info *emitInfo, slang_ir_node *n)
 784 {
 785    struct gl_program *progSave;
 786    struct prog_instruction *inst;
 787    GLuint subroutineId;
 788
 789    assert(n->Opcode == IR_FUNC);
 790    assert(n->Label);
 791
 792    /* save/push cur program */
 793    progSave = emitInfo->prog;
 794    emitInfo->prog = new_subroutine(emitInfo, &subroutineId);
 795
 796    _slang_label_set_location(n->Label, emitInfo->prog->NumInstructions,
 797                              emitInfo->prog);
 798
 799    if (emitInfo->EmitBeginEndSub) {
 800       /* BGNSUB isn't a real instruction.
 801        * We require a label (i.e. "foobar:") though, if we're going to
 802        * print the program in the NV format.  The BNGSUB instruction is
 803        * really just a NOP to attach the label to.
 804        */
 805       inst = new_instruction(emitInfo, OPCODE_BGNSUB);
 806       inst->Comment = _mesa_strdup(n->Label->Name);
 807    }
 808
 809    /* body of function: */
 810    emit(emitInfo, n->Children[0]);
 811    n->Store = n->Children[0]->Store;
 812
 813    /* add RET instruction now, if needed */
 814    inst = prev_instruction(emitInfo);
 815    if (inst && inst->Opcode != OPCODE_RET) {
 816       inst = new_instruction(emitInfo, OPCODE_RET);
 817    }
 818
 819    if (emitInfo->EmitBeginEndSub) {
 820       inst = new_instruction(emitInfo, OPCODE_ENDSUB);
 821       inst->Comment = _mesa_strdup(n->Label->Name);
 822    }
 823
 824    /* pop/restore cur program */
 825    emitInfo->prog = progSave;
 826
 827    /* emit the function call */
 828    inst = new_instruction(emitInfo, OPCODE_CAL);
 829    /* The branch target is just the subroutine number (changed later) */
 830    inst->BranchTarget = subroutineId;
 831    inst->Comment = _mesa_strdup(n->Label->Name);
 832    assert(inst->BranchTarget >= 0);
 833
 834    return inst;
 835 }
 836
 837
 838 /**
 839  * Emit code for a 'return' statement.
 840  */
 841 static struct prog_instruction *
 842 emit_return(slang_emit_info *emitInfo, slang_ir_node *n)
 843 {
 844    struct prog_instruction *inst;
 845    assert(n);
 846    assert(n->Opcode == IR_RETURN);
 847    assert(n->Label);
 848    inst = new_instruction(emitInfo, OPCODE_RET);
 849    inst->DstReg.CondMask = COND_TR;  /* always return */
 850    return inst;
 851 }
 852
 853
 854 static struct prog_instruction *
 855 emit_kill(slang_emit_info *emitInfo)
 856 {
 857    struct prog_instruction *inst;
 858    /* NV-KILL - discard fragment depending on condition code.
 859     * Note that ARB-KILL depends on sign of vector operand.
 860     */
 861    inst = new_instruction(emitInfo, OPCODE_KIL_NV);
 862    inst->DstReg.CondMask = COND_TR;  /* always branch */
 863    return inst;
 864 }
 865
 866
 867 static struct prog_instruction *
 868 emit_tex(slang_emit_info *emitInfo, slang_ir_node *n)
 869 {
 870    struct prog_instruction *inst;
 871
 872    (void) emit(emitInfo, n->Children[1]);
 873
 874    if (n->Opcode == IR_TEX) {
 875       inst = new_instruction(emitInfo, OPCODE_TEX);
 876    }
 877    else if (n->Opcode == IR_TEXB) {
 878       inst = new_instruction(emitInfo, OPCODE_TXB);
 879    }
 880    else {
 881       assert(n->Opcode == IR_TEXP);
 882       inst = new_instruction(emitInfo, OPCODE_TXP);
 883    }
 884
 885    if (!n->Store)
 886       if (!alloc_temp_storage(emitInfo, n, 4))
 887          return NULL;
 888
 889    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
 890
 891    /* Child[1] is the coord */
 892    assert(n->Children[1]->Store->File != PROGRAM_UNDEFINED);
 893    assert(n->Children[1]->Store->Index >= 0);
 894    storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
 895
 896    /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
 897    assert(n->Children[0]->Store);
 898    assert(n->Children[0]->Store->Size >= TEXTURE_1D_INDEX);
 899
 900    inst->Sampler = n->Children[0]->Store->Index; /* i.e. uniform's index */
 901    inst->TexSrcTarget = n->Children[0]->Store->Size;
 902    inst->TexSrcUnit = 27; /* Dummy value; the TexSrcUnit will be computed at
 903                            * link time, using the sampler uniform's value.
 904                            */
 905    return inst;
 906 }
 907
 908
 909 static struct prog_instruction *
 910 emit_move(slang_emit_info *emitInfo, slang_ir_node *n)
 911 {
 912    struct prog_instruction *inst;
 913
 914    /* lhs */
 915    emit(emitInfo, n->Children[0]);
 916
 917    /* rhs */
 918    assert(n->Children[1]);
 919    inst = emit(emitInfo, n->Children[1]);
 920
 921    if (!n->Children[1]->Store) {
 922       slang_info_log_error(emitInfo->log, "invalid assignment");
 923       return NULL;
 924    }
 925    assert(n->Children[1]->Store->Index >= 0);
 926
 927    n->Store = n->Children[0]->Store;
 928
 929 #if PEEPHOLE_OPTIMIZATIONS
 930    if (inst &&
 931        _slang_is_temp(emitInfo->vt, n->Children[1]->Store) &&
 932        (inst->DstReg.File == n->Children[1]->Store->File) &&
 933        (inst->DstReg.Index == n->Children[1]->Store->Index)) {
 934       /* Peephole optimization:
 935        * The Right-Hand-Side has its results in a temporary place.
 936        * Modify the RHS (and the prev instruction) to store its results
 937        * in the destination specified by n->Children[0].
 938        * Then, this MOVE is a no-op.
 939        */
 940       if (n->Children[1]->Opcode != IR_SWIZZLE)
 941          _slang_free_temp(emitInfo->vt, n->Children[1]->Store);
 942       *n->Children[1]->Store = *n->Children[0]->Store;
 943       /* fixup the previous instruction (which stored the RHS result) */
 944       assert(n->Children[0]->Store->Index >= 0);
 945       storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store, n->Writemask);
 946       return inst;
 947    }
 948    else
 949 #endif
 950    {
 951       if (n->Children[0]->Store->Size > 4) {
 952          /* move matrix/struct etc (block of registers) */
 953          slang_ir_storage dstStore = *n->Children[0]->Store;
 954          slang_ir_storage srcStore = *n->Children[1]->Store;
 955          GLint size = srcStore.Size;
 956          ASSERT(n->Children[0]->Writemask == WRITEMASK_XYZW);
 957          ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP);
 958          dstStore.Size = 4;
 959          srcStore.Size = 4;
 960          while (size >= 4) {
 961             inst = new_instruction(emitInfo, OPCODE_MOV);
 962             inst->Comment = _mesa_strdup("IR_MOVE block");
 963             storage_to_dst_reg(&inst->DstReg, &dstStore, n->Writemask);
 964             storage_to_src_reg(&inst->SrcReg[0], &srcStore);
 965             srcStore.Index++;
 966             dstStore.Index++;
 967             size -= 4;
 968          }
 969       }
 970       else {
 971          /* single register move */
 972          char *srcAnnot, *dstAnnot;
 973          inst = new_instruction(emitInfo, OPCODE_MOV);
 974          assert(n->Children[0]->Store->Index >= 0);
 975          storage_to_dst_reg(&inst->DstReg, n->Children[0]->Store, n->Writemask);
 976          storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
 977          dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);
 978          srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);
 979          inst->Comment = instruction_annotation(inst->Opcode, dstAnnot,
 980                                                 srcAnnot, NULL, NULL);
 981       }
 982       free_temp_storage(emitInfo->vt, n->Children[1]);
 983       return inst;
 984    }
 985 }
 986
 987
 988 /**
 989  * An IR_COND node wraps a boolean expression which is used by an
 990  * IF or WHILE test.  This is where we'll set condition codes, if needed.
 991  */
 992 static struct prog_instruction *
 993 emit_cond(slang_emit_info *emitInfo, slang_ir_node *n)
 994 {
 995    struct prog_instruction *inst;
 996
 997    assert(n->Opcode == IR_COND);
 998
 999    if (!n->Children[0])
1000       return NULL;
1001
1002    /* emit code for the expression */
1003    inst = emit(emitInfo, n->Children[0]);
1004
1005    if (!n->Children[0]->Store) {
1006       /* error recovery */
1007       return NULL;
1008    }
1009
1010    assert(n->Children[0]->Store);
1011    /*assert(n->Children[0]->Store->Size == 1);*/
1012
1013    if (emitInfo->EmitCondCodes) {
1014       if (inst &&
1015           n->Children[0]->Store &&
1016           inst->DstReg.File == n->Children[0]->Store->File &&
1017           inst->DstReg.Index == n->Children[0]->Store->Index) {
1018          /* The previous instruction wrote to the register who's value
1019           * we're testing.  Just fix that instruction so that the
1020           * condition codes are computed.
1021           */
1022          inst->CondUpdate = GL_TRUE;
1023          n->Store = n->Children[0]->Store;
1024          return inst;
1025       }
1026       else {
1027          /* This'll happen for things like "if (i) ..." where no code
1028           * is normally generated for the expression "i".
1029           * Generate a move instruction just to set condition codes.
1030           */
1031          if (!alloc_temp_storage(emitInfo, n, 1))
1032             return NULL;
1033          inst = new_instruction(emitInfo, OPCODE_MOV);
1034          inst->CondUpdate = GL_TRUE;
1035          storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1036          storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1037          _slang_free_temp(emitInfo->vt, n->Store);
1038          inst->Comment = _mesa_strdup("COND expr");
1039          return inst;
1040       }
1041    }
1042    else {
1043       /* No-op: the boolean result of the expression is in a regular reg */
1044       n->Store = n->Children[0]->Store;
1045       return inst;
1046    }
1047 }
1048
1049
1050 /**
1051  * Logical-NOT
1052  */
1053 static struct prog_instruction *
1054 emit_not(slang_emit_info *emitInfo, slang_ir_node *n)
1055 {
1056    struct prog_instruction *inst;
1057
1058    /* child expr */
1059    (void) emit(emitInfo, n->Children[0]);
1060    /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1061
1062    if (!n->Store)
1063       if (!alloc_temp_storage(emitInfo, n, n->Children[0]->Store->Size))
1064          return NULL;
1065
1066    inst = new_instruction(emitInfo, OPCODE_SEQ);
1067    storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1068    storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1069    constant_to_src_reg(&inst->SrcReg[1], 0.0, emitInfo);
1070    free_temp_storage(emitInfo->vt, n->Children[0]);
1071
1072    inst->Comment = _mesa_strdup("NOT");
1073    return inst;
1074 }
1075
1076
1077 static struct prog_instruction *
1078 emit_if(slang_emit_info *emitInfo, slang_ir_node *n)
1079 {
1080    struct gl_program *prog = emitInfo->prog;
1081    GLuint ifInstLoc, elseInstLoc = 0;
1082    GLuint condWritemask = 0;
1083
1084    /* emit condition expression code */
1085    {
1086       struct prog_instruction *inst;
1087       inst = emit(emitInfo, n->Children[0]);
1088       if (emitInfo->EmitCondCodes) {
1089          if (!inst) {
1090             /* error recovery */
1091             return NULL;
1092          }
1093          condWritemask = inst->DstReg.WriteMask;
1094       }
1095    }
1096
1097 #if 0
1098    assert(n->Children[0]->Store->Size == 1); /* a bool! */
1099 #endif
1100
1101    ifInstLoc = prog->NumInstructions;
1102    if (emitInfo->EmitHighLevelInstructions) {
1103       struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_IF);
1104       if (emitInfo->EmitCondCodes) {
1105          ifInst->DstReg.CondMask = COND_NE;  /* if cond is non-zero */
1106          /* only test the cond code (1 of 4) that was updated by the
1107           * previous instruction.
1108           */
1109          ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1110       }
1111       else {
1112          /* test reg.x */
1113          storage_to_src_reg(&ifInst->SrcReg[0], n->Children[0]->Store);
1114       }
1115    }
1116    else {
1117       /* conditional jump to else, or endif */
1118       struct prog_instruction *ifInst = new_instruction(emitInfo, OPCODE_BRA);
1119       ifInst->DstReg.CondMask = COND_EQ;  /* BRA if cond is zero */
1120       ifInst->Comment = _mesa_strdup("if zero");
1121       ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);
1122    }
1123
1124    /* if body */
1125    emit(emitInfo, n->Children[1]);
1126
1127    if (n->Children[2]) {
1128       /* have else body */
1129       elseInstLoc = prog->NumInstructions;
1130       if (emitInfo->EmitHighLevelInstructions) {
1131          (void) new_instruction(emitInfo, OPCODE_ELSE);
1132       }
1133       else {
1134          /* jump to endif instruction */
1135          struct prog_instruction *inst;
1136          inst = new_instruction(emitInfo, OPCODE_BRA);
1137          inst->Comment = _mesa_strdup("else");
1138          inst->DstReg.CondMask = COND_TR;  /* always branch */
1139       }
1140       prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
1141       emit(emitInfo, n->Children[2]);
1142    }
1143    else {
1144       /* no else body */
1145       prog->Instructions[ifInstLoc].BranchTarget = prog->NumInstructions;
1146    }
1147
1148    if (emitInfo->EmitHighLevelInstructions) {
1149       (void) new_instruction(emitInfo, OPCODE_ENDIF);
1150    }
1151
1152    if (n->Children[2]) {
1153       prog->Instructions[elseInstLoc].BranchTarget = prog->NumInstructions;
1154    }
1155    return NULL;
1156 }
1157
1158
1159 static struct prog_instruction *
1160 emit_loop(slang_emit_info *emitInfo, slang_ir_node *n)
1161 {
1162    struct gl_program *prog = emitInfo->prog;
1163    struct prog_instruction *endInst;
1164    GLuint beginInstLoc, tailInstLoc, endInstLoc;
1165    slang_ir_node *ir;
1166
1167    /* emit OPCODE_BGNLOOP */
1168    beginInstLoc = prog->NumInstructions;
1169    if (emitInfo->EmitHighLevelInstructions) {
1170       (void) new_instruction(emitInfo, OPCODE_BGNLOOP);
1171    }
1172
1173    /* body */
1174    emit(emitInfo, n->Children[0]);
1175
1176    /* tail */
1177    tailInstLoc = prog->NumInstructions;
1178    if (n->Children[1]) {
1179       if (emitInfo->EmitComments)
1180          emit_comment(emitInfo, "Loop tail code:");
1181       emit(emitInfo, n->Children[1]);
1182    }
1183
1184    endInstLoc = prog->NumInstructions;
1185    if (emitInfo->EmitHighLevelInstructions) {
1186       /* emit OPCODE_ENDLOOP */
1187       endInst = new_instruction(emitInfo, OPCODE_ENDLOOP);
1188    }
1189    else {
1190       /* emit unconditional BRA-nch */
1191       endInst = new_instruction(emitInfo, OPCODE_BRA);
1192       endInst->DstReg.CondMask = COND_TR;  /* always true */
1193    }
1194    /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1195    endInst->BranchTarget = beginInstLoc;
1196
1197    if (emitInfo->EmitHighLevelInstructions) {
1198       /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1199       prog->Instructions[beginInstLoc].BranchTarget = prog->NumInstructions -1;
1200    }
1201
1202    /* Done emitting loop code.  Now walk over the loop's linked list of
1203     * BREAK and CONT nodes, filling in their BranchTarget fields (which
1204     * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1205     */
1206    for (ir = n->List; ir; ir = ir->List) {
1207       struct prog_instruction *inst = prog->Instructions + ir->InstLocation;
1208       assert(inst->BranchTarget < 0);
1209       if (ir->Opcode == IR_BREAK ||
1210           ir->Opcode == IR_BREAK_IF_FALSE ||
1211           ir->Opcode == IR_BREAK_IF_TRUE) {
1212          assert(inst->Opcode == OPCODE_BRK ||
1213                 inst->Opcode == OPCODE_BRA);
1214          /* go to instruction after end of loop */
1215          inst->BranchTarget = endInstLoc + 1;
1216       }
1217       else {
1218          assert(ir->Opcode == IR_CONT ||
1219                 ir->Opcode == IR_CONT_IF_FALSE ||
1220                 ir->Opcode == IR_CONT_IF_TRUE);
1221          assert(inst->Opcode == OPCODE_CONT ||
1222                 inst->Opcode == OPCODE_BRA);
1223          /* go to instruction at tail of loop */
1224          inst->BranchTarget = endInstLoc;
1225       }
1226    }
1227    return NULL;
1228 }
1229
1230
1231 /**
1232  * Unconditional "continue" or "break" statement.
1233  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1234  */
1235 static struct prog_instruction *
1236 emit_cont_break(slang_emit_info *emitInfo, slang_ir_node *n)
1237 {
1238    gl_inst_opcode opcode;
1239    struct prog_instruction *inst;
1240
1241    if (n->Opcode == IR_CONT) {
1242       /* we need to execute the loop's tail code before doing CONT */
1243       assert(n->Parent);
1244       assert(n->Parent->Opcode == IR_LOOP);
1245       if (n->Parent->Children[1]) {
1246          /* emit tail code */
1247          if (emitInfo->EmitComments) {
1248             emit_comment(emitInfo, "continue - tail code:");
1249          }
1250          emit(emitInfo, n->Parent->Children[1]);
1251       }
1252    }
1253
1254    /* opcode selection */
1255    if (emitInfo->EmitHighLevelInstructions) {
1256       opcode = (n->Opcode == IR_CONT) ? OPCODE_CONT : OPCODE_BRK;
1257    }
1258    else {
1259       opcode = OPCODE_BRA;
1260    }
1261    n->InstLocation = emitInfo->prog->NumInstructions;
1262    inst = new_instruction(emitInfo, opcode);
1263    inst->DstReg.CondMask = COND_TR;  /* always true */
1264    return inst;
1265 }
1266
1267
1268 /**
1269  * Conditional "continue" or "break" statement.
1270  * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1271  */
1272 static struct prog_instruction *
1273 emit_cont_break_if(slang_emit_info *emitInfo, slang_ir_node *n,
1274                    GLboolean breakTrue)
1275 {
1276    struct prog_instruction *inst;
1277
1278    assert(n->Opcode == IR_CONT_IF_TRUE ||
1279           n->Opcode == IR_CONT_IF_FALSE ||
1280           n->Opcode == IR_BREAK_IF_TRUE ||
1281           n->Opcode == IR_BREAK_IF_FALSE);
1282
1283    /* evaluate condition expr, setting cond codes */
1284    inst = emit(emitInfo, n->Children[0]);
1285    if (emitInfo->EmitCondCodes) {
1286       assert(inst);
1287       inst->CondUpdate = GL_TRUE;
1288    }
1289
1290    n->InstLocation = emitInfo->prog->NumInstructions;
1291
1292    /* opcode selection */
1293    if (emitInfo->EmitHighLevelInstructions) {
1294       if (emitInfo->EmitCondCodes) {
1295          gl_inst_opcode opcode
1296             = (n->Opcode == IR_CONT_IF_TRUE || n->Opcode == IR_CONT_IF_FALSE)
1297             ? OPCODE_CONT : OPCODE_BRK;
1298          inst = new_instruction(emitInfo, opcode);
1299          inst->DstReg.CondMask = breakTrue ? COND_NE : COND_EQ;
1300          return inst;
1301       }
1302       else {
1303          /* IF reg
1304           *    BRK/CONT;
1305           * ENDIF
1306           */
1307          GLint ifInstLoc;
1308          if (n->Opcode == IR_CONT_IF_TRUE ||
1309              n->Opcode == IR_BREAK_IF_TRUE) {
1310             ifInstLoc = emitInfo->prog->NumInstructions;
1311             inst = new_instruction(emitInfo, OPCODE_IF);
1312             storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1313          }
1314          else {
1315             /* invert the expression */
1316             if (!alloc_temp_storage(emitInfo, n, 1))
1317                return NULL;
1318             inst = new_instruction(emitInfo, OPCODE_SEQ);
1319             storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1320             constant_to_src_reg(&inst->SrcReg[1], 0.0, emitInfo);
1321             storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1322             inst->Comment = _mesa_strdup("Invert true/false");
1323
1324             ifInstLoc = emitInfo->prog->NumInstructions;
1325             inst = new_instruction(emitInfo, OPCODE_IF);
1326             storage_to_src_reg(&inst->SrcReg[0], n->Store);
1327             free_temp_storage(emitInfo->vt, n);
1328          }
1329          n->InstLocation = emitInfo->prog->NumInstructions;
1330          if (n->Opcode == IR_BREAK_IF_TRUE ||
1331              n->Opcode == IR_BREAK_IF_FALSE) {
1332             inst = new_instruction(emitInfo, OPCODE_BRK);
1333          }
1334          else {
1335             inst = new_instruction(emitInfo, OPCODE_CONT);
1336          }
1337          inst = new_instruction(emitInfo, OPCODE_ENDIF);
1338
1339          emitInfo->prog->Instructions[ifInstLoc].BranchTarget
1340             = emitInfo->prog->NumInstructions;
1341          return inst;
1342       }
1343    }
1344    else {
1345       assert(emitInfo->EmitCondCodes);
1346       inst = new_instruction(emitInfo, OPCODE_BRA);
1347       inst->DstReg.CondMask = breakTrue ? COND_NE : COND_EQ;
1348       return inst;
1349    }
1350 }
1351
1352
1353
1354 /**
1355  * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1356  * Ex: fix_swizzle("zyNN") -> "zyyy"
1357  */
1358 static GLuint
1359 fix_swizzle(GLuint swizzle)
1360 {
1361    GLuint swz[4], i;
1362    for (i = 0; i < 4; i++) {
1363       swz[i] = GET_SWZ(swizzle, i);
1364       if (swz[i] == SWIZZLE_NIL) {
1365          swz[i] = swz[i - 1];
1366       }
1367    }
1368    return MAKE_SWIZZLE4(swz[0], swz[1], swz[2], swz[3]);
1369 }
1370
1371
1372 /**
1373  * Return the number of components actually named by the swizzle.
1374  * Recall that swizzles may have undefined/don't-care values.
1375  */
1376 static GLuint
1377 swizzle_size(GLuint swizzle)
1378 {
1379    GLuint size = 0, i;
1380    for (i = 0; i < 4; i++) {
1381       GLuint swz = GET_SWZ(swizzle, i);
1382       size += (swz >= 0 && swz <= 3);
1383    }
1384    return size;
1385 }
1386
1387
1388 static struct prog_instruction *
1389 emit_swizzle(slang_emit_info *emitInfo, slang_ir_node *n)
1390 {
1391    GLuint swizzle;
1392    struct prog_instruction *inst;
1393
1394    inst = emit(emitInfo, n->Children[0]);
1395
1396 #ifdef DEBUG
1397    {
1398       GLuint s = n->Children[0]->Store->Swizzle;
1399       assert(GET_SWZ(s, 0) != SWIZZLE_NIL);
1400       assert(GET_SWZ(s, 1) != SWIZZLE_NIL);
1401       assert(GET_SWZ(s, 2) != SWIZZLE_NIL);
1402       assert(GET_SWZ(s, 3) != SWIZZLE_NIL);
1403    }
1404 #endif
1405    /* For debug: n->Var = n->Children[0]->Var; */
1406
1407    /* "pull-up" the child's storage info, applying our swizzle info */
1408    n->Store->File  = n->Children[0]->Store->File;
1409    n->Store->Index = n->Children[0]->Store->Index;
1410    n->Store->Size = swizzle_size(n->Store->Swizzle);
1411 #if 0
1412    printf("Emit Swizzle %s  reg %d  chSize %d  mySize %d\n",
1413           _mesa_swizzle_string(n->Store->Swizzle, 0, 0),
1414           n->Store->Index, n->Children[0]->Store->Size,
1415           n->Store->Size);
1416 #endif
1417
1418    /* apply this swizzle to child's swizzle to get composed swizzle */
1419    swizzle = fix_swizzle(n->Store->Swizzle); /* remove the don't care terms */
1420    n->Store->Swizzle = swizzle_swizzle(n->Children[0]->Store->Swizzle,
1421                                        swizzle);
1422
1423    return inst;
1424 }
1425
1426
1427 /**
1428  * Dereference array element.  Just resolve storage for the array
1429  * element represented by this node.
1430  */
1431 static struct prog_instruction *
1432 emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
1433 {
1434    assert(n->Store);
1435    assert(n->Store->File != PROGRAM_UNDEFINED);
1436    assert(n->Store->Size > 0);
1437
1438    if (n->Store->File == PROGRAM_STATE_VAR) {
1439       n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1440       return NULL;
1441    }
1442
1443    if (n->Children[1]->Opcode == IR_FLOAT) {
1444       /* Constant index */
1445       const GLint arrayAddr = n->Children[0]->Store->Index;
1446       const GLint index = (GLint) n->Children[1]->Value[0];
1447       n->Store->Index = arrayAddr + index;
1448    }
1449    else {
1450       /* Variable index - PROBLEM */
1451       const GLint arrayAddr = n->Children[0]->Store->Index;
1452       const GLint index = 0;
1453       _mesa_problem(NULL, "variable array indexes not supported yet!");
1454       n->Store->Index = arrayAddr + index;
1455    }
1456    return NULL; /* no instruction */
1457 }
1458
1459
1460 /**
1461  * Resolve storage for accessing a structure field.
1462  */
1463 static struct prog_instruction *
1464 emit_struct_field(slang_emit_info *emitInfo, slang_ir_node *n)
1465 {
1466    if (n->Store->File == PROGRAM_STATE_VAR) {
1467       n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1468    }
1469    else {
1470       GLint offset = n->FieldOffset / 4;
1471       assert(n->Children[0]->Store->Index >= 0);
1472       n->Store->Index = n->Children[0]->Store->Index + offset;
1473       if (n->Store->Size == 1) {
1474          GLint swz = n->FieldOffset % 4;
1475          n->Store->Swizzle = MAKE_SWIZZLE4(swz, swz, swz, swz);
1476       }
1477       else {
1478          n->Store->Swizzle = SWIZZLE_XYZW;
1479       }
1480    }
1481    return NULL; /* no instruction */
1482 }
1483
1484
1485 static struct prog_instruction *
1486 emit(slang_emit_info *emitInfo, slang_ir_node *n)
1487 {
1488    struct prog_instruction *inst;
1489    if (!n)
1490       return NULL;
1491
1492    switch (n->Opcode) {
1493    case IR_SEQ:
1494       /* sequence of two sub-trees */
1495       assert(n->Children[0]);
1496       assert(n->Children[1]);
1497       emit(emitInfo, n->Children[0]);
1498       inst = emit(emitInfo, n->Children[1]);
1499 #if 0
1500       assert(!n->Store);
1501 #endif
1502       n->Store = n->Children[1]->Store;
1503       return inst;
1504
1505    case IR_SCOPE:
1506       /* new variable scope */
1507       _slang_push_var_table(emitInfo->vt);
1508       inst = emit(emitInfo, n->Children[0]);
1509       _slang_pop_var_table(emitInfo->vt);
1510       return inst;
1511
1512    case IR_VAR_DECL:
1513       /* Variable declaration - allocate a register for it */
1514       assert(n->Store);
1515       assert(n->Store->File != PROGRAM_UNDEFINED);
1516       assert(n->Store->Size > 0);
1517       /*assert(n->Store->Index < 0);*/
1518       if (!n->Var || n->Var->isTemp) {
1519          /* a nameless/temporary variable, will be freed after first use */
1520          /*NEW*/
1521          if (n->Store->Index < 0 && !_slang_alloc_temp(emitInfo->vt, n->Store)) {
1522             slang_info_log_error(emitInfo->log,
1523                                  "Ran out of registers, too many temporaries");
1524             return NULL;
1525          }
1526       }
1527       else {
1528          /* a regular variable */
1529          _slang_add_variable(emitInfo->vt, n->Var);
1530          if (!_slang_alloc_var(emitInfo->vt, n->Store)) {
1531             slang_info_log_error(emitInfo->log,
1532                                  "Ran out of registers, too many variables");
1533             return NULL;
1534          }
1535          /*
1536          printf("IR_VAR_DECL %s %d store %p\n",
1537                 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1538          */
1539          assert(n->Var->aux == n->Store);
1540       }
1541       if (emitInfo->EmitComments) {
1542          /* emit NOP with comment describing the variable's storage location */
1543          char s[1000];
1544          sprintf(s, "TEMP[%d]%s = variable %s (size %d)",
1545                  n->Store->Index,
1546                  _mesa_swizzle_string(n->Store->Swizzle, 0, GL_FALSE),
1547                  (n->Var ? (char *) n->Var->a_name : "anonymous"),
1548                  n->Store->Size);
1549          inst = emit_comment(emitInfo, s);
1550          return inst;
1551       }
1552       return NULL;
1553
1554    case IR_VAR:
1555       /* Reference to a variable
1556        * Storage should have already been resolved/allocated.
1557        */
1558       assert(n->Store);
1559       assert(n->Store->File != PROGRAM_UNDEFINED);
1560
1561       if (n->Store->File == PROGRAM_STATE_VAR &&
1562           n->Store->Index < 0) {
1563          n->Store->Index = _slang_alloc_statevar(n, emitInfo->prog->Parameters);
1564       }
1565
1566       if (n->Store->Index < 0) {
1567          printf("#### VAR %s not allocated!\n", (char*)n->Var->a_name);
1568       }
1569       assert(n->Store->Index >= 0);
1570       assert(n->Store->Size > 0);
1571       break;
1572
1573    case IR_ELEMENT:
1574       return emit_array_element(emitInfo, n);
1575    case IR_FIELD:
1576       return emit_struct_field(emitInfo, n);
1577    case IR_SWIZZLE:
1578       return emit_swizzle(emitInfo, n);
1579
1580    case IR_I_TO_F:
1581       /* just move */
1582       emit(emitInfo, n->Children[0]);
1583       inst = new_instruction(emitInfo, OPCODE_MOV);
1584       if (!n->Store) {
1585          if (!alloc_temp_storage(emitInfo, n, 1))
1586             return NULL;
1587       }
1588       storage_to_dst_reg(&inst->DstReg, n->Store, n->Writemask);
1589       storage_to_src_reg(&inst->SrcReg[0], n->Children[0]->Store);
1590       if (emitInfo->EmitComments)
1591          inst->Comment = _mesa_strdup("int to float");
1592       return NULL;
1593
1594    /* Simple arithmetic */
1595    /* unary */
1596    case IR_RSQ:
1597    case IR_RCP:
1598    case IR_FLOOR:
1599    case IR_FRAC:
1600    case IR_F_TO_I:
1601    case IR_ABS:
1602    case IR_SIN:
1603    case IR_COS:
1604    case IR_DDX:
1605    case IR_DDY:
1606    case IR_NOISE1:
1607    case IR_NOISE2:
1608    case IR_NOISE3:
1609    case IR_NOISE4:
1610    /* binary */
1611    case IR_ADD:
1612    case IR_SUB:
1613    case IR_MUL:
1614    case IR_DOT4:
1615    case IR_DOT3:
1616    case IR_CROSS:
1617    case IR_MIN:
1618    case IR_MAX:
1619    case IR_SEQUAL:
1620    case IR_SNEQUAL:
1621    case IR_SGE:
1622    case IR_SGT:
1623    case IR_SLE:
1624    case IR_SLT:
1625    case IR_POW:
1626    case IR_EXP:
1627    case IR_EXP2:
1628    /* trinary operators */
1629    case IR_LRP:
1630       return emit_arith(emitInfo, n);
1631
1632    case IR_EQUAL:
1633    case IR_NOTEQUAL:
1634       return emit_compare(emitInfo, n);
1635
1636    case IR_CLAMP:
1637       return emit_clamp(emitInfo, n);
1638    case IR_TEX:
1639    case IR_TEXB:
1640    case IR_TEXP:
1641       return emit_tex(emitInfo, n);
1642    case IR_NEG:
1643       return emit_negation(emitInfo, n);
1644    case IR_FLOAT:
1645       /* find storage location for this float constant */
1646       n->Store->Index = _mesa_add_unnamed_constant(emitInfo->prog->Parameters,
1647                                                    n->Value,
1648                                                    n->Store->Size,
1649                                                    &n->Store->Swizzle);
1650       if (n->Store->Index < 0) {
1651          slang_info_log_error(emitInfo->log, "Ran out of space for constants");
1652          return NULL;
1653       }
1654       return NULL;
1655
1656    case IR_MOVE:
1657       return emit_move(emitInfo, n);
1658
1659    case IR_COND:
1660       return emit_cond(emitInfo, n);
1661
1662    case IR_NOT:
1663       return emit_not(emitInfo, n);
1664
1665    case IR_LABEL:
1666       return emit_label(emitInfo, n);
1667
1668    case IR_KILL:
1669       return emit_kill(emitInfo);
1670
1671    case IR_FUNC:
1672       /* new variable scope for subroutines/function calls*/
1673       _slang_push_var_table(emitInfo->vt);
1674       inst = emit_func(emitInfo, n);
1675       _slang_pop_var_table(emitInfo->vt);
1676       return inst;
1677
1678    case IR_IF:
1679       return emit_if(emitInfo, n);
1680
1681    case IR_LOOP:
1682       return emit_loop(emitInfo, n);
1683    case IR_BREAK_IF_FALSE:
1684    case IR_CONT_IF_FALSE:
1685       return emit_cont_break_if(emitInfo, n, GL_FALSE);
1686    case IR_BREAK_IF_TRUE:
1687    case IR_CONT_IF_TRUE:
1688       return emit_cont_break_if(emitInfo, n, GL_TRUE);
1689    case IR_BREAK:
1690       /* fall-through */
1691    case IR_CONT:
1692       return emit_cont_break(emitInfo, n);
1693
1694    case IR_BEGIN_SUB:
1695       return new_instruction(emitInfo, OPCODE_BGNSUB);
1696    case IR_END_SUB:
1697       return new_instruction(emitInfo, OPCODE_ENDSUB);
1698    case IR_RETURN:
1699       return emit_return(emitInfo, n);
1700
1701    case IR_NOP:
1702       return NULL;
1703
1704    default:
1705       _mesa_problem(NULL, "Unexpected IR opcode in emit()\n");
1706    }
1707    return NULL;
1708 }
1709
1710
1711 /**
1712  * After code generation, any subroutines will be in separate program
1713  * objects.  This function appends all the subroutines onto the main
1714  * program and resolves the linking of all the branch/call instructions.
1715  * XXX this logic should really be part of the linking process...
1716  */
1717 static void
1718 _slang_resolve_subroutines(slang_emit_info *emitInfo)
1719 {
1720    GET_CURRENT_CONTEXT(ctx);
1721    struct gl_program *mainP = emitInfo->prog;
1722    GLuint *subroutineLoc, i, total;
1723
1724    subroutineLoc
1725       = (GLuint *) _mesa_malloc(emitInfo->NumSubroutines * sizeof(GLuint));
1726
1727    /* total number of instructions */
1728    total = mainP->NumInstructions;
1729    for (i = 0; i < emitInfo->NumSubroutines; i++) {
1730       subroutineLoc[i] = total;
1731       total += emitInfo->Subroutines[i]->NumInstructions;
1732    }
1733
1734    /* adjust BrancTargets within the functions */
1735    for (i = 0; i < emitInfo->NumSubroutines; i++) {
1736       struct gl_program *sub = emitInfo->Subroutines[i];
1737       GLuint j;
1738       for (j = 0; j < sub->NumInstructions; j++) {
1739          struct prog_instruction *inst = sub->Instructions + j;
1740          if (inst->Opcode != OPCODE_CAL && inst->BranchTarget >= 0) {
1741             inst->BranchTarget += subroutineLoc[i];
1742          }
1743       }
1744    }
1745
1746    /* append subroutines' instructions after main's instructions */
1747    mainP->Instructions = _mesa_realloc_instructions(mainP->Instructions,
1748                                                     mainP->NumInstructions,
1749                                                     total);
1750    for (i = 0; i < emitInfo->NumSubroutines; i++) {
1751       struct gl_program *sub = emitInfo->Subroutines[i];
1752       _mesa_copy_instructions(mainP->Instructions + subroutineLoc[i],
1753                               sub->Instructions,
1754                               sub->NumInstructions);
1755       /* delete subroutine code */
1756       sub->Parameters = NULL; /* prevent double-free */
1757       _mesa_delete_program(ctx, sub);
1758    }
1759    mainP->NumInstructions = total;
1760
1761    /* Examine CAL instructions.
1762     * At this point, the BranchTarget field of the CAL instructions is
1763     * the number/id of the subroutine to call (an index into the
1764     * emitInfo->Subroutines list).
1765     * Translate that into an actual instruction location now.
1766     */
1767    for (i = 0; i < mainP->NumInstructions; i++) {
1768       struct prog_instruction *inst = mainP->Instructions + i;
1769       if (inst->Opcode == OPCODE_CAL) {
1770          const GLuint f = inst->BranchTarget;
1771          inst->BranchTarget = subroutineLoc[f];
1772       }
1773    }
1774
1775    _mesa_free(subroutineLoc);
1776 }
1777
1778
1779
1780
1781 GLboolean
1782 _slang_emit_code(slang_ir_node *n, slang_var_table *vt,
1783                  struct gl_program *prog, GLboolean withEnd,
1784                  slang_info_log *log)
1785 {
1786    GET_CURRENT_CONTEXT(ctx);
1787    GLboolean success;
1788    slang_emit_info emitInfo;
1789
1790    emitInfo.log = log;
1791    emitInfo.vt = vt;
1792    emitInfo.prog = prog;
1793    emitInfo.Subroutines = NULL;
1794    emitInfo.NumSubroutines = 0;
1795
1796    emitInfo.EmitHighLevelInstructions = ctx->Shader.EmitHighLevelInstructions;
1797    emitInfo.EmitCondCodes = ctx->Shader.EmitCondCodes;
1798    emitInfo.EmitComments = ctx->Shader.EmitComments;
1799    emitInfo.EmitBeginEndSub = 0;  /* XXX for compiler debug only */
1800
1801    if (!emitInfo.EmitCondCodes) {
1802       emitInfo.EmitHighLevelInstructions = GL_TRUE;
1803    }
1804
1805    (void) emit(&emitInfo, n);
1806
1807    /* finish up by adding the END opcode to program */
1808    if (withEnd) {
1809       struct prog_instruction *inst;
1810       inst = new_instruction(&emitInfo, OPCODE_END);
1811    }
1812
1813    _slang_resolve_subroutines(&emitInfo);
1814
1815    success = GL_TRUE;
1816
1817 #if 0
1818    printf("*********** End emit code (%u inst):\n", prog->NumInstructions);
1819    _mesa_print_program(prog);
1820    _mesa_print_program_parameters(ctx,prog);
1821 #endif
1822
1823    return success;
1824 }