2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2008 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
34 *** To emit GPU instructions, we basically just do an in-order traversal
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "shader/program.h"
43 #include "shader/prog_instruction.h"
44 #include "shader/prog_parameter.h"
45 #include "shader/prog_print.h"
46 #include "slang_builtin.h"
47 #include "slang_emit.h"
48 #include "slang_mem.h"
51 #define PEEPHOLE_OPTIMIZATIONS 1
59 struct gl_program
*prog
;
60 struct gl_program
**Subroutines
;
61 GLuint NumSubroutines
;
63 /* code-gen options */
64 GLboolean EmitHighLevelInstructions
;
65 GLboolean EmitCondCodes
;
66 GLboolean EmitComments
;
67 GLboolean EmitBeginEndSub
; /* XXX TEMPORARY */
72 static struct gl_program
*
73 new_subroutine(slang_emit_info
*emitInfo
, GLuint
*id
)
75 GET_CURRENT_CONTEXT(ctx
);
76 const GLuint n
= emitInfo
->NumSubroutines
;
78 emitInfo
->Subroutines
= (struct gl_program
**)
79 _mesa_realloc(emitInfo
->Subroutines
,
80 n
* sizeof(struct gl_program
),
81 (n
+ 1) * sizeof(struct gl_program
));
82 emitInfo
->Subroutines
[n
] = ctx
->Driver
.NewProgram(ctx
, emitInfo
->prog
->Target
, 0);
83 emitInfo
->Subroutines
[n
]->Parameters
= emitInfo
->prog
->Parameters
;
84 emitInfo
->NumSubroutines
++;
86 return emitInfo
->Subroutines
[n
];
91 * Convert a writemask to a swizzle. Used for testing cond codes because
92 * we only want to test the cond code component(s) that was set by the
93 * previous instruction.
96 writemask_to_swizzle(GLuint writemask
)
98 if (writemask
== WRITEMASK_X
)
100 if (writemask
== WRITEMASK_Y
)
102 if (writemask
== WRITEMASK_Z
)
104 if (writemask
== WRITEMASK_W
)
106 return SWIZZLE_XYZW
; /* shouldn't be hit */
111 * Convert a swizzle mask to a writemask.
112 * Note that the slang_ir_storage->Swizzle field can represent either a
113 * swizzle mask or a writemask, depending on how it's used. For example,
114 * when we parse "direction.yz" alone, we don't know whether .yz is a
115 * writemask or a swizzle. In this case, we encode ".yz" in store->Swizzle
116 * as a swizzle mask (.yz?? actually). Later, if direction.yz is used as
117 * an R-value, we use store->Swizzle as-is. Otherwise, if direction.yz is
118 * used as an L-value, we convert it to a writemask.
121 swizzle_to_writemask(GLuint swizzle
)
123 GLuint i
, writemask
= 0x0;
124 for (i
= 0; i
< 4; i
++) {
125 GLuint swz
= GET_SWZ(swizzle
, i
);
126 if (swz
<= SWIZZLE_W
) {
127 writemask
|= (1 << swz
);
135 * Swizzle a swizzle (function composition).
136 * That is, return swz2(swz1), or said another way: swz1.szw2
137 * Example: swizzle_swizzle(".zwxx", ".xxyw") yields ".zzwx"
140 _slang_swizzle_swizzle(GLuint swz1
, GLuint swz2
)
143 for (i
= 0; i
< 4; i
++) {
144 GLuint c
= GET_SWZ(swz2
, i
);
146 s
[i
] = GET_SWZ(swz1
, c
);
150 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
156 * Allocate storage for the given node (if it hasn't already been allocated).
158 * Typically this is temporary storage for an intermediate result (such as
159 * for a multiply or add, etc).
161 * If n->Store does not exist it will be created and will be of the size
162 * specified by defaultSize.
165 alloc_node_storage(slang_emit_info
*emitInfo
, slang_ir_node
*n
,
170 assert(defaultSize
> 0);
171 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, defaultSize
);
174 /* now allocate actual register(s). I.e. set n->Store->Index >= 0 */
175 if (n
->Store
->Index
< 0) {
176 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
177 slang_info_log_error(emitInfo
->log
,
178 "Ran out of registers, too many temporaries");
179 _slang_free(n
->Store
);
189 * Free temporary storage, if n->Store is, in fact, temp storage.
193 free_node_storage(slang_var_table
*vt
, slang_ir_node
*n
)
195 if (n
->Store
->File
== PROGRAM_TEMPORARY
&&
196 n
->Store
->Index
>= 0 &&
197 n
->Opcode
!= IR_SWIZZLE
) {
198 if (_slang_is_temp(vt
, n
->Store
)) {
199 _slang_free_temp(vt
, n
->Store
);
200 n
->Store
->Index
= -1;
201 n
->Store
= NULL
; /* XXX this may not be needed */
208 * Helper function to allocate a short-term temporary.
209 * Free it with _slang_free_temp().
212 alloc_local_temp(slang_emit_info
*emitInfo
, slang_ir_storage
*temp
, GLint size
)
216 _mesa_bzero(temp
, sizeof(*temp
));
218 temp
->File
= PROGRAM_TEMPORARY
;
220 return _slang_alloc_temp(emitInfo
->vt
, temp
);
225 * Remove any SWIZZLE_NIL terms from given swizzle mask.
226 * For a swizzle like .z??? generate .zzzz (replicate single component).
227 * Else, for .wx?? generate .wxzw (insert default component for the position).
230 fix_swizzle(GLuint swizzle
)
232 GLuint c0
= GET_SWZ(swizzle
, 0),
233 c1
= GET_SWZ(swizzle
, 1),
234 c2
= GET_SWZ(swizzle
, 2),
235 c3
= GET_SWZ(swizzle
, 3);
236 if (c1
== SWIZZLE_NIL
&& c2
== SWIZZLE_NIL
&& c3
== SWIZZLE_NIL
) {
237 /* smear first component across all positions */
241 /* insert default swizzle components */
242 if (c0
== SWIZZLE_NIL
)
244 if (c1
== SWIZZLE_NIL
)
246 if (c2
== SWIZZLE_NIL
)
248 if (c3
== SWIZZLE_NIL
)
251 return MAKE_SWIZZLE4(c0
, c1
, c2
, c3
);
257 * Convert IR storage to an instruction dst register.
260 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
)
262 const GLint size
= st
->Size
;
263 GLint index
= st
->Index
;
264 GLuint swizzle
= st
->Swizzle
;
266 /* if this is storage relative to some parent storage, walk up the tree */
270 swizzle
= _slang_swizzle_swizzle(st
->Swizzle
, swizzle
);
273 assert(st
->File
!= PROGRAM_UNDEFINED
);
274 dst
->File
= st
->File
;
282 if (swizzle
!= SWIZZLE_XYZW
) {
283 dst
->WriteMask
= swizzle_to_writemask(swizzle
);
289 writemask
= WRITEMASK_X
<< GET_SWZ(st
->Swizzle
, 0);
292 writemask
= WRITEMASK_XY
;
295 writemask
= WRITEMASK_XYZ
;
298 writemask
= WRITEMASK_XYZW
;
301 ; /* error would have been caught above */
303 dst
->WriteMask
= writemask
;
309 * Convert IR storage to an instruction src register.
312 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
314 const GLboolean relAddr
= st
->RelAddr
;
315 GLint index
= st
->Index
;
316 GLuint swizzle
= st
->Swizzle
;
318 /* if this is storage relative to some parent storage, walk up the tree */
322 swizzle
= _slang_swizzle_swizzle(fix_swizzle(st
->Swizzle
), swizzle
);
325 assert(st
->File
>= 0);
326 #if 1 /* XXX temporary */
327 if (st
->File
== PROGRAM_UNDEFINED
) {
328 slang_ir_storage
*st0
= (slang_ir_storage
*) st
;
329 st0
->File
= PROGRAM_TEMPORARY
;
332 assert(st
->File
< PROGRAM_UNDEFINED
);
333 src
->File
= st
->File
;
338 swizzle
= fix_swizzle(swizzle
);
339 assert(GET_SWZ(swizzle
, 0) <= SWIZZLE_W
);
340 assert(GET_SWZ(swizzle
, 1) <= SWIZZLE_W
);
341 assert(GET_SWZ(swizzle
, 2) <= SWIZZLE_W
);
342 assert(GET_SWZ(swizzle
, 3) <= SWIZZLE_W
);
343 src
->Swizzle
= swizzle
;
345 src
->RelAddr
= relAddr
;
350 * Setup storage pointing to a scalar constant/literal.
353 constant_to_storage(slang_emit_info
*emitInfo
,
355 slang_ir_storage
*store
)
362 reg
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
365 memset(store
, 0, sizeof(*store
));
366 store
->File
= PROGRAM_CONSTANT
;
368 store
->Swizzle
= swizzle
;
373 * Add new instruction at end of given program.
374 * \param prog the program to append instruction onto
375 * \param opcode opcode for the new instruction
376 * \return pointer to the new instruction
378 static struct prog_instruction
*
379 new_instruction(slang_emit_info
*emitInfo
, gl_inst_opcode opcode
)
381 struct gl_program
*prog
= emitInfo
->prog
;
382 struct prog_instruction
*inst
;
385 /* print prev inst */
386 if (prog
->NumInstructions
> 0) {
387 _mesa_print_instruction(prog
->Instructions
+ prog
->NumInstructions
- 1);
390 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
391 prog
->NumInstructions
,
392 prog
->NumInstructions
+ 1);
393 inst
= prog
->Instructions
+ prog
->NumInstructions
;
394 prog
->NumInstructions
++;
395 _mesa_init_instructions(inst
, 1);
396 inst
->Opcode
= opcode
;
397 inst
->BranchTarget
= -1; /* invalid */
399 printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
400 _mesa_opcode_string(inst->Opcode));
407 * Emit a new instruction with given opcode, operands.
409 static struct prog_instruction
*
410 emit_instruction(slang_emit_info
*emitInfo
,
411 gl_inst_opcode opcode
,
412 const slang_ir_storage
*dst
,
413 const slang_ir_storage
*src1
,
414 const slang_ir_storage
*src2
,
415 const slang_ir_storage
*src3
)
417 struct gl_program
*prog
= emitInfo
->prog
;
418 struct prog_instruction
*inst
;
420 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
421 prog
->NumInstructions
,
422 prog
->NumInstructions
+ 1);
423 inst
= prog
->Instructions
+ prog
->NumInstructions
;
424 prog
->NumInstructions
++;
426 _mesa_init_instructions(inst
, 1);
427 inst
->Opcode
= opcode
;
428 inst
->BranchTarget
= -1; /* invalid */
431 storage_to_dst_reg(&inst
->DstReg
, dst
);
434 storage_to_src_reg(&inst
->SrcReg
[0], src1
);
436 storage_to_src_reg(&inst
->SrcReg
[1], src2
);
438 storage_to_src_reg(&inst
->SrcReg
[2], src3
);
445 * Emit an ARL instruction.
447 static struct prog_instruction
*
448 emit_arl_instruction(slang_emit_info
*emitInfo
,
450 const slang_ir_storage
*src
)
452 struct prog_instruction
*inst
;
454 assert(addrReg
== 0); /* only one addr reg at this time */
455 inst
= new_instruction(emitInfo
, OPCODE_ARL
);
456 storage_to_src_reg(&inst
->SrcReg
[0], src
);
457 inst
->DstReg
.File
= PROGRAM_ADDRESS
;
458 inst
->DstReg
.Index
= addrReg
;
459 inst
->DstReg
.WriteMask
= WRITEMASK_X
;
466 * Put a comment on the given instruction.
469 inst_comment(struct prog_instruction
*inst
, const char *comment
)
472 inst
->Comment
= _mesa_strdup(comment
);
478 * Return pointer to last instruction in program.
480 static struct prog_instruction
*
481 prev_instruction(slang_emit_info
*emitInfo
)
483 struct gl_program
*prog
= emitInfo
->prog
;
484 if (prog
->NumInstructions
== 0)
487 return prog
->Instructions
+ prog
->NumInstructions
- 1;
491 static struct prog_instruction
*
492 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
);
496 * Return an annotation string for given node's storage.
499 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
502 const slang_ir_storage
*st
= n
->Store
;
503 static char s
[100] = "";
506 return _mesa_strdup("");
509 case PROGRAM_CONSTANT
:
510 if (st
->Index
>= 0) {
511 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
512 if (st
->Swizzle
== SWIZZLE_NOOP
)
513 sprintf(s
, "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
515 sprintf(s
, "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
519 case PROGRAM_TEMPORARY
:
521 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
523 sprintf(s
, "t[%d]", st
->Index
);
525 case PROGRAM_STATE_VAR
:
526 case PROGRAM_UNIFORM
:
527 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
529 case PROGRAM_VARYING
:
530 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
533 sprintf(s
, "input[%d]", st
->Index
);
536 sprintf(s
, "output[%d]", st
->Index
);
541 return _mesa_strdup(s
);
549 * Return an annotation string for an instruction.
552 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
553 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
556 const char *operator;
561 len
+= strlen(dstAnnot
);
563 dstAnnot
= _mesa_strdup("");
566 len
+= strlen(srcAnnot0
);
568 srcAnnot0
= _mesa_strdup("");
571 len
+= strlen(srcAnnot1
);
573 srcAnnot1
= _mesa_strdup("");
576 len
+= strlen(srcAnnot2
);
578 srcAnnot2
= _mesa_strdup("");
612 s
= (char *) malloc(len
);
613 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
614 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
615 assert(_mesa_strlen(s
) < len
);
630 * Emit an instruction that's just a comment.
632 static struct prog_instruction
*
633 emit_comment(slang_emit_info
*emitInfo
, const char *comment
)
635 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_NOP
);
636 inst_comment(inst
, comment
);
642 * Generate code for a simple arithmetic instruction.
643 * Either 1, 2 or 3 operands.
645 static struct prog_instruction
*
646 emit_arith(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
648 const slang_ir_info
*info
= _slang_ir_info(n
->Opcode
);
649 struct prog_instruction
*inst
;
653 assert(info
->InstOpcode
!= OPCODE_NOP
);
655 #if PEEPHOLE_OPTIMIZATIONS
656 /* Look for MAD opportunity */
657 if (info
->NumParams
== 2 &&
658 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
659 /* found pattern IR_ADD(IR_MUL(A, B), C) */
660 emit(emitInfo
, n
->Children
[0]->Children
[0]); /* A */
661 emit(emitInfo
, n
->Children
[0]->Children
[1]); /* B */
662 emit(emitInfo
, n
->Children
[1]); /* C */
663 alloc_node_storage(emitInfo
, n
, -1); /* dest */
665 inst
= emit_instruction(emitInfo
,
668 n
->Children
[0]->Children
[0]->Store
,
669 n
->Children
[0]->Children
[1]->Store
,
670 n
->Children
[1]->Store
);
672 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[0]);
673 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[1]);
674 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
678 if (info
->NumParams
== 2 &&
679 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
680 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
681 emit(emitInfo
, n
->Children
[0]); /* A */
682 emit(emitInfo
, n
->Children
[1]->Children
[0]); /* B */
683 emit(emitInfo
, n
->Children
[1]->Children
[1]); /* C */
684 alloc_node_storage(emitInfo
, n
, -1); /* dest */
686 inst
= emit_instruction(emitInfo
,
689 n
->Children
[1]->Children
[0]->Store
,
690 n
->Children
[1]->Children
[1]->Store
,
691 n
->Children
[0]->Store
);
693 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[0]);
694 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[1]);
695 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
700 /* gen code for children, may involve temp allocation */
701 for (i
= 0; i
< info
->NumParams
; i
++) {
702 emit(emitInfo
, n
->Children
[i
]);
703 if (!n
->Children
[i
] || !n
->Children
[i
]->Store
) {
710 alloc_node_storage(emitInfo
, n
, -1);
712 inst
= emit_instruction(emitInfo
,
715 (info
->NumParams
> 0 ? n
->Children
[0]->Store
: NULL
),
716 (info
->NumParams
> 1 ? n
->Children
[1]->Store
: NULL
),
717 (info
->NumParams
> 2 ? n
->Children
[2]->Store
: NULL
)
721 for (i
= 0; i
< info
->NumParams
; i
++)
722 free_node_storage(emitInfo
->vt
, n
->Children
[i
]);
729 * Emit code for == and != operators. These could normally be handled
730 * by emit_arith() except we need to be able to handle structure comparisons.
732 static struct prog_instruction
*
733 emit_compare(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
735 struct prog_instruction
*inst
= NULL
;
738 assert(n
->Opcode
== IR_EQUAL
|| n
->Opcode
== IR_NOTEQUAL
);
740 /* gen code for children */
741 emit(emitInfo
, n
->Children
[0]);
742 emit(emitInfo
, n
->Children
[1]);
744 if (n
->Children
[0]->Store
->Size
!= n
->Children
[1]->Store
->Size
) {
745 slang_info_log_error(emitInfo
->log
, "invalid operands to == or !=");
749 /* final result is 1 bool */
750 if (!alloc_node_storage(emitInfo
, n
, 1))
753 size
= n
->Children
[0]->Store
->Size
;
756 gl_inst_opcode opcode
= n
->Opcode
== IR_EQUAL
? OPCODE_SEQ
: OPCODE_SNE
;
757 inst
= emit_instruction(emitInfo
,
760 n
->Children
[0]->Store
,
761 n
->Children
[1]->Store
,
764 else if (size
<= 4) {
765 /* compare two vectors.
766 * Unfortunately, there's no instruction to compare vectors and
767 * return a scalar result. Do it with some compare and dot product
771 gl_inst_opcode dotOp
;
772 slang_ir_storage tempStore
;
774 if (!alloc_local_temp(emitInfo
, &tempStore
, 4)) {
781 swizzle
= SWIZZLE_XYZW
;
783 else if (size
== 3) {
785 swizzle
= SWIZZLE_XYZW
;
789 dotOp
= OPCODE_DP3
; /* XXX use OPCODE_DP2 eventually */
790 swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
);
793 /* Compute inequality (temp = (A != B)) */
794 inst
= emit_instruction(emitInfo
,
797 n
->Children
[0]->Store
,
798 n
->Children
[1]->Store
,
800 inst_comment(inst
, "Compare values");
802 /* Compute val = DOT(temp, temp) (reduction) */
803 inst
= emit_instruction(emitInfo
,
809 inst
->SrcReg
[0].Swizzle
= inst
->SrcReg
[1].Swizzle
= swizzle
; /*override*/
810 inst_comment(inst
, "Reduce vec to bool");
812 _slang_free_temp(emitInfo
->vt
, &tempStore
); /* free temp */
814 if (n
->Opcode
== IR_EQUAL
) {
815 /* compute val = !val.x with SEQ val, val, 0; */
816 slang_ir_storage zero
;
817 constant_to_storage(emitInfo
, 0.0, &zero
);
818 inst
= emit_instruction(emitInfo
,
824 inst_comment(inst
, "Invert true/false");
828 /* size > 4, struct or array compare.
829 * XXX this won't work reliably for structs with padding!!
831 GLint i
, num
= (n
->Children
[0]->Store
->Size
+ 3) / 4;
832 slang_ir_storage accTemp
, sneTemp
;
834 if (!alloc_local_temp(emitInfo
, &accTemp
, 4))
837 if (!alloc_local_temp(emitInfo
, &sneTemp
, 4))
840 for (i
= 0; i
< num
; i
++) {
841 slang_ir_storage srcStore0
= *n
->Children
[0]->Store
;
842 slang_ir_storage srcStore1
= *n
->Children
[1]->Store
;
843 srcStore0
.Index
+= i
;
844 srcStore1
.Index
+= i
;
847 /* SNE accTemp, left[i], right[i] */
848 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
853 inst_comment(inst
, "Begin struct/array comparison");
856 /* SNE sneTemp, left[i], right[i] */
857 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
862 /* ADD accTemp, accTemp, sneTemp; # like logical-OR */
863 inst
= emit_instruction(emitInfo
, OPCODE_ADD
,
871 /* compute accTemp.x || accTemp.y || accTemp.z || accTemp.w with DOT4 */
872 inst
= emit_instruction(emitInfo
, OPCODE_DP4
,
877 inst_comment(inst
, "End struct/array comparison");
879 if (n
->Opcode
== IR_EQUAL
) {
880 /* compute tmp.x = !tmp.x via tmp.x = (tmp.x == 0) */
881 slang_ir_storage zero
;
882 constant_to_storage(emitInfo
, 0.0, &zero
);
883 inst
= emit_instruction(emitInfo
, OPCODE_SEQ
,
888 inst_comment(inst
, "Invert true/false");
891 _slang_free_temp(emitInfo
->vt
, &accTemp
);
892 _slang_free_temp(emitInfo
->vt
, &sneTemp
);
896 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
897 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
905 * Generate code for an IR_CLAMP instruction.
907 static struct prog_instruction
*
908 emit_clamp(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
910 struct prog_instruction
*inst
;
911 slang_ir_node tmpNode
;
913 assert(n
->Opcode
== IR_CLAMP
);
919 inst
= emit(emitInfo
, n
->Children
[0]);
921 /* If lower limit == 0.0 and upper limit == 1.0,
922 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
924 * emit OPCODE_MIN, OPCODE_MAX sequence.
927 /* XXX this isn't quite finished yet */
928 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
929 n
->Children
[1]->Value
[0] == 0.0 &&
930 n
->Children
[1]->Value
[1] == 0.0 &&
931 n
->Children
[1]->Value
[2] == 0.0 &&
932 n
->Children
[1]->Value
[3] == 0.0 &&
933 n
->Children
[2]->Opcode
== IR_FLOAT
&&
934 n
->Children
[2]->Value
[0] == 1.0 &&
935 n
->Children
[2]->Value
[1] == 1.0 &&
936 n
->Children
[2]->Value
[2] == 1.0 &&
937 n
->Children
[2]->Value
[3] == 1.0) {
939 inst
= prev_instruction(prog
);
941 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
942 /* and prev instruction's DstReg matches n->Children[0]->Store */
943 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
944 n
->Store
= n
->Children
[0]->Store
;
950 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
953 emit(emitInfo
, n
->Children
[1]);
954 emit(emitInfo
, n
->Children
[2]);
956 /* Some GPUs don't allow reading from output registers. So if the
957 * dest for this clamp() is an output reg, we can't use that reg for
958 * the intermediate result. Use a temp register instead.
960 _mesa_bzero(&tmpNode
, sizeof(tmpNode
));
961 alloc_node_storage(emitInfo
, &tmpNode
, n
->Store
->Size
);
963 /* tmp = max(ch[0], ch[1]) */
964 inst
= emit_instruction(emitInfo
, OPCODE_MAX
,
965 tmpNode
.Store
, /* dest */
966 n
->Children
[0]->Store
,
967 n
->Children
[1]->Store
,
970 /* n->dest = min(tmp, ch[2]) */
971 inst
= emit_instruction(emitInfo
, OPCODE_MIN
,
974 n
->Children
[2]->Store
,
977 free_node_storage(emitInfo
->vt
, &tmpNode
);
983 static struct prog_instruction
*
984 emit_negation(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
986 /* Implement as MOV dst, -src; */
987 /* XXX we could look at the previous instruction and in some circumstances
988 * modify it to accomplish the negation.
990 struct prog_instruction
*inst
;
992 emit(emitInfo
, n
->Children
[0]);
994 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
997 inst
= emit_instruction(emitInfo
,
1000 n
->Children
[0]->Store
,
1003 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
1008 static struct prog_instruction
*
1009 emit_label(slang_emit_info
*emitInfo
, const slang_ir_node
*n
)
1013 /* XXX this fails in loop tail code - investigate someday */
1014 assert(_slang_label_get_location(n
->Label
) < 0);
1015 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1018 if (_slang_label_get_location(n
->Label
) < 0)
1019 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1027 * Emit code for a function call.
1028 * Note that for each time a function is called, we emit the function's
1029 * body code again because the set of available registers may be different.
1031 static struct prog_instruction
*
1032 emit_fcall(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1034 struct gl_program
*progSave
;
1035 struct prog_instruction
*inst
;
1036 GLuint subroutineId
;
1038 assert(n
->Opcode
== IR_CALL
);
1041 /* save/push cur program */
1042 progSave
= emitInfo
->prog
;
1043 emitInfo
->prog
= new_subroutine(emitInfo
, &subroutineId
);
1045 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1048 if (emitInfo
->EmitBeginEndSub
) {
1049 /* BGNSUB isn't a real instruction.
1050 * We require a label (i.e. "foobar:") though, if we're going to
1051 * print the program in the NV format. The BNGSUB instruction is
1052 * really just a NOP to attach the label to.
1054 inst
= new_instruction(emitInfo
, OPCODE_BGNSUB
);
1055 inst_comment(inst
, n
->Label
->Name
);
1058 /* body of function: */
1059 emit(emitInfo
, n
->Children
[0]);
1060 n
->Store
= n
->Children
[0]->Store
;
1062 /* add RET instruction now, if needed */
1063 inst
= prev_instruction(emitInfo
);
1064 if (inst
&& inst
->Opcode
!= OPCODE_RET
) {
1065 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1068 if (emitInfo
->EmitBeginEndSub
) {
1069 inst
= new_instruction(emitInfo
, OPCODE_ENDSUB
);
1070 inst_comment(inst
, n
->Label
->Name
);
1073 /* pop/restore cur program */
1074 emitInfo
->prog
= progSave
;
1076 /* emit the function call */
1077 inst
= new_instruction(emitInfo
, OPCODE_CAL
);
1078 /* The branch target is just the subroutine number (changed later) */
1079 inst
->BranchTarget
= subroutineId
;
1080 inst_comment(inst
, n
->Label
->Name
);
1081 assert(inst
->BranchTarget
>= 0);
1088 * Emit code for a 'return' statement.
1090 static struct prog_instruction
*
1091 emit_return(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1093 struct prog_instruction
*inst
;
1095 assert(n
->Opcode
== IR_RETURN
);
1097 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1098 inst
->DstReg
.CondMask
= COND_TR
; /* always return */
1103 static struct prog_instruction
*
1104 emit_kill(slang_emit_info
*emitInfo
)
1106 struct gl_fragment_program
*fp
;
1107 struct prog_instruction
*inst
;
1108 /* NV-KILL - discard fragment depending on condition code.
1109 * Note that ARB-KILL depends on sign of vector operand.
1111 inst
= new_instruction(emitInfo
, OPCODE_KIL_NV
);
1112 inst
->DstReg
.CondMask
= COND_TR
; /* always kill */
1114 assert(emitInfo
->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
);
1115 fp
= (struct gl_fragment_program
*) emitInfo
->prog
;
1116 fp
->UsesKill
= GL_TRUE
;
1122 static struct prog_instruction
*
1123 emit_tex(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1125 struct prog_instruction
*inst
;
1126 gl_inst_opcode opcode
;
1128 if (n
->Opcode
== IR_TEX
) {
1129 opcode
= OPCODE_TEX
;
1131 else if (n
->Opcode
== IR_TEXB
) {
1132 opcode
= OPCODE_TXB
;
1135 assert(n
->Opcode
== IR_TEXP
);
1136 opcode
= OPCODE_TXP
;
1139 /* emit code for the texcoord operand */
1140 (void) emit(emitInfo
, n
->Children
[1]);
1142 /* alloc storage for result of texture fetch */
1143 if (!alloc_node_storage(emitInfo
, n
, 4))
1146 /* emit TEX instruction; Child[1] is the texcoord */
1147 inst
= emit_instruction(emitInfo
,
1150 n
->Children
[1]->Store
,
1154 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
1155 assert(n
->Children
[0]->Store
);
1156 /* Store->Index is the sampler index */
1157 assert(n
->Children
[0]->Store
->Index
>= 0);
1158 /* Store->Size is the texture target */
1159 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
1160 assert(n
->Children
[0]->Store
->Size
<= TEXTURE_RECT_INDEX
);
1162 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
1163 inst
->TexSrcUnit
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
1172 static struct prog_instruction
*
1173 emit_copy(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1175 struct prog_instruction
*inst
;
1177 assert(n
->Opcode
== IR_COPY
);
1180 emit(emitInfo
, n
->Children
[0]);
1181 if (!n
->Children
[0]->Store
|| n
->Children
[0]->Store
->Index
< 0) {
1182 /* an error should have been already recorded */
1187 assert(n
->Children
[1]);
1188 inst
= emit(emitInfo
, n
->Children
[1]);
1190 if (!n
->Children
[1]->Store
|| n
->Children
[1]->Store
->Index
< 0) {
1191 if (!emitInfo
->log
->text
) {
1192 slang_info_log_error(emitInfo
->log
, "invalid assignment");
1197 assert(n
->Children
[1]->Store
->Index
>= 0);
1199 /*assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);*/
1201 n
->Store
= n
->Children
[0]->Store
;
1203 if (n
->Store
->File
== PROGRAM_SAMPLER
) {
1204 /* no code generated for sampler assignments,
1205 * just copy the sampler index at compile time.
1207 n
->Store
->Index
= n
->Children
[1]->Store
->Index
;
1211 #if PEEPHOLE_OPTIMIZATIONS
1213 _slang_is_temp(emitInfo
->vt
, n
->Children
[1]->Store
) &&
1214 (inst
->DstReg
.File
== n
->Children
[1]->Store
->File
) &&
1215 (inst
->DstReg
.Index
== n
->Children
[1]->Store
->Index
)) {
1216 /* Peephole optimization:
1217 * The Right-Hand-Side has its results in a temporary place.
1218 * Modify the RHS (and the prev instruction) to store its results
1219 * in the destination specified by n->Children[0].
1220 * Then, this MOVE is a no-op.
1227 if (n
->Children
[1]->Opcode
!= IR_SWIZZLE
)
1228 _slang_free_temp(emitInfo
->vt
, n
->Children
[1]->Store
);
1229 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
1231 /* fixup the previous instruction (which stored the RHS result) */
1232 assert(n
->Children
[0]->Store
->Index
>= 0);
1234 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
);
1240 if (n
->Children
[0]->Store
->Size
> 4) {
1241 /* move matrix/struct etc (block of registers) */
1242 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
1243 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
1244 GLint size
= srcStore
.Size
;
1245 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
1249 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1254 inst_comment(inst
, "IR_COPY block");
1261 /* single register move */
1262 char *srcAnnot
, *dstAnnot
;
1263 assert(n
->Children
[0]->Store
->Index
>= 0);
1264 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1265 n
->Children
[0]->Store
, /* dest */
1266 n
->Children
[1]->Store
,
1269 dstAnnot
= storage_annotation(n
->Children
[0], emitInfo
->prog
);
1270 srcAnnot
= storage_annotation(n
->Children
[1], emitInfo
->prog
);
1271 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1272 srcAnnot
, NULL
, NULL
);
1274 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1281 * An IR_COND node wraps a boolean expression which is used by an
1282 * IF or WHILE test. This is where we'll set condition codes, if needed.
1284 static struct prog_instruction
*
1285 emit_cond(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1287 struct prog_instruction
*inst
;
1289 assert(n
->Opcode
== IR_COND
);
1291 if (!n
->Children
[0])
1294 /* emit code for the expression */
1295 inst
= emit(emitInfo
, n
->Children
[0]);
1297 if (!n
->Children
[0]->Store
) {
1298 /* error recovery */
1302 assert(n
->Children
[0]->Store
);
1303 /*assert(n->Children[0]->Store->Size == 1);*/
1305 if (emitInfo
->EmitCondCodes
) {
1307 n
->Children
[0]->Store
&&
1308 inst
->DstReg
.File
== n
->Children
[0]->Store
->File
&&
1309 inst
->DstReg
.Index
== n
->Children
[0]->Store
->Index
) {
1310 /* The previous instruction wrote to the register who's value
1311 * we're testing. Just fix that instruction so that the
1312 * condition codes are computed.
1314 inst
->CondUpdate
= GL_TRUE
;
1315 n
->Store
= n
->Children
[0]->Store
;
1319 /* This'll happen for things like "if (i) ..." where no code
1320 * is normally generated for the expression "i".
1321 * Generate a move instruction just to set condition codes.
1323 if (!alloc_node_storage(emitInfo
, n
, 1))
1325 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1326 n
->Store
, /* dest */
1327 n
->Children
[0]->Store
,
1330 inst
->CondUpdate
= GL_TRUE
;
1331 inst_comment(inst
, "COND expr");
1332 _slang_free_temp(emitInfo
->vt
, n
->Store
);
1337 /* No-op: the boolean result of the expression is in a regular reg */
1338 n
->Store
= n
->Children
[0]->Store
;
1347 static struct prog_instruction
*
1348 emit_not(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1350 static const struct {
1351 gl_inst_opcode op
, opNot
;
1353 { OPCODE_SLT
, OPCODE_SGE
},
1354 { OPCODE_SLE
, OPCODE_SGT
},
1355 { OPCODE_SGT
, OPCODE_SLE
},
1356 { OPCODE_SGE
, OPCODE_SLT
},
1357 { OPCODE_SEQ
, OPCODE_SNE
},
1358 { OPCODE_SNE
, OPCODE_SEQ
},
1361 struct prog_instruction
*inst
;
1362 slang_ir_storage zero
;
1366 inst
= emit(emitInfo
, n
->Children
[0]);
1368 #if PEEPHOLE_OPTIMIZATIONS
1370 /* if the prev instruction was a comparison instruction, invert it */
1371 for (i
= 0; operators
[i
].op
; i
++) {
1372 if (inst
->Opcode
== operators
[i
].op
) {
1373 inst
->Opcode
= operators
[i
].opNot
;
1374 n
->Store
= n
->Children
[0]->Store
;
1381 /* else, invert using SEQ (v = v == 0) */
1382 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1385 constant_to_storage(emitInfo
, 0.0, &zero
);
1386 inst
= emit_instruction(emitInfo
,
1389 n
->Children
[0]->Store
,
1392 inst_comment(inst
, "NOT");
1394 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1400 static struct prog_instruction
*
1401 emit_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1403 struct gl_program
*prog
= emitInfo
->prog
;
1404 GLuint ifInstLoc
, elseInstLoc
= 0;
1405 GLuint condWritemask
= 0;
1407 /* emit condition expression code */
1409 struct prog_instruction
*inst
;
1410 inst
= emit(emitInfo
, n
->Children
[0]);
1411 if (emitInfo
->EmitCondCodes
) {
1413 /* error recovery */
1416 condWritemask
= inst
->DstReg
.WriteMask
;
1420 if (!n
->Children
[0]->Store
)
1424 assert(n
->Children
[0]->Store
->Size
== 1); /* a bool! */
1427 ifInstLoc
= prog
->NumInstructions
;
1428 if (emitInfo
->EmitHighLevelInstructions
) {
1429 if (emitInfo
->EmitCondCodes
) {
1430 /* IF condcode THEN ... */
1431 struct prog_instruction
*ifInst
;
1432 ifInst
= new_instruction(emitInfo
, OPCODE_IF
);
1433 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1434 /* only test the cond code (1 of 4) that was updated by the
1435 * previous instruction.
1437 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1440 /* IF src[0] THEN ... */
1441 emit_instruction(emitInfo
, OPCODE_IF
,
1443 n
->Children
[0]->Store
, /* op0 */
1449 /* conditional jump to else, or endif */
1450 struct prog_instruction
*ifInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1451 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1452 inst_comment(ifInst
, "if zero");
1453 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1457 emit(emitInfo
, n
->Children
[1]);
1459 if (n
->Children
[2]) {
1460 /* have else body */
1461 elseInstLoc
= prog
->NumInstructions
;
1462 if (emitInfo
->EmitHighLevelInstructions
) {
1463 (void) new_instruction(emitInfo
, OPCODE_ELSE
);
1466 /* jump to endif instruction */
1467 struct prog_instruction
*inst
;
1468 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1469 inst_comment(inst
, "else");
1470 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1472 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1473 emit(emitInfo
, n
->Children
[2]);
1477 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1480 if (emitInfo
->EmitHighLevelInstructions
) {
1481 (void) new_instruction(emitInfo
, OPCODE_ENDIF
);
1484 if (n
->Children
[2]) {
1485 prog
->Instructions
[elseInstLoc
].BranchTarget
= prog
->NumInstructions
;
1491 static struct prog_instruction
*
1492 emit_loop(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1494 struct gl_program
*prog
= emitInfo
->prog
;
1495 struct prog_instruction
*endInst
;
1496 GLuint beginInstLoc
, tailInstLoc
, endInstLoc
;
1499 /* emit OPCODE_BGNLOOP */
1500 beginInstLoc
= prog
->NumInstructions
;
1501 if (emitInfo
->EmitHighLevelInstructions
) {
1502 (void) new_instruction(emitInfo
, OPCODE_BGNLOOP
);
1506 emit(emitInfo
, n
->Children
[0]);
1509 tailInstLoc
= prog
->NumInstructions
;
1510 if (n
->Children
[1]) {
1511 if (emitInfo
->EmitComments
)
1512 emit_comment(emitInfo
, "Loop tail code:");
1513 emit(emitInfo
, n
->Children
[1]);
1516 endInstLoc
= prog
->NumInstructions
;
1517 if (emitInfo
->EmitHighLevelInstructions
) {
1518 /* emit OPCODE_ENDLOOP */
1519 endInst
= new_instruction(emitInfo
, OPCODE_ENDLOOP
);
1522 /* emit unconditional BRA-nch */
1523 endInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1524 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1526 /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1527 endInst
->BranchTarget
= beginInstLoc
;
1529 if (emitInfo
->EmitHighLevelInstructions
) {
1530 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1531 prog
->Instructions
[beginInstLoc
].BranchTarget
= prog
->NumInstructions
-1;
1534 /* Done emitting loop code. Now walk over the loop's linked list of
1535 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1536 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1538 for (ir
= n
->List
; ir
; ir
= ir
->List
) {
1539 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1540 assert(inst
->BranchTarget
< 0);
1541 if (ir
->Opcode
== IR_BREAK
||
1542 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1543 assert(inst
->Opcode
== OPCODE_BRK
||
1544 inst
->Opcode
== OPCODE_BRA
);
1545 /* go to instruction after end of loop */
1546 inst
->BranchTarget
= endInstLoc
+ 1;
1549 assert(ir
->Opcode
== IR_CONT
||
1550 ir
->Opcode
== IR_CONT_IF_TRUE
);
1551 assert(inst
->Opcode
== OPCODE_CONT
||
1552 inst
->Opcode
== OPCODE_BRA
);
1553 /* go to instruction at tail of loop */
1554 inst
->BranchTarget
= endInstLoc
;
1562 * Unconditional "continue" or "break" statement.
1563 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1565 static struct prog_instruction
*
1566 emit_cont_break(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1568 gl_inst_opcode opcode
;
1569 struct prog_instruction
*inst
;
1571 if (n
->Opcode
== IR_CONT
) {
1572 /* we need to execute the loop's tail code before doing CONT */
1574 assert(n
->Parent
->Opcode
== IR_LOOP
);
1575 if (n
->Parent
->Children
[1]) {
1576 /* emit tail code */
1577 if (emitInfo
->EmitComments
) {
1578 emit_comment(emitInfo
, "continue - tail code:");
1580 emit(emitInfo
, n
->Parent
->Children
[1]);
1584 /* opcode selection */
1585 if (emitInfo
->EmitHighLevelInstructions
) {
1586 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1589 opcode
= OPCODE_BRA
;
1591 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1592 inst
= new_instruction(emitInfo
, opcode
);
1593 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1599 * Conditional "continue" or "break" statement.
1600 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1602 static struct prog_instruction
*
1603 emit_cont_break_if_true(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1605 struct prog_instruction
*inst
;
1607 assert(n
->Opcode
== IR_CONT_IF_TRUE
||
1608 n
->Opcode
== IR_BREAK_IF_TRUE
);
1610 /* evaluate condition expr, setting cond codes */
1611 inst
= emit(emitInfo
, n
->Children
[0]);
1612 if (emitInfo
->EmitCondCodes
) {
1614 inst
->CondUpdate
= GL_TRUE
;
1617 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1619 /* opcode selection */
1620 if (emitInfo
->EmitHighLevelInstructions
) {
1621 const gl_inst_opcode opcode
1622 = (n
->Opcode
== IR_CONT_IF_TRUE
) ? OPCODE_CONT
: OPCODE_BRK
;
1623 if (emitInfo
->EmitCondCodes
) {
1624 /* Get the writemask from the previous instruction which set
1625 * the condcodes. Use that writemask as the CondSwizzle.
1627 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1628 inst
= new_instruction(emitInfo
, opcode
);
1629 inst
->DstReg
.CondMask
= COND_NE
;
1630 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1639 ifInstLoc
= emitInfo
->prog
->NumInstructions
;
1640 inst
= emit_instruction(emitInfo
, OPCODE_IF
,
1642 n
->Children
[0]->Store
,
1645 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1647 inst
= new_instruction(emitInfo
, opcode
);
1648 inst
= new_instruction(emitInfo
, OPCODE_ENDIF
);
1650 emitInfo
->prog
->Instructions
[ifInstLoc
].BranchTarget
1651 = emitInfo
->prog
->NumInstructions
;
1656 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1657 assert(emitInfo
->EmitCondCodes
);
1658 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1659 inst
->DstReg
.CondMask
= COND_NE
;
1660 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1666 static struct prog_instruction
*
1667 emit_swizzle(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1669 struct prog_instruction
*inst
;
1671 inst
= emit(emitInfo
, n
->Children
[0]);
1673 /* setup storage info, if needed */
1674 if (!n
->Store
->Parent
)
1675 n
->Store
->Parent
= n
->Children
[0]->Store
;
1677 assert(n
->Store
->Parent
);
1684 * Move a block registers from src to dst (or move a single register).
1685 * \param size size of block, in floats (<=4 means one register)
1687 static struct prog_instruction
*
1688 move_block(slang_emit_info
*emitInfo
,
1689 GLuint size
, GLboolean relAddr
,
1690 const slang_ir_storage
*dst
,
1691 const slang_ir_storage
*src
)
1693 struct prog_instruction
*inst
;
1696 /* move matrix/struct etc (block of registers) */
1697 slang_ir_storage dstStore
= *dst
;
1698 slang_ir_storage srcStore
= *src
;
1703 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1708 inst
->SrcReg
[0].RelAddr
= relAddr
;
1709 inst_comment(inst
, "IR_COPY block");
1716 /* single register move */
1717 inst
= emit_instruction(emitInfo
,
1723 inst
->SrcReg
[0].RelAddr
= relAddr
;
1731 * Dereference array element. Just resolve storage for the array
1732 * element represented by this node.
1733 * This is typically where Indirect addressing comes into play.
1734 * See comments on struct slang_ir_storage.
1736 static struct prog_instruction
*
1737 emit_array_element(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1739 assert(n
->Opcode
== IR_ELEMENT
);
1741 assert(n
->Store
->File
== PROGRAM_UNDEFINED
);
1742 assert(n
->Store
->Parent
);
1743 assert(n
->Store
->Size
> 0);
1746 slang_ir_storage
*root
= n
->Store
;
1747 while (root
->Parent
)
1748 root
= root
->Parent
;
1750 if (root
->File
== PROGRAM_STATE_VAR
) {
1751 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1752 assert(n
->Store
->Index
== index
);
1757 /* do codegen for array */
1758 emit(emitInfo
, n
->Children
[0]);
1760 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1761 /* Constant array index.
1762 * Set Store's index to be the offset of the array element in
1763 * the register file.
1765 const GLint element
= (GLint
) n
->Children
[1]->Value
[0];
1766 const GLint sz
= (n
->Store
->Size
+ 3) / 4; /* size in slots/registers */
1768 n
->Store
->Index
= sz
* element
;
1769 assert(n
->Store
->Parent
);
1772 /* Variable array index */
1773 struct prog_instruction
*inst
;
1775 /* do codegen for array index expression */
1776 emit(emitInfo
, n
->Children
[1]);
1778 /* allocate temp storage for the array element */
1779 assert(n
->Store
->Index
< 0);
1780 n
->Store
->File
= PROGRAM_TEMPORARY
;
1781 n
->Store
->Parent
= NULL
;
1782 alloc_node_storage(emitInfo
, n
, -1);
1784 if (n
->Store
->Size
> 4) {
1785 /* need to multiply the index by the element size */
1786 const GLint elemSize
= (n
->Store
->Size
+ 3) / 4;
1787 slang_ir_storage indexTemp
, elemSizeStore
;
1789 /* constant containing the element size */
1790 constant_to_storage(emitInfo
, (float) elemSize
, &elemSizeStore
);
1792 /* allocate 1 float indexTemp */
1793 alloc_local_temp(emitInfo
, &indexTemp
, 1);
1795 /* MUL temp, index, elemSize */
1796 inst
= emit_instruction(emitInfo
, OPCODE_MUL
,
1797 &indexTemp
, /* dest */
1798 n
->Children
[1]->Store
, /* the index */
1802 /* load ADDR[0].X = temp */
1803 inst
= emit_arl_instruction(emitInfo
, 0, &indexTemp
);
1805 _slang_free_temp(emitInfo
->vt
, &indexTemp
);
1808 /* simply load address reg w/ array index */
1809 inst
= emit_arl_instruction(emitInfo
, 0, n
->Children
[1]->Store
);
1812 /* copy from array element to temp storage */
1813 move_block(emitInfo
, n
->Store
->Size
, GL_TRUE
,
1814 n
->Store
, n
->Children
[0]->Store
);
1817 /* if array element size is one, make sure we only access X */
1818 if (n
->Store
->Size
== 1)
1819 n
->Store
->Swizzle
= SWIZZLE_XXXX
;
1821 return NULL
; /* no instruction */
1826 * Resolve storage for accessing a structure field.
1828 static struct prog_instruction
*
1829 emit_struct_field(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1831 slang_ir_storage
*root
= n
->Store
;
1833 assert(n
->Opcode
== IR_FIELD
);
1835 while (root
->Parent
)
1836 root
= root
->Parent
;
1838 /* If this is the field of a state var, allocate constant/uniform
1839 * storage for it now if we haven't already.
1840 * Note that we allocate storage (uniform/constant slots) for state
1841 * variables here rather than at declaration time so we only allocate
1842 * space for the ones that we actually use!
1844 if (root
->File
== PROGRAM_STATE_VAR
) {
1845 root
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1846 if (root
->Index
< 0) {
1847 slang_info_log_error(emitInfo
->log
, "Error parsing state variable");
1852 /* do codegen for struct */
1853 emit(emitInfo
, n
->Children
[0]);
1856 return NULL
; /* no instruction */
1861 * Emit code for a variable declaration.
1862 * This usually doesn't result in any code generation, but just
1863 * memory allocation.
1865 static struct prog_instruction
*
1866 emit_var_decl(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1869 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1870 assert(n
->Store
->Size
> 0);
1871 /*assert(n->Store->Index < 0);*/
1873 if (!n
->Var
|| n
->Var
->isTemp
) {
1874 /* a nameless/temporary variable, will be freed after first use */
1876 if (n
->Store
->Index
< 0 && !_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
1877 slang_info_log_error(emitInfo
->log
,
1878 "Ran out of registers, too many temporaries");
1883 /* a regular variable */
1884 _slang_add_variable(emitInfo
->vt
, n
->Var
);
1885 if (!_slang_alloc_var(emitInfo
->vt
, n
->Store
)) {
1886 slang_info_log_error(emitInfo
->log
,
1887 "Ran out of registers, too many variables");
1891 printf("IR_VAR_DECL %s %d store %p\n",
1892 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1894 assert(n
->Var
->aux
== n
->Store
);
1896 if (emitInfo
->EmitComments
) {
1897 /* emit NOP with comment describing the variable's storage location */
1899 sprintf(s
, "TEMP[%d]%s = variable %s (size %d)",
1901 _mesa_swizzle_string(n
->Store
->Swizzle
, 0, GL_FALSE
),
1902 (n
->Var
? (char *) n
->Var
->a_name
: "anonymous"),
1904 emit_comment(emitInfo
, s
);
1911 * Emit code for a reference to a variable.
1912 * Actually, no code is generated but we may do some memory alloation.
1913 * In particular, state vars (uniforms) are allocated on an as-needed basis.
1915 static struct prog_instruction
*
1916 emit_var_ref(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1919 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1921 if (n
->Store
->File
== PROGRAM_STATE_VAR
&& n
->Store
->Index
< 0) {
1922 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1924 else if (n
->Store
->File
== PROGRAM_UNIFORM
) {
1925 /* mark var as used */
1926 _mesa_use_uniform(emitInfo
->prog
->Parameters
, (char *) n
->Var
->a_name
);
1929 if (n
->Store
->Index
< 0) {
1930 /* probably ran out of registers */
1933 assert(n
->Store
->Size
> 0);
1939 static struct prog_instruction
*
1940 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1942 struct prog_instruction
*inst
;
1946 if (emitInfo
->log
->error_flag
) {
1950 switch (n
->Opcode
) {
1952 /* sequence of two sub-trees */
1953 assert(n
->Children
[0]);
1954 assert(n
->Children
[1]);
1955 emit(emitInfo
, n
->Children
[0]);
1956 if (emitInfo
->log
->error_flag
)
1958 inst
= emit(emitInfo
, n
->Children
[1]);
1962 n
->Store
= n
->Children
[1]->Store
;
1966 /* new variable scope */
1967 _slang_push_var_table(emitInfo
->vt
);
1968 inst
= emit(emitInfo
, n
->Children
[0]);
1969 _slang_pop_var_table(emitInfo
->vt
);
1973 /* Variable declaration - allocate a register for it */
1974 inst
= emit_var_decl(emitInfo
, n
);
1978 /* Reference to a variable
1979 * Storage should have already been resolved/allocated.
1981 return emit_var_ref(emitInfo
, n
);
1984 return emit_array_element(emitInfo
, n
);
1986 return emit_struct_field(emitInfo
, n
);
1988 return emit_swizzle(emitInfo
, n
);
1990 /* Simple arithmetic */
2030 /* trinary operators */
2032 return emit_arith(emitInfo
, n
);
2036 return emit_compare(emitInfo
, n
);
2039 return emit_clamp(emitInfo
, n
);
2043 return emit_tex(emitInfo
, n
);
2045 return emit_negation(emitInfo
, n
);
2047 /* find storage location for this float constant */
2048 n
->Store
->Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
2051 &n
->Store
->Swizzle
);
2052 if (n
->Store
->Index
< 0) {
2053 slang_info_log_error(emitInfo
->log
, "Ran out of space for constants");
2059 return emit_copy(emitInfo
, n
);
2062 return emit_cond(emitInfo
, n
);
2065 return emit_not(emitInfo
, n
);
2068 return emit_label(emitInfo
, n
);
2071 return emit_kill(emitInfo
);
2074 /* new variable scope for subroutines/function calls */
2075 _slang_push_var_table(emitInfo
->vt
);
2076 inst
= emit_fcall(emitInfo
, n
);
2077 _slang_pop_var_table(emitInfo
->vt
);
2081 return emit_if(emitInfo
, n
);
2084 return emit_loop(emitInfo
, n
);
2085 case IR_BREAK_IF_TRUE
:
2086 case IR_CONT_IF_TRUE
:
2087 return emit_cont_break_if_true(emitInfo
, n
);
2091 return emit_cont_break(emitInfo
, n
);
2094 return new_instruction(emitInfo
, OPCODE_BGNSUB
);
2096 return new_instruction(emitInfo
, OPCODE_ENDSUB
);
2098 return emit_return(emitInfo
, n
);
2104 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
2111 * After code generation, any subroutines will be in separate program
2112 * objects. This function appends all the subroutines onto the main
2113 * program and resolves the linking of all the branch/call instructions.
2114 * XXX this logic should really be part of the linking process...
2117 _slang_resolve_subroutines(slang_emit_info
*emitInfo
)
2119 GET_CURRENT_CONTEXT(ctx
);
2120 struct gl_program
*mainP
= emitInfo
->prog
;
2121 GLuint
*subroutineLoc
, i
, total
;
2124 = (GLuint
*) _mesa_malloc(emitInfo
->NumSubroutines
* sizeof(GLuint
));
2126 /* total number of instructions */
2127 total
= mainP
->NumInstructions
;
2128 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2129 subroutineLoc
[i
] = total
;
2130 total
+= emitInfo
->Subroutines
[i
]->NumInstructions
;
2133 /* adjust BrancTargets within the functions */
2134 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2135 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2137 for (j
= 0; j
< sub
->NumInstructions
; j
++) {
2138 struct prog_instruction
*inst
= sub
->Instructions
+ j
;
2139 if (inst
->Opcode
!= OPCODE_CAL
&& inst
->BranchTarget
>= 0) {
2140 inst
->BranchTarget
+= subroutineLoc
[i
];
2145 /* append subroutines' instructions after main's instructions */
2146 mainP
->Instructions
= _mesa_realloc_instructions(mainP
->Instructions
,
2147 mainP
->NumInstructions
,
2149 mainP
->NumInstructions
= total
;
2150 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2151 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2152 _mesa_copy_instructions(mainP
->Instructions
+ subroutineLoc
[i
],
2154 sub
->NumInstructions
);
2155 /* delete subroutine code */
2156 sub
->Parameters
= NULL
; /* prevent double-free */
2157 _mesa_reference_program(ctx
, &emitInfo
->Subroutines
[i
], NULL
);
2160 /* free subroutine list */
2161 if (emitInfo
->Subroutines
) {
2162 _mesa_free(emitInfo
->Subroutines
);
2163 emitInfo
->Subroutines
= NULL
;
2165 emitInfo
->NumSubroutines
= 0;
2167 /* Examine CAL instructions.
2168 * At this point, the BranchTarget field of the CAL instruction is
2169 * the number/id of the subroutine to call (an index into the
2170 * emitInfo->Subroutines list).
2171 * Translate that into an actual instruction location now.
2173 for (i
= 0; i
< mainP
->NumInstructions
; i
++) {
2174 struct prog_instruction
*inst
= mainP
->Instructions
+ i
;
2175 if (inst
->Opcode
== OPCODE_CAL
) {
2176 const GLuint f
= inst
->BranchTarget
;
2177 inst
->BranchTarget
= subroutineLoc
[f
];
2181 _mesa_free(subroutineLoc
);
2188 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
2189 struct gl_program
*prog
, GLboolean withEnd
,
2190 slang_info_log
*log
)
2192 GET_CURRENT_CONTEXT(ctx
);
2194 slang_emit_info emitInfo
;
2199 emitInfo
.prog
= prog
;
2200 emitInfo
.Subroutines
= NULL
;
2201 emitInfo
.NumSubroutines
= 0;
2203 emitInfo
.EmitHighLevelInstructions
= ctx
->Shader
.EmitHighLevelInstructions
;
2204 emitInfo
.EmitCondCodes
= ctx
->Shader
.EmitCondCodes
;
2205 emitInfo
.EmitComments
= ctx
->Shader
.EmitComments
;
2206 emitInfo
.EmitBeginEndSub
= GL_TRUE
;
2208 if (!emitInfo
.EmitCondCodes
) {
2209 emitInfo
.EmitHighLevelInstructions
= GL_TRUE
;
2212 /* Check uniform/constant limits */
2213 if (prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
2214 maxUniforms
= ctx
->Const
.FragmentProgram
.MaxUniformComponents
/ 4;
2217 assert(prog
->Target
== GL_VERTEX_PROGRAM_ARB
);
2218 maxUniforms
= ctx
->Const
.VertexProgram
.MaxUniformComponents
/ 4;
2220 if (prog
->Parameters
->NumParameters
> maxUniforms
) {
2221 slang_info_log_error(log
, "Constant/uniform register limit exceeded");
2225 (void) emit(&emitInfo
, n
);
2227 /* finish up by adding the END opcode to program */
2229 struct prog_instruction
*inst
;
2230 inst
= new_instruction(&emitInfo
, OPCODE_END
);
2233 _slang_resolve_subroutines(&emitInfo
);
2238 printf("*********** End emit code (%u inst):\n", prog
->NumInstructions
);
2239 _mesa_print_program(prog
);
2240 _mesa_print_program_parameters(ctx
,prog
);