2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
34 *** To emit GPU instructions, we basically just do an in-order traversal
43 #include "prog_instruction.h"
44 #include "prog_parameter.h"
45 #include "prog_print.h"
46 #include "slang_builtin.h"
47 #include "slang_emit.h"
50 #define PEEPHOLE_OPTIMIZATIONS 1
54 /* XXX temporarily here */
61 struct gl_program
*prog
;
62 /* code-gen options */
63 GLboolean EmitHighLevelInstructions
;
64 GLboolean EmitComments
;
69 * Assembly and IR info
73 slang_ir_opcode IrOpcode
;
75 gl_inst_opcode InstOpcode
;
76 GLuint ResultSize
, NumParams
;
81 static const slang_ir_info IrInfo
[] = {
83 { IR_ADD
, "IR_ADD", OPCODE_ADD
, 4, 2 },
84 { IR_SUB
, "IR_SUB", OPCODE_SUB
, 4, 2 },
85 { IR_MUL
, "IR_MUL", OPCODE_MUL
, 4, 2 },
86 { IR_DIV
, "IR_DIV", OPCODE_NOP
, 0, 2 }, /* XXX broke */
87 { IR_DOT4
, "IR_DOT_4", OPCODE_DP4
, 1, 2 },
88 { IR_DOT3
, "IR_DOT_3", OPCODE_DP3
, 1, 2 },
89 { IR_CROSS
, "IR_CROSS", OPCODE_XPD
, 3, 2 },
90 { IR_LRP
, "IR_LRP", OPCODE_LRP
, 4, 3 },
91 { IR_MIN
, "IR_MIN", OPCODE_MIN
, 4, 2 },
92 { IR_MAX
, "IR_MAX", OPCODE_MAX
, 4, 2 },
93 { IR_CLAMP
, "IR_CLAMP", OPCODE_NOP
, 4, 3 }, /* special case: emit_clamp() */
94 { IR_SEQUAL
, "IR_SEQUAL", OPCODE_SEQ
, 4, 2 },
95 { IR_SNEQUAL
, "IR_SNEQUAL", OPCODE_SNE
, 4, 2 },
96 { IR_SGE
, "IR_SGE", OPCODE_SGE
, 4, 2 },
97 { IR_SGT
, "IR_SGT", OPCODE_SGT
, 4, 2 },
98 { IR_SLE
, "IR_SLE", OPCODE_SLE
, 4, 2 },
99 { IR_SLT
, "IR_SLT", OPCODE_SLT
, 4, 2 },
100 { IR_POW
, "IR_POW", OPCODE_POW
, 1, 2 },
102 { IR_I_TO_F
, "IR_I_TO_F", OPCODE_NOP
, 1, 1 },
103 { IR_F_TO_I
, "IR_F_TO_I", OPCODE_INT
, 4, 1 }, /* 4 floats to 4 ints */
104 { IR_EXP
, "IR_EXP", OPCODE_EXP
, 1, 1 },
105 { IR_EXP2
, "IR_EXP2", OPCODE_EX2
, 1, 1 },
106 { IR_LOG2
, "IR_LOG2", OPCODE_LG2
, 1, 1 },
107 { IR_RSQ
, "IR_RSQ", OPCODE_RSQ
, 1, 1 },
108 { IR_RCP
, "IR_RCP", OPCODE_RCP
, 1, 1 },
109 { IR_FLOOR
, "IR_FLOOR", OPCODE_FLR
, 4, 1 },
110 { IR_FRAC
, "IR_FRAC", OPCODE_FRC
, 4, 1 },
111 { IR_ABS
, "IR_ABS", OPCODE_ABS
, 4, 1 },
112 { IR_NEG
, "IR_NEG", OPCODE_NOP
, 4, 1 }, /* special case: emit_negation() */
113 { IR_DDX
, "IR_DDX", OPCODE_DDX
, 4, 1 },
114 { IR_DDX
, "IR_DDY", OPCODE_DDX
, 4, 1 },
115 { IR_SIN
, "IR_SIN", OPCODE_SIN
, 1, 1 },
116 { IR_COS
, "IR_COS", OPCODE_COS
, 1, 1 },
117 { IR_NOISE1
, "IR_NOISE1", OPCODE_NOISE1
, 1, 1 },
118 { IR_NOISE2
, "IR_NOISE2", OPCODE_NOISE2
, 1, 1 },
119 { IR_NOISE3
, "IR_NOISE3", OPCODE_NOISE3
, 1, 1 },
120 { IR_NOISE4
, "IR_NOISE4", OPCODE_NOISE4
, 1, 1 },
123 { IR_SEQ
, "IR_SEQ", OPCODE_NOP
, 0, 0 },
124 { IR_SCOPE
, "IR_SCOPE", OPCODE_NOP
, 0, 0 },
125 { IR_LABEL
, "IR_LABEL", OPCODE_NOP
, 0, 0 },
126 { IR_JUMP
, "IR_JUMP", OPCODE_NOP
, 0, 0 },
127 { IR_IF
, "IR_IF", OPCODE_NOP
, 0, 0 },
128 { IR_KILL
, "IR_KILL", OPCODE_NOP
, 0, 0 },
129 { IR_COND
, "IR_COND", OPCODE_NOP
, 0, 0 },
130 { IR_CALL
, "IR_CALL", OPCODE_NOP
, 0, 0 },
131 { IR_MOVE
, "IR_MOVE", OPCODE_NOP
, 0, 1 },
132 { IR_NOT
, "IR_NOT", OPCODE_NOP
, 1, 1 },
133 { IR_VAR
, "IR_VAR", OPCODE_NOP
, 0, 0 },
134 { IR_VAR_DECL
, "IR_VAR_DECL", OPCODE_NOP
, 0, 0 },
135 { IR_TEX
, "IR_TEX", OPCODE_TEX
, 4, 1 },
136 { IR_TEXB
, "IR_TEXB", OPCODE_TXB
, 4, 1 },
137 { IR_TEXP
, "IR_TEXP", OPCODE_TXP
, 4, 1 },
138 { IR_FLOAT
, "IR_FLOAT", OPCODE_NOP
, 0, 0 }, /* float literal */
139 { IR_FIELD
, "IR_FIELD", OPCODE_NOP
, 0, 0 },
140 { IR_ELEMENT
, "IR_ELEMENT", OPCODE_NOP
, 0, 0 },
141 { IR_SWIZZLE
, "IR_SWIZZLE", OPCODE_NOP
, 0, 0 },
142 { IR_NOP
, NULL
, OPCODE_NOP
, 0, 0 }
146 static const slang_ir_info
*
147 slang_find_ir_info(slang_ir_opcode opcode
)
150 for (i
= 0; IrInfo
[i
].IrName
; i
++) {
151 if (IrInfo
[i
].IrOpcode
== opcode
) {
159 slang_ir_name(slang_ir_opcode opcode
)
161 return slang_find_ir_info(opcode
)->IrName
;
166 * Swizzle a swizzle. That is, return swz2(swz1)
169 swizzle_swizzle(GLuint swz1
, GLuint swz2
)
172 for (i
= 0; i
< 4; i
++) {
173 GLuint c
= GET_SWZ(swz2
, i
);
174 s
[i
] = GET_SWZ(swz1
, c
);
176 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
182 _slang_new_ir_storage(enum register_file file
, GLint index
, GLint size
)
184 slang_ir_storage
*st
;
185 st
= (slang_ir_storage
*) _mesa_calloc(sizeof(slang_ir_storage
));
190 st
->Swizzle
= SWIZZLE_NOOP
;
197 swizzle_string(GLuint swizzle
)
202 for (i
= 1; i
< 5; i
++) {
203 s
[i
] = "xyzw"[GET_SWZ(swizzle
, i
-1)];
210 writemask_string(GLuint writemask
)
215 for (i
= 0; i
< 4; i
++) {
216 if (writemask
& (1 << i
))
224 storage_string(const slang_ir_storage
*st
)
226 static const char *files
[] = {
244 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
246 sprintf(s
, "%s[%d..%d]", files
[st
->File
], st
->Index
,
247 st
->Index
+ st
->Size
- 1);
249 assert(st
->File
< (GLint
) (sizeof(files
) / sizeof(files
[0])));
250 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
265 slang_print_ir(const slang_ir_node
*n
, int indent
)
270 if (n
->Opcode
!= IR_SEQ
)
272 printf("%3d:", indent
);
279 printf("SEQ at %p\n", (void*) n
);
281 assert(n
->Children
[0]);
282 assert(n
->Children
[1]);
283 slang_print_ir(n
->Children
[0], indent
+ IND
);
284 slang_print_ir(n
->Children
[1], indent
+ IND
);
287 printf("NEW SCOPE\n");
288 assert(!n
->Children
[1]);
289 slang_print_ir(n
->Children
[0], indent
+ 3);
292 printf("MOVE (writemask = %s)\n", writemask_string(n
->Writemask
));
293 slang_print_ir(n
->Children
[0], indent
+3);
294 slang_print_ir(n
->Children
[1], indent
+3);
297 printf("LABEL: %s\n", n
->Label
->Name
);
301 slang_print_ir(n
->Children
[0], indent
+ 3);
304 printf("JUMP %s\n", n
->Label
->Name
);
309 slang_print_ir(n
->Children
[0], indent
+3);
312 slang_print_ir(n
->Children
[1], indent
+3);
313 if (n
->Children
[2]) {
316 slang_print_ir(n
->Children
[2], indent
+3);
322 printf("BEGIN_SUB\n");
336 slang_print_ir(n
->Children
[0], indent
+3);
346 case IR_BREAK_IF_FALSE
:
347 printf("BREAK_IF_FALSE\n");
348 slang_print_ir(n
->Children
[0], indent
+3);
350 case IR_BREAK_IF_TRUE
:
351 printf("BREAK_IF_TRUE\n");
352 slang_print_ir(n
->Children
[0], indent
+3);
354 case IR_CONT_IF_FALSE
:
355 printf("CONT_IF_FALSE\n");
356 slang_print_ir(n
->Children
[0], indent
+3);
358 case IR_CONT_IF_TRUE
:
359 printf("CONT_IF_TRUE\n");
360 slang_print_ir(n
->Children
[0], indent
+3);
364 printf("VAR %s%s at %s store %p\n",
365 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
366 swizzle_string(n
->Store
->Swizzle
),
367 storage_string(n
->Store
), (void*) n
->Store
);
370 printf("VAR_DECL %s (%p) at %s store %p\n",
371 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
372 (void*) n
->Var
, storage_string(n
->Store
),
376 printf("FIELD %s of\n", n
->Field
);
377 slang_print_ir(n
->Children
[0], indent
+3);
380 printf("FLOAT %g %g %g %g\n",
381 n
->Value
[0], n
->Value
[1], n
->Value
[2], n
->Value
[3]);
384 printf("INT_TO_FLOAT\n");
385 slang_print_ir(n
->Children
[0], indent
+3);
388 printf("FLOAT_TO_INT\n");
389 slang_print_ir(n
->Children
[0], indent
+3);
392 printf("SWIZZLE %s of (store %p) \n",
393 swizzle_string(n
->Store
->Swizzle
), (void*) n
->Store
);
394 slang_print_ir(n
->Children
[0], indent
+ 3);
397 printf("%s (%p, %p) (store %p)\n", slang_ir_name(n
->Opcode
),
398 (void*) n
->Children
[0], (void*) n
->Children
[1], (void*) n
->Store
);
399 slang_print_ir(n
->Children
[0], indent
+3);
400 slang_print_ir(n
->Children
[1], indent
+3);
406 * Allocate temporary storage for an intermediate result (such as for
407 * a multiply or add, etc.
410 alloc_temp_storage(slang_emit_info
*emitInfo
, slang_ir_node
*n
, GLint size
)
415 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, size
);
416 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
417 slang_info_log_error(emitInfo
->log
,
418 "Ran out of registers, too many temporaries");
426 * Free temporary storage, if n->Store is, in fact, temp storage.
430 free_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
)
432 if (n
->Store
->File
== PROGRAM_TEMPORARY
&& n
->Store
->Index
>= 0) {
433 if (_slang_is_temp(vt
, n
->Store
)) {
434 _slang_free_temp(vt
, n
->Store
);
435 n
->Store
->Index
= -1;
443 * Convert IR storage to an instruction dst register.
446 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
,
449 static const GLuint defaultWritemask
[4] = {
451 WRITEMASK_X
| WRITEMASK_Y
,
452 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
,
453 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
| WRITEMASK_W
455 assert(st
->Index
>= 0);
456 dst
->File
= st
->File
;
457 dst
->Index
= st
->Index
;
458 assert(st
->File
!= PROGRAM_UNDEFINED
);
459 assert(st
->Size
>= 1);
460 assert(st
->Size
<= 4);
462 GLuint comp
= GET_SWZ(st
->Swizzle
, 0);
464 assert(writemask
& WRITEMASK_X
);
465 dst
->WriteMask
= WRITEMASK_X
<< comp
;
468 dst
->WriteMask
= defaultWritemask
[st
->Size
- 1] & writemask
;
474 * Convert IR storage to an instruction src register.
477 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
479 static const GLuint defaultSwizzle
[4] = {
480 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
481 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
482 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
483 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
)
485 assert(st
->File
>= 0);
486 assert(st
->File
< PROGRAM_UNDEFINED
);
487 assert(st
->Size
>= 1);
488 assert(st
->Size
<= 4);
489 src
->File
= st
->File
;
490 src
->Index
= st
->Index
;
491 if (st
->Swizzle
!= SWIZZLE_NOOP
)
492 src
->Swizzle
= st
->Swizzle
;
494 src
->Swizzle
= defaultSwizzle
[st
->Size
- 1]; /*XXX really need this?*/
496 assert(GET_SWZ(src
->Swizzle
, 0) != SWIZZLE_NIL
);
497 assert(GET_SWZ(src
->Swizzle
, 1) != SWIZZLE_NIL
);
498 assert(GET_SWZ(src
->Swizzle
, 2) != SWIZZLE_NIL
);
499 assert(GET_SWZ(src
->Swizzle
, 3) != SWIZZLE_NIL
);
505 * Add new instruction at end of given program.
506 * \param prog the program to append instruction onto
507 * \param opcode opcode for the new instruction
508 * \return pointer to the new instruction
510 static struct prog_instruction
*
511 new_instruction(slang_emit_info
*emitInfo
, gl_inst_opcode opcode
)
513 struct gl_program
*prog
= emitInfo
->prog
;
514 struct prog_instruction
*inst
;
515 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
516 prog
->NumInstructions
,
517 prog
->NumInstructions
+ 1);
518 inst
= prog
->Instructions
+ prog
->NumInstructions
;
519 prog
->NumInstructions
++;
520 _mesa_init_instructions(inst
, 1);
521 inst
->Opcode
= opcode
;
522 inst
->BranchTarget
= -1; /* invalid */
524 printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
525 _mesa_opcode_string(inst->Opcode));
533 * Return pointer to last instruction in program.
535 static struct prog_instruction
*
536 prev_instruction(struct gl_program
*prog
)
538 if (prog
->NumInstructions
== 0)
541 return prog
->Instructions
+ prog
->NumInstructions
- 1;
546 static struct prog_instruction
*
547 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
);
551 * Return an annotation string for given node's storage.
554 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
557 const slang_ir_storage
*st
= n
->Store
;
558 static char s
[100] = "";
561 return _mesa_strdup("");
564 case PROGRAM_CONSTANT
:
565 if (st
->Index
>= 0) {
566 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
567 if (st
->Swizzle
== SWIZZLE_NOOP
)
568 sprintf(s
, "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
570 sprintf(s
, "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
574 case PROGRAM_TEMPORARY
:
576 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
578 sprintf(s
, "t[%d]", st
->Index
);
580 case PROGRAM_STATE_VAR
:
581 case PROGRAM_UNIFORM
:
582 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
584 case PROGRAM_VARYING
:
585 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
588 sprintf(s
, "input[%d]", st
->Index
);
591 sprintf(s
, "output[%d]", st
->Index
);
596 return _mesa_strdup(s
);
604 * Return an annotation string for an instruction.
607 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
608 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
611 const char *operator;
616 len
+= strlen(dstAnnot
);
618 dstAnnot
= _mesa_strdup("");
621 len
+= strlen(srcAnnot0
);
623 srcAnnot0
= _mesa_strdup("");
626 len
+= strlen(srcAnnot1
);
628 srcAnnot1
= _mesa_strdup("");
631 len
+= strlen(srcAnnot2
);
633 srcAnnot2
= _mesa_strdup("");
664 s
= (char *) malloc(len
);
665 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
666 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
667 assert(_mesa_strlen(s
) < len
);
683 * Generate code for a simple arithmetic instruction.
684 * Either 1, 2 or 3 operands.
686 static struct prog_instruction
*
687 emit_arith(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
689 struct prog_instruction
*inst
;
690 const slang_ir_info
*info
= slang_find_ir_info(n
->Opcode
);
691 char *srcAnnot
[3], *dstAnnot
;
695 assert(info
->InstOpcode
!= OPCODE_NOP
);
697 srcAnnot
[0] = srcAnnot
[1] = srcAnnot
[2] = dstAnnot
= NULL
;
699 #if PEEPHOLE_OPTIMIZATIONS
700 /* Look for MAD opportunity */
701 if (info
->NumParams
== 2 &&
702 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
703 /* found pattern IR_ADD(IR_MUL(A, B), C) */
704 emit(emitInfo
, n
->Children
[0]->Children
[0]); /* A */
705 emit(emitInfo
, n
->Children
[0]->Children
[1]); /* B */
706 emit(emitInfo
, n
->Children
[1]); /* C */
707 /* generate MAD instruction */
708 inst
= new_instruction(emitInfo
, OPCODE_MAD
);
709 /* operands: A, B, C: */
710 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Children
[0]->Store
);
711 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[0]->Children
[1]->Store
);
712 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[1]->Store
);
713 free_temp_storage(emitInfo
->vt
, n
->Children
[0]->Children
[0]);
714 free_temp_storage(emitInfo
->vt
, n
->Children
[0]->Children
[1]);
715 free_temp_storage(emitInfo
->vt
, n
->Children
[1]);
717 else if (info
->NumParams
== 2 &&
718 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
719 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
720 emit(emitInfo
, n
->Children
[0]); /* A */
721 emit(emitInfo
, n
->Children
[1]->Children
[0]); /* B */
722 emit(emitInfo
, n
->Children
[1]->Children
[1]); /* C */
723 /* generate MAD instruction */
724 inst
= new_instruction(emitInfo
, OPCODE_MAD
);
725 /* operands: B, C, A */
726 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Children
[0]->Store
);
727 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Children
[1]->Store
);
728 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[0]->Store
);
729 free_temp_storage(emitInfo
->vt
, n
->Children
[1]->Children
[0]);
730 free_temp_storage(emitInfo
->vt
, n
->Children
[1]->Children
[1]);
731 free_temp_storage(emitInfo
->vt
, n
->Children
[0]);
738 /* gen code for children */
739 for (i
= 0; i
< info
->NumParams
; i
++)
740 emit(emitInfo
, n
->Children
[i
]);
742 /* gen this instruction and src registers */
743 inst
= new_instruction(emitInfo
, info
->InstOpcode
);
744 for (i
= 0; i
< info
->NumParams
; i
++)
745 storage_to_src_reg(&inst
->SrcReg
[i
], n
->Children
[i
]->Store
);
748 for (i
= 0; i
< info
->NumParams
; i
++)
749 srcAnnot
[i
] = storage_annotation(n
->Children
[i
], emitInfo
->prog
);
752 for (i
= 0; i
< info
->NumParams
; i
++)
753 free_temp_storage(emitInfo
->vt
, n
->Children
[i
]);
758 if (!alloc_temp_storage(emitInfo
, n
, info
->ResultSize
))
761 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
763 dstAnnot
= storage_annotation(n
, emitInfo
->prog
);
765 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
, srcAnnot
[0],
766 srcAnnot
[1], srcAnnot
[2]);
768 /*_mesa_print_instruction(inst);*/
774 * Emit code for == and != operators. These could normally be handled
775 * by emit_arith() except we need to be able to handle structure comparisons.
777 static struct prog_instruction
*
778 emit_compare(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
780 struct prog_instruction
*inst
;
782 assert(n
->Opcode
== IR_SEQUAL
|| n
->Opcode
== IR_SNEQUAL
);
784 /* gen code for children */
785 emit(emitInfo
, n
->Children
[0]);
786 emit(emitInfo
, n
->Children
[1]);
788 assert(n
->Children
[0]->Store
->Size
== n
->Children
[1]->Store
->Size
);
790 /* gen this instruction and src registers */
791 inst
= new_instruction(emitInfo
,
792 (n
->Opcode
== IR_SEQUAL
) ? OPCODE_SEQ
: OPCODE_SNE
);
793 if (n
->Children
[0]->Store
->Size
> 4) {
795 _mesa_problem(NULL
, "struct compare not implemented!");
799 /* small/simple types */
800 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
801 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
805 free_temp_storage(emitInfo
->vt
, n
->Children
[0]);
806 free_temp_storage(emitInfo
->vt
, n
->Children
[1]);
810 if (!alloc_temp_storage(emitInfo
, n
, 1)) /* 1 bool */
813 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
821 * Generate code for an IR_CLAMP instruction.
823 static struct prog_instruction
*
824 emit_clamp(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
826 struct prog_instruction
*inst
;
828 assert(n
->Opcode
== IR_CLAMP
);
834 inst
= emit(emitInfo
, n
->Children
[0]);
836 /* If lower limit == 0.0 and upper limit == 1.0,
837 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
839 * emit OPCODE_MIN, OPCODE_MAX sequence.
842 /* XXX this isn't quite finished yet */
843 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
844 n
->Children
[1]->Value
[0] == 0.0 &&
845 n
->Children
[1]->Value
[1] == 0.0 &&
846 n
->Children
[1]->Value
[2] == 0.0 &&
847 n
->Children
[1]->Value
[3] == 0.0 &&
848 n
->Children
[2]->Opcode
== IR_FLOAT
&&
849 n
->Children
[2]->Value
[0] == 1.0 &&
850 n
->Children
[2]->Value
[1] == 1.0 &&
851 n
->Children
[2]->Value
[2] == 1.0 &&
852 n
->Children
[2]->Value
[3] == 1.0) {
854 inst
= prev_instruction(prog
);
856 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
857 /* and prev instruction's DstReg matches n->Children[0]->Store */
858 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
859 n
->Store
= n
->Children
[0]->Store
;
866 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
869 emit(emitInfo
, n
->Children
[1]);
870 emit(emitInfo
, n
->Children
[2]);
872 /* tmp = max(ch[0], ch[1]) */
873 inst
= new_instruction(emitInfo
, OPCODE_MAX
);
874 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
875 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
876 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
878 /* tmp = min(tmp, ch[2]) */
879 inst
= new_instruction(emitInfo
, OPCODE_MIN
);
880 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
881 storage_to_src_reg(&inst
->SrcReg
[0], n
->Store
);
882 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[2]->Store
);
888 static struct prog_instruction
*
889 emit_negation(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
891 /* Implement as MOV dst, -src; */
892 /* XXX we could look at the previous instruction and in some circumstances
893 * modify it to accomplish the negation.
895 struct prog_instruction
*inst
;
897 emit(emitInfo
, n
->Children
[0]);
900 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
903 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
904 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
905 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
906 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
911 static struct prog_instruction
*
912 emit_label(slang_emit_info
*emitInfo
, const slang_ir_node
*n
)
915 assert(_slang_label_get_location(n
->Label
) < 0);
916 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
922 static struct prog_instruction
*
923 emit_jump(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
925 struct prog_instruction
*inst
;
928 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
929 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
930 inst
->BranchTarget
= _slang_label_get_location(n
->Label
);
931 if (inst
->BranchTarget
< 0) {
932 _slang_label_add_reference(n
->Label
, emitInfo
->prog
->NumInstructions
- 1);
938 static struct prog_instruction
*
939 emit_kill(slang_emit_info
*emitInfo
)
941 struct prog_instruction
*inst
;
942 /* NV-KILL - discard fragment depending on condition code.
943 * Note that ARB-KILL depends on sign of vector operand.
945 inst
= new_instruction(emitInfo
, OPCODE_KIL_NV
);
946 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
951 static struct prog_instruction
*
952 emit_tex(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
954 struct prog_instruction
*inst
;
956 (void) emit(emitInfo
, n
->Children
[1]);
958 if (n
->Opcode
== IR_TEX
) {
959 inst
= new_instruction(emitInfo
, OPCODE_TEX
);
961 else if (n
->Opcode
== IR_TEXB
) {
962 inst
= new_instruction(emitInfo
, OPCODE_TXB
);
965 assert(n
->Opcode
== IR_TEXP
);
966 inst
= new_instruction(emitInfo
, OPCODE_TXP
);
970 if (!alloc_temp_storage(emitInfo
, n
, 4))
973 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
975 /* Child[1] is the coord */
976 assert(n
->Children
[1]->Store
->File
!= PROGRAM_UNDEFINED
);
977 assert(n
->Children
[1]->Store
->Index
>= 0);
978 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
980 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
981 assert(n
->Children
[0]->Store
);
982 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
984 inst
->Sampler
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
985 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
986 inst
->TexSrcUnit
= 27; /* Dummy value; the TexSrcUnit will be computed at
987 * link time, using the sampler uniform's value.
993 static struct prog_instruction
*
994 emit_move(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
996 struct prog_instruction
*inst
;
999 emit(emitInfo
, n
->Children
[0]);
1002 assert(n
->Children
[1]);
1003 inst
= emit(emitInfo
, n
->Children
[1]);
1005 assert(n
->Children
[1]->Store
->Index
>= 0);
1008 n
->Store
= n
->Children
[0]->Store
;
1010 #if PEEPHOLE_OPTIMIZATIONS
1011 if (inst
&& _slang_is_temp(emitInfo
->vt
, n
->Children
[1]->Store
)) {
1012 /* Peephole optimization:
1013 * Just modify the RHS to put its result into the dest of this
1014 * MOVE operation. Then, this MOVE is a no-op.
1016 _slang_free_temp(emitInfo
->vt
, n
->Children
[1]->Store
);
1017 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
1018 /* fixup the prev (RHS) instruction */
1019 assert(n
->Children
[0]->Store
->Index
>= 0);
1020 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
1026 if (n
->Children
[0]->Store
->Size
> 4) {
1027 /* move matrix/struct etc (block of registers) */
1028 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
1029 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
1030 GLint size
= srcStore
.Size
;
1031 ASSERT(n
->Children
[0]->Writemask
== WRITEMASK_XYZW
);
1032 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
1036 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1037 inst
->Comment
= _mesa_strdup("IR_MOVE block");
1038 storage_to_dst_reg(&inst
->DstReg
, &dstStore
, n
->Writemask
);
1039 storage_to_src_reg(&inst
->SrcReg
[0], &srcStore
);
1046 /* single register move */
1047 char *srcAnnot
, *dstAnnot
;
1048 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1049 assert(n
->Children
[0]->Store
->Index
>= 0);
1050 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
1051 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
1052 dstAnnot
= storage_annotation(n
->Children
[0], emitInfo
->prog
);
1053 srcAnnot
= storage_annotation(n
->Children
[1], emitInfo
->prog
);
1054 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1055 srcAnnot
, NULL
, NULL
);
1057 free_temp_storage(emitInfo
->vt
, n
->Children
[1]);
1063 static struct prog_instruction
*
1064 emit_cond(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1066 /* Conditional expression (in if/while/for stmts).
1067 * Need to update condition code register.
1068 * Next instruction is typically an IR_IF.
1070 struct prog_instruction
*inst
;
1072 if (!n
->Children
[0])
1075 inst
= emit(emitInfo
, n
->Children
[0]);
1077 /* set inst's CondUpdate flag */
1078 inst
->CondUpdate
= GL_TRUE
;
1079 return inst
; /* XXX or null? */
1082 /* This'll happen for things like "if (i) ..." where no code
1083 * is normally generated for the expression "i".
1084 * Generate a move instruction just to set condition codes.
1085 * Note: must use full 4-component vector since all four
1086 * condition codes must be set identically.
1088 if (!alloc_temp_storage(emitInfo
, n
, 4))
1090 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1091 inst
->CondUpdate
= GL_TRUE
;
1092 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1093 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1094 _slang_free_temp(emitInfo
->vt
, n
->Store
);
1095 inst
->Comment
= _mesa_strdup("COND expr");
1096 return inst
; /* XXX or null? */
1104 static struct prog_instruction
*
1105 emit_not(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1108 slang_ir_storage st
;
1109 struct prog_instruction
*inst
;
1111 /* need zero constant */
1112 st
.File
= PROGRAM_CONSTANT
;
1114 st
.Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
, &zero
,
1118 (void) emit(emitInfo
, n
->Children
[0]);
1119 /* XXXX if child instr is SGT convert to SLE, if SEQ, SNE, etc */
1122 if (!alloc_temp_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1125 inst
= new_instruction(emitInfo
, OPCODE_SEQ
);
1126 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1127 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1128 storage_to_src_reg(&inst
->SrcReg
[1], &st
);
1130 free_temp_storage(emitInfo
->vt
, n
->Children
[0]);
1132 inst
->Comment
= _mesa_strdup("NOT");
1137 static struct prog_instruction
*
1138 emit_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1140 struct gl_program
*prog
= emitInfo
->prog
;
1141 struct prog_instruction
*ifInst
;
1142 GLuint ifInstLoc
, elseInstLoc
= 0;
1144 emit(emitInfo
, n
->Children
[0]); /* the condition */
1145 ifInstLoc
= prog
->NumInstructions
;
1146 if (emitInfo
->EmitHighLevelInstructions
) {
1147 ifInst
= new_instruction(emitInfo
, OPCODE_IF
);
1148 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1149 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1152 /* conditional jump to else, or endif */
1153 ifInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1154 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1155 ifInst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1156 ifInst
->Comment
= _mesa_strdup("if zero");
1160 emit(emitInfo
, n
->Children
[1]);
1162 if (n
->Children
[2]) {
1163 /* have else body */
1164 elseInstLoc
= prog
->NumInstructions
;
1165 if (emitInfo
->EmitHighLevelInstructions
) {
1166 (void) new_instruction(emitInfo
, OPCODE_ELSE
);
1169 /* jump to endif instruction */
1170 struct prog_instruction
*inst
;
1171 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1172 inst
->Comment
= _mesa_strdup("else");
1173 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1175 ifInst
= prog
->Instructions
+ ifInstLoc
;
1176 ifInst
->BranchTarget
= prog
->NumInstructions
;
1178 emit(emitInfo
, n
->Children
[2]);
1182 ifInst
= prog
->Instructions
+ ifInstLoc
;
1183 ifInst
->BranchTarget
= prog
->NumInstructions
+ 1;
1186 if (emitInfo
->EmitHighLevelInstructions
) {
1187 (void) new_instruction(emitInfo
, OPCODE_ENDIF
);
1190 if (n
->Children
[2]) {
1191 struct prog_instruction
*elseInst
;
1192 elseInst
= prog
->Instructions
+ elseInstLoc
;
1193 elseInst
->BranchTarget
= prog
->NumInstructions
;
1199 static struct prog_instruction
*
1200 emit_loop(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1202 struct gl_program
*prog
= emitInfo
->prog
;
1203 struct prog_instruction
*beginInst
, *endInst
;
1204 GLuint beginInstLoc
, endInstLoc
;
1207 /* emit OPCODE_BGNLOOP */
1208 beginInstLoc
= prog
->NumInstructions
;
1209 if (emitInfo
->EmitHighLevelInstructions
) {
1210 (void) new_instruction(emitInfo
, OPCODE_BGNLOOP
);
1214 emit(emitInfo
, n
->Children
[0]);
1216 endInstLoc
= prog
->NumInstructions
;
1217 if (emitInfo
->EmitHighLevelInstructions
) {
1218 /* emit OPCODE_ENDLOOP */
1219 endInst
= new_instruction(emitInfo
, OPCODE_ENDLOOP
);
1222 /* emit unconditional BRA-nch */
1223 endInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1224 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1226 /* end instruction's BranchTarget points to top of loop */
1227 endInst
->BranchTarget
= beginInstLoc
;
1229 if (emitInfo
->EmitHighLevelInstructions
) {
1230 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1231 beginInst
= prog
->Instructions
+ beginInstLoc
;
1232 beginInst
->BranchTarget
= prog
->NumInstructions
- 1;
1235 /* Done emitting loop code. Now walk over the loop's linked list of
1236 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1237 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1239 for (ir
= n
->BranchNode
; ir
; ir
= ir
->BranchNode
) {
1240 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1241 assert(inst
->BranchTarget
< 0);
1242 if (ir
->Opcode
== IR_BREAK
||
1243 ir
->Opcode
== IR_BREAK_IF_FALSE
||
1244 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1245 assert(inst
->Opcode
== OPCODE_BRK
||
1246 inst
->Opcode
== OPCODE_BRA
);
1247 /* go to instruction after end of loop */
1248 inst
->BranchTarget
= endInstLoc
+ 1;
1251 assert(ir
->Opcode
== IR_CONT
||
1252 ir
->Opcode
== IR_CONT_IF_FALSE
||
1253 ir
->Opcode
== IR_CONT_IF_TRUE
);
1254 assert(inst
->Opcode
== OPCODE_CONT
||
1255 inst
->Opcode
== OPCODE_BRA
);
1256 /* to go instruction at top of loop */
1257 inst
->BranchTarget
= beginInstLoc
;
1265 * "Continue" or "break" statement.
1266 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1268 static struct prog_instruction
*
1269 emit_cont_break(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1271 gl_inst_opcode opcode
;
1272 struct prog_instruction
*inst
;
1273 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1274 if (emitInfo
->EmitHighLevelInstructions
) {
1275 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1278 opcode
= OPCODE_BRA
;
1280 inst
= new_instruction(emitInfo
, opcode
);
1281 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1287 * Conditional "continue" or "break" statement.
1288 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1290 static struct prog_instruction
*
1291 emit_cont_break_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
,
1292 GLboolean breakTrue
)
1294 gl_inst_opcode opcode
;
1295 struct prog_instruction
*inst
;
1297 /* evaluate condition expr, setting cond codes */
1298 inst
= emit(emitInfo
, n
->Children
[0]);
1300 inst
->CondUpdate
= GL_TRUE
;
1302 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1303 if (emitInfo
->EmitHighLevelInstructions
) {
1304 if (n
->Opcode
== IR_CONT_IF_TRUE
||
1305 n
->Opcode
== IR_CONT_IF_FALSE
)
1306 opcode
= OPCODE_CONT
;
1308 opcode
= OPCODE_BRK
;
1311 opcode
= OPCODE_BRA
;
1313 inst
= new_instruction(emitInfo
, opcode
);
1314 inst
->DstReg
.CondMask
= breakTrue
? COND_NE
: COND_EQ
;
1321 * Remove any SWIZZLE_NIL terms from given swizzle mask (smear prev term).
1322 * Ex: fix_swizzle("zyNN") -> "zyyy"
1325 fix_swizzle(GLuint swizzle
)
1328 for (i
= 0; i
< 4; i
++) {
1329 swz
[i
] = GET_SWZ(swizzle
, i
);
1330 if (swz
[i
] == SWIZZLE_NIL
) {
1331 swz
[i
] = swz
[i
- 1];
1334 return MAKE_SWIZZLE4(swz
[0], swz
[1], swz
[2], swz
[3]);
1338 static struct prog_instruction
*
1339 emit_swizzle(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1343 /* swizzled storage access */
1344 (void) emit(emitInfo
, n
->Children
[0]);
1346 /* "pull-up" the child's storage info, applying our swizzle info */
1347 n
->Store
->File
= n
->Children
[0]->Store
->File
;
1348 n
->Store
->Index
= n
->Children
[0]->Store
->Index
;
1349 n
->Store
->Size
= n
->Children
[0]->Store
->Size
;
1350 /*n->Var = n->Children[0]->Var; XXX for debug */
1351 assert(n
->Store
->Index
>= 0);
1353 swizzle
= fix_swizzle(n
->Store
->Swizzle
);
1356 GLuint s
= n
->Children
[0]->Store
->Swizzle
;
1357 assert(GET_SWZ(s
, 0) != SWIZZLE_NIL
);
1358 assert(GET_SWZ(s
, 1) != SWIZZLE_NIL
);
1359 assert(GET_SWZ(s
, 2) != SWIZZLE_NIL
);
1360 assert(GET_SWZ(s
, 3) != SWIZZLE_NIL
);
1364 /* apply this swizzle to child's swizzle to get composed swizzle */
1365 n
->Store
->Swizzle
= swizzle_swizzle(n
->Children
[0]->Store
->Swizzle
,
1372 * Dereference array element. Just resolve storage for the array
1373 * element represented by this node.
1375 static struct prog_instruction
*
1376 emit_array_element(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1379 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1380 assert(n
->Store
->Size
> 0);
1382 if (n
->Store
->File
== PROGRAM_STATE_VAR
) {
1383 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1387 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1388 /* Constant index */
1389 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1390 const GLint index
= (GLint
) n
->Children
[1]->Value
[0];
1391 n
->Store
->Index
= arrayAddr
+ index
;
1394 /* Variable index - PROBLEM */
1395 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1396 const GLint index
= 0;
1397 _mesa_problem(NULL
, "variable array indexes not supported yet!");
1398 n
->Store
->Index
= arrayAddr
+ index
;
1400 return NULL
; /* no instruction */
1405 * Resolve storage for accessing a structure field.
1407 static struct prog_instruction
*
1408 emit_struct_field(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1410 if (n
->Store
->File
== PROGRAM_STATE_VAR
) {
1411 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1414 GLint offset
= n
->FieldOffset
/ 4;
1415 assert(n
->Children
[0]->Store
->Index
>= 0);
1416 n
->Store
->Index
= n
->Children
[0]->Store
->Index
+ offset
;
1417 if (n
->Store
->Size
== 1) {
1418 GLint swz
= n
->FieldOffset
% 4;
1419 n
->Store
->Swizzle
= MAKE_SWIZZLE4(swz
, swz
, swz
, swz
);
1422 n
->Store
->Swizzle
= SWIZZLE_XYZW
;
1425 return NULL
; /* no instruction */
1429 static struct prog_instruction
*
1430 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1432 struct prog_instruction
*inst
;
1436 switch (n
->Opcode
) {
1438 /* sequence of two sub-trees */
1439 assert(n
->Children
[0]);
1440 assert(n
->Children
[1]);
1441 emit(emitInfo
, n
->Children
[0]);
1442 inst
= emit(emitInfo
, n
->Children
[1]);
1444 n
->Store
= n
->Children
[1]->Store
;
1448 /* new variable scope */
1449 _slang_push_var_table(emitInfo
->vt
);
1450 inst
= emit(emitInfo
, n
->Children
[0]);
1451 _slang_pop_var_table(emitInfo
->vt
);
1455 /* Variable declaration - allocate a register for it */
1457 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1458 assert(n
->Store
->Size
> 0);
1459 assert(n
->Store
->Index
< 0);
1460 if (!n
->Var
|| n
->Var
->isTemp
) {
1461 /* a nameless/temporary variable, will be freed after first use */
1462 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
1463 slang_info_log_error(emitInfo
->log
,
1464 "Ran out of registers, too many temporaries");
1469 /* a regular variable */
1470 _slang_add_variable(emitInfo
->vt
, n
->Var
);
1471 if (!_slang_alloc_var(emitInfo
->vt
, n
->Store
)) {
1472 slang_info_log_error(emitInfo
->log
,
1473 "Ran out of registers, too many variables");
1477 printf("IR_VAR_DECL %s %d store %p\n",
1478 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1480 assert(n
->Var
->aux
== n
->Store
);
1482 if (emitInfo
->EmitComments
) {
1483 /* emit NOP with comment describing the variable's storage location */
1485 sprintf(s
, "TEMP[%d]%s = variable %s (size %d)",
1487 _mesa_swizzle_string(n
->Store
->Swizzle
, 0, GL_FALSE
),
1488 (n
->Var
? (char *) n
->Var
->a_name
: "anonymous"),
1490 inst
= new_instruction(emitInfo
, OPCODE_NOP
);
1491 inst
->Comment
= _mesa_strdup(s
);
1497 /* Reference to a variable
1498 * Storage should have already been resolved/allocated.
1501 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1503 if (n
->Store
->File
== PROGRAM_STATE_VAR
&&
1504 n
->Store
->Index
< 0) {
1505 n
->Store
->Index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
);
1508 if (n
->Store
->Index
< 0) {
1509 printf("#### VAR %s not allocated!\n", (char*)n
->Var
->a_name
);
1511 assert(n
->Store
->Index
>= 0);
1512 assert(n
->Store
->Size
> 0);
1516 return emit_array_element(emitInfo
, n
);
1518 return emit_struct_field(emitInfo
, n
);
1520 return emit_swizzle(emitInfo
, n
);
1524 emit(emitInfo
, n
->Children
[0]);
1525 inst
= new_instruction(emitInfo
, OPCODE_MOV
);
1527 if (!alloc_temp_storage(emitInfo
, n
, 1))
1530 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
1531 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
1532 if (emitInfo
->EmitComments
)
1533 inst
->Comment
= _mesa_strdup("int to float");
1536 /* Simple arithmetic */
1568 /* trinary operators */
1570 return emit_arith(emitInfo
, n
);
1574 return emit_compare(emitInfo
, n
);
1577 return emit_clamp(emitInfo
, n
);
1581 return emit_tex(emitInfo
, n
);
1583 return emit_negation(emitInfo
, n
);
1585 /* find storage location for this float constant */
1586 n
->Store
->Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
, n
->Value
,
1588 &n
->Store
->Swizzle
);
1589 if (n
->Store
->Index
< 0) {
1590 slang_info_log_error(emitInfo
->log
, "Ran out of space for constants");
1596 return emit_move(emitInfo
, n
);
1599 return emit_cond(emitInfo
, n
);
1602 return emit_not(emitInfo
, n
);
1605 return emit_label(emitInfo
, n
);
1609 return emit_jump(emitInfo
, n
);
1611 return emit_kill(emitInfo
);
1614 return emit_if(emitInfo
, n
);
1617 return emit_loop(emitInfo
, n
);
1618 case IR_BREAK_IF_FALSE
:
1619 case IR_CONT_IF_FALSE
:
1620 return emit_cont_break_if(emitInfo
, n
, GL_FALSE
);
1621 case IR_BREAK_IF_TRUE
:
1622 case IR_CONT_IF_TRUE
:
1623 return emit_cont_break_if(emitInfo
, n
, GL_TRUE
);
1627 return emit_cont_break(emitInfo
, n
);
1630 return new_instruction(emitInfo
, OPCODE_BGNSUB
);
1632 return new_instruction(emitInfo
, OPCODE_ENDSUB
);
1634 return new_instruction(emitInfo
, OPCODE_RET
);
1640 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
1648 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
1649 struct gl_program
*prog
, GLboolean withEnd
,
1650 slang_info_log
*log
)
1652 GET_CURRENT_CONTEXT(ctx
);
1654 slang_emit_info emitInfo
;
1658 emitInfo
.prog
= prog
;
1660 emitInfo
.EmitHighLevelInstructions
= ctx
->Shader
.EmitHighLevelInstructions
;
1661 emitInfo
.EmitComments
= 1+ctx
->Shader
.EmitComments
;
1663 (void) emit(&emitInfo
, n
);
1665 /* finish up by adding the END opcode to program */
1667 struct prog_instruction
*inst
;
1668 inst
= new_instruction(&emitInfo
, OPCODE_END
);
1673 printf("*********** End emit code (%u inst):\n", prog
->NumInstructions
);
1674 _mesa_print_program(prog
);
1675 _mesa_print_program_parameters(ctx
,prog
);