2 * Mesa 3-D graphics library
5 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
35 #include "prog_instruction.h"
36 #include "prog_parameter.h"
37 #include "prog_print.h"
38 #include "slang_emit.h"
39 #include "slang_error.h"
42 #define PEEPHOLE_OPTIMIZATIONS 1
47 * Assembly and IR info
51 slang_ir_opcode IrOpcode
;
53 gl_inst_opcode InstOpcode
;
54 GLuint ResultSize
, NumParams
;
59 static slang_ir_info IrInfo
[] = {
61 { IR_ADD
, "IR_ADD", OPCODE_ADD
, 4, 2 },
62 { IR_SUB
, "IR_SUB", OPCODE_SUB
, 4, 2 },
63 { IR_MUL
, "IR_MUL", OPCODE_MUL
, 4, 2 },
64 { IR_DIV
, "IR_DIV", OPCODE_NOP
, 0, 2 }, /* XXX broke */
65 { IR_DOT4
, "IR_DOT_4", OPCODE_DP4
, 1, 2 },
66 { IR_DOT3
, "IR_DOT_3", OPCODE_DP3
, 1, 2 },
67 { IR_CROSS
, "IR_CROSS", OPCODE_XPD
, 3, 2 },
68 { IR_LRP
, "IR_LRP", OPCODE_LRP
, 4, 3 },
69 { IR_MIN
, "IR_MIN", OPCODE_MIN
, 4, 2 },
70 { IR_MAX
, "IR_MAX", OPCODE_MAX
, 4, 2 },
71 { IR_CLAMP
, "IR_CLAMP", OPCODE_NOP
, 4, 3 }, /* special case: emit_clamp() */
72 { IR_SEQUAL
, "IR_SEQUAL", OPCODE_SEQ
, 4, 2 },
73 { IR_SNEQUAL
, "IR_SNEQUAL", OPCODE_SNE
, 4, 2 },
74 { IR_SGE
, "IR_SGE", OPCODE_SGE
, 4, 2 },
75 { IR_SGT
, "IR_SGT", OPCODE_SGT
, 4, 2 },
76 { IR_POW
, "IR_POW", OPCODE_POW
, 1, 2 },
78 { IR_I_TO_F
, "IR_I_TO_F", OPCODE_NOP
, 1, 1 },
79 { IR_F_TO_I
, "IR_F_TO_I", OPCODE_INT
, 4, 1 }, /* 4 floats to 4 ints */
80 { IR_EXP
, "IR_EXP", OPCODE_EXP
, 1, 1 },
81 { IR_EXP2
, "IR_EXP2", OPCODE_EX2
, 1, 1 },
82 { IR_LOG2
, "IR_LOG2", OPCODE_LG2
, 1, 1 },
83 { IR_RSQ
, "IR_RSQ", OPCODE_RSQ
, 1, 1 },
84 { IR_RCP
, "IR_RCP", OPCODE_RCP
, 1, 1 },
85 { IR_FLOOR
, "IR_FLOOR", OPCODE_FLR
, 4, 1 },
86 { IR_FRAC
, "IR_FRAC", OPCODE_FRC
, 4, 1 },
87 { IR_ABS
, "IR_ABS", OPCODE_ABS
, 4, 1 },
88 { IR_NEG
, "IR_NEG", OPCODE_NOP
, 4, 1 }, /* special case: emit_negation() */
89 { IR_DDX
, "IR_DDX", OPCODE_DDX
, 4, 1 },
90 { IR_DDX
, "IR_DDY", OPCODE_DDX
, 4, 1 },
91 { IR_SIN
, "IR_SIN", OPCODE_SIN
, 1, 1 },
92 { IR_COS
, "IR_COS", OPCODE_COS
, 1, 1 },
93 { IR_NOISE1
, "IR_NOISE1", OPCODE_NOISE1
, 1, 1 },
94 { IR_NOISE2
, "IR_NOISE2", OPCODE_NOISE2
, 1, 1 },
95 { IR_NOISE3
, "IR_NOISE3", OPCODE_NOISE3
, 1, 1 },
96 { IR_NOISE4
, "IR_NOISE4", OPCODE_NOISE4
, 1, 1 },
99 { IR_SEQ
, "IR_SEQ", OPCODE_NOP
, 0, 0 },
100 { IR_SCOPE
, "IR_SCOPE", OPCODE_NOP
, 0, 0 },
101 { IR_LABEL
, "IR_LABEL", OPCODE_NOP
, 0, 0 },
102 { IR_JUMP
, "IR_JUMP", OPCODE_NOP
, 0, 0 },
103 { IR_CJUMP0
, "IR_CJUMP0", OPCODE_NOP
, 0, 0 },
104 { IR_CJUMP1
, "IR_CJUMP1", OPCODE_NOP
, 0, 0 },
105 { IR_IF
, "IR_IF", OPCODE_NOP
, 0, 0 },
106 { IR_ELSE
, "IR_ELSE", OPCODE_NOP
, 0, 0 },
107 { IR_ENDIF
, "IR_ENDIF", OPCODE_NOP
, 0, 0 },
108 { IR_KILL
, "IR_KILL", OPCODE_NOP
, 0, 0 },
109 { IR_COND
, "IR_COND", OPCODE_NOP
, 0, 0 },
110 { IR_CALL
, "IR_CALL", OPCODE_NOP
, 0, 0 },
111 { IR_MOVE
, "IR_MOVE", OPCODE_NOP
, 0, 1 },
112 { IR_NOT
, "IR_NOT", OPCODE_NOP
, 1, 1 },
113 { IR_VAR
, "IR_VAR", OPCODE_NOP
, 0, 0 },
114 { IR_VAR_DECL
, "IR_VAR_DECL", OPCODE_NOP
, 0, 0 },
115 { IR_TEX
, "IR_TEX", OPCODE_TEX
, 4, 1 },
116 { IR_TEXB
, "IR_TEXB", OPCODE_TXB
, 4, 1 },
117 { IR_TEXP
, "IR_TEXP", OPCODE_TXP
, 4, 1 },
118 { IR_FLOAT
, "IR_FLOAT", OPCODE_NOP
, 0, 0 },
119 { IR_FIELD
, "IR_FIELD", OPCODE_NOP
, 0, 0 },
120 { IR_ELEMENT
, "IR_ELEMENT", OPCODE_NOP
, 0, 0 },
121 { IR_SWIZZLE
, "IR_SWIZZLE", OPCODE_NOP
, 0, 0 },
122 { IR_NOP
, NULL
, OPCODE_NOP
, 0, 0 }
126 static slang_ir_info
*
127 slang_find_ir_info(slang_ir_opcode opcode
)
130 for (i
= 0; IrInfo
[i
].IrName
; i
++) {
131 if (IrInfo
[i
].IrOpcode
== opcode
) {
139 slang_ir_name(slang_ir_opcode opcode
)
141 return slang_find_ir_info(opcode
)->IrName
;
146 * Swizzle a swizzle. That is, return swz2(swz1)
149 swizzle_swizzle(GLuint swz1
, GLuint swz2
)
152 for (i
= 0; i
< 4; i
++) {
153 GLuint c
= GET_SWZ(swz2
, i
);
154 s
[i
] = GET_SWZ(swz1
, c
);
156 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
162 _slang_new_ir_storage(enum register_file file
, GLint index
, GLint size
)
164 slang_ir_storage
*st
;
165 st
= (slang_ir_storage
*) _mesa_calloc(sizeof(slang_ir_storage
));
170 st
->Swizzle
= SWIZZLE_NOOP
;
177 swizzle_string(GLuint swizzle
)
182 for (i
= 1; i
< 5; i
++) {
183 s
[i
] = "xyzw"[GET_SWZ(swizzle
, i
-1)];
190 writemask_string(GLuint writemask
)
195 for (i
= 0; i
< 4; i
++) {
196 if (writemask
& (1 << i
))
204 storage_string(const slang_ir_storage
*st
)
206 static const char *files
[] = {
224 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
226 sprintf(s
, "%s[%d..%d]", files
[st
->File
], st
->Index
,
227 st
->Index
+ st
->Size
- 1);
229 assert(st
->File
< (GLint
) (sizeof(files
) / sizeof(files
[0])));
230 sprintf(s
, "%s[%d]", files
[st
->File
], st
->Index
);
237 slang_print_ir(const slang_ir_node
*n
, int indent
)
243 if (n
->Opcode
!= IR_SEQ
)
245 printf("%3d:", indent
);
247 for (i
= 0; i
< indent
; i
++)
253 printf("SEQ at %p\n", (void*) n
);
255 assert(n
->Children
[0]);
256 assert(n
->Children
[1]);
257 slang_print_ir(n
->Children
[0], indent
+ IND
);
258 slang_print_ir(n
->Children
[1], indent
+ IND
);
261 printf("NEW SCOPE\n");
262 assert(!n
->Children
[1]);
263 slang_print_ir(n
->Children
[0], indent
+ 3);
266 printf("MOVE (writemask = %s)\n", writemask_string(n
->Writemask
));
267 slang_print_ir(n
->Children
[0], indent
+3);
268 slang_print_ir(n
->Children
[1], indent
+3);
271 printf("LABEL: %s\n", n
->Target
);
275 slang_print_ir(n
->Children
[0], indent
+ 3);
278 printf("JUMP %s\n", n
->Target
);
281 printf("CJUMP0 %s\n", n
->Target
);
282 slang_print_ir(n
->Children
[0], indent
+3);
285 printf("CJUMP1 %s\n", n
->Target
);
286 slang_print_ir(n
->Children
[0], indent
+3);
291 slang_print_ir(n
->Children
[0], indent
+3);
301 printf("VAR %s%s at %s store %p\n",
302 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
303 swizzle_string(n
->Store
->Swizzle
),
304 storage_string(n
->Store
), (void*) n
->Store
);
307 printf("VAR_DECL %s (%p) at %s store %p\n",
308 (n
->Var
? (char *) n
->Var
->a_name
: "TEMP"),
309 (void*) n
->Var
, storage_string(n
->Store
),
313 printf("FIELD %s of\n", n
->Target
);
314 slang_print_ir(n
->Children
[0], indent
+3);
317 printf("ASMCALL %s(%d args)\n", n
->Target
, 0/*XXX*/);
320 printf("FLOAT %f %f %f %f\n",
321 n
->Value
[0], n
->Value
[1], n
->Value
[2], n
->Value
[3]);
324 printf("INT_TO_FLOAT %d\n", (int) n
->Value
[0]);
327 printf("SWIZZLE %s of (store %p) \n",
328 swizzle_string(n
->Store
->Swizzle
), (void*) n
->Store
);
329 slang_print_ir(n
->Children
[0], indent
+ 3);
332 printf("%s (%p, %p) (store %p)\n", slang_ir_name(n
->Opcode
),
333 (void*) n
->Children
[0], (void*) n
->Children
[1], (void*) n
->Store
);
334 slang_print_ir(n
->Children
[0], indent
+3);
335 slang_print_ir(n
->Children
[1], indent
+3);
341 * Allocate temporary storage for an intermediate result (such as for
342 * a multiply or add, etc.
345 alloc_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
, GLint size
)
350 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, size
);
351 if (!_slang_alloc_temp(vt
, n
->Store
)) {
352 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
359 * Free temporary storage, if n->Store is, in fact, temp storage.
363 free_temp_storage(slang_var_table
*vt
, slang_ir_node
*n
)
365 if (n
->Store
->File
== PROGRAM_TEMPORARY
&& n
->Store
->Index
>= 0) {
366 if (_slang_is_temp(vt
, n
->Store
)) {
367 _slang_free_temp(vt
, n
->Store
);
368 n
->Store
->Index
= -1;
376 * Convert IR storage to an instruction dst register.
379 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
,
382 static const GLuint defaultWritemask
[4] = {
384 WRITEMASK_X
| WRITEMASK_Y
,
385 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
,
386 WRITEMASK_X
| WRITEMASK_Y
| WRITEMASK_Z
| WRITEMASK_W
388 assert(st
->Index
>= 0 && st
->Index
<= 16);
389 dst
->File
= st
->File
;
390 dst
->Index
= st
->Index
;
391 assert(st
->File
!= PROGRAM_UNDEFINED
);
392 assert(st
->Size
>= 1);
393 assert(st
->Size
<= 4);
395 GLuint comp
= GET_SWZ(st
->Swizzle
, 0);
397 assert(writemask
& WRITEMASK_X
);
398 dst
->WriteMask
= WRITEMASK_X
<< comp
;
401 dst
->WriteMask
= defaultWritemask
[st
->Size
- 1] & writemask
;
407 * Convert IR storage to an instruction src register.
410 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
412 static const GLuint defaultSwizzle
[4] = {
413 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
414 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
415 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
416 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
)
418 assert(st
->File
>= 0 && st
->File
<= 16);
419 src
->File
= st
->File
;
420 src
->Index
= st
->Index
;
421 assert(st
->File
!= PROGRAM_UNDEFINED
);
422 assert(st
->Size
>= 1);
423 assert(st
->Size
<= 4);
424 if (st
->Swizzle
!= SWIZZLE_NOOP
)
425 src
->Swizzle
= st
->Swizzle
;
427 src
->Swizzle
= defaultSwizzle
[st
->Size
- 1];
433 * Add new instruction at end of given program.
434 * \param prog the program to append instruction onto
435 * \param opcode opcode for the new instruction
436 * \return pointer to the new instruction
438 static struct prog_instruction
*
439 new_instruction(struct gl_program
*prog
, gl_inst_opcode opcode
)
441 struct prog_instruction
*inst
;
442 prog
->Instructions
= _mesa_realloc_instructions(prog
->Instructions
,
443 prog
->NumInstructions
,
444 prog
->NumInstructions
+ 1);
445 inst
= prog
->Instructions
+ prog
->NumInstructions
;
446 prog
->NumInstructions
++;
447 _mesa_init_instructions(inst
, 1);
448 inst
->Opcode
= opcode
;
454 * Return pointer to last instruction in program.
456 static struct prog_instruction
*
457 prev_instruction(struct gl_program
*prog
)
459 if (prog
->NumInstructions
== 0)
462 return prog
->Instructions
+ prog
->NumInstructions
- 1;
466 static struct prog_instruction
*
467 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
);
471 * Return an annotation string for given node's storage.
474 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
477 const slang_ir_storage
*st
= n
->Store
;
478 static char s
[100] = "";
481 return _mesa_strdup("");
484 case PROGRAM_CONSTANT
:
485 if (st
->Index
>= 0) {
486 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
487 if (st
->Swizzle
== SWIZZLE_NOOP
)
488 sprintf(s
, "{%f, %f, %f, %f}", val
[0], val
[1], val
[2], val
[3]);
490 sprintf(s
, "%f", val
[GET_SWZ(st
->Swizzle
, 0)]);
494 case PROGRAM_TEMPORARY
:
496 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
498 sprintf(s
, "t[%d]", st
->Index
);
500 case PROGRAM_STATE_VAR
:
501 case PROGRAM_UNIFORM
:
502 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
504 case PROGRAM_VARYING
:
505 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
508 sprintf(s
, "input[%d]", st
->Index
);
511 sprintf(s
, "output[%d]", st
->Index
);
516 return _mesa_strdup(s
);
524 * Return an annotation string for an instruction.
527 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
528 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
531 const char *operator;
536 len
+= strlen(dstAnnot
);
538 dstAnnot
= _mesa_strdup("");
541 len
+= strlen(srcAnnot0
);
543 srcAnnot0
= _mesa_strdup("");
546 len
+= strlen(srcAnnot1
);
548 srcAnnot1
= _mesa_strdup("");
551 len
+= strlen(srcAnnot2
);
553 srcAnnot2
= _mesa_strdup("");
584 s
= (char *) malloc(len
);
585 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
586 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
587 assert(_mesa_strlen(s
) < len
);
603 * Generate code for a simple arithmetic instruction.
604 * Either 1, 2 or 3 operands.
606 static struct prog_instruction
*
607 emit_arith(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
609 struct prog_instruction
*inst
;
610 const slang_ir_info
*info
= slang_find_ir_info(n
->Opcode
);
611 char *srcAnnot
[3], *dstAnnot
;
615 assert(info
->InstOpcode
!= OPCODE_NOP
);
617 srcAnnot
[0] = srcAnnot
[1] = srcAnnot
[2] = dstAnnot
= NULL
;
619 #if PEEPHOLE_OPTIMIZATIONS
620 /* Look for MAD opportunity */
621 if (info
->NumParams
== 2 &&
622 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
623 /* found pattern IR_ADD(IR_MUL(A, B), C) */
624 emit(vt
, n
->Children
[0]->Children
[0], prog
); /* A */
625 emit(vt
, n
->Children
[0]->Children
[1], prog
); /* B */
626 emit(vt
, n
->Children
[1], prog
); /* C */
627 /* generate MAD instruction */
628 inst
= new_instruction(prog
, OPCODE_MAD
);
629 /* operands: A, B, C: */
630 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Children
[0]->Store
);
631 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[0]->Children
[1]->Store
);
632 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[1]->Store
);
633 free_temp_storage(vt
, n
->Children
[0]->Children
[0]);
634 free_temp_storage(vt
, n
->Children
[0]->Children
[1]);
635 free_temp_storage(vt
, n
->Children
[1]);
637 else if (info
->NumParams
== 2 &&
638 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
639 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
640 emit(vt
, n
->Children
[0], prog
); /* A */
641 emit(vt
, n
->Children
[1]->Children
[0], prog
); /* B */
642 emit(vt
, n
->Children
[1]->Children
[1], prog
); /* C */
643 /* generate MAD instruction */
644 inst
= new_instruction(prog
, OPCODE_MAD
);
645 /* operands: B, C, A */
646 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Children
[0]->Store
);
647 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Children
[1]->Store
);
648 storage_to_src_reg(&inst
->SrcReg
[2], n
->Children
[0]->Store
);
649 free_temp_storage(vt
, n
->Children
[1]->Children
[0]);
650 free_temp_storage(vt
, n
->Children
[1]->Children
[1]);
651 free_temp_storage(vt
, n
->Children
[0]);
658 /* gen code for children */
659 for (i
= 0; i
< info
->NumParams
; i
++)
660 emit(vt
, n
->Children
[i
], prog
);
662 /* gen this instruction and src registers */
663 inst
= new_instruction(prog
, info
->InstOpcode
);
664 for (i
= 0; i
< info
->NumParams
; i
++)
665 storage_to_src_reg(&inst
->SrcReg
[i
], n
->Children
[i
]->Store
);
668 for (i
= 0; i
< info
->NumParams
; i
++)
669 srcAnnot
[i
] = storage_annotation(n
->Children
[i
], prog
);
672 for (i
= 0; i
< info
->NumParams
; i
++)
673 free_temp_storage(vt
, n
->Children
[i
]);
678 if (!alloc_temp_storage(vt
, n
, info
->ResultSize
))
681 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
683 dstAnnot
= storage_annotation(n
, prog
);
685 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
, srcAnnot
[0],
686 srcAnnot
[1], srcAnnot
[2]);
688 /*_mesa_print_instruction(inst);*/
694 * Generate code for an IR_CLAMP instruction.
696 static struct prog_instruction
*
697 emit_clamp(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
699 struct prog_instruction
*inst
;
701 assert(n
->Opcode
== IR_CLAMP
);
707 inst
= emit(vt
, n
->Children
[0], prog
);
709 /* If lower limit == 0.0 and upper limit == 1.0,
710 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
712 * emit OPCODE_MIN, OPCODE_MAX sequence.
715 /* XXX this isn't quite finished yet */
716 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
717 n
->Children
[1]->Value
[0] == 0.0 &&
718 n
->Children
[1]->Value
[1] == 0.0 &&
719 n
->Children
[1]->Value
[2] == 0.0 &&
720 n
->Children
[1]->Value
[3] == 0.0 &&
721 n
->Children
[2]->Opcode
== IR_FLOAT
&&
722 n
->Children
[2]->Value
[0] == 1.0 &&
723 n
->Children
[2]->Value
[1] == 1.0 &&
724 n
->Children
[2]->Value
[2] == 1.0 &&
725 n
->Children
[2]->Value
[3] == 1.0) {
727 inst
= prev_instruction(prog
);
729 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
730 /* and prev instruction's DstReg matches n->Children[0]->Store */
731 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
732 n
->Store
= n
->Children
[0]->Store
;
739 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
742 emit(vt
, n
->Children
[1], prog
);
743 emit(vt
, n
->Children
[2], prog
);
745 /* tmp = max(ch[0], ch[1]) */
746 inst
= new_instruction(prog
, OPCODE_MAX
);
747 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
748 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
749 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[1]->Store
);
751 /* tmp = min(tmp, ch[2]) */
752 inst
= new_instruction(prog
, OPCODE_MIN
);
753 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
754 storage_to_src_reg(&inst
->SrcReg
[0], n
->Store
);
755 storage_to_src_reg(&inst
->SrcReg
[1], n
->Children
[2]->Store
);
761 static struct prog_instruction
*
762 emit_negation(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
764 /* Implement as MOV dst, -src; */
765 /* XXX we could look at the previous instruction and in some circumstances
766 * modify it to accomplish the negation.
768 struct prog_instruction
*inst
;
770 emit(vt
, n
->Children
[0], prog
);
773 if (!alloc_temp_storage(vt
, n
, n
->Children
[0]->Store
->Size
))
776 inst
= new_instruction(prog
, OPCODE_MOV
);
777 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
778 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
779 inst
->SrcReg
[0].NegateBase
= NEGATE_XYZW
;
780 inst
->Comment
= n
->Comment
;
785 static struct prog_instruction
*
786 emit_label(const char *target
, struct gl_program
*prog
)
788 struct prog_instruction
*inst
;
789 inst
= new_instruction(prog
, OPCODE_NOP
);
790 inst
->Comment
= _mesa_strdup(target
);
795 static struct prog_instruction
*
796 emit_cjump(const char *target
, struct gl_program
*prog
, GLuint zeroOrOne
)
798 struct prog_instruction
*inst
;
799 inst
= new_instruction(prog
, OPCODE_BRA
);
801 inst
->DstReg
.CondMask
= COND_NE
; /* branch if non-zero */
803 inst
->DstReg
.CondMask
= COND_EQ
; /* branch if equal to zero */
804 inst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
805 inst
->Comment
= _mesa_strdup(target
);
810 static struct prog_instruction
*
811 emit_jump(const char *target
, struct gl_program
*prog
)
813 struct prog_instruction
*inst
;
814 inst
= new_instruction(prog
, OPCODE_BRA
);
815 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
816 /*inst->DstReg.CondSwizzle = SWIZZLE_X;*/
817 inst
->Comment
= _mesa_strdup(target
);
822 static struct prog_instruction
*
823 emit_kill(struct gl_program
*prog
)
825 struct prog_instruction
*inst
;
826 /* NV-KILL - discard fragment depending on condition code.
827 * Note that ARB-KILL depends on sign of vector operand.
829 inst
= new_instruction(prog
, OPCODE_KIL_NV
);
830 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
835 static struct prog_instruction
*
836 emit_tex(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
838 struct prog_instruction
*inst
;
839 if (n
->Opcode
== IR_TEX
) {
840 inst
= new_instruction(prog
, OPCODE_TEX
);
842 else if (n
->Opcode
== IR_TEXB
) {
843 inst
= new_instruction(prog
, OPCODE_TXB
);
846 assert(n
->Opcode
== IR_TEXP
);
847 inst
= new_instruction(prog
, OPCODE_TXP
);
851 if (!alloc_temp_storage(vt
, n
, 4))
854 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
856 /* Child[1] is the coord */
857 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
859 /* Child[0] is the sampler (a uniform which'll indicate the texture unit) */
860 assert(n
->Children
[0]->Store
);
861 assert(n
->Children
[0]->Store
->Size
>= TEXTURE_1D_INDEX
);
863 inst
->Sampler
= n
->Children
[0]->Store
->Index
; /* i.e. uniform's index */
864 inst
->TexSrcTarget
= n
->Children
[0]->Store
->Size
;
865 inst
->TexSrcUnit
= 27; /* Dummy value; the TexSrcUnit will be computed at
866 * link time, using the sampler uniform's value.
872 static struct prog_instruction
*
873 emit_move(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
875 struct prog_instruction
*inst
;
878 assert(n
->Children
[1]);
879 inst
= emit(vt
, n
->Children
[1], prog
);
881 assert(n
->Children
[1]->Store
->Index
>= 0);
884 emit(vt
, n
->Children
[0], prog
);
887 n
->Store
= n
->Children
[0]->Store
;
889 #if PEEPHOLE_OPTIMIZATIONS
890 if (inst
&& _slang_is_temp(vt
, n
->Children
[1]->Store
)) {
891 /* Peephole optimization:
892 * Just modify the RHS to put its result into the dest of this
893 * MOVE operation. Then, this MOVE is a no-op.
895 _slang_free_temp(vt
, n
->Children
[1]->Store
);
896 *n
->Children
[1]->Store
= *n
->Children
[0]->Store
;
897 /* fixup the prev (RHS) instruction */
898 assert(n
->Children
[0]->Store
->Index
>= 0);
899 assert(n
->Children
[0]->Store
->Index
< 16);
900 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
906 if (n
->Children
[0]->Store
->Size
> 4) {
907 /* move matrix/struct etc (block of registers) */
908 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
909 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
910 GLint size
= srcStore
.Size
;
911 ASSERT(n
->Children
[0]->Writemask
== WRITEMASK_XYZW
);
912 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
916 inst
= new_instruction(prog
, OPCODE_MOV
);
917 inst
->Comment
= _mesa_strdup("IR_MOVE block");
918 storage_to_dst_reg(&inst
->DstReg
, &dstStore
, n
->Writemask
);
919 storage_to_src_reg(&inst
->SrcReg
[0], &srcStore
);
926 /* single register move */
927 char *srcAnnot
, *dstAnnot
;
928 inst
= new_instruction(prog
, OPCODE_MOV
);
929 assert(n
->Children
[0]->Store
->Index
>= 0);
930 assert(n
->Children
[0]->Store
->Index
< 16);
931 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
, n
->Writemask
);
932 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[1]->Store
);
933 dstAnnot
= storage_annotation(n
->Children
[0], prog
);
934 srcAnnot
= storage_annotation(n
->Children
[1], prog
);
935 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
936 srcAnnot
, NULL
, NULL
);
938 free_temp_storage(vt
, n
->Children
[1]);
944 static struct prog_instruction
*
945 emit_cond(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
947 /* Conditional expression (in if/while/for stmts).
948 * Need to update condition code register.
949 * Next instruction is typically an IR_CJUMP0/1.
951 /* last child expr instruction: */
952 struct prog_instruction
*inst
= emit(vt
, n
->Children
[0], prog
);
954 /* set inst's CondUpdate flag */
955 inst
->CondUpdate
= GL_TRUE
;
956 return inst
; /* XXX or null? */
959 /* This'll happen for things like "if (i) ..." where no code
960 * is normally generated for the expression "i".
961 * Generate a move instruction just to set condition codes.
962 * Note: must use full 4-component vector since all four
963 * condition codes must be set identically.
965 if (!alloc_temp_storage(vt
, n
, 4))
967 inst
= new_instruction(prog
, OPCODE_MOV
);
968 inst
->CondUpdate
= GL_TRUE
;
969 storage_to_dst_reg(&inst
->DstReg
, n
->Store
, n
->Writemask
);
970 storage_to_src_reg(&inst
->SrcReg
[0], n
->Children
[0]->Store
);
971 _slang_free_temp(vt
, n
->Store
);
972 inst
->Comment
= _mesa_strdup("COND expr");
973 return inst
; /* XXX or null? */
978 static struct prog_instruction
*
979 emit(slang_var_table
*vt
, slang_ir_node
*n
, struct gl_program
*prog
)
981 struct prog_instruction
*inst
;
987 /* sequence of two sub-trees */
988 assert(n
->Children
[0]);
989 assert(n
->Children
[1]);
990 emit(vt
, n
->Children
[0], prog
);
991 inst
= emit(vt
, n
->Children
[1], prog
);
993 n
->Store
= n
->Children
[1]->Store
;
997 /* new variable scope */
998 _slang_push_var_table(vt
);
999 inst
= emit(vt
, n
->Children
[0], prog
);
1000 _slang_pop_var_table(vt
);
1004 /* Variable declaration - allocate a register for it */
1006 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1007 assert(n
->Store
->Size
> 0);
1008 assert(n
->Store
->Index
< 0);
1009 if (!n
->Var
|| n
->Var
->isTemp
) {
1010 /* a nameless/temporary variable, will be freed after first use */
1011 if (!_slang_alloc_temp(vt
, n
->Store
))
1012 RETURN_ERROR("Ran out of registers, too many temporaries", 0);
1015 /* a regular variable */
1016 _slang_add_variable(vt
, n
->Var
);
1017 if (!_slang_alloc_var(vt
, n
->Store
))
1018 RETURN_ERROR("Ran out of registers, too many variables", 0);
1020 printf("IR_VAR_DECL %s %d store %p\n",
1021 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
1023 assert(n
->Var
->aux
== n
->Store
);
1028 /* Reference to a variable
1029 * Storage should have already been resolved/allocated.
1032 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1033 if (n
->Store
->Index
< 0) {
1034 printf("#### VAR %s not allocated!\n", (char*)n
->Var
->a_name
);
1036 assert(n
->Store
->Index
>= 0);
1037 assert(n
->Store
->Size
> 0);
1041 /* Dereference array element. Just resolve storage for the array
1042 * element represented by this node.
1045 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
1046 assert(n
->Store
->Size
> 0);
1047 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1048 /* OK, constant index */
1049 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1050 const GLint index
= (GLint
) n
->Children
[1]->Value
[0];
1051 n
->Store
->Index
= arrayAddr
+ index
;
1054 /* Problem: variable index */
1055 const GLint arrayAddr
= n
->Children
[0]->Store
->Index
;
1056 const GLint index
= 0;
1057 _mesa_problem(NULL
, "variable array indexes not supported yet!");
1058 n
->Store
->Index
= arrayAddr
+ index
;
1060 return NULL
; /* no instruction */
1063 /* swizzled storage access */
1064 (void) emit(vt
, n
->Children
[0], prog
);
1065 /* "pull-up" the child's storage info, applying our swizzle info */
1066 n
->Store
->File
= n
->Children
[0]->Store
->File
;
1067 n
->Store
->Index
= n
->Children
[0]->Store
->Index
;
1068 n
->Store
->Size
= n
->Children
[0]->Store
->Size
;
1069 assert(n
->Store
->Index
>= 0);
1070 n
->Store
->Swizzle
= swizzle_swizzle(n
->Children
[0]->Store
->Swizzle
,
1074 /* Simple arithmetic */
1106 /* trinary operators */
1108 return emit_arith(vt
, n
, prog
);
1110 return emit_clamp(vt
, n
, prog
);
1114 return emit_tex(vt
, n
, prog
);
1116 return emit_negation(vt
, n
, prog
);
1118 /* find storage location for this float constant */
1119 n
->Store
->Index
= _mesa_add_unnamed_constant(prog
->Parameters
, n
->Value
,
1121 &n
->Store
->Swizzle
);
1122 if (n
->Store
->Index
< 0) {
1123 RETURN_ERROR("Ran out of space for constants.", 0);
1128 return emit_move(vt
, n
, prog
);
1131 return emit_cond(vt
, n
, prog
);
1134 return emit_label(n
->Target
, prog
);
1136 return emit_jump(n
->Target
, prog
);
1138 return emit_cjump(n
->Target
, prog
, 0);
1140 return emit_cjump(n
->Target
, prog
, 1);
1142 return emit_kill(prog
);
1146 struct prog_instruction
*inst
;
1147 emit(vt
, n
->Children
[0], prog
); /* the condition */
1148 inst
= new_instruction(prog
, OPCODE_IF
);
1149 inst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1150 inst
->DstReg
.CondSwizzle
= SWIZZLE_X
;
1155 struct prog_instruction
*inst
;
1156 inst
= new_instruction(prog
, OPCODE_ELSE
);
1161 struct prog_instruction
*inst
;
1162 inst
= new_instruction(prog
, OPCODE_ENDIF
);
1167 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
1175 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
1176 struct gl_program
*prog
, GLboolean withEnd
)
1180 if (emit(vt
, n
, prog
)) {
1181 /* finish up by adding the END opcode to program */
1183 struct prog_instruction
*inst
;
1184 inst
= new_instruction(prog
, OPCODE_END
);
1189 /* record an error? */
1193 printf("*********** End generate code (%u inst):\n", prog
->NumInstructions
);
1195 _mesa_print_program(prog
);
1196 _mesa_print_program_parameters(ctx
,prog
);